JP2013219279A - Nonvolatile storage device, electronic circuit device and nonvolatile storage device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nonvolatile storage device, an electronic circuit device and a nonvolatile storage device manufacturing method, which can reduce an operating voltage.SOLUTION: A nonvolatile storage element comprises an electrochemical cell which includes a first electrode, a second electrode, an electrolyte, a first electrochromic layer contacting the first electrode and the electrolyte, and a second electrochromic layer contacting the second electrode and the electrolyte, and in which an oxidation state and a reduction state are complementary between the first electrochromic layer and the second electrochromic layer.

Description

  The present invention relates to a nonvolatile memory device, an electronic circuit device, and a method for manufacturing the nonvolatile memory device.

  In recent years, for system integration, not flat and rigid base materials (for example, printed wiring boards and semiconductor wafers), but uneven surfaces (for example, on equipment casings) or flexible base materials (for example, There is a demand for a technique for forming an electronic circuit on a plastic film and paper.

  In relation to the above, Patent Document 1 (Japanese Patent Publication No. 2008-544519) discloses a method for manufacturing a ferroelectric memory device. The ferroelectric memory device is a ferroelectric memory device that includes a ferroelectric polymer layer sandwiched between first and second electrode pairs. In Patent Document 1, a ferroelectric polymer layer is realized in each memory device by an appropriate printing process together with both electrode sets, and the memory operation is performed by switching the polarization state of the ferroelectric polymer. The point is disclosed.

Special table 2008-544519 gazette

  In the method disclosed in Patent Document 1, a ferroelectric polymer is used. When using a ferroelectric polymer, a high operating voltage (typically 20 V or more) is required. This is because a ferroelectric polymer has a structure in which monomers that are units of spontaneous polarization are linked and entangled with each other, so that the structure is difficult to reverse with a large displacement, and is applied to the ferroelectric polymer. The reason is considered that it is difficult to form a thin and uniform thin film in order to increase the electric field strength.

  Accordingly, an object of the present invention is to provide a non-volatile memory device, an electronic circuit device, and a non-volatile memory device manufacturing method that can be formed on an uneven surface or a flexible base material and can reduce operating voltage. There is.

  A nonvolatile memory device according to the present invention includes a nonvolatile memory element including an electrochemical cell, and a control circuit that writes data into the nonvolatile memory element. The electrochemical cell includes a first electrochromic layer, a second electrochromic layer, and an electrolyte layer provided between the first electrochromic layer and the second electrochromic layer. The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The control circuit reads and writes data by controlling the redox state of the first electrochromic layer and the second electrochromic layer.

  A nonvolatile memory device according to the present invention includes a nonvolatile memory element including a first electrochemical cell and a second electrochemical cell, and a control circuit for writing data to the nonvolatile memory element. The first electrochemical cell and the second electrochemical cell are provided between a first electrochromic layer, a second electrochromic layer, and the first electrochromic layer and the second electrochromic layer, respectively. An electrolyte layer. In the first electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. In the second electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are arranged such that when one is oxidized, the other is reduced. Has been. The control circuit reads and writes data by controlling a redox state of the first electrochromic layer and the second electrochromic layer in one of the first electrochemical cell and the second electrochemical cell. I do.

  A nonvolatile memory device according to the present invention includes a plurality of laminated film structures, a plurality of nonvolatile memory elements, and a control circuit that writes data to each of the plurality of nonvolatile memory elements. Each of the nonvolatile memory elements includes an electrochemical cell. The electrochemical cell includes a first electrochromic layer, a second electrochromic layer, and an electrolyte layer provided between the first electrochromic layer and the second electrochromic layer. The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The control circuit reads and writes data by controlling the redox state of the first electrochromic layer and the second electrochromic layer. A plurality of the electrochemical cells are disposed in each of the plurality of film structures.

  An electronic circuit device according to the present invention includes a base material, a non-volatile memory element provided on the base material and including an electrochemical cell, a display element provided on the base material, and the non-volatile memory element And a control circuit for writing data into the device. The electrochemical cell includes a cell side first electrochromic layer, a cell side second electrochromic layer, and a cell side provided between the cell side first electrochromic layer and the cell side second electrochromic layer. An electrolyte layer. The cell-side first electrochromic layer and the cell-side second electrochromic layer are arranged so that when one is in an oxidized state, the other is in a reduced state. The control circuit reads and writes data by controlling the redox state of the cell-side first electrochromic layer and the cell-side second electrochromic layer. The display element is provided between a display element side first electrochromic layer, a display element side second electrochromic layer, the display element side first electrochromic layer, and the display element side second electrochromic layer. A display element side electrolyte layer. The display element side first electrochromic layer and the display element side second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state.

  A method for manufacturing a nonvolatile memory device according to the present invention is a method for manufacturing a nonvolatile memory device including a nonvolatile memory element including an electrochemical cell and a control circuit for writing data in the nonvolatile memory element. The electrochemical cell includes a first electrochromic layer, a second electrochromic layer, and an electrolyte layer provided between the first electrochromic layer and the second electrochromic layer. The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The control circuit reads and writes data by controlling the redox state of the first electrochromic layer and the second electrochromic layer. The method includes a step of forming the first electrochromic layer, a step of forming the second electrochromic layer, a step of forming the electrolyte layer, and a step of forming the control circuit.

  A method for manufacturing a nonvolatile memory device according to the present invention includes a nonvolatile memory element including a first electrochemical cell and a second electrochemical cell, and a control circuit that writes data to the nonvolatile memory element. It is a manufacturing method of a storage device. The first electrochemical cell and the second electrochemical cell are provided between a first electrochromic layer, a second electrochromic layer, and the first electrochromic layer and the second electrochromic layer, respectively. An electrolyte layer. In the first electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. In the second electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are arranged such that when one is oxidized, the other is reduced. Has been. The control circuit reads and writes data by controlling a redox state of the first electrochromic layer and the second electrochromic layer in one of the first electrochemical cell and the second electrochemical cell. I do. The method includes a step of forming the nonvolatile memory element and a step of forming the control circuit. The step of forming the nonvolatile memory element includes a step of forming the first electrochemical cell and a step of forming the second electrochemical cell. The step of forming the first electrochemical cell and the step of forming the second electrochemical cell are respectively a step of forming the first electrochromic layer and a step of forming the second electrochromic layer. And forming the electrolyte layer.

  A method of manufacturing a nonvolatile memory device according to the present invention includes a plurality of laminated film structures, a plurality of nonvolatile memory elements, and a control circuit that writes data to each of the plurality of nonvolatile memory elements. A method for manufacturing a nonvolatile memory device. Each of the nonvolatile memory elements includes an electrochemical cell. The electrochemical cell includes a first electrochromic layer, a second electrochromic layer, and an electrolyte layer provided between the first electrochromic layer and the second electrochromic layer. The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. The control circuit reads and writes data by controlling the redox state of the first electrochromic layer and the second electrochromic layer. A plurality of the electrochemical cells are disposed in each of the plurality of film structures. The method includes the steps of forming the plurality of film structures, laminating the plurality of film structures, and forming the control circuit. The step of forming the plurality of film structures includes a step of forming a plurality of the electrochemical cells on each of the plurality of film substrates.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the non-volatile memory device which can be formed on the surface which has an unevenness | corrugation, and a flexible base material, and can reduce an operating voltage, an electronic circuit device, and a non-volatile memory device is provided.

1 is a circuit diagram schematically showing a nonvolatile memory device according to a first embodiment. FIG. It is sectional drawing which shows a non-volatile memory element. It is a conceptual diagram which shows the data written in the electrochemical cell. It is a conceptual diagram which shows the data written in the electrochemical cell. It is sectional drawing which shows the manufacturing process of a non-volatile memory device. It is sectional drawing which shows schematically the non-volatile memory device which concerns on 2nd Embodiment. It is a top view which shows an example of arrangement | positioning of a 1st electrochromic layer and a 2nd electrochromic layer. FIG. 6 is a basic circuit diagram schematically showing a nonvolatile memory device according to a third embodiment. It is a schematic sectional drawing which shows a non-volatile memory device. It is a conceptual diagram which shows the oxidation reduction state of an electrochemical cell. It is a conceptual diagram which shows the oxidation reduction state of an electrochemical cell. It is a schematic sectional drawing which shows the non-volatile memory device which concerns on 4th Embodiment. It is a top view which shows an example of the layout of a 1st electrochromic layer, a 1st electrochromic layer, and a 2nd electrochromic layer. It is a schematic sectional drawing which shows the non-volatile memory device which concerns on 5th Embodiment. It is a schematic sectional drawing which shows the non-volatile memory device which concerns on 6th Embodiment. It is the schematic which shows the electronic circuit apparatus which concerns on 7th Embodiment. It is a schematic sectional drawing which shows an electronic circuit apparatus.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a circuit diagram schematically showing the nonvolatile memory device 1 according to this embodiment.

  The nonvolatile memory device 1 includes a control circuit 3, a plurality of bit lines 6, a plurality of word lines 7, a plurality of plate lines 8, a plurality of nonvolatile memory elements 2, and a bit line voltage detection circuit 9. However, in FIG. 1, only one bit line 6, word line 7, plate line 8, and nonvolatile memory element 2 are drawn. The plurality of word lines 7 and the plurality of plate lines 8 extend in parallel. The plurality of bit lines 6 extend so as to be orthogonal to the plurality of word lines 7. The plurality of nonvolatile memory elements 2 are arranged in a matrix so as to correspond to a plurality of intersections formed by the plurality of bit lines 6 and the plurality of word lines 7.

  The nonvolatile memory element 2 is a part that stores data, and includes a transistor 4 (switch circuit) and an electrochemical cell 5. The transistor 4 is arranged to switch the electrical connection between the bit line 6 and one end of the electrochemical cell 5. The gate of the transistor 4 is connected to the word line 7. The other end of the electrochemical cell 5 is connected to the plate line 8. The control circuit 3 writes data in the electrochemical cell 5 by controlling the potentials of the word line 7, the bit line 6, and the plate line 8. Details of this point will be described later. The control circuit 3 controls the word line 7 and turns on the transistor 4, thereby reading the data written in the electrochemical cell 5 to the bit line 6. The bit line voltage detection circuit 9 includes a sense amplifier circuit and the like, and has a function of reading data stored in the electrochemical cell 5 by detecting the voltage of the bit line 6.

  Next, the nonvolatile memory element 2 will be described in detail. FIG. 2 is a cross-sectional view showing the nonvolatile memory device 1.

  As shown in FIG. 2, the nonvolatile memory element 2 is provided on the glass substrate 10. That is, the transistor 4 and the electrochemical cell 5 are provided as the nonvolatile memory element 2 on the glass substrate 10.

  The transistor 4 includes a gate electrode 18, a semiconductor layer 19 (a-Si layer), a drain electrode 20, and a source electrode 21. The gate electrode 18 is provided on the glass substrate 10. On the glass substrate 10, a gate insulating film 11 is provided so as to cover the gate electrode 18. A semiconductor layer 19 is provided on the gate electrode 18 via the gate insulating film 11. A drain electrode 20 and a source electrode 21 are provided on the semiconductor layer 19. The drain electrode 20 and the source electrode 21 are covered with a protective film 22.

  Although not shown in FIG. 2, the gate electrode 18 is connected to the word line 7 as shown in FIG. The source electrode 21 is connected to the bit line 6.

  A first electrode 12 is further provided on the glass substrate 10 via a gate insulating film 11. The first electrode 12 is connected to the drain electrode 20.

  The electrochemical cell 5 includes a first electrochromic layer 13, an electrolyte layer 14 (solid electrolyte layer), and a second electrochromic layer 15. The first electrochromic layer 13 is provided on the first electrode 12. That is, the first electrochromic layer 13 is electrically connected to the drain electrode 20 through the first electrode 12. The electrolyte layer 14 is provided so as to cover the first electrochromic layer 13. The second electrochromic layer 15 is provided on the electrolyte layer 14 so as to face at least part of the first electrochromic layer 13. A second electrode 16 is provided on the second electrochromic layer 15. The second electrode 16 is connected to the plate line 8 as shown in FIG. That is, the second electrochromic layer 15 is electrically connected to the plate line 8 through the second electrode 16. A film member 17 is provided on the second electrode 16 as a protective member.

  Here, the electrochromic layer is a layer that undergoes an oxidation reaction or a reduction reaction when a voltage is applied, and the color development changes. In the electrochemical cell 5, the 1st electrochromic layer 13 and the 2nd electrochromic layer 15 are arrange | positioned so that an oxidation state and a reduction state may become complementary. That is, the first electrochromic layer 13 and the second electrochromic layer 15 are arranged such that when the oxidation reaction proceeds on the one hand, the reduction reaction proceeds on the other hand.

  Next, an operation method of the nonvolatile memory device 1 according to this embodiment will be described.

  When writing data, the control circuit 3 (see FIG. 1) controls the voltage of the word line 7 so that the transistor 4 is turned on. Then, the control circuit 3 generates a potential difference between the bit line 6 and the plate line 8. Due to the generated potential difference, one of the first electrochromic layer 13 and the second electrochromic layer 15 is in an oxidized state (Ox), and the other is in a reduced state (Re). For example, when the bit line 6 has a higher potential than the plate line 8 (when the first electrode 12 has a higher potential than the second electrode 16), the reduction reaction proceeds in the first electrochromic layer 13. In the second electrochromic layer 15, the oxidation reaction proceeds. On the other hand, when the plate line 8 has a higher potential than the bit line 6 (when the second electrode 16 has a higher potential than the first electrode 12), the oxidation reaction proceeds in the first electrochromic layer 13. In the second electrochromic layer 15, the reduction reaction proceeds. Even when the transistor 4 is turned off, the state (oxidized state or reduced state) in each electrochromic layer is stably maintained. Therefore, it is possible to store data in the electrochemical cell 5 by associating the oxidation state or reduction state of each electrochromic layer with the data (logical value “1” or logical value “0”).

  3A and 3B are conceptual diagrams showing data written in the electrochemical cell 5. FIG. 3A shows an electrochemical cell 5 in which the value “0” is stored. In the example shown in FIG. 3A, the first electrochromic layer 13 is in a reduced state (Re), and the second electrochromic layer 15 is in an oxidized state (Ox). On the other hand, FIG. 3B shows the electrochemical cell 5 in which the value “1” is stored. In the example shown in FIG. 3B, the first electrochromic layer 13 is in an oxidized state (Ox), and the second electrochromic layer 15 is in a reduced state (Re).

  On the other hand, when reading data, the electrochemical cell 5 is connected to an appropriate load. Specifically, the control circuit 3 (see FIG. 1) controls the voltage of the word line 7 to turn on the transistor 4. Thereby, in each electrochromic layer (13, 15), the reaction opposite to that at the time of data writing proceeds. That is, in each electrochromic layer, the reduction reaction proceeds when the electrochromic layer is in the oxidized state, and the oxidation reaction proceeds when the electrochromic layer is in the reduced state. Then, a voltage corresponding to the reaction is applied to the bit line 6. The value of the voltage applied to the bit line 6 is detected by the bit line voltage detection circuit 9. The bit line voltage detection circuit 9 reads whether the data written in the electrochemical cell 5 is “0” or “1” based on the detection result. The bit line voltage detection circuit 9 detects the voltage of the bit line 6 by, for example, using a sense amplifier and comparing the voltage of the bit line 6 with an appropriate reference voltage.

  By the operation method described above, the nonvolatile memory device 1 capable of binary writing and reading is realized.

  In the present embodiment, the voltage required for writing data depends on the redox potential determined by the first electrochromic layer 13, the second electrochromic layer 15, and the electrolyte layer 14. In general, the required voltage is several volts or less. For example, when Prussian blue or a similar compound is used as each electrochromic layer, the operating voltage is 1 to 2V. Therefore, it is possible to operate at a low voltage as compared with the case where the ferroelectric polymer described in Patent Document 1 (Japanese Patent Publication No. 2008-544519) is used.

  Further, when data is read, the energy accumulated in the electrochemical cell 5 in the information storage process is released. However, a constant voltage is applied to the bit line 6 until the energy is completely released. Therefore, it is not necessary to forcibly change the storage state, and pseudo nondestructive reading can be performed.

  Next, a method for manufacturing the nonvolatile memory device 1 according to this embodiment will be described. FIG. 4 is a cross-sectional view showing the manufacturing process of the nonvolatile memory device 1.

  First, as shown in FIG. 4A, the transistor 4 (a-Si (amorphous Si) TFT) and the first electrode 12 are formed on the glass substrate 10. Specifically, a Ta layer as the gate electrode 18, a SiNx layer as the gate insulating film 11, and a semiconductor layer 19 (a-Si layer) are formed on the glass substrate 10. These layers are formed by, for example, forming a film using a sputtering method, a CVD method, or the like and performing an etching process. Thereafter, an Al layer is formed as the source electrode 21 and the drain electrode 20. Further, an ITO (indium tin oxide) layer is formed as the first electrode 12 so as to be connected to the drain electrode 20.

  Next, as shown in FIG. 4B, the first electrochromic layer 13 is formed. The first electrochromic layer 13 is formed, for example, by applying ink in which Prussian blue nanoparticles are dispersed by an inkjet method.

  Next, as shown in FIG. 4C, the electrolyte layer 14 is formed. The electrolyte layer 14 is formed, for example, by applying a material in which potassium hydroxide is gelled with potassium polyacrylate or the like. Thereby, the 1st intermediate body 23 is obtained.

  On the other hand, as shown in FIG. 4D, a film member 17 (for example, a PET film) on which an ITO film is formed is prepared as the second electrode 16. The ITO film is processed in advance into a desired pattern.

  Next, as shown in FIG. 4E, the second electrochromic layer 15 is formed on the second electrode 16. The second electrochromic layer 15 is formed, for example, by forming a Prussian blue film by an electrolytic method. During film formation, unnecessary portions are masked. Thereby, the 2nd intermediate body 24 is obtained.

  Next, as shown in FIG. 4 (f), the second intermediate 24 is attached onto the first intermediate 23 so that the second electrochromic layer 15 is disposed on the electrolyte layer 14. At this time, electrical connection is appropriately performed. Thereby, the nonvolatile memory device 1 is obtained.

  The nonvolatile memory device 1 described above is merely an example, and the manufacturing method and materials are not limited to the above example.

  For example, the semiconductor layer 19 of the transistor 4 is not limited to the s-Si layer, and a p-Si (polycrystalline Si) layer may be used. The transistor 4 may be formed on a single crystal Si wafer. These transistors and wirings are used for flat panel displays and semiconductor devices, although they have limited substrate materials and formation techniques, and have an advantage of having high reliability. In addition, the semiconductor layer 19 is not only Si-based, but also an amorphous oxide semiconductor typified by In—Ga—Zn—O, an organic semiconductor (pentacene, phthalocyanine, polythiophene, fullerene, carbon nanotube), and nanocarbon. It is also possible to use. These amorphous oxide semiconductors, organic semiconductors, and nanocarbons can be formed by techniques that do not require high temperatures (such as sputtering, vapor deposition, and printing). In addition, the process temperature can be lowered by forming the wiring by a printing method. The transistor 4 can also be formed over a material having low heat resistance such as a plastic film.

  The material used for each electrochromic layer is not limited to Prussian blue. For each electrochromic layer, use of metal hexacyano complex, which is Prussian blue or a Prussian blue-related compound, is easy to fabricate, has high repeatability for read and write operations, and adjusts composition and constituent elements It is desirable because the operating voltage can be adjusted by the above. However, a metal oxide electrochromic material such as tungsten oxide and an organic electrochromic material such as viologen can also be used.

  The first electrochromic layer 13 and the second electrochromic layer 15 may be combined so that when the oxidation reaction proceeds on the one hand, the reduction reaction proceeds on the other hand, and it is not always necessary to use the same type of material.

  Note that the color of the electrochromic layer may change as data is read and written. Therefore, when it is necessary to conceal the stored data, it is preferable to cover the nonvolatile memory element 2 portion with an opaque member.

  The nonvolatile memory device 1 according to the present embodiment can be applied to, for example, a sheet-like, card-like, or disk-like electronic device, an IC card, and the like.

(Second Embodiment)
Next, the second embodiment will be described. FIG. 5 is a cross-sectional view schematically showing the nonvolatile memory element 2 according to this embodiment.

  As shown in FIG. 5, in the present embodiment, the first electrochromic layer 13 and the second electrochromic layer 15 are provided on the same layer. That is, the first electrode 12 and the second electrode 16 are provided in different regions on the gate insulating film 11. The first electrochromic layer 13 is provided so as to cover the first electrode 12. The second electrochromic layer 15 is provided so as to cover the second electrode 16. The first electrochromic layer 13 and the second electrochromic layer 15 are separated by a separation groove 38. The electrolyte layer 14 is disposed so as to cover the first electrochromic layer 13 and the second electrochromic layer 15. The separation groove 38 is filled with the electrolyte layer 14. A film member 17 is provided on the electrolyte layer 14.

  In addition, about another point, since the structure similar to 1st Embodiment is employable, detailed description is abbreviate | omitted.

  In the present embodiment, at the time of data writing and reading, the oxidation reaction or reduction reaction of each electrochromic layer proceeds with the separation groove 38 as a center.

  When each electrochromic layer is used as a display element, it is not preferable to provide one electrochromic layer and the other chromic layer on the same plane from the viewpoint of preventing color mixing and improving visibility. However, in this embodiment, each electrochromic layer is used for a memory element. There is no requirement in the memory element as in the case of the display element. Therefore, no problem occurs even if the first electrochromic layer 13 and the second electrochromic layer 15 are provided on the same layer.

  Moreover, in this embodiment, since the 1st electrode 12 and the 2nd electrode 16 are provided on the same layer, they can be formed by the same process. Similarly, the first electrochromic layer 13 and the second electrochromic layer can also be formed by the same process. Therefore, the manufacturing process can be simplified.

  In the first embodiment, the second electrode 16 provided on the film member 17 is processed to have a desired shape. Then, the processed second intermediate body 24 is bonded to the first intermediate body 23 (see FIG. 4F). At the time of pasting, the positions of the first intermediate body 23 and the second intermediate body 24 must be accurately adjusted. In contrast, in the present embodiment, the gate insulating film 11, the transistor 4, the first electrode 12, the second electrode 16, the first electrochromic layer 13, the second electrochromic layer 15, and the electrolyte are formed on the glass substrate 10. After the layer 14 is provided, the film member 17 may be attached. Since no circuit is formed on the film member 17, it is not necessary to perform alignment accurately at the time of bonding. Therefore, the manufacturing process can be simplified also from this viewpoint.

  In the present embodiment, the arrangement of the first electrochromic layer 13 and the second electrochromic layer 15 can be devised. FIG. 6 is a plan view showing an example of the arrangement of the first electrochromic layer 13 and the second electrochromic layer 15 (the arrangement of the first electrode 12 and the second electrode 16). In the example shown in FIG. 6, when viewed from above, the first electrochromic layer 13 and the second electrochromic layer 15 are disposed so as to have a concave portion and a convex portion, respectively. One convex portion of the first electrochromic layer 13 and the second electrochromic layer 15 is disposed in the other concave portion. That is, the 1st electrochromic layer 13 and the 2nd electrochromic layer 15 are arrange | positioned so that it may become a comb shape. By adopting such a layout, the area of the separation groove 38 can be increased. That is, in each electrochromic layer (13, 15), it is possible to increase a region to which an effective electric field is applied when reading or writing data. In each electrochromic layer (13, 15), the region where the oxidation reaction or the reduction reaction proceeds can be increased. This makes it possible to write data more reliably.

(Third embodiment)
Subsequently, a third embodiment will be described. FIG. 7 is a basic circuit diagram schematically showing the nonvolatile memory device 1 according to this embodiment.

  As shown in FIG. 7, in this embodiment, the nonvolatile memory element 2 includes two electrochemical cells 5 (a first electrochemical cell 5-1 and a second electrochemical cell 5-2). . The first electrochemical cell 5-1 is connected at one end to the first bit line 6-1 via the first transistor 4-1. The second electrochemical cell 5-2 is connected at one end to the second bit line 6-2 via the second transistor 4-2. The gate of the first transistor 4-1 and the gate of the second transistor 4-2 are connected to the word line 7. The other end of the first electrochemical cell 5-1 and the other end of the second electrochemical cell 5-2 are connected to the plate line 8. The bit line voltage detection circuit 9 is configured to detect a potential difference between a bit line pair (first bit line 6-1 and second bit line 6-2).

  Note that, similarly to the above-described embodiment, the nonvolatile memory device 1 actually includes a plurality of nonvolatile memory elements 2. A plurality of first bit lines 6-1, second bit lines 6-2, word lines 7, and plate lines are also provided. The nonvolatile memory elements 2 are arranged in a matrix so as to correspond to the intersections of the plurality of word lines 7 and the plurality of bit line pairs (first bit line 6-1 and second bit line 6-2). Yes.

  FIG. 8 is a schematic cross-sectional view showing the nonvolatile memory device 1. With reference to FIG. 8, the structure of each electrochemical cell (5-1, 5-2) is demonstrated.

  Similar to the above-described embodiment, the nonvolatile memory device 1 includes the glass substrate 10. The first transistor 4-1, the second transistor 4-2, the first electrochemical cell 5-1, and the second electrochemical cell 5-2 are provided on the glass substrate 10.

  The first transistor 4-1 and the second transistor 4-2 are arranged in different regions on the glass substrate 10. Since the configuration of each transistor 4 is the same as that of the first embodiment, detailed description thereof is omitted.

  A first electrode 12-1 and a first electrode 12-2 are provided on the glass substrate 10 via a gate insulating film 11. The first electrode 12-1 is connected to the drain electrode of the first transistor 4-1. The first electrode 12-2 is connected to the drain electrode of the second transistor 4-2.

  The first electrochemical cell 5-1 includes a first electrochromic layer 13-1, an electrolyte layer 14, and a second electrochromic layer 15. The second electrochemical cell 5-2 also includes a first electrochromic layer 13-2, an electrolyte layer 14, and a second electrochromic layer 15. In the first electrochemical cell 5-1 and the second electrochemical cell 5-2, the electrolyte layer 14 and the second electrochromic layer 15 are common.

  The first electrochromic layer 13-1 is provided on the first electrode 12-1. The first electrochromic layer 13-2 is provided on the first electrode 12-2. The first electrochromic layer 13-1 and the first electrochromic layer 13-2 are provided on the same layer and are separated by the separation groove 38.

  The electrolyte layer 14 is provided so as to cover the first transistor 4-1, the second transistor 4-2, and the first electrochromic layers (13-1, 13-2). The separation groove 38 is filled with the electrolyte layer 14.

  The second electrochromic layer 15 is provided on the electrolyte layer 14.

  A second electrode 16 is provided on the second electrochromic layer 15. Although not shown, the second electrode 16 is connected to the plate line 8. A film member 17 is provided on the second electrode 16.

  With the configuration as described above, in the first electrochemical cell 5-1, the first electrochromic layer 13-1 is opposed to a part of the second electrochromic layer 15 with the electrolyte layer 14 interposed therebetween. As a result, in the first electrochemical cell 5-1, when one of the first electrochromic layer 13-1 and the second electrochromic layer 15 is in an oxidized state, the other is in a reduced state. Similarly, also in the 2nd electrochemical cell 5-2, a part of 1st electrochromic layer 13-2 and the 2nd electrochromic layer 15 has opposed. Accordingly, when one of the first electrochromic layer 13-2 and the second electrochromic layer 15 is in an oxidized state, the other is in a reduced state.

  Here, in the present embodiment, the first electrochromic layer 13-1 and the first electrochromic layer 13-2 are further arranged such that when one is in an oxidized state, the other is in a reduced state. ing. That is, the 1st electrochemical cell 5-1 and the 2nd electrochemical cell 5-2 are arrange | positioned so that it may be in a complementary state.

  According to this embodiment, a logical value can be stored according to the oxidation-reduction state of each electrochemical cell 5. 9A and 9B are conceptual diagrams showing the oxidation-reduction state of each electrochemical cell (5-1, 5-2). FIG. 9A shows a redox state associated with a state where the logical value is “0”. In the state shown in FIG. 9A, the first electrochromic layer 13-1 is in a reduced state (Re). As a result, the first electrochromic layer 13-2 is in an oxidized state (Ox). In addition, the portion of the second electrochromic layer 15 that faces the first electrochromic layer 13-1 is in an oxidized state (Ox). A portion of the second electrochromic layer 15 that faces the first electrochromic layer 13-2 is in a reduced state (Re). On the other hand, FIG. 9B shows a state associated with a state where the logical value is “1”. In the state shown in FIG. 9B, the first electrochromic layer 13-1 is in an oxidized state (Ox). As a result, the first electrochromic layer 13-2 is in a reduced state (Re). In addition, the portion of the second electrochromic layer 15 that faces the first electrochromic layer 13-1 is in a reduced state (Rx). A portion of the second electrochromic layer 15 that faces the first electrochromic layer 13-2 is in an oxidized state (Ox).

  Next, an operation method of the nonvolatile memory device 1 in this embodiment will be described.

  At the time of data writing, the control circuit 3 applies a voltage to the word line 7 to turn on the first transistor 4-1 and the second transistor 4-2. Next, the control circuit 3 determines the voltage so that a potential difference is generated between the plate line 8 and one of the first bit line 6-1 and the second bit line 6-2 according to the data to be written. Apply. Thereby, the oxidation-reduction reaction proceeds in the first electrochemical cell 5-1 and the second electrochemical cell 5-2. As a result, the first electrochemical cell 5-1 and the second electrochemical cell 5-2 can be brought into the state shown in FIG. 9A or 9B, and data can be written.

  On the other hand, when reading data, the control circuit 3 applies a voltage to the word line 7 to turn on the first transistor 4-1 and the second transistor 4-2. As a result, the potential of one of the first bit line 6-1 and the second bit line 6-2 increases and the other potential decreases. As a result, a potential difference is generated between the first bit line 6-1 and the second bit line 6-2. The generated potential difference is amplified by the bit line voltage detection circuit 9. The bit line voltage detection circuit 9 reads data stored in the nonvolatile memory element 2 based on the amplified potential difference.

  In the embodiment described above, at the time of reading, the potential read to the bit line 6 is compared with a predetermined reference potential. Here, due to the deterioration of the electrochemical cell 5, the amount of change in the potential of the bit line 6 during reading may be reduced. In this case, it becomes difficult to read the magnitude relationship between the potential of the bit line 6 after the change and the reference potential. On the other hand, in this embodiment, at the time of reading, one potential of the first bit line 6-1 and the second bit line 6-2 rises and the other potential falls. Then, data is read by the potential difference between the first bit line 6-1 and the second bit line 6-2. For this reason, in this embodiment, the margin of the potential difference at the time of reading can be doubled that in the above-described embodiment. Even when each electrochemical cell 5 is deteriorated, data can be easily read.

  A method is also conceivable in which a dummy electrochemical cell is provided and the output voltage of the electrochemical cell in one of two states is used as the reference voltage. However, when the deterioration state of the electrochemical cell 5 and the dummy electrochemical cell are different, a difference occurs in the output potential even in the same storage state. As a result, data may not be read accurately. This embodiment is advantageous from the viewpoint of reading stored data more accurately than the case of using a dummy electrochemical cell in this way.

(Fourth embodiment)
Subsequently, a fourth embodiment will be described. In the present embodiment, the arrangement of the second electrochromic layer 15 and the second electrode 16 is changed with respect to the third embodiment. About the other point, since the structure similar to 3rd Embodiment is employable, detailed description is abbreviate | omitted.

  FIG. 10 is a schematic cross-sectional view showing the nonvolatile memory device 1 according to this embodiment. As shown in FIG. 10, in the present embodiment, the first electrode 12-1, the first electrode 12-2, and the second electrode 16 are disposed on the gate insulating film 11. The first electrode 12-1, the first electrode 12-2, and the second electrode 16 are disposed on the same layer. Moreover, the first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer so as to cover the first electrode 12-1, the first electrode 12-2, and the second electrode 16. 15 is provided. The first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer 15 are disposed on the same layer and are separated by a separation groove 39.

  In the present embodiment, the first electrochemical cell 5-1 includes the first electrochromic layer 13-1, a part of the second electrochromic layer 15 (the first electrochromic layer 13- in the second electrochromic layer 15). 1 portion) and a part of the electrolyte layer 14 (a portion between the first electrochromic layer 13-1 and the second electrochromic layer 15 in the electrolyte layer 14). Further, the second electrochemical cell 5-2 includes a part of the first electrochromic layer 13-2 and the second electrochromic layer 15 (a part of the second electrochromic layer 15 on the first electrochromic layer 13-2 side. ) And a part of the electrolyte layer 14 (a part between the first electrochromic layer 13-2 and the second electrochromic layer 15 in the electrolyte layer 14).

  The operation method of the nonvolatile memory device 1 in the present embodiment is the same as that in the third embodiment. Also according to this embodiment, the same effect as that of the third embodiment can be obtained. Moreover, in this embodiment, since the 1st electrochromic layer 13-1, the 1st electrochromic layer 13-2, and the 2nd electrochromic layer 15 are arrange | positioned on the same layer, a manufacturing process is simplified more. be able to. That is, in the present embodiment, the first transistor 4-1 and the second transistor 4-2 are formed on the glass substrate 10 by the same method as in the above-described embodiment. Thereafter, the first electrode 13-1, the first electrode 13-2, and the second electrode 16 are formed on the gate insulating film 11 in the same process. Furthermore, the first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer 15 can be formed on the gate insulating film 11 by the same process.

  In the present embodiment, the first electrochromic layer 13-1 (first electrode 12-1), the first electrochromic layer 13-2 (first electrode 12-2), and the second electrochromic layer 15 (first By devising the layout of the two electrodes 16), it is possible to facilitate the oxidation reaction and the reduction reaction. FIG. 11 is a plan view showing an example of the layout of the first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer 15. FIG. In the example shown in FIG. 11, the first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer 15 are arranged so as to have irregularities. The convex portion of the first electrochromic layer 12-1 extends so as to enter the concave portion of the second electrochromic layer 15. The convex portion of the first electrochromic layer 12-2 also extends so as to enter the concave portion of the second electrochromic layer 15. That is, the first electrochromic layer 13-1, the first electrochromic layer 13-2, and the second electrochromic layer 15 are arranged in a comb shape. By adopting such a layout, a region where the oxidation reaction or the reduction reaction proceeds can be sufficiently secured.

(Fifth embodiment)
Subsequently, a fifth embodiment will be described. In the present embodiment, the configurations of the first electrochemical cell 5-1 and the second electrochemical cell 5-2 are changed with respect to the third embodiment. Moreover, it replaces with the glass substrate 10 and the film base material 27 is used. About the other point, since the structure similar to 3rd Embodiment is employable, detailed description is abbreviate | omitted.

  FIG. 12 is a schematic cross-sectional view showing the nonvolatile memory device 1 according to this embodiment. As shown in FIG. 10, the nonvolatile memory device 1 has a first structure 25-1 and a second structure 25-2.

  The first structure 25-1 includes a first base material 27-1 and a first layer 40-1. The first base material 27-1 is a film-like base material. The first layer 40-1 is provided on the first base material 27-1. In the first layer 40-1, a first transistor 4-1 and a first electrochemical cell 5-1 are provided. The first structure 25-1 has the same configuration as that of the nonvolatile memory device 1 (see FIG. 5) according to the second embodiment. That is, the first electrode 12-1 and the second electrode 16-1 are provided on the first base material 27-1 through the gate insulating film 11. Further, a first electrochromic layer 13-1 and a second electrochromic layer 15-1 are provided so as to cover the first electrode 12-1 and the second electrode 16-1. Moreover, the electrolyte layer 14 is provided so that the 1st electrochromic layer 13-1 and the 2nd electrochromic layer 15-1 may be covered.

  The second structure 25-2 has the same structure as the first structure 25-1. That is, the second structure 25-2 includes the second base material 27-2 and the second layer 40-2. The second base material 27-2 is a film-like base material. The second layer 40-2 is provided on the second base material 27-2. A second transistor 4-2 and a second electrochemical cell 5-2 are provided in the second layer 40-2.

  The 1st structure 25-1 and the 2nd structure 25-2 are pasted so that the 1st substrate 27-1 and the 2nd substrate 27-2 may become the outside via separator 26. Further, although not shown in FIG. 12, each transistor 4 and each electrochemical cell 5 are formed of bit lines 6 (6-1, 6-2), word so that the circuit shown in FIG. 7 is formed. The wire 7 is connected to the plate wire 8 and the like.

  Even if the configuration as in the present embodiment is employed, the same operational effects as in the third embodiment can be obtained.

  At the time of manufacturing the present embodiment, first, the first structure 25-1 and the second structure 25-2 are manufactured separately. Next, the first structure 25-1 and the second structure 25-2 are bonded together via the separator 26. Thereby, the nonvolatile memory device 1 according to the present embodiment is obtained.

  The material of each part included in the first structure 25-1 may be different from the material of each part included in the second structure 25-2. However, the first electrode 12 (12-1, 12-2), the first electrochromic layer 13 (13-1, 13-2), the second electrode 16 (16-1, 16-2), and the second electro The chromic layers 15 (15-1 and 15-2) are preferably formed using the same material and the same manufacturing method. This makes it possible to equalize the characteristics and the degree of deterioration between the first electrochemical cell 5-1 and the second electrochemical cell 5-2.

  In the present embodiment, the case where the structure shown in FIG. 5 (second embodiment) is stacked has been described. However, the structure shown in FIG. 1 (first embodiment) can be stacked.

(Sixth embodiment)
Subsequently, a sixth embodiment will be described. In the present embodiment, the structure of the nonvolatile memory element 2 is changed with respect to the first embodiment. Since other points can be the same as those in the first embodiment, a detailed description thereof will be omitted.

  FIG. 13 is a schematic cross-sectional view showing the nonvolatile memory device 1 according to this embodiment. The nonvolatile memory device 1 according to this embodiment includes a plurality of film structures 28 (28-1 to 28-4). The plurality of film structures 28 (28-1 to 28-4) are stacked. A film member 17 is disposed as a protective member on the uppermost film structure 28-4.

  Each of the plurality of film structures 28 includes a film base material 29 and a plurality of nonvolatile memory elements 2. That is, each film structure 28 is provided with a plurality of electrochemical cells 5. The structure of each nonvolatile memory element 2 is the same as that in FIG. 1 (first embodiment). That is, the transistor 4 is provided on the film base material 29. Further, the first electrode 12 is provided on the film base material 29 via the gate insulating film 11. Furthermore, the first electrochromic layer 13 is provided so as to cover the first electrode 12. An electrolyte layer 14 is provided on the first electrochromic layer 13. A second electrochromic layer 15 is provided on the electrolyte layer 14. The electrochemical cell 5 is realized by the first electrochromic layer 13, the electrolyte layer 14, and the second electrochromic layer 15. A second electrode 16 is provided on the second electrochromic layer 15. On the second electrode 16, a film substrate 29 included in the upper film structure 28 is provided. The transistor 4 and the electrochemical cell 5 are connected to the word line 7, the bit line 6, and the plate line 8 and controlled by the control circuit 3 as in the above-described embodiment. In addition, the wiring which penetrates each film base material 29 may be provided as needed.

  Next, a method for manufacturing the nonvolatile memory device 1 according to this embodiment will be described. In the present embodiment, a plurality of film intermediates 41 (41-1 to 41-4) are produced. Specifically, the transistor 4, the first electrode 12, the first electrochromic layer 13, and the electrolyte layer 14 are formed on the main surface of the film base material 29. Thereby, the film intermediate body 41-1 is obtained. Moreover, the 2nd electrode 16 and the 2nd electrochromic layer 15 are formed on the back surface of the film base material 29 after the process similar to the film intermediate body 41-1. Thereby, each film intermediate body 41 (41-2 to 41-4) is obtained. Next, the non-volatile memory device 1 is obtained by laminating a plurality of film intermediate bodies 41 (41-1 to 41-4), placing the film member 17 on the uppermost film intermediate body 41, and press-bonding them. .

  According to this embodiment, as the film base material 29, a thin base material (for example, paper, plastic film, etc.) that is easy to process can be used. By stacking the film intermediate body 41 three-dimensionally, it is possible to easily improve the degree of integration. Each component included in the nonvolatile memory element 2 can be formed on the film substrate 29 by using a printing method or the like. By using the film base material 29, it becomes easier to form a wiring penetrating the film base material 29 than when a silicon substrate or a glass base material is used, and handling is facilitated. Accordingly, the degree of integration of the electrochemical cell 5 can be increased while suppressing an increase in thickness, and the nonvolatile memory device 1 can be reduced in size.

(Seventh embodiment)
Subsequently, a seventh embodiment will be described. In the present embodiment, an electronic circuit device including the nonvolatile memory device 1 described in the above-described embodiment will be described. The electronic circuit device according to the present embodiment is a device provided with a nonvolatile display device in addition to the nonvolatile memory device 1 described above. In the present embodiment, the case where the electronic circuit device is a card with a display / storage function will be described as an example.

  When the nonvolatile memory device and the display device are integrated, the configuration of the electronic circuit device becomes complicated. Further, if the nonvolatile memory device and the display device are manufactured in separate steps, the manufacturing process becomes complicated. That is, generally, a process of separately manufacturing a nonvolatile memory device and a display device, and connecting and sealing each device is necessary. In addition, the driving circuit of the nonvolatile memory device must be prepared separately from the driving circuit of the display device. In the present embodiment, these points are devised.

  FIG. 14 is a schematic diagram showing an electronic circuit device 30 according to the present embodiment. As shown in FIG. 14, the electronic circuit device 30 includes a display unit 31, a memory 32, and a control circuit 3. The control circuit 3 is connected to the display unit 31 and the memory 32 through wiring, and controls the display unit 31 and the memory 32. The control circuit 3 is realized by an IC chip, for example. The memory 32 includes a plurality of nonvolatile memory elements 2. That is, the nonvolatile memory device 1 is realized by the control circuit 3 and the memory 32.

  FIG. 15 is a schematic cross-sectional view showing the electronic circuit device 30. FIG. 15 shows a cross-sectional view of the display unit 31 and the memory 32.

  As shown in FIG. 15, the display unit 31 and the memory 32 are provided on a common film base material 36.

  The memory 32 has a plurality of nonvolatile memory elements 2. The configuration of each of the plurality of nonvolatile memory elements 2 is the same as that of the first embodiment (see FIG. 2). That is, the transistor 4 and the electrochemical cell 5 are provided on the film substrate 36 as each nonvolatile memory element 2. The electrochemical cell 5 includes a first electrochromic layer 13-A (cell side first electrochromic layer), an electrolyte layer 14, and a second electrochromic layer 15-A (cell side second electrochromic layer). Yes. The first electrochromic layer 13 -A is provided so as to cover the first electrode 12 -A provided on the film substrate 36. The electrolyte layer 14 is provided so as to cover the first electrochromic layer 13-A. The second electrochromic layer 15 -A is provided on the electrolyte layer 14. A second electrode 16-A is provided on the second electrochromic layer 15-A.

  On the other hand, the display unit 31 is provided with a plurality of display elements 37. Each display element 37 is a non-volatile display element that can maintain a display function even when the power is turned off. Each display element 37 includes a first electrode 12-B, a first electrochromic layer 13-B (display element side first electrochromic layer), an electrolyte layer 14, and a second electrochromic layer 15-B (display element side second). Electrochromic layer) and the second electrode 16-B. The first electrode 12 -B and the second electrode 16 -B are connected to the control circuit 3. When a voltage is applied between the first electrode 12-B and the second electrode 16-B by the control circuit 3, an oxidation reaction or a reduction reaction proceeds in the pair of electrochromic layers (13-B, 15-B). .

  Here, the first electrode 12-B and the first electrode 12-A are provided on the same layer. The first electrochromic layer 13-B and the first electrochromic layer 13-A are also provided on the same layer. In the display unit 31 and the memory 32, the electrolyte layer 14 is used in common. The second electrochromic layer 15-B and the second electrochromic layer 15-A are provided on the same layer. The second electrode 16-B and the second electrode 16-A are provided on the same layer.

  Further, a transparent film 33 is provided on the second electrode 16-A and the second electrode 16-B. An opaque plastic 34 is provided on the transparent film 33. The opaque plastic 34 is also provided on the back surface of the film substrate 36. That is, the laminated body from the film base material 36 to the second electrode 16 (16-A and 16-B) is sandwiched between the opaque plastics 34. The opaque plastic 34 is provided with an opening 35 so that the display element 37 is visible from the outside. On the other hand, the memory 32 is covered with an opaque plastic 34 so that it cannot be seen from the outside.

  In the present embodiment, each second electrochromic layer 15 (15-A and 15-B) is realized by a material having a different color in the oxidized state and a color in the reduced state. That is, the control circuit 3 (see FIG. 14) controls the redox state of the first electrochromic layer 13-B and the second electrochromic layer 15-B, thereby changing the color of the second electrochromic layer 15-B. Control. Thereby, a display function is realized in the display unit 31. As shown in FIG. 14, the display element 37 is arranged so as to correspond to the segment display.

  In the above-described example, as illustrated in FIG. 14, the example in which the arrangement of the display elements 37 corresponds to the segment display has been described. However, the arrangement of the display element 37 does not necessarily correspond to the segment display, and may correspond to, for example, a matrix display, a barcode display, a QR code (registered trademark) display, or the like.

  In the present embodiment, the case where the opaque plastic 34 is provided on the transparent film 33 has been described. However, the opaque plastic 34 of the transparent film 33 may be omitted depending on the application.

  Next, a method for manufacturing the electronic circuit device 30 according to this embodiment will be described.

  First, a PEN film is prepared as the film substrate 36. On the film substrate 36, a gate electrode, a gate insulating film, a source / drain electrode, a semiconductor layer, a first electrode 12 (12-A, 12-B), and a first electrochromic layer 13 (13- A, 13-B) are formed in order.

  Further, the second electrode 16 (16 -A, 16 -B) is formed on the transparent film 33. As the second electrode 16, for example, an ITO (indium tin oxide) film can be used. A second electrochromic layer 15 (15-A, 15-B) is formed on the second electrode 16.

  Thereafter, the transparent film 33 is bonded onto the film substrate 36 with the electrolyte layer 14 interposed therebetween. Further, the electronic circuit device 30 can be obtained by sandwiching between the opaque plastics 34.

  Here, in the present embodiment, the first electrochromic layer 13-A and the first electrochromic layer 13-B are provided on the same layer with the same material. The second electrochromic layer 15-A and the second electrochromic layer 15-B are also provided on the same layer with the same material. The first electrode 12-A and the first electrode 12-B are also provided on the same layer with the same material. The second electrode 16-A and the second electrode 16-B are also provided on the same layer with the same material. Thereby, the display element 37 and the non-volatile memory element 2 can be formed in the same process. In general, it is conceivable to use nematic liquid crystal, microcapsule, electronic powder fluid, cholesteric liquid crystal, or the like as the display element. However, when these are used as display elements, the display elements and the nonvolatile memory elements must be manufactured separately, which complicates the manufacturing process. On the other hand, in this embodiment, the display element and the nonvolatile memory element 2 can be formed in the same process, and the manufacturing process can be simplified.

  In the case of a nonvolatile display element using microcapsules, electronic powder fluid, cholesteric liquid crystal, and the like, a high voltage of several tens of volts is required as an operating voltage. On the other hand, according to the present embodiment, the operating voltage can be suppressed to several volts, and the circuit configuration can be simplified.

In addition, as a material of the 1st electrode 12, the conductive polymer which has a metal nanoparticle, PEDOT (polyethylenedioxythiophene), etc. as a main component is used, for example. As a material of the gate insulating film, for example, polyimide, PVP (polyvinylphenol), or the like is used. As the semiconductor layer, for example, an organic semiconductor, nanocarbon, or the like is preferably used from the viewpoint of performing a printing process at a low temperature. As each electrochromic layer (13, 15), Prussian blue and a Prussian blue-related compound whose main component is A _x [B (CN) ₆ ] _y (A and B are metal ions) are preferably used. However, as each electrochromic layer (13, 15), for example, a metal oxide electrochromic material and an organic electrochromic material such as viologen can be used.

  In the above-described example, each of the electrochromic layers (13-B, 15-B) and the electrodes (12-B, 16-B) included in the display element 37 are included in the nonvolatile memory element 2, respectively. The case where the electrochromic layers (13-A, 15-A) and the electrodes (12-A, 16-A) and the same material are formed in the same process has been described. However, these electrochromic layers and electrodes may be formed between the display element 37 and the nonvolatile memory element 2 by using different methods (inkjet method and gravure method). Further, the materials of the electrochromic layers and the electrodes may be different between the display element 37 and the nonvolatile memory element 2.

  Moreover, in order to improve the visibility in the display part 31, in the display element 37, it is preferable to use a material of a different color as the 1st electrochromic layer 13-B and the 2nd electrochromic layer 16-B. For example, Prussian blue is used as one of the first electrochromic layer 13-B and the second electrochromic layer 16-B, and one of nickel hexacyanoferrate, indium hexacyanoferrate, and manganese hexacyanoferrate is used as the other. It is preferable to use it. When such a combination is employed, when Prussian blue is in an oxidized state, the blue color of Prussian blue is visually recognized, and when the other is in an oxidized state, yellow is visually recognized.

  Moreover, in order to improve the visibility in the display part 31, it is also possible to use an opaque material as the electrolyte layer 14 so that only the second electrochromic layer 15-B is visible. Specifically, the electrolyte layer 14 can be made white by dispersing titanium oxide powder. Thereby, it is also possible not to visually recognize the first electrochromic layer 13-B.

  In the present embodiment, in addition to the information read by electrical conversion, the user or machine can recognize information via the display element 37. Thereby, convenience is improved. Further, the electronic circuit device 30 according to the present embodiment has not only a display function but also a storage function. Therefore, even when not connected to the network, the operator / provider can provide the service by the reader / writer. As a result, convenience for the user is improved.

  In the present embodiment, the display element 37 and the nonvolatile memory element 2 can be formed on any base material. For example, a sticker-like unit can be manufactured as the electronic circuit device 30. For example, a display function and a storage function can be given to articles and paper other than a card shape.

  In the present embodiment, the case where a nonvolatile display element is used as the display element 37 has been described. However, a non-volatile display element is not necessarily used as the display element 37, and a volatile display element may be used.

  The present invention has been described above using the first to seventh embodiments. These embodiments are not independent from each other, and can be used in combination within a consistent range.

  The present invention can be applied to a film, paper, a card, and a sticker on which a rewritable nonvolatile memory device is formed. In particular, the present invention can be suitably applied to an application for storing information (history information, authenticity information) regarding more detailed articles in addition to the information display function. The present invention is applicable to, for example, slips, receipts, tickets (such as boarding tickets and admission tickets), certificates, point cards, game cards, price tags, sensor tags, electronic signs, money, and securities.

DESCRIPTION OF SYMBOLS 1 Nonvolatile memory | storage device 2 Nonvolatile memory element 3 Control circuit 4 Transistor 4-1 1st transistor 4-2 2nd transistor 5 Electrochemical cell 5-1 1st electrochemical cell 5-2 2nd electrochemical cell 6 Bit line 6-1 First Bit Line 6-2 Second Bit Line 7 Word Line 8 Plate Line 9 Bit Line Voltage Detection Circuit 10 Glass Substrate 11 Gate Insulating Film 12 First Electrode 12-1 First Electrode of First Electrochemical Cell 12 -2 Second electrode of second electrochemical cell 13 First electrochromic layer 13-1 First electrochromic layer of first electrochemical cell 13-2 First electrochromic layer of second electrochemical cell 13-A Cell side First electrochromic layer 13-B Display element side first electrochromic layer 14 Electrolyte layer 15 Second electrochromic layer 15-1 Second Electrochromic Layer of First Electrochemical Cell 15-2 Second Electrochromic Layer of Second Electrochemical Cell 15-A Cell Side Second Electrochromic Layer 15-B Display Element Side Second Electrochromic Layer 16 Second Electrode 17 Film member 18 Gate electrode 19 Semiconductor layer (a-Si)
DESCRIPTION OF SYMBOLS 20 Drain electrode 21 Source electrode 22 Protective film 23 1st intermediate body 24 2nd intermediate body 25-1 1st structure 25-2 2nd structure 26 Separator 27-1 1st base material 27-2 2nd base material 28-1 -28-4 Film structure 29 Film base 30 Electronic circuit device (card with display / memory function)
DESCRIPTION OF SYMBOLS 31 Display part 32 Memory 33 Transparent film 34 Opaque plastic 35 Opening part 36 Film base material 37 Display element 38 Separation groove 39 Separation groove 40-1 1st layer 40-2 2nd layer 41-1-41-2 Film intermediate body

Claims (23)

A nonvolatile memory element including an electrochemical cell;
A control circuit for writing data to the nonvolatile memory element;
Comprising
The electrochemical cell is
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The control circuit is a nonvolatile memory device configured to write and read data by controlling a redox state of the first electrochromic layer and the second electrochromic layer. A non-volatile storage device according to claim 1,
The nonvolatile memory element further includes a switch circuit arranged to switch an electrical connection between a bit line and the first electrochromic layer,
The second electrochromic layer is electrically connected to a plate line;
The control circuit controls a redox state of the first electrochromic layer and the second electrochromic layer by controlling the switch circuit, the potential of the bit line, and the potential of the plate line. apparatus. The nonvolatile memory device according to claim 2,
The control circuit further includes a bit line voltage detection circuit that detects a voltage of the bit line. A non-volatile memory device according to any one of claims 1 to 3,
The first electrochromic layer, the electrolyte layer, and the second electrochromic layer are non-volatile storage devices arranged to form a stacked structure. A non-volatile memory device according to any one of claims 1 to 3,
The first electrochromic layer and the second electrochromic layer are provided on the same layer,
A separation groove is formed between the first electrochromic layer and the second electrochromic layer,
The non-volatile memory device, wherein the electrolyte layer is provided on the first electrochromic layer and the second electrochromic layer so as to fill the separation groove. The nonvolatile memory device according to claim 5,
The first electrochromic layer and the second electrochromic layer are disposed so that a concave portion and a convex portion are formed when viewed from above,
The non-volatile memory device, wherein the other convex portion is disposed in one concave portion of the first electrochromic layer and the second electrochromic layer. A non-volatile memory element including a first electrochemical cell and a second electrochemical cell;
A control circuit for writing data to the nonvolatile memory element;
Comprising
The first electrochemical cell and the second electrochemical cell are respectively
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
In the first electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
In the second electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are arranged such that when one is oxidized, the other is reduced. Has been
The non-volatile memory device configured to write and read data by controlling the redox state of the first electrochemical cell and the second electrochemical cell. The nonvolatile memory device according to claim 7,
The first electrochemical cell further comprises a first switch circuit arranged to switch electrical connection between a first bit line and the first electrochromic layer of the first electrochemical cell;
The second electrochemical cell further comprises a second switch circuit arranged to switch electrical connection between a second bit line and the first electrochromic layer of the second electrochemical cell;
The second electrochromic layer of the first electrochemical cell and the second electrochromic layer of the second electrochemical cell are both electrically connected to a plate line,
The control circuit controls the first electrochemical cell by controlling the first switch circuit, the second switch circuit, the potential of the 1 bit line, the potential of the second bit line, and the potential of the plate line. And a non-volatile memory device configured to control a redox state of the second electrochemical cell. The non-volatile memory device according to claim 7 or 8,
The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are provided on the same layer,
The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are separated by a separation groove;
The electrolyte layer of the first electrochemical cell and the electrolyte layer of the second electrochemical cell are common,
The second electrochromic layer of the first electrochemical cell and the second electrochromic layer of the second electrochemical cell are common,
The common electrolyte layer is provided on the first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell so as to fill the separation groove,
The non-volatile memory device, wherein the common second electrochromic layer is disposed on the common electrolyte layer. The non-volatile memory device according to claim 7 or 8,
The second electrochromic layer of the first electrochemical cell and the second electrochromic layer of the second electrochemical cell are common,
The electrolyte layer of the first electrochemical cell and the electrolyte layer of the second electrochemical cell are common,
The first electrochromic layer of the first electrochemical cell, the first electrochromic layer of the second electrochemical cell, and the common second electrochromic layer are provided on the same layer,
The first electrochromic layer of the first electrochemical cell, the first electrochromic layer of the second electrochemical cell, and the common second electrochromic layer are separated by a separation groove;
The common electrolyte layer fills the separation groove, the first electrochromic layer of the first electrochemical cell, the first electrochromic layer of the second electrochemical cell, and the common second electrochromic layer. A nonvolatile memory device provided on the chromic layer. The non-volatile memory device according to claim 7 or 8,
Furthermore,
A first structure;
A second structure;
Comprising
The first structure is:
The first substrate;
A first layer provided on the first substrate,
The second structure is:
The second substrate;
A second layer provided on the second substrate,
The first structure and the second structure are bonded together so that the first base material and the second base material face outside,
The first electrochemical cell is provided in the first layer;
The second electrochemical cell is a non-volatile memory device provided in the second layer. A plurality of laminated film structures;
A plurality of nonvolatile memory elements;
A control circuit for writing data to each of the plurality of nonvolatile memory elements;
Comprising
Each of the nonvolatile memory elements includes an electrochemical cell,
The electrochemical cell is
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The control circuit performs writing and reading of data by controlling a redox state of the first electrochromic layer and the second electrochromic layer,
A nonvolatile memory device in which a plurality of the electrochemical cells are arranged in each of the plurality of film structures. A substrate;
A non-volatile memory element provided on the substrate and including an electrochemical cell;
A display element provided on the substrate;
A control circuit for writing data to the nonvolatile memory element;
Comprising
The electrochemical cell is
A cell-side first electrochromic layer;
A cell-side second electrochromic layer;
A cell-side electrolyte layer provided between the cell-side first electrochromic layer and the cell-side second electrochromic layer;
The cell side first electrochromic layer and the cell side second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The control circuit performs writing and reading of data by controlling a redox state of at least one of the cell-side first electrochromic layer and the cell-side second electrochromic layer,
The display element is
A display element side first electrochromic layer;
A display element side second electrochromic layer;
A display element side electrolyte layer provided between the display element side first electrochromic layer and the display element side second electrochromic layer;
The electronic circuit device in which the display element side first electrochromic layer and the display element side second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state. An electronic circuit device according to claim 13,
The cell side first electrochromic layer and the display element side first electrochromic layer are provided on the same layer,
The cell side second electrochromic layer and the display element side second electrochromic layer are electronic circuit devices provided on the same layer. The electronic circuit device according to claim 13 or 14,
Furthermore,
A light-shielding coating layer,
Comprising
The electronic circuit device is arranged such that the covering layer covers the nonvolatile memory element and does not cover the display element. The electronic circuit device according to any one of claims 13 to 15,
The control circuit is an electronic circuit device configured to control the operation of the display element. Electrochemical cell,
Comprising
The electrochemical cell is
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
A nonvolatile memory element in which data is written and read by controlling a redox state of the first electrochromic layer and the second electrochromic layer. A nonvolatile memory element including an electrochemical cell;
A control circuit for writing data to the nonvolatile memory element;
Comprising
The electrochemical cell is
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
The first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The control circuit is a method of manufacturing a nonvolatile memory device that performs data writing and reading by controlling an oxidation-reduction state of at least one of the first electrochromic layer and the second electrochromic layer,
Forming the first electrochromic layer;
Forming the second electrochromic layer;
Forming the electrolyte layer;
Forming the control circuit;
A method for manufacturing a nonvolatile memory device comprising: A method of manufacturing a nonvolatile memory device according to claim 18,
The step of forming the first electrochromic layer includes the step of forming the first electrochromic layer on a first substrate,
The step of forming the electrolyte layer includes the step of forming the electrolyte layer on the first electrochromic layer to obtain a first intermediate,
The step of forming the second electrochromic layer includes:
Forming the second electrochromic layer on the second substrate to obtain a second intermediate;
And a step of attaching the second intermediate to the first intermediate so that the second electrochromic layer is disposed on the electrolyte layer. A method of manufacturing a nonvolatile memory device according to claim 18,
The step of forming the first electrochromic layer and the step of forming the second electrochromic layer are the same so that the first electrochromic layer and the second electrochromic layer are provided on the same layer. A method of manufacturing a nonvolatile memory device executed by a process. A non-volatile memory element including a first electrochemical cell and a second electrochemical cell;
A control circuit for writing data to the nonvolatile memory element;
Comprising
The first electrochemical cell and the second electrochemical cell are respectively
A first electrochromic layer;
A second electrochromic layer;
An electrolyte layer provided between the first electrochromic layer and the second electrochromic layer;
In the first electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
In the second electrochemical cell, the first electrochromic layer and the second electrochromic layer are arranged such that when one is in an oxidized state, the other is in a reduced state,
The first electrochromic layer of the first electrochemical cell and the first electrochromic layer of the second electrochemical cell are arranged such that when one is oxidized, the other is reduced. Has been
The control circuit controls writing and reading of data by controlling a redox state of the first electrochromic layer and the second electrochromic layer in one of the first electrochemical cell and the second electrochemical cell. And
A method for manufacturing a nonvolatile memory device, comprising:
Forming the nonvolatile memory element;
Forming the control circuit;
Comprising
The step of forming the nonvolatile memory element includes:
Forming the first electrochemical cell;
Forming the second electrochemical cell,
The step of forming the first electrochemical cell and the step of forming the second electrochemical cell are respectively
Forming the first electrochromic layer;
Forming the second electrochromic layer;
Forming a non-volatile memory device including the step of forming the electrolyte layer. A method of manufacturing a nonvolatile memory device according to claim 21,
The step of forming the first electrochromic layer of the first electrochemical cell and the step of forming the first electrochromic layer of the second electrochemical cell include the first electro of the first electrochemical cell. The chromic layer and the first electrochromic layer of the second electrochemical cell are formed in the same process so that they are formed on the same layer,
The step of forming the electrolyte layer of the first electrochemical cell and the step of forming the electrolyte layer of the second electrochemical cell are performed by the same step,
The step of forming the second electrochromic layer of the first electrochemical cell and the step of forming the second electrochromic layer of the second electrochemical cell are performed by the same process. Method. A method of manufacturing a nonvolatile memory device according to claim 21,
Forming the first electrochemical cell includes forming the first electrochemical cell on a first substrate to form a first structure;
Forming the second electrochemical cell includes forming the second electrochemical cell on a second substrate to form a second structure;
The step of forming the nonvolatile memory element further includes:
A method of manufacturing a nonvolatile memory device, including a step of forming the nonvolatile memory element by bonding the first structure and the second structure.

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