JP2013214633A - Switching power supply, power factor correction and magnetic flux canceling transformer circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transformer circuit with a large variation amplitude of magnetic flux density for use in a switching power circuit and a power factor correction (PFC) circuit which implements improved efficiency of a magnetic circuit and achieves a reduced size of the magnetic circuit, increased efficiency of the switching power supply and increased efficiency of the PFC circuit.SOLUTION: An other side (second core) of the magnetic circuit with a first coil wound is wound with a second coil short-circuited by a rectification element. When a current flows through the first coil (wound on a one side (first core) of the magnetic circuit) via a current path of a switching element, a magnetic flux density of the first coil exceeds a residual magnetic flux density, and when the current path of the switching element is non-conductive, the magnetic flux density of the intermediate leg falls below the residual magnetic flux density current by current flowing through the first coil. In both cases, a current flows through the second coil.

Description

  The present invention relates to a magnetic flux canceling transformer circuit that constitutes a magnetic circuit that can take a variable amplitude of magnetic flux density, and a switching power supply circuit and a power factor correction (PFC) circuit using the same.

In the AC magnetic circuit, a change in magnetic field polarity is given. Therefore, for example, when expressed by a BH curve, a change in magnetic flux density reciprocating from the first quadrant to the third quadrant can be taken. That is, the fluctuation amplitude of the magnetic flux density can be increased.
Since only a unipolar magnetic field is applied to the magnetic circuit used for direct current, the magnetic flux density fluctuates in one quadrant (for example, in the first quadrant or the third quadrant) and the residual magnetic flux density exists. The fluctuation amplitude of the magnetic flux density cannot be increased.

In order to increase the fluctuation amplitude of the magnetic flux density in a DC magnetic circuit, there is a magnetic circuit in which a permanent magnet or a solenoid is added.

Patent Document 1 discloses a magnetic circuit provided with a magnetic bias. However, a permanent magnet or an external DC power source for excitation is required.

Also in the present invention, the “problem” of Patent Document 1 “takes a large fluctuation amplitude of magnetic flux density” is similar.

However, in Patent Document 1, since an external DC power supply is used exclusively for DC excitation, power loss occurs.
Also, in the case of using a permanent magnet, the permanent magnet itself receives a magnetic flux that resists the magnetic flux of the permanent magnet, so that the magnetic force of the permanent magnet deteriorates.

JP-A-8-66018

In view of the above situation, the present invention has realized a magnetic flux canceling transformer circuit that does not require a permanent magnet or an excitation-dedicated power source.

Furthermore, a switching power supply circuit using a magnetic flux canceling transformer circuit and a power factor correction PFC (a power factor correction) circuit were realized.

In order to achieve the above object, the present invention has the following configuration.
(1) A magnetic flux canceling transformer circuit according to claim 1 is:
Between a pair of opposing yokes, an intermediate leg on which a coil 1 that connects the intermediate portions of the two yokes is wound, and a first end portion and a second end portion that face each other. A core 2 around which a coil 2 in which rectifying elements constituting one of a pair of extending outer legs are connected in parallel is wound, and a core 3 provided with a gap constituting the other of the pair of outer legs are provided. A transformer circuit, a control element, a semiconductor element having one end and the other end of a current path, and a capacitive element,
The potential of one end of the capacitive element is configured to be applied to one end of the coil 1,
The potential at the other end of the coil 1 is configured to be applied to one end of the current path,
The other end of the capacitive element and the other end of the current path have a common potential.
(2) A magnetic flux canceling transformer circuit according to claim 2 is:
Each of the yokes extends between a pair of opposing yokes, an intermediate leg provided with a gap connecting the intermediate portions of the yokes, and the first and second end portions of the yokes facing each other. A core 2 around which a coil 2 connected in parallel with a rectifying element constituting one of a pair of outer legs is wound, and a core 1 around which a coil 1 constituting the other of the pair of outer legs is wound. A transformer circuit, a control element, a semiconductor element having one end and the other end of a current path, and a capacitor element,
The potential of one end of the capacitive element is configured to be applied to one end of the coil 1,
The potential at the other end of the coil 1 is configured to be applied to one end of the current path,
The other end of the capacitive element and the other end of the current path have a common potential.
(3) In the magnetic flux canceling transformer circuit according to claim 3, the magnetic flux canceling transformer circuit according to claim 1 or 2,
When the current flows from one end to the other end of the coil 1, the rectifying element is connected in parallel to the coil 2 so that the current flows from the one end to the other end of the coil 2.
(4) A magnetic flux canceling transformer circuit according to a fourth aspect of the present invention is any one of the first to third aspects,
When a current flows through the coil 1 via the current path of the semiconductor element, the magnetic flux density of the intermediate leg exceeds the residual magnetic flux density, and when the current path of the semiconductor element is non-conductive, a current flows through the coil 1. By flowing, the magnetic flux density of the intermediate leg is lower than the residual magnetic flux density.
(5) The switching power supply circuit according to claim 5 is:
5. A switching power supply circuit using the magnetic flux canceling transformer circuit according to claim 1, wherein one end of a rectifying element is connected to the other end of the coil 1 in a forward direction with respect to the other end of the coil 1. Both ends are DC voltage input ends, and the other end of the rectifier element and the other end of the current path are DC voltage output ends.
(6) A power factor correction circuit according to claim 6 is:
6. The power factor correction circuit using the switching power supply circuit according to claim 5, wherein the capacitive element is removed, a both-end connection portion of the capacitive element before the removal is an AC rectified voltage input terminal, A capacitive element is connected between the other end of the current path, and both ends of the capacitive element are DC voltage output terminals.

(A) The magnetic flux canceling transformer circuit of the present invention capable of increasing the fluctuation amplitude of the magnetic flux density is used, and this circuit is used for the switching power supply circuit of the present invention and the power factor correction circuit of the present invention. The efficiency of the rate correction circuit was improved.
(B) By using a transformer circuit that can cancel the magnetic flux, the residual magnetic flux density is reduced, the magnetic flux density fluctuation amplitude is increased, the efficiency of the transformer magnetic circuit is improved, and the transformer magnetic circuit is reduced in size. .

These are the circuit block diagrams which show embodiment of the magnetic flux cancellation transformer circuit by this invention. These are the circuit block diagrams which show embodiment of the magnetic flux cancellation transformer circuit by this invention. These are the circuit block diagrams which show embodiment of the switching power supply circuit by this invention. These are the circuit block diagrams which show embodiment of the switching power supply circuit by this invention. These are the wave form diagrams which show the voltage and the electric current in embodiment of the switching power supply circuit by this invention. These are the circuit block diagrams which show embodiment of the power factor correction circuit by this invention.

(1) Embodiment of magnetic flux canceling transformer circuit (1-1) Circuit configuration FIGS. 1 and 2 are diagrams showing the configuration of an embodiment of a magnetic flux canceling transformer circuit according to the present invention.
FIG. 2 is a pure circuit diagram in which the schematic concrete magnetic circuit of the transformer and the winding state of the coil in FIG. 1 are omitted. 1 and 2 are the same circuit.

Hereinafter, an embodiment of a magnetic flux canceling transformer circuit of the present invention will be described with reference to FIGS.

In FIG. 1, the magnetic circuit of the transformer indicated by the symbol MC has the following configuration.
(1) Yoke Yu (upper lateral portion of MC) indicated by a broken double-dotted line with a reference symbol Yu
(2) Yoke Yd (lower lateral portion of MC) indicated by broken-line double-pointed arrow Yd
(3) Intermediate leg P1 (vertical direction of the intermediate part of the MC) indicated by a double-arrowed broken line with a reference symbol P1 connecting the intermediate parts of a pair of yokes composed of Yu and Yd
(4) One (left) of the pair of outer legs extending between the first end portions (left) to which the upper and lower yokes (Yu, Yd) face each other with the reference numeral 1 (in the broken line with double arrows) attached. Core 2 indicated by broken double-dotted line P2 (left longitudinal direction P2 of MC)
(5) The other (right) of the pair of outer legs extending between the second end portions (right) to which the upper and lower yokes (Yu, Yd) are oppositely marked 2 (in the broken line with double arrows) is attached. Core 3 (right vertical direction P3 of MC) provided with a gap (indicated by reference symbol AG) indicated by a broken-line double-pointed arrow indicated by reference symbol P3

1. Description of coil winding in FIG.
(1) On the intermediate leg (Pl), a coil 1 indicated by a symbol L1 is wound clockwise (lower part of the intermediate leg (as viewed from the yoke Yd side)).
(2) The coil 2 indicated by the symbol L2 is wound around the core 2 (P2) clockwise (lower part of the core 2 (as viewed from the yoke Yd side)).

The coil 1 and the coil 2 have one end marked with a black circle as one end and the other without the black circle as the other end. That is, one end of the coil 1 is b at the other end, and one end of the coil 2 is c at the other end.

One end of the coil 2 is connected to the anode of the rectifying element indicated by the symbol D1, and the other end of the coil 2 is connected to the cathode of the rectifying element.

One end of a capacitor element indicated by reference numeral C1 is connected to one end of the coil 1, and one end (drain D) of a current path of a semiconductor element (FET Q1) indicated by reference numeral Q1 is connected to the other end of the coil 1. .

The other end of the capacitive element is connected to the other end (source S) of the current path of the semiconductor element. One end of the capacitive element is connected to the terminal T1 (reference T1), the other end of the capacitive element is connected to the terminal T2 (reference T2) and the terminal T4 (reference T4), and the other end (source S) of the current path of the semiconductor element. Then, with the terminals T2 and T4 as reference potentials, a positive potential (circuit operating power supply) is applied to the terminal T1.

A resistance element (a resistance element having a resistance value larger than the resistance value when the semiconductor element is conductive) is connected between the terminal T3 (symbol T3) and the terminal T4 (symbol T4), and the operation is confirmed. Connect a so-called dummy resistor and check the operation.
A control end (gate G) of the semiconductor element is connected to a terminal Tg (reference Tg) and is applied with a positive pulse potential.
The voltage applied between the terminals T1 and T2 is converted into a voltage and output between the terminals T3 and T4.

(1-2) Description of Operation The operation will be described with reference to the circuits of FIGS.
An external resistance element is connected between the terminal T3 and the terminal T4, a positive potential is applied to the terminal T1 with the terminal T2 as a reference potential, and a positive pulse potential is applied to the terminal Tg. The pulse potential applied to the control terminal (gate G) of the semiconductor element (FET Q1) has a potential for making the semiconductor element conductive and a potential for making the semiconductor element non-conductive.

When the semiconductor element is turned on by the pulse potential, a current path flows from one end (a) of the coil 1 to the other end (b) of the coil 1, one end of the semiconductor element, and the other end of the semiconductor element. .

At this time, a magnetic flux φ1 (symbol φ1) is generated in the intermediate leg P1, which is the magnetic circuit shown in FIG. The magnetic flux φ1 tends to pass through the core 2, which is a magnetic circuit around which the coil 2 is wound.

When the magnetic flux φ1 is about to pass through the core 2, a current flows through the coil 2 so as to generate a coercive force φ2 (symbol φ2) in the core 2. The coercive force φ2 means a magnetic flux that resists the magnetic flux φ1.
That is, the magnetic flux φ2 (coercive force φ2) is in a direction (opposite phase) opposite to the magnetic flux φ1, and the magnetic flux φ1 is generated to cancel the magnetic flux φ1 in order to prevent the magnetic flux φ1 from passing through the core 2.

The current generation source of the coil 2 is based on an electromotive force (mutual induction from the coil 1) in which one end (c) of the coil 2 is a positive electrode and the other end (d) is a negative electrode. A rectifying element is connected to the coil 2 in the forward direction with respect to the polarity of the electromotive force. Therefore, a current flows through the coil 2.
When a current flows through the coil 2, a coercive force φ2 is generated, and the magnetic flux φ1 cannot pass through the core 2. That is, since the coil 2 is almost short-circuited by the rectifying element D1, it strongly blocks the passage of the magnetic flux φ1. It is.

When the semiconductor element changes from the conductive state to the non-conductive state, self-induction (flyback) occurs in the coil 1 and a positive voltage is generated at the other end (b) of the coil 1. And formed through the capacitive element (capacitor C1).
That is, the other end of the coil 1, the terminal T3, the external resistor element, the terminal T4, the other end of the capacitive element C1, the one end of the capacitive element C1, and the path of one end of the coil 1.
Also during the flyback, a current flows through the coil 2 through the rectifying element D1.
The current flowing through the coil 2 is a mutual induction due to the current flowing through the coil 1.

When a current is supplied to the coil 1 from an external power source (the semiconductor element is conductive), a magnetic flux φ1 is generated in the intermediate leg P1, and the magnetic flux density of the intermediate leg P1 is, for example, the upper part of the first quadrant of the BH curve ( The magnetic flux density is not saturated.
Next, at the time of flyback in which the semiconductor element is made non-conductive, the external power supply is turned off, and the current flowing in the coil 1 is turned off, a self-induced current flows in the coil 1, and the coil 2 by the current flowing in the coil 2 by mutual induction. , The magnetic flux density of the intermediate leg P1 transitions to a magnetic flux density lower than the residual magnetic flux density indicated by the BH curve.
The BH curve represents the relationship between the magnetic field strength and the magnetic flux density, with the horizontal axis representing the magnetic field (magnetic field) and the vertical axis representing the magnetic flux density.

If there is no circuit (the present invention) composed of the coil 2 and the rectifying element D1 on the left leg P2, a residual magnetic flux density is generated when no current flows through the coil 1 with an external power supply. This is because a direct current flows through the coil 1.

When the residual magnetic flux density exists, the magnetic flux density of the intermediate leg exists above the magnetic flux density represented by the BH curve, and the amplitude (movable range) of the magnetic flux density is small and the efficiency of the magnetic circuit is lowered.
That is, if the same performance as the magnetic circuit of the present invention is required, a magnetic circuit larger than the magnetic circuit of the present invention is required.

If the efficiency of the magnetic circuit is improved, a small magnetic circuit is sufficient.

Since the magnetic flux φ1 cannot pass through the core 2 (P2) due to the coercive force φ2, it passes through the core 3 (right leg P3). The gap (gap AG) is provided in the core 3 in order to prevent magnetic saturation of the magnetic circuit MC.

The passage of the magnetic flux φ1 passes from the intermediate leg P1 through the right part of the yoke Yu (upper yoke), through the core 3 (right leg P3), and returns from the right part of the yoke Yd (lower yoke) to the intermediate leg P1. .

The magnetic circuit MC shown in FIG. 1 is an example, and can be modified (not shown) as follows. Operation and effect are similar.
(1) An air gap (AG) is provided in the intermediate leg, and the coil 1 (L1) is not wound around the intermediate leg.
(2) The coil 1 is wound around the right leg, that is, the core 1 (reference P3) without providing a gap in the right leg (reference P3).
(3) The circuit connection of the right leg, that is, the coil 1 of the core 1 (P3) is the same as that in FIGS.
(4) The circuit connection of the left leg, that is, the coil 2 of the core 2 (P2) is the same as in FIGS.

Magnetic flux φ1 is generated in the right leg (core 1). The flyback operation occurs in the coil 1 wound around the right leg (core 1: P3).
Mutual induction to the coil 2 due to the intermittent current of the coil 1 is generated from the magnetic circuit of the right leg (core 1) around which the coil 1 is wound via the left leg core 2 (P2) around which the coil 2 is wound. To do.

In the above modification, in the claims, the name “core 1” is used instead of the name “intermediate leg” for the magnetic circuit around which the coil 1 is wound.

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(2) Embodiment of Switching Power Supply Circuit (2-1) Circuit Configuration FIGS. 3 and 4 are diagrams showing the configuration of the embodiment of the switching power supply circuit according to the present invention.
FIG. 4 is a pure circuit diagram in which the schematic concrete magnetic circuit of the transformer and the winding state of the coil in FIG. 3 are omitted. 3 and 4 are the same circuit.

3 and 4 are obtained by adding a rectifier element denoted by reference numeral D2 and a capacitive element denoted by reference numeral C2 to FIGS.

3 and 4, one end (anode) of the rectifying element is connected to a connection portion between the other end (d) of the coil 1 (L1) and one end (drain D) of the semiconductor element, and the other end ( The cathode is connected to one end of the capacitive element and the terminal T3, and the other end of the capacitive element is connected to the other end (source S) of the semiconductor element and the terminal T4.
Except for the addition of such elements, this embodiment is the same as FIG. 1 and FIG. 2, and is given the same reference numerals as those in FIG. 1 and FIG.

(2-2) Description of Operation The operation will be described with reference to the circuits of FIGS. 3 and 4 and the measured waveform of FIG.
An external load is connected between the terminal T3 and the terminal T4, a positive potential is applied to the terminal T1 with the terminal T2 as a reference potential, and a positive pulse potential is applied to the terminal Tg. The pulse potential applied to the control terminal (gate G) of the semiconductor element (FET Q1) has a potential for making the semiconductor element conductive and a potential for making the semiconductor element non-conductive.
Note that the magnetic flux φ1, the magnetic flux φ2, the yoke Yu, the yoke Yd, the intermediate leg P1, the left leg P2, and the right leg P3 are not shown in FIG. 3, but are the same as those in FIG. The sign of is used.

When the semiconductor element is turned on by the pulse potential, a current path flows from one end (a) of the coil 1 to the other end (b) of the coil 1, one end of the semiconductor element, and the other end of the semiconductor element. . The current flowing through the semiconductor element is i1 in FIGS. FIG. 5 shows a waveform portion (A) and a circuit (B).
The sign of the current / voltage in the waveform of FIG. 5A is the same as the sign of the switching power supply circuit in FIG. i1 to i3 are currents, and v1 is a voltage.
Waveforms i1 to v1 correspond to CH1 to CH4 at the bottom of the waveform display frame. For example, the current value is displayed as 5.00 V / div in CH2 (i2), but is read as A / div.
In the waveform portion (A), the horizontal axis represents time, and the vertical axis represents current / voltage magnitude.
The time is displayed at t0 to t5 in the upper part of the broken line drawn at the break of the waveform.
The current i1 flows from time t1 to t2 and time t4 to t5. This section is a section in which the positive pulse potential is applied to the control terminal (gate G) of the semiconductor element (FET Q1) and the FET Q1 is conducting. i1 is a current flowing in the series connection circuit of the coil 1 and the semiconductor element. At this time, magnetic energy is accumulated in the magnetic circuit MC around which the coil 1 is wound.

At this time, a magnetic flux φ1 (symbol φ1) is generated in the intermediate leg P1 which is the magnetic circuit shown in FIG. The magnetic flux φ1 tends to pass through the core 2, which is a magnetic circuit around which the coil 2 is wound.

When the magnetic flux φ1 tries to pass through the core 2, a current flows through the coil 2 so as to generate a coercive force φ2 (symbol φ2) in the core 2. The coercive force φ2 means a magnetic flux that resists the magnetic flux φ1. The polarity or direction of the magnetic flux is reversed.
The current source of the coil 2 is based on an electromotive force (mutual induction from the coil 1) in which one end of the coil 2 is a positive electrode and the other end is a negative electrode. A rectifying element is connected to the coil 2 in the forward direction with respect to the polarity of the electromotive force. Therefore, a current flows through the coil 2.
When a current flows through the coil 2, a coercive force φ2 is generated, and the magnetic flux φ1 cannot pass through the core 2. That is, the coil 2 is almost short-circuited by the rectifying element D1.

When the semiconductor element changes from the conductive state to the non-conductive state, self-induction (flyback) occurs in the coil 1 and a positive voltage is generated at the other end (b) of the coil 1. And formed through the capacitive element (capacitor C1).
That is, the other end of the coil 1, the terminal T3, the external load, the terminal T4, the other end of the capacitive element C1, one end of the capacitive element C1, and the path of one end of the coil 1.
Also during the flyback, a current flows through the coil 2 through the rectifying element D1.
The current flowing through the coil 2 is a mutual induction due to the current flowing through the coil 1.

The current flowing through the coil 2 is indicated by the waveform i2 in FIG. The time when i2 flows is from t1 to t3. At i2 between times t1 and t2, the semiconductor element conducts and current is supplied to the coil 1 by an external power source. This is mutual induction of the current flowing through the coil 1.
The current i <b> 2 at the times t <b> 2 to t <b> 3 is a mutual induction caused by a flyback current due to self-induction of the coil 1.
Times t0 and t3 are spike voltages generated when i3 (external load current) flowing through the coil 1 and i2 flowing through the coil 2 are interrupted, and a positive voltage is generated at the cathode of the rectifying element D1.

Due to the magnetic flux φ2 generated from the coil 2, the magnetic flux density of the intermediate leg P1 becomes a magnetic flux density lower than the residual magnetic flux density indicated by the BH curve. The BH curve represents the relationship between the magnetic field and the magnetic flux density, with the horizontal axis representing the magnetic field strength and the vertical axis representing the magnetic flux density. Both the magnetic field and the magnetic flux density are vector values.

If there is no circuit composed of the coil 2 and the rectifying element D1 on the left leg P2, a residual magnetic flux density is generated when no current flows through the coil 1. This is because a direct current flows through the coil 1.

When the residual magnetic flux density exists, the fluctuation amplitude of the magnetic flux density represented by the BH curve is small, and the efficiency of the magnetic circuit is lowered. That is, a magnetic circuit larger than the magnetic circuit of the present invention is required.

If the efficiency of the magnetic circuit is improved, a small magnetic circuit is sufficient. In addition, the output power of the switching voltage is improved by the magnetic circuit of the same size that improves the efficiency of the magnetic circuit.

Since the magnetic flux φ1 cannot pass through the core 2 (P2) due to the coercive force φ2, it passes through the core 3 (right leg P3). The reason why the gap (gap AG) is provided in the core 3 is to prevent magnetic saturation.

The passage of the magnetic flux φ1 passes from the intermediate leg P1 through the right part of the yoke Yu (upper yoke), through the core 3 (right leg P3), and returns from the right part of the yoke Yd (lower yoke) to the intermediate leg P1. .

In FIG. 5A, i3 is a flyback current due to self-induction of the coil 1. Due to this current, i2 also flows through the coil 2.

The magnetic circuit MC shown in FIG. 1 is an example, and can be modified (not shown) as follows.
An air gap (AG) is provided in the intermediate leg, and the coil 1 (L1) is not wound around the intermediate leg. The coil 1 (L1) is wound around the right leg (P3) without providing a gap in the right leg (P3).

The coil L2 and the rectifying element D1 existing in the left leg and the left leg (core 2: P2) are the same as those in FIG.

The operation and effect are the same in such a modified example.

The sudden increase in the current i1 indicates that magnetic saturation has occurred in the intermediate leg P1, but that this has not occurred means that magnetic saturation has not yet occurred in the magnetic circuit MC including the intermediate leg P1. Back up.
That is, it means that the efficiency of the magnetic circuit is improved and the movable amplitude of the magnetic flux density is increased.

(3) Embodiment of Power Factor Correction Circuit (3-1) Circuit Configuration FIG. 6 is a diagram showing a configuration of an embodiment of a power factor correction circuit according to the present invention.
FIG. 6 is a pure circuit diagram in which the specific magnetic circuit of the transformer and the winding state of the coil in FIG. 3 are omitted.

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Further, FIG. 6 is obtained by removing the capacitive element C1 shown in FIGS.
4 is the same as that in which the capacitive element C1 is removed, and the same element numbers as those in FIG.

(3-2) Explanation of Operation In FIG. 6, a voltage that rectifies alternating current and is not smoothed is applied between the terminal T1 and the terminal T2. A positive potential is applied to the terminal T1 using the terminal T2 as a reference potential.

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A positive pulse potential is applied to the terminal Tg to operate in the same manner as the switching power supply circuit of the present invention. Then, all the rectified currents input between the terminals T1 and T2 flow through the rectifying element 2 (reference numeral D2).
Then, the capacitor 2 (reference C2) is charged, and power is supplied to an external load connected between the terminals T3 and T4.

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That is, even if a rectified voltage equal to or lower than the voltage charged in the capacitive element 2 (capacitor C2) indicated by the symbol C2 is applied between the terminal T1 and the terminal T2, the rectified current is output between the terminal T3 and the terminal T4. The

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The semiconductor element FETQ1 can be replaced with an NPN bipolar transistor.
Further, the semiconductor element FETQ1 can be replaced with a P-channel type. At this time, the polarity of each potential and the polarity of the rectifying element and the capacitive element are reversed. Then, a negative electrode potential can be output to the terminal T3.
Furthermore, the P-channel FET can be replaced with a PNP bipolar transistor.

Q1 Semiconductor element MC Magnetic circuit L1, L2 Coil Yu, Yd Yoke (magnetic circuit)
P1, P2, P3 Left and right and intermediate legs (magnetic circuit)
D1, D2 Rectifier elements C1, C2 Capacitance elements φ1, φ2 Magnetic flux T1-T4 terminals

Claims (6)

Between a pair of opposing yokes, an intermediate leg on which a coil 1 that connects the intermediate portions of the two yokes is wound, and a first end portion and a second end portion that face each other. A core 2 around which a coil 2 in which rectifying elements constituting one of a pair of extending outer legs are connected in parallel is wound, and a core 3 provided with a gap constituting the other of the pair of outer legs are provided. A transformer circuit, a control element, a semiconductor element having one end and the other end of a current path, and a capacitive element,
The potential of one end of the capacitive element is configured to be applied to one end of the coil 1,
The potential at the other end of the coil 1 is configured to be applied to one end of the current path,
A magnetic flux canceling transformer circuit, wherein the other end of the capacitive element and the other end of the current path have a common potential. Each of the yokes extends between a pair of opposing yokes, an intermediate leg provided with a gap connecting the intermediate portions of the yokes, and the first and second end portions of the yokes facing each other. A core 2 around which a coil 2 connected in parallel with a rectifying element constituting one of a pair of outer legs is wound, and a core 1 around which a coil 1 constituting the other of the pair of outer legs is wound. A transformer circuit, a control element, a semiconductor element having one end and the other end of a current path, and a capacitor element,
The potential of one end of the capacitive element is configured to be applied to one end of the coil 1,
The potential at the other end of the coil 1 is configured to be applied to one end of the current path,
A magnetic flux canceling transformer circuit, wherein the other end of the capacitive element and the other end of the current path have a common potential. The rectifying element is connected in parallel to the coil 2 so that a current flows from one end to the other end of the coil 2 when a current flows from one end to the other end of the coil 1. Or the magnetic flux canceling transformer circuit according to 2. When a current flows through the coil 1 via the current path of the semiconductor element, the magnetic flux density of the intermediate leg exceeds the residual magnetic flux density, and when the current path of the semiconductor element is non-conductive, a current flows through the coil 1. 4. The magnetic flux canceling transformer circuit according to claim 1, wherein the magnetic flux density of the intermediate leg is lower than the residual magnetic flux density by flowing. 5. A switching power supply circuit using the magnetic flux canceling transformer circuit according to claim 1, wherein one end of a rectifying element is connected to the other end of the coil 1 in a forward direction with respect to the other end of the coil 1. A switching power supply circuit characterized in that both ends are DC voltage input ends, and the other end of the rectifier element and the other end of the current path are DC voltage output ends. The power factor correction circuit using the switching power supply circuit according to claim 5, wherein the capacitive element is removed, both ends of the capacitive element before the removal are connected to an AC rectified voltage input terminal, and the other end of the rectifying element is A power factor correction circuit, wherein a capacitive element is connected between the other end of the current path, and both ends of the capacitive element are used as DC voltage output terminals.

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