JP2013211485A - Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufactured by the same - Google Patents

Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufactured by the same Download PDF

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JP2013211485A
JP2013211485A JP2012082041A JP2012082041A JP2013211485A JP 2013211485 A JP2013211485 A JP 2013211485A JP 2012082041 A JP2012082041 A JP 2012082041A JP 2012082041 A JP2012082041 A JP 2012082041A JP 2013211485 A JP2013211485 A JP 2013211485A
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silicon carbide
semiconductor device
carbide semiconductor
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Akimasa Kinoshita
明将 木下
Takashi Tsuji
崇 辻
Kenji Fukuda
憲司 福田
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Fuji Electric Co Ltd
National Institute of Advanced Industrial Science and Technology AIST
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National Institute of Advanced Industrial Science and Technology AIST
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Priority to CN201380018092.XA priority patent/CN104335328B/en
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Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a silicon carbide semiconductor device having a metal/silicon carbide semiconductor interface, which improves adhesion of a metal deposited film and inhibits peeling of the metal deposited film.SOLUTION: A silicon carbide semiconductor device manufacturing method comprises: a process (a) of preparing a silicon carbide substrate of a first conductivity type; a process (b) of forming an epitaxial layer of the first conductivity type on a principal surface of the silicon carbide substrate of the first conductivity; a process (c) of forming a first metal layer on another principal surface of the silicon carbide substrate of the first conductivity type; a process (d) of performing a heat treatment on the silicon carbide substrate after the process (c), and forming ohmic junction between the first metal layer and the other principal surface of the silicon carbide substrate and forming a layer composed of a material having good adhesion with other metals on the first semiconductor layer; and a process (e) of removing an impurity on a surface of the first metal layer on the other principal surface after the process (d) to clean the surface of the first metal layer. The heat treatment in the process (d) is performed at a temperature of 1100°C and over.

Description

本発明は、炭化珪素半導体装置の製造方法、特に、金属／炭化珪素半導体界面を有する炭化珪素半導体装置の製造方法において、金属堆積膜の密着性を向上させる方法、及び該方法により製造された炭化珪素半導体装置に関するものである。   The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for improving adhesion of a metal deposition film in a method for manufacturing a silicon carbide semiconductor device having a metal / silicon carbide semiconductor interface, and a carbonization manufactured by the method. The present invention relates to a silicon semiconductor device.

炭化珪素は化学的に非常に安定な材料であり、バンドギャップが３ｅＶと広く、高温でも半導体として極めて安定的に使用できる。また、最大電界強度もシリコンより１桁以上大きいため、パワー半導体素子の観点から性能限界の近いシリコンに代わる材料として注目されている（非特許文献１）。   Silicon carbide is a chemically very stable material, has a wide band gap of 3 eV, and can be used extremely stably as a semiconductor even at high temperatures. In addition, since the maximum electric field strength is one digit or more larger than that of silicon, it has been attracting attention as a material that replaces silicon with a near performance limit from the viewpoint of power semiconductor elements (Non-patent Document 1).

半導体装置は工程の終盤で外部装置と接続するための配線用金属膜の形成を行う。この配線用金属膜に要求される項目は接触抵抗が小さいこと、ダイシング時に剥離がないこと、ボンディングやダイボンディング後の長時間の使用にも耐えられ剥離が起こらない等、多くの項目があるが特に剥離が起こらないことが求められ密着性の強さが要求される。これは炭化珪素でも例外ではない。   The semiconductor device forms a wiring metal film for connection to an external device at the end of the process. There are many items required for this metal film for wiring, such as low contact resistance, no peeling during dicing, and long-term use after bonding and die bonding, and no peeling. In particular, it is required that peeling does not occur, and high adhesion is required. This is no exception in silicon carbide.

炭化珪素を材料とした半導体装置は炭化珪素がカーボンを含み、半導体製造装置作製の工程で金属と反応させるための高温の処理が多用され、さらに反応後に多くの工程を通す必要があることから、表面にグラファイト等の剥離を誘発する層が形成されやすい。そのため配線用等の金属膜を堆積すると剥離が起こりやすい。   Since a semiconductor device made of silicon carbide contains carbon, silicon carbide contains carbon, and high-temperature treatment for reacting with a metal is frequently used in the process of manufacturing a semiconductor manufacturing apparatus, and further, it is necessary to pass many steps after the reaction. A layer that induces exfoliation of graphite or the like tends to be formed on the surface. For this reason, when a metal film for wiring or the like is deposited, peeling is likely to occur.

特に、炭化珪素半導体装置において低抵抗接続となるオーミック電極を形成する工程に注目すると、炭化珪素上にＮｉを堆積した後、熱処理を行い金属と炭化珪素中のシリコンと反応させ炭化珪素上に、例えばＮｉシリサイド膜を形成すれば良いことが報告されているが、Ｎｉを熱処理してＮｉシリサイド膜を形成した場合、Ｎｉはカーボンと反応しないため、余ったカーボンがシリサイド膜上にグラファイト層を形成する。さらにこの後複数の工程を通過するため、オーミック電極表面に密着性を低下させる汚染物の堆積が起こる。この面上に外部装置と接続用の配線用金属膜を作製すると密着力が低下し、配線用金属膜の剥離を引き起こす要因となる。   In particular, paying attention to the process of forming an ohmic electrode that provides low resistance connection in a silicon carbide semiconductor device, after depositing Ni on silicon carbide, heat treatment is performed to react the metal with silicon in silicon carbide on silicon carbide. For example, it has been reported that a Ni silicide film may be formed. However, when Ni is heat-treated to form a Ni silicide film, since Ni does not react with carbon, excess carbon forms a graphite layer on the silicide film. To do. Furthermore, since it passes through several processes after this, the deposit of the contaminant which reduces adhesiveness on the ohmic electrode surface occurs. If a wiring metal film for connection to an external device is formed on this surface, the adhesion is reduced, which causes a peeling of the wiring metal film.

このため、Ｎｉシリサイド膜の表面に形成されたグラファイト層を酸素ガス（Ｏ2）雰囲気または不活性ガス（Ａｒなど）雰囲気中でのプラズマプロセスにて除去し配線用金属膜の剥離を防止すること（特許文献１）や、Ｎｉを熱処理する前に予めＮｉ上にＮｉシリサイドを形成させグラファイトを表面に出ないようにする方法（特許文献２）や、カーボンと反応する金属を堆積して熱処理をさせることにより金属カーバイド層を表面に形成する方法（特許文献３）により剥離を抑制する方法が提案されている。 For this reason, the graphite layer formed on the surface of the Ni silicide film is removed by a plasma process in an oxygen gas (O 2 ) atmosphere or an inert gas (Ar) atmosphere to prevent the metal film for wiring from being peeled off. (Patent Document 1), a method of forming Ni silicide on Ni in advance before heat-treating Ni and preventing graphite from appearing on the surface (Patent Document 2), or depositing a metal that reacts with carbon and performing heat treatment A method of suppressing peeling by a method of forming a metal carbide layer on the surface (Patent Document 3) is proposed.

特開２００３−２４３３２３号公報JP 2003-243323 A 特開２００６−３３２３５８号公報JP 2006-332358 A 特開２００６−３４４６８８号公報JP 2006-344688 A

IEEE Transactions on ElectronDevices(Vol.36, p.1811, 1989)IEEE Transactions on ElectronDevices (Vol.36, p.1811, 1989)

前述したように、炭化珪素半導体装置の製造工程において配線用金属膜の剥離を引き起こすグラファイト等の層が形成される要因は多くある。この剥離原因物質を、特許文献１等のようにＡｒスパッタ等の物理的手段で除去すると、剥離原因物質の除去のみならず、低抵抗接続に必要なＮｉシリサイドが除去されてしまう。正確に剥離原因物質のみを除去する方法を確立することは困難である。また、特許文献３等のようにカーボンと化合物を形成する金属を堆積して熱処理をさせることにより析出グラファイトを除去する方法は工程が簡略化できるが、その後の工程による汚染物質による剥離は避けられない。   As described above, there are many factors that cause the formation of a layer of graphite or the like that causes peeling of the metal film for wiring in the manufacturing process of the silicon carbide semiconductor device. When this peeling cause substance is removed by physical means such as Ar sputtering as in Patent Document 1, not only the peeling cause substance is removed, but also Ni silicide necessary for low resistance connection is removed. It is difficult to establish a method for accurately removing only the exfoliation-causing substance. In addition, the method of removing precipitated graphite by depositing a metal that forms a compound with carbon and performing a heat treatment as in Patent Document 3 can simplify the process, but exfoliation due to contaminants in the subsequent process is avoided. Absent.

本発明は、上記課題に鑑み、金属を炭化珪素に堆積した後、アニールによりオーミック接合を形成させ、他の金属との密着性が良く、且つ、Ａｒスパッタ等の物理的手段に対する耐性の高い層を表面に形成させ、オーミック電極などを形成する過程で生じる剥離原因物質を優先的にＡｒスパッタにより除去を行うことにより、密着性の良い表面を露出させて外部装置と接続用の配線用金属膜との密着を良くする半導体製造方法において、配線用金属膜の剥離を抑制することができる方法を提供することを目的とするものである。   In view of the above problems, the present invention is a layer in which an ohmic junction is formed by annealing after depositing a metal on silicon carbide, has good adhesion to other metals, and is highly resistant to physical means such as Ar sputtering. Is formed on the surface, and the peeling cause substance generated in the process of forming the ohmic electrode or the like is preferentially removed by Ar sputtering to expose the surface with good adhesion, and the wiring metal film for connection with the external device An object of the present invention is to provide a method for suppressing peeling of a metal film for wiring in a semiconductor manufacturing method for improving the adhesion to the wiring.

本発明者らは、上記目的を達成すべく鋭意研究を重ねた結果、オーミック接合を取るための第一の金属層にＮｉ等のカーボンと反応しない元素を利用する場合、カーボンと反応して化合物を作る第４族、第５族、又は第６族の金属を共に第一の金属層を形成すると、１１００℃以上で熱処理した後、第１の金属層上に剥離を誘発するグラファイトが減少し、且つ密着性の良い物質が形成されること、及び、第４族、第５族、又は第６族の金属の中でも特にＴｉは、チタンシリサイド、チタンカーバイド、チタンとシリコンとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）を形成し、これらの化合物が物理的手段に耐性があり、剥離を抑制する効果があるという知見を得た。   As a result of intensive studies to achieve the above object, the present inventors have reacted with carbon to form a compound that reacts with carbon when using an element that does not react with carbon, such as Ni, in the first metal layer for obtaining an ohmic junction. When the first metal layer is formed together with the metals of Group 4, 5, or 6 forming the metal, the graphite that induces delamination on the first metal layer is reduced after heat treatment at 1100 ° C. or higher. In addition, a material having good adhesion is formed, and Ti among titanium, silicon carbide, titanium, silicon and carbon ternary system among the metals of Group 4, 5 or 6 The compound (TixSiyCz) was formed, and it was found that these compounds are resistant to physical means and have an effect of suppressing peeling.

本発明はこれらの知見に基づいて完成に至ったものであり、本発明によれば、以下の発明が提供される。
［１］第１導電型の炭化珪素基板を準備する工程（Ａ）と、
前記第１導電型の炭化珪素基板の１つの主面上に第１導電型のエピタキシャル層を形成する工程（Ｂ）と、
前記第１導電型の炭化珪素基板の他の主面上に、ニッケル（Ｎｉ）と、第４族、第５族、又は第６族の金属のいずれか１以上とから構成される第１の金属層を形成する工程（Ｃ）と、
前記工程（Ｃ）の後、前記炭化珪素基板を熱処理し、前記第１の金属層と前記炭化珪素基板の他方の主面との間にオーミック接合と、前記第１の金属層上に他の金属と密着性の良い物質の層を形成する工程（Ｄ）と、
前記工程（Ｄ）の後、他の主面上の第１の金属層表面の不純物を除去し清浄化する工程（Ｅ）を備え、
前記工程（Ｄ）の熱処理を、１１００℃以上で行うことを特徴とする炭化珪素半導体装置の製造方法。
［２］前記第１の金属層が、ニッケル（Ｎｉ）と、チタン（Ｔｉ）から構成される層であることを特徴とする［１］に記載の炭化珪素半導体装置の製造方法。
［３］前記工程（Ｄ）の熱処理の最高温度が、１１００℃以上、１３５０℃未満であることを特徴とする［１］又は［２］に記載の炭化珪素半導体装置の製造方法。
［４］前記工程（Ｄ）の熱処理の保持時間が、１秒以上、１時間以下であることを特徴とする［１］〜［３］のいずれかに記載の炭化珪素半導体装置の製造方法。
［５］前記工程（Ｄ）の熱処理の昇温速度が、０.５℃／秒以上、２０℃／秒以下であることを特徴とする［１］〜［４］のいずれかに記載の炭化珪素半導体装置の製造方法。
［６］前記の他の金属と密着性の良い物質の層が、前記第１の金属層上に部分的に残された層で形成されていることを特徴とする［１］〜［５］のいずれかに記載の炭化珪素半導体装置の製造方法。
［７］前記の他の金属と密着性の良い物質の層が、ＴｉＣ又はチタンとシリコンとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）で形成されることを特徴とする［１］〜［６］のいずれかに記載の炭化珪素半導体装置の製造方法。
［８］前記工程（Ｅ）が、イオンを衝突させて不純物除去し清浄化する逆スパッタ法を使用することを特徴とする［１］〜［７］のいずれかに記載の炭化珪素半導体装置の製造方法。
［９］前記イオンが、イオン化したアルゴン（Ａｒ）であることを特徴とする［８］に記載の炭化珪素半導体装置の製造方法。
［１０］前記工程（Ｄ）と前記工程（Ｅ）の間に、前記主面のエピタキシャル層上に、第２の金属層を形成する工程（Ｆ）をさらに備えることを特徴とする［１］〜［９］のいずれかに記載の炭化珪素半導体装置の製造方法。
［１１］前記炭化珪素基板を１０００℃以下で熱処理して、前記第２の金属層と前記エピタキシャル層との間にショットキー接合を形成する工程（Ｇ）をさらに備えることを特徴とする［１０］に記載の炭化珪素半導体装置の製造方法。
［１２］前記（Ｇ）工程の熱処理の最高温度が、４００〜６００℃であることを特徴とする［１１］に記載の炭化珪素半導体装置の製造方法。
［１３］前記（Ｇ）工程の熱処理の保持時間が、１分以上、３０分以下であることを特徴とする［１１］又は［１２］に記載の炭化珪素半導体装置の製造方法。
［１４］前記（Ｇ）工程の熱処理の昇温速度が、１℃／秒以上、１０℃／秒以下であることを特徴とする［１１］〜［１３］のいずれかに記載の炭化珪素半導体装置の製造方法。
［１５］前記工程（Ｂ）と前記工程（Ｃ）の間に、前記第１導電型のエピタキシャル層に、第２の金属層の下部の領域に第２電導型の構造を形成する工程（Ｈ）をさらに備えることを特徴とする［１］〜［１４］のいずれかに記載の炭化珪素半導体装置の製造方法
［１６］前記第２電導型の構造が、ストライプ状の構造で形成されたことを特徴とする［１５］に記載の炭化珪素半導体装置の製造方法。
［１７］前記炭化珪素基板の（０００１）面上に、前記第１の導電型のエピタキシャル層を形成することを特徴とする［１］〜［１６］のいずれかに記載の炭化珪素半導体装置の製造方法。
［１８］前記炭化珪素基板の（０００−１）面上に、前記第１の導電型のエピタキシャル層を形成することを特徴とする［１］〜［１６］のいずれかに記載の炭化珪素半導体装置の製造方法。
［１９］［１］〜［１８］のいずれかに記載された製造方法により製造された炭化珪素半導体装置であって、
前記第１の金属層上に形成された、他の金属と密着性の良い物質の層において、第４族、第５族、又は第６族の金属のいずれかとの結合を有するカーボン原子の比率が２０％以上であることを特徴とする炭化珪素半導体装置。
［２０］Ｔｉ−Ｃ結合を持つカーボン原子の比率が２０％以上であることを特徴とする［１９］に記載の炭化珪素半導体装置。 The present invention has been completed based on these findings, and according to the present invention, the following inventions are provided.
[1] A step (A) of preparing a silicon carbide substrate of a first conductivity type;
Forming a first conductivity type epitaxial layer on one main surface of the first conductivity type silicon carbide substrate;
On the other main surface of the silicon carbide substrate of the first conductivity type, a first composed of nickel (Ni) and any one or more of Group 4, Group 5 or Group 6 metal Forming a metal layer (C);
After the step (C), the silicon carbide substrate is heat-treated, and an ohmic junction is formed between the first metal layer and the other main surface of the silicon carbide substrate, and another material is formed on the first metal layer. Forming a layer of a substance having good adhesion to the metal (D);
After the step (D), the method includes a step (E) of removing and cleaning impurities on the surface of the first metal layer on the other main surface,
A method for manufacturing a silicon carbide semiconductor device, wherein the heat treatment in the step (D) is performed at 1100 ° C. or higher.
[2] The method for manufacturing a silicon carbide semiconductor device according to [1], wherein the first metal layer is a layer made of nickel (Ni) and titanium (Ti).
[3] The method for manufacturing a silicon carbide semiconductor device according to [1] or [2], wherein a maximum temperature of the heat treatment in the step (D) is 1100 ° C. or higher and lower than 1350 ° C.
[4] The method for manufacturing a silicon carbide semiconductor device according to any one of [1] to [3], wherein a holding time of the heat treatment in the step (D) is 1 second or more and 1 hour or less.
[5] The carbonization according to any one of [1] to [4], wherein the heating rate of the heat treatment in the step (D) is 0.5 ° C./second or more and 20 ° C./second or less. A method for manufacturing a silicon semiconductor device.
[6] The layer of the substance having good adhesion with the other metal is formed of a layer partially left on the first metal layer. [1] to [5] A method for manufacturing a silicon carbide semiconductor device according to any one of the above.
[7] The layer of a substance having good adhesion to the other metal is formed of TiC or a ternary compound of titanium, silicon, and carbon (TixSiyCz). The manufacturing method of the silicon carbide semiconductor device in any one.
[8] The silicon carbide semiconductor device according to any one of [1] to [7], wherein the step (E) uses a reverse sputtering method in which ions are collided to remove and clean impurities. Production method.
[9] The method for manufacturing a silicon carbide semiconductor device according to [8], wherein the ions are ionized argon (Ar).
[10] The method further includes a step (F) of forming a second metal layer on the epitaxial layer of the main surface between the step (D) and the step (E). [1] The manufacturing method of the silicon carbide semiconductor device in any one of-[9].
[11] The method further includes a step (G) of heat-treating the silicon carbide substrate at 1000 ° C. or lower to form a Schottky junction between the second metal layer and the epitaxial layer. ] The manufacturing method of the silicon carbide semiconductor device of description.
[12] The method for manufacturing a silicon carbide semiconductor device according to [11], wherein the maximum temperature of the heat treatment in the step (G) is 400 to 600 ° C.
[13] The method for manufacturing a silicon carbide semiconductor device according to [11] or [12], wherein a holding time of the heat treatment in the step (G) is 1 minute or more and 30 minutes or less.
[14] The silicon carbide semiconductor according to any one of [11] to [13], wherein a temperature increase rate of the heat treatment in the step (G) is 1 ° C./second or more and 10 ° C./second or less. Device manufacturing method.
[15] Between the step (B) and the step (C), a step of forming a second conductivity type structure in a region below the second metal layer in the first conductivity type epitaxial layer (H The method of manufacturing a silicon carbide semiconductor device according to any one of [1] to [14], wherein the second conductive structure is formed in a stripe structure [15] The method for manufacturing a silicon carbide semiconductor device according to [15].
[17] The silicon carbide semiconductor device according to any one of [1] to [16], wherein an epitaxial layer of the first conductivity type is formed on a (0001) plane of the silicon carbide substrate. Production method.
[18] The silicon carbide semiconductor according to any one of [1] to [16], wherein an epitaxial layer of the first conductivity type is formed on a (000-1) plane of the silicon carbide substrate. Device manufacturing method.
[19] A silicon carbide semiconductor device manufactured by the manufacturing method according to any one of [1] to [18],
Ratio of carbon atoms having a bond with any of Group 4, Group 5 or Group 6 metal in a layer of a substance having good adhesion to other metals formed on the first metal layer Is a silicon carbide semiconductor device characterized by being 20% or more.
[20] The silicon carbide semiconductor device according to [19], wherein the proportion of carbon atoms having a Ti—C bond is 20% or more.

本発明によれば、炭化珪素半導体装置を製造する過程において、配線用金属膜の剥離を引き起こすグラファイト等の剥離原因物質の形成を抑え、他の金属と密着性の高い物質を表面に形成し、外部装置と接続用の配線用金属膜との密着を良くし剥離のない安定した構造の半導体装置を供給することが可能となる。   According to the present invention, in the process of manufacturing a silicon carbide semiconductor device, the formation of a substance causing exfoliation such as graphite that causes exfoliation of the metal film for wiring is suppressed, and a substance having high adhesion to other metals is formed on the surface. It becomes possible to supply a semiconductor device having a stable structure without peeling by improving the close contact between the external device and the wiring metal film for connection.

本発明の第一実施形態における炭化珪素半導体装置の製造工程の１つを示した断面図である。It is sectional drawing which showed one of the manufacturing processes of the silicon carbide semiconductor device in 1st embodiment of this invention. 本発明の第一実施形態における炭化珪素半導体装置の製造工程の１つを示した断面図である。It is sectional drawing which showed one of the manufacturing processes of the silicon carbide semiconductor device in 1st embodiment of this invention. 本発明の第一実施形態における炭化珪素半導体装置の製造工程の１つを示した断面図である。It is sectional drawing which showed one of the manufacturing processes of the silicon carbide semiconductor device in 1st embodiment of this invention. 本発明の第一実施形態における炭化珪素半導体装置の製造工程の１つを示した断面図である。It is sectional drawing which showed one of the manufacturing processes of the silicon carbide semiconductor device in 1st embodiment of this invention. 本発明の第一実施形態における炭化珪素半導体装置の製造工程の1つを示した断面図である。FIG. 5 is a cross sectional view showing one of manufacturing processes for the silicon carbide semiconductor device in the first embodiment of the present invention. 本発明の第一実施形態における炭化珪素半導体装置の製造工程の１つを示した断面図である。It is sectional drawing which showed one of the manufacturing processes of the silicon carbide semiconductor device in 1st embodiment of this invention. 本発明の第一実施形態における配線用金属膜としてＴｉ膜、Ｎｉ膜、Ａｕ膜を使用した時の半導体装置の断面図である。It is sectional drawing of a semiconductor device when using Ti film, Ni film, and Au film as a metal film for wiring in a first embodiment of the present invention. 本発明の第一実施形態における、Ｔｉ−Ｃ結合状態を持つ物質であるＴｉカーバイドの割合と密着性との関係を示した図である。It is the figure which showed the relationship between the ratio of Ti carbide which is a substance with a Ti-C bonding state, and adhesiveness in 1st embodiment of this invention. 本発明の第一実施形態における、Ｔｉ−Ｃ結合状態を持つ物質であるＴｉカーバイドの割合とシンタリング温度の関係を示した図である。It is the figure which showed the relationship between the ratio of Ti carbide which is a substance which has a Ti-C bonding state, and sintering temperature in 1st embodiment of this invention. 本発明の第一実施形態における他の金属と密着性の良い物質の層として、部分的に残された層が形成された時の半導体装置の断面図である。It is sectional drawing of a semiconductor device when the layer left partially is formed as a layer of a substance with favorable adhesiveness with the other metal in 1st embodiment of this invention.

本発明の炭化珪素半導体の製造方法は、
第１導電型の炭化珪素基板を準備する工程（Ａ）と、
前記第１導電型の炭化珪素基板の１つの主面上に第１導電型のエピタキシャル層を形成する工程（Ｂ）と、
前記第１導電型の炭化珪素基板の他の主面上に、ニッケル（Ｎｉ）と、第４族、第５族、又は第６族の金属のいずれか１以上とから構成される第１の金属層を形成する工程（Ｃ）と、
前記工程（Ｃ）の後、前記炭化珪素基板を熱処理し、前記第１の金属層と前記炭化珪素基板の他方の主面との間にオーミック接合と、前記第１の金属層上に他の金属と密着性の良い物質の層を形成する工程（Ｄ）と、
前記工程（Ｄ）の後、他の主面上の第１の金属層表面の不純物を除去し清浄化する工程（Ｅ）と、
を備え、前記工程（Ｄ）の熱処理を、１１００℃以上で行うことを特徴とするものである。 The method for producing a silicon carbide semiconductor of the present invention comprises:
Preparing a first conductivity type silicon carbide substrate (A);
Forming a first conductivity type epitaxial layer on one main surface of the first conductivity type silicon carbide substrate;
On the other main surface of the silicon carbide substrate of the first conductivity type, a first composed of nickel (Ni) and any one or more of Group 4, Group 5 or Group 6 metal Forming a metal layer (C);
After the step (C), the silicon carbide substrate is heat-treated, and an ohmic junction is formed between the first metal layer and the other main surface of the silicon carbide substrate, and another material is formed on the first metal layer. Forming a layer of a substance having good adhesion to the metal (D);
After the step (D), a step (E) of removing and cleaning impurities on the surface of the first metal layer on the other main surface;
And the heat treatment in the step (D) is performed at 1100 ° C. or higher.

本発明において、前記の他の主面上の第一の金属層は、ニッケル（Ｎｉ）と、第４族、第５族、又は第６族の金属のいずれか１以上とから構成されており、均一または不均一に混合、またはさまざまな形態の層により構成されている。
本発明において、Ｎｉとともに第一の金属層を構成する、第４族の金属としては、Ｔｉ、Ｚｒ等、第５族の金属としては、Ｖ，Ｔａ等、第６族の金属としては、Ｃｒ，Ｍｏ，Ｗ等があげられる。
他の主面上の該第一の金属層は、熱処理によって混合形態が変化し、熱処理後の第一の金属層となる。この、熱処理後の第一の金属層の表面に他の金属と密着性が良くＡｒスパッタ等の物理的手段に対する耐性の高い物質が形成され、その上に密着性が悪く物理的手段により容易に除去される物質が形成される。その後、複数の工程を通過した後、さらに剥離原因となる物質が堆積する。この表面を物理的手段により処理すると、耐性が高く他の金属と密着性の高い物質のみが残るため、金属を堆積すると剥離が起こらない。このため、不純物を除去は他の金属を堆積する直前に行うのがよい。 In the present invention, the first metal layer on the other main surface is composed of nickel (Ni) and any one or more of Group 4, Group 5, or Group 6 metal. , Uniformly or non-uniformly mixed, or composed of various forms of layers.
In the present invention, the group 4 metal constituting the first metal layer together with Ni is Ti, Zr, etc., the group 5 metal is V, Ta, etc., and the group 6 metal is Cr. , Mo, W and the like.
The mixing state of the first metal layer on the other main surface is changed by the heat treatment, and becomes the first metal layer after the heat treatment. On this surface of the first metal layer after the heat treatment, a material having good adhesion to other metals and high resistance to physical means such as Ar sputtering is formed, and the adhesion is poor on the surface of the first metal layer. A material to be removed is formed. Thereafter, after passing through a plurality of steps, a substance that causes peeling is further deposited. When this surface is treated by physical means, only a substance having high resistance and high adhesion to other metals remains, so that peeling does not occur when the metal is deposited. For this reason, it is preferable to remove impurities just before depositing another metal.

本発明において、オーミック接合を取るための第一の金属層にＮｉ等のカーボンと反応しない元素を利用する場合、カーボンと反応して化合物を作る第４族、第５族、又は第６族の金属を共に第一の金属層を形成すると、１１００℃以上で熱処理した後、第１の金属層上に剥離を誘発するグラファイトが減少し、且つ密着性の良い物質が形成されるため効果があり、特に、第４族、第５族、又は第６族の金属の中でもＴｉは、チタンシリサイド、チタンカーバイド、チタンとシリコンとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）を形成する。これらの化合物が物理的手段に耐性があり、剥離を抑制する効果がある。   In the present invention, when an element that does not react with carbon, such as Ni, is used for the first metal layer for forming an ohmic junction, the group 4, group 5, or group 6 that reacts with carbon to form a compound. Forming the first metal layer together with the metal is effective because after the heat treatment at 1100 ° C. or higher, the graphite that induces delamination is reduced on the first metal layer, and a substance having good adhesion is formed. In particular, among the metals of Group 4, Group 5, or Group 6, Ti forms titanium silicide, titanium carbide, a ternary compound of titanium, silicon, and carbon (TixSiyCz). These compounds are resistant to physical means and have an effect of suppressing peeling.

本発明において、前記熱処理（アニール）温度はの最高温度は、１１００℃以上、１３５０℃以下が物理的手段に耐性があり、剥離を抑制する物質を形成する効果がある。
また、熱処理条件の保持時間として１秒以上、１時間以下が物理的手段に耐性があり、剥離を抑制する物質を形成する効果がある。
また、熱処理条件の昇温速度として０.５℃/秒以上、２０℃/秒以下が物理的手段に耐性があり、剥離を抑制する物質を形成する効果がある。 In the present invention, the maximum temperature of the heat treatment (annealing) is 1100 ° C. or higher and 1350 ° C. or lower which is resistant to physical means and has an effect of forming a substance that suppresses peeling.
Further, the retention time of the heat treatment condition is 1 second or more and 1 hour or less, which is resistant to physical means and has an effect of forming a substance that suppresses peeling.
In addition, a temperature increase rate of 0.5 ° C./second or more and 20 ° C./second or less as a heat treatment condition has an effect of forming a substance that is resistant to physical means and suppresses peeling.

また、本発明においては、前記の物理的手段に耐性があり、剥離を抑制する物質からなる層は、部分的に残された層であっても効果がある。   Further, in the present invention, even if the layer made of a substance that is resistant to the physical means and suppresses peeling is partially left, it is effective.

本発明において、不純物を除去し清浄化する方法として、イオンを衝突させて不純物除去し清浄化する逆スパッタ法が、剥離原因物質を優先的に除去する効果があり、中でも、Ａｒイオンを衝突させて不純物除去し清浄化する逆スパッタ法が、好ましい。   In the present invention, as a method for removing and cleaning impurities, the reverse sputtering method that removes impurities and cleans them by colliding with ions has the effect of preferentially removing the stripping-causing substances. The reverse sputtering method in which impurities are removed and cleaned is preferable.

本発明においては、第１の金属層と記炭化珪素基板の他の主面との間にオーミック接合を形成した後、主面上にＳＢＤ等の構造を形成する工程を通過した後、他の主面上の第１の金属層表面の不純物を除去し清浄化する工程を行っても効果がある。
また、炭化珪素基板の他の主面は（０００１）面、（０００−１）面のどちらでも効果がある In the present invention, after forming an ohmic junction between the first metal layer and the other main surface of the silicon carbide substrate, after passing through a step of forming a structure such as SBD on the main surface, Even if the process of removing impurities on the surface of the first metal layer on the main surface and cleaning it is effective.
Further, the other main surface of the silicon carbide substrate is effective in either the (0001) plane or the (000-1) plane.

以下、本発明の実施形態について、図面を用いて具体的に説明するが、本発明は、以下の実施形態に限定されるものではなく、本発明の趣旨を逸脱することがなければ、種々の設計変更を行うことが可能である。   Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. However, the present invention is not limited to the following embodiments, and various modifications can be made without departing from the spirit of the present invention. Design changes can be made.

（第一の実施形態）
図１（１）〜図１（７）は、炭化珪素半導体装置の製造工程の一例を示したものである。なお、 (First embodiment)
FIG. 1 (1) to FIG. 1 (7) show an example of the manufacturing process of the silicon carbide semiconductor device. In addition,

図１（１）に示すように、例えば５×１０18ｃｍ-3の窒素がドーピングされた厚さ、例えば３５０μｍの、例えば主面として（０００１）面を有する高濃度ｎ型基板１を用意する。
次いで、図１（１）に示すように、この炭化珪素基板１に、主面上には、例えば１.０×１０16ｃｍ-3の窒素がドーピングされた、例えば厚さ１０μｍの低濃度ｎ型ドリフト層２が堆積される。 As shown in FIG. 1A, a high-concentration n-type substrate 1 having, for example, a thickness of, for example, 350 μm doped with nitrogen of 5 × 10 18 cm −3 and having, for example, a (0001) plane as a main surface is prepared. .
Next, as shown in FIG. 1 (1), the silicon carbide substrate 1 is doped with, for example, 1.0 × 10 16 cm −3 of nitrogen on the main surface, for example, a low concentration n of 10 μm thickness, for example. A type drift layer 2 is deposited.

図１（２）に示すように、終端構造用のｐ型領域３とＪｕｎｃｔｉｏｎ Ｂａｒｒｉｅｒ Ｓｃｈｏｔｔｋｙ（ＪＢＳ）構造用のｐ型領域４とＪｕｎｃｔｉｏｎ Ｔｅｒｍｉｎａｔｉｏｎ Ｅｘｔｅｎｓｉｏｎ（ＪＴＥ）構造用のｐ型領域５を形成するためにアルミニウムを、例えばイオン注入装置で注入する。
終端構造用のｐ型領域３とＪＢＳ構造用のｐ型領域４とＪＴＥ構造用のｐ型領域５を形成するために注入されたアルミニウムを活性化するために、例えば、Ａｒ雰囲気中において１６５０℃で２４０秒間の活性化を行う。
この後、活性化による表面汚染層を除去するために例えば５０ｎｍの熱酸化層を形成して除去を行い、例えば、０.５μｍの層間絶縁膜６をドリフト層２の上部に形成する。 In order to form the p-type region 3 for the termination structure, the p-type region 4 for the Junction Barrier Schottky (JBS) structure, and the p-type region 5 for the Junction Termination Extension (JTE) structure, as shown in FIG. Aluminum is implanted in the ion implantation apparatus, for example.
In order to activate the aluminum implanted to form the p-type region 3 for the termination structure, the p-type region 4 for the JBS structure, and the p-type region 5 for the JTE structure, for example, 1650 ° C. in an Ar atmosphere. Activate for 240 seconds.
Thereafter, in order to remove the surface contamination layer due to the activation, for example, a thermal oxide layer of 50 nm is formed and removed. For example, an interlayer insulating film 6 of 0.5 μm is formed on the drift layer 2.

図１（２）に示すように、炭化珪素基板１の他の主面に、第一の金属層７を例えばＮｉを５０ｎｍとＴｉを１０ｎｍ堆積する。この後、例えば急速加熱処理（ＲＴＡ：Rapid Thermal Anneal）装置を用いて、例えば１℃／秒の昇温速度で昇温し、例えば、９００〜１３００℃に到達後、２分間保持する。
これにより、図１(２)の第一の金属層７がシリサイド化され、図１（３）に示すように層の形態が変化した第一の金属層８となり、炭化珪素基板１の他の主面と第一の金属層８の間に低抵抗のオーミックコンタクト９が形成される。ここで、ＴｉとＳｉとカーボンが反応し、Ｔｉシリサイド（ＴｉＳｉ）、Ｔｉカーバイド（ＴｉＣ）、ＴｉとＳｉとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）のいずれか、又はいくつかの組み合わせで形成された他の金属と密着性の良い物質の層１０が形成される。ここで、例えば熱処理の温度が低い等の条件によって、Ｔｉと反応せず残ったカーボン１１が熱処理後の第一の金属層表面に残る場合がある。 As shown in FIG. 1 (2), the first metal layer 7 is deposited on the other main surface of the silicon carbide substrate 1, for example, 50 nm of Ni and 10 nm of Ti. Thereafter, for example, using a rapid thermal annealing (RTA) apparatus, the temperature is raised at a rate of temperature rise of 1 ° C./second, for example, and after reaching 900 to 1300 ° C., the temperature is held for 2 minutes.
As a result, first metal layer 7 in FIG. 1 (2) is silicided to form first metal layer 8 in which the form of the layer is changed as shown in FIG. 1 (3). A low-resistance ohmic contact 9 is formed between the main surface and the first metal layer 8. Here, Ti, Si, and carbon react to form Ti silicide (TiSi), Ti carbide (TiC), a ternary compound of Ti, Si, and carbon (TixSiyCz), or some combination thereof. A layer 10 of a substance having good adhesion to other metals is formed. Here, for example, depending on conditions such as a low heat treatment temperature, carbon 11 that does not react with Ti may remain on the surface of the first metal layer after the heat treatment.

この後の工程に関しては図示していないが、例えば縦型ＳＢＤを製造するには本発明を実施する面の反対側にショットキーコンタクト等の構造を作製するため、多数の工程を通す。例えば、図１（４）に示すように、ドリフト層２とショットキー接合を持つ第２の金属層１３を、例えばＴｉで形成し、例えば８℃／秒の昇温時間で昇温し、例えば５００℃に到達後５分間保持してＳｃｈｏｔｔｋｙ接合を形成する。その後、ボンディング用電極パットとして第３の金属層１４を例えば５μｍの厚さのＡｌ−Ｓｉで形成し、ポリイミド１５を形成する。このため、図１（４）に示されるように、これらの多数の工程を通す過程で形成される汚染、例えばレジストの残渣、によって形成される剥離原因物質１２が他の表面に追加される。   Although the subsequent steps are not shown, for example, in order to manufacture a vertical SBD, a number of steps are passed in order to produce a structure such as a Schottky contact on the opposite side of the surface on which the present invention is implemented. For example, as shown in FIG. 1 (4), the second metal layer 13 having a drift layer 2 and a Schottky junction is formed of, for example, Ti, and the temperature is increased at a temperature increase time of, for example, 8 ° C./second. After reaching 500 ° C., hold for 5 minutes to form a Schottky junction. Thereafter, the third metal layer 14 is formed of, for example, 5 μm thick Al—Si as a bonding electrode pad, and the polyimide 15 is formed. For this reason, as shown in FIG. 1 (4), a stripping cause substance 12 formed by contamination, for example, resist residue, formed in the course of these many steps is added to another surface.

ここで、例えばイオン化したアルゴン（Ａｒ）を衝突させて不純物除去し清浄化する逆スパッタ法で裏面を処理すると、図１（５）に示すように、他の金属と密着性の良い物質が表面に現れる。   Here, for example, when the back surface is processed by reverse sputtering, in which ionized argon (Ar) is bombarded to remove impurities and clean, as shown in FIG. Appear in

裏面処理の直後に、他の金属と密着性の良い物質１０が表面に露出されている状態で、図１（６）に示すように第４の金属層１６を形成する。例えば、図２に示すように蒸着装置によって真空中で、Ｔｉ膜１７を例えば１００ｎｍ、Ｎｉ膜１８を例えば５００ｎｍ、Ａｕ膜１９を例えば２００ｎｍ形成すると、剥離がなく抵抗の少ない外部装置と接続するための第４の金属層１６ができる。   Immediately after the back surface treatment, a fourth metal layer 16 is formed as shown in FIG. 1 (6) in a state where the substance 10 having good adhesion to other metals is exposed on the surface. For example, as shown in FIG. 2, when the Ti film 17 is formed to have a thickness of, for example, 100 nm, the Ni film 18 is set to, for example, 500 nm, and the Au film 19 is set to, for example, 200 nm in a vacuum by a vapor deposition apparatus. The fourth metal layer 16 is formed.

本発明者らは、剥離の原因を調べるために、剥離の多い炭化珪素装置と剥離のない炭化珪素装置において、他の金属と密着性の良い物質の層１０をＥＳＣＡにより測定した。
図３は、Ｔｉ−Ｃ結合状態を持つ物質であるＴｉカーバイドの割合と密着性との関係を示した図である。該図に示されるように、該層１０における全原子のうち、Ｔｉ−Ｃ結合を持つカーボン原子の比率が２０％以上で剥離がなくなることが確認できた。 In order to investigate the cause of peeling, the present inventors measured a layer 10 of a substance having good adhesion to other metals by ESCA in a silicon carbide device with many peelings and a silicon carbide device without peeling.
FIG. 3 is a diagram showing the relationship between the ratio of Ti carbide, which is a substance having a Ti—C bonding state, and the adhesion. As shown in the figure, it was confirmed that exfoliation disappeared when the ratio of carbon atoms having Ti—C bonds out of all atoms in the layer 10 was 20% or more.

さらに、検討した結果、Ｔｉ−Ｃ結合を持つカーボン原子の比率が、前記の図１（３）に示す工程における加熱（シンタリング）の温度に関係することが判明した。
図４は、Ｔｉ−Ｃ結合状態を持つ物質であるＴｉカーバイドの割合とシンタリング温度の関係を示した図である。該図に示されるように、シンタリング温度が１１００℃以上であると、Ｔｉ−Ｃ結合を持つカーボン原子の比率が２０％以上となる。 Further, as a result of examination, it has been found that the ratio of carbon atoms having a Ti—C bond is related to the temperature of heating (sintering) in the step shown in FIG.
FIG. 4 is a graph showing the relationship between the ratio of Ti carbide, which is a substance having a Ti—C bonding state, and the sintering temperature. As shown in the figure, when the sintering temperature is 1100 ° C. or higher, the ratio of carbon atoms having a Ti—C bond is 20% or higher.

これにより、Ｔｉ−Ｃ結合を持つＴｉＣ、ＴｉとＳｉとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）のいずれか、又はこれらの混合物が密着性の強い物質であって、１１００℃以上のシンタリングにより密着性の高い層を作製することができるといえる。   As a result, any one of TiC having Ti-C bond, Ti, Si and carbon ternary compound (TixSiyCz), or a mixture thereof is a substance having strong adhesion, and adhesion is achieved by sintering at 1100 ° C or higher. It can be said that a high-performance layer can be manufactured.

また、本実施形態においては、カーボンと反応して化合物を作る金属賭して、Ｔｉを用いたが、同様の効果は、Ｔｉ以外の第４族、第５族、又は第６族の金属を用いても得られると考えられる。
さらに、これらの存在比から、図５に示されるように、密着性の良い物質の層は部分的に残された層でも有効だと言える。 In the present embodiment, Ti is used to bet a metal that reacts with carbon to form a compound, but the same effect is obtained by using a Group 4, 5 or 6 metal other than Ti. It is thought that it can be obtained.
Furthermore, from these abundance ratios, as shown in FIG. 5, it can be said that a layer of a substance having good adhesion is effective even if it is partially left.

（第二実施形態）
前記の第一の実施形態では、ＳＢＤ装置を製造する場合について述べたが、主面上に他の装置、例えばＭＯＳ等の構造を製造することが可能である。 (Second embodiment)
In the first embodiment, the case of manufacturing the SBD device has been described. However, it is possible to manufacture another device such as a MOS structure on the main surface.

（第三実施形態）
第一の実施形態では、主面として（０００１）面を例に述べたが、主面として（０００−１）面を用いてもよい。 (Third embodiment)
In the first embodiment, the (0001) plane is described as an example of the main surface, but the (000-1) plane may be used as the main surface.

なお、前述の実施形態では、全面均一な電極を形成した断面図に従って説明したが、主面表面に部分的に電極を形成した炭化珪素半導体装置、例えばＭＰＳ構造ダイオードのコンタクトに対応させることができることはいうまでもないことである。   In the above-described embodiment, the description has been made according to the cross-sectional view in which the electrode is formed uniformly on the entire surface. However, it can be applied to the contact of the silicon carbide semiconductor device in which the electrode is partially formed on the main surface, for example, the MPS structure diode. Needless to say.

１：第一導電型炭化珪素基板
２：一導電型炭化珪素エピタキシャル層
３：第二導電型不純物イオン注入領域（ＪＢＳ）
４：第二導電型不純物イオン注入領域（終端）
５：第二導電型不純物イオン注入領域（ＪＴＥ）
６：層間絶縁膜
７：第１の金属層
８：熱処理後の第１の金属層
９：オーミック接合
１０：他の金属と密着性の良い物質の層
１１：未反応で残ったカーボン
１２：工程中に付着した剥離原因物質
１３：第２の金属層（ショットキー接合用金属）
１４：第３の金属層（電極パッド）
１５：ポリイミド
１６：第４の金属層
１７：Ｔｉ層
１８：Ｎｉ層
１９：Ａｕ層 1: First conductivity type silicon carbide substrate 2: One conductivity type silicon carbide epitaxial layer 3: Second conductivity type impurity ion implantation region (JBS)
4: Second conductivity type impurity ion implantation region (termination)
5: Second conductivity type impurity ion implantation region (JTE)
6: Interlayer insulating film 7: First metal layer 8: First metal layer after heat treatment 9: Ohmic junction 10: Layer of substance having good adhesion to other metals 11: Unreacted carbon 12: Process Peeling causative substance attached inside 13: Second metal layer (Schottky bonding metal)
14: Third metal layer (electrode pad)
15: Polyimide 16: Fourth metal layer 17: Ti layer 18: Ni layer 19: Au layer

Claims (20)

第１導電型の炭化珪素基板を準備する工程（Ａ）と、
前記第１導電型の炭化珪素基板の１つの主面上に第１導電型のエピタキシャル層を形成する工程（Ｂ）と、
前記第１導電型の炭化珪素基板の他の主面上に、ニッケル（Ｎｉ）と、第４族、第５族、又は第６族の金属のいずれか１以上とから構成される第１の金属層を形成する工程（Ｃ）と、
前記工程（Ｃ）の後、前記炭化珪素基板を熱処理し、前記第１の金属層と前記炭化珪素基板の他方の主面との間にオーミック接合と、前記第１の金属層上に他の金属と密着性の良い物質の層を形成する工程（Ｄ）と、
前記工程（Ｄ）の後、他の主面上の第１の金属層表面の不純物を除去し清浄化する工程（Ｅ）を備え、
前記工程（Ｄ）の熱処理を、１１００℃以上で行うことを特徴とする炭化珪素半導体装置の製造方法。 Preparing a first conductivity type silicon carbide substrate (A);
Forming a first conductivity type epitaxial layer on one main surface of the first conductivity type silicon carbide substrate;
On the other main surface of the silicon carbide substrate of the first conductivity type, a first composed of nickel (Ni) and any one or more of Group 4, Group 5 or Group 6 metal Forming a metal layer (C);
After the step (C), the silicon carbide substrate is heat-treated, and an ohmic junction is formed between the first metal layer and the other main surface of the silicon carbide substrate, and another material is formed on the first metal layer. Forming a layer of a substance having good adhesion to the metal (D);
After the step (D), the method includes a step (E) of removing and cleaning impurities on the surface of the first metal layer on the other main surface,
A method for manufacturing a silicon carbide semiconductor device, wherein the heat treatment in the step (D) is performed at 1100 ° C. or higher. 前記第１の金属層が、ニッケル（Ｎｉ）と、チタン（Ｔｉ）から構成される層であることを特徴とする請求項１に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the first metal layer is a layer made of nickel (Ni) and titanium (Ti). 前記工程（Ｄ）の熱処理の最高温度が、１１００℃以上、１３５０℃未満であることを特徴とする請求項１又は２に記載の炭化珪素半導体装置の製造方法。   3. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein a maximum temperature of the heat treatment in the step (D) is not less than 1100 ° C. and less than 1350 ° C. 3. 前記工程（Ｄ）の熱処理の保持時間が、１秒以上、１時間以下であることを特徴とする請求項１〜３のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to any one of claims 1 to 3, wherein a holding time of the heat treatment in the step (D) is 1 second or more and 1 hour or less. 前記工程（Ｄ）の熱処理の昇温速度が、０.５℃／秒以上、２０℃／秒以下であることを特徴とする請求項１〜４のいずれか１項に記載の炭化珪素半導体装置の製造方法。   5. The silicon carbide semiconductor device according to claim 1, wherein a heating rate of the heat treatment in the step (D) is not less than 0.5 ° C./second and not more than 20 ° C./second. Manufacturing method. 前記の他の金属と密着性の良い物質の層が、前記第１の金属層上に部分的に残された層で形成されていることを特徴とする請求項１〜５のいずれか１項に記載の炭化珪素半導体装置の製造方法。   6. The layer of a substance having good adhesion with the other metal is formed of a layer partially left on the first metal layer. A method for manufacturing a silicon carbide semiconductor device according to claim 1. 前記の他の金属と密着性の良い物質の層が、ＴｉＣ又はチタンとシリコンとカーボンの３元系化合物（ＴｉｘＳｉｙＣｚ）で形成されることを特徴とする請求項１〜６のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The layer of a substance having good adhesion to the other metal is formed of TiC or a ternary compound of titanium, silicon, and carbon (TixSiyCz). The manufacturing method of the silicon carbide semiconductor device of description. 前記工程（Ｅ）が、イオンを衝突させて不純物除去し清浄化する逆スパッタ法を使用することを特徴とする請求項１〜７のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the step (E) uses a reverse sputtering method in which ions are collided to remove and clean impurities. 前記イオンが、イオン化したアルゴン（Ａｒ）であることを特徴とする請求項８に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 8, wherein the ions are ionized argon (Ar). 前記工程（Ｄ）と前記工程（Ｅ）の間に、前記主面のエピタキシャル層上に、第２の金属層を形成する工程（Ｆ）をさらに備えることを特徴とする請求項１〜９のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The step (F) of forming a second metal layer on the epitaxial layer of the main surface between the step (D) and the step (E) is further provided. The manufacturing method of the silicon carbide semiconductor device of any one of Claims. 前記炭化珪素基板を１０００℃以下で熱処理して、前記第２の金属層と前記エピタキシャル層との間にショットキー接合を形成する工程（Ｇ）をさらに備えることを特徴とする請求項１０に記載の炭化珪素半導体装置の製造方法。   11. The method according to claim 10, further comprising a step (G) of heat-treating the silicon carbide substrate at 1000 ° C. or less to form a Schottky junction between the second metal layer and the epitaxial layer. A method for manufacturing a silicon carbide semiconductor device. 前記（Ｇ）工程の熱処理の最高温度が、４００〜６００℃であることを特徴とする請求項１１に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 11, wherein a maximum temperature of the heat treatment in the step (G) is 400 to 600 ° C. 前記（Ｇ）工程の熱処理の保持時間が、１分以上、３０分以下であることを特徴とする請求項１１又は１２に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 11 or 12, wherein a holding time of the heat treatment in the step (G) is 1 minute or more and 30 minutes or less. 前記（Ｇ）工程の熱処理の昇温速度が、１℃／秒以上、１０℃／秒以下であることを特徴とする請求項１１〜１３のいずれか１項に記載の炭化珪素半導体装置の製造方法。   14. The method of manufacturing a silicon carbide semiconductor device according to claim 11, wherein a temperature increase rate of the heat treatment in the step (G) is 1 ° C./second or more and 10 ° C./second or less. Method. 前記工程（Ｂ）と（Ｃ）の間に、前記第１導電型のエピタキシャル層に、第２の金属層の下部の領域に第２電導型の構造を形成する工程（Ｈ）をさらに備えることを特徴とする請求項１〜１４のいずれか１項に記載の炭化珪素半導体装置の製造方法   The method further includes a step (H) of forming a second conductive type structure in a region below the second metal layer in the first conductive type epitaxial layer between the steps (B) and (C). The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein: 前記第２電導型の構造が、ストライプ状の構造で形成されたことを特徴とする請求項１５に記載の炭化珪素半導体装置の製造方法。   The method of manufacturing a silicon carbide semiconductor device according to claim 15, wherein the second conductive type structure is formed in a stripe structure. 前記炭化珪素基板の（０００１）面上に、前記第１の導電型のエピタキシャル層を形成することを特徴とする請求項１〜１６のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein an epitaxial layer of the first conductivity type is formed on a (0001) surface of the silicon carbide substrate. 前記炭化珪素基板の（０００−１）面上に、前記第１の導電型のエピタキシャル層を形成することを特徴とする請求項１〜１６のいずれか１項に記載の炭化珪素半導体装置の製造方法。   The silicon carbide semiconductor device according to any one of claims 1 to 16, wherein an epitaxial layer of the first conductivity type is formed on a (000-1) plane of the silicon carbide substrate. Method. 請求項１〜１８のいずれか１項に記載された製造方法により製造された炭化珪素半導体装置であって、
前記第１の金属層上に形成された、他の金属と密着性の良い物質の層において、第４族、第５族、又は第６族の金属のいずれかとの結合を有するカーボン原子の比率が２０％以上であることを特徴とする炭化珪素半導体装置。 A silicon carbide semiconductor device manufactured by the manufacturing method according to any one of claims 1 to 18,
Ratio of carbon atoms having a bond with any of Group 4, Group 5 or Group 6 metal in a layer of a substance having good adhesion to other metals formed on the first metal layer Is a silicon carbide semiconductor device characterized by being 20% or more. Ｔｉ−Ｃ結合を持つカーボン原子の比率が２０％以上であることを特徴とする請求項１９に記載の炭化珪素半導体装置。   The silicon carbide semiconductor device according to claim 19, wherein a ratio of carbon atoms having a Ti—C bond is 20% or more.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017120938A (en) * 2013-11-22 2017-07-06 富士電機株式会社 Method for manufacturing silicon carbide semiconductor device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6112699B2 (en) * 2012-03-30 2017-04-12 富士電機株式会社 Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device manufactured by the method
JP6028676B2 (en) * 2013-05-21 2016-11-16 住友電気工業株式会社 Silicon carbide semiconductor device
CN106165066A (en) * 2014-04-09 2016-11-23 三菱电机株式会社 The manufacture method of manufacturing silicon carbide semiconductor device and manufacturing silicon carbide semiconductor device
US10797137B2 (en) 2017-06-30 2020-10-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier height
CN108321213A (en) * 2017-12-21 2018-07-24 秦皇岛京河科学技术研究院有限公司 The preparation method and its structure of SiC power diode devices
US11538769B2 (en) * 2018-12-14 2022-12-27 General Electric Company High voltage semiconductor devices having improved electric field suppression
CN110349839B (en) * 2019-06-21 2021-03-12 全球能源互联网研究院有限公司 Preparation method of p/n type silicon carbide ohmic contact

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0952796A (en) * 1995-08-18 1997-02-25 Fuji Electric Co Ltd Method for growing silicon carbide crystal and silicon carbide semiconductor device
JP2000208438A (en) * 1999-01-11 2000-07-28 Fuji Electric Co Ltd SiC SEMICONDUCTOR DEVICE
JP2006344688A (en) * 2005-06-07 2006-12-21 Denso Corp Semiconductor device and its manufacturing method
JP2009094392A (en) * 2007-10-11 2009-04-30 Mitsubishi Electric Corp Method for manufacturing silicon carbide semiconductor device
JP2009266969A (en) * 2008-04-23 2009-11-12 Toyota Motor Corp Method of manufacturing semiconductor device
JP2010062524A (en) * 2008-06-02 2010-03-18 Fuji Electric Systems Co Ltd Manufacturing method of silicon carbide semiconductor device
WO2010134344A1 (en) * 2009-05-20 2010-11-25 三菱電機株式会社 Silicon carbide semiconductor device and method for manufacturing same
WO2011115294A1 (en) * 2010-03-16 2011-09-22 合同会社先端配線材料研究所 Silicon carbide electrode, silicon carbide semiconductor element, silicon carbide semiconductor device, and method for forming electrode for silicon carbide
JP2012248729A (en) * 2011-05-30 2012-12-13 National Institute Of Advanced Industrial & Technology SiC SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442200A (en) * 1994-06-03 1995-08-15 Advanced Technology Materials, Inc. Low resistance, stable ohmic contacts to silcon carbide, and method of making the same
ATE357744T1 (en) * 1998-09-02 2007-04-15 Siced Elect Dev Gmbh & Co Kg SEMICONDUCTOR DEVICE WITH OHMS CONTACT AND METHOD FOR OHMAS CONTACTING A SEMICONDUCTOR DEVICE
US6599644B1 (en) * 2000-10-06 2003-07-29 Foundation For Research & Technology-Hellas Method of making an ohmic contact to p-type silicon carbide, comprising titanium carbide and nickel silicide
US6759683B1 (en) * 2001-08-27 2004-07-06 The United States Of America As Represented By The Secretary Of The Army Formulation and fabrication of an improved Ni based composite Ohmic contact to n-SiC for high temperature and high power device applications
JP3871607B2 (en) 2001-12-14 2007-01-24 松下電器産業株式会社 Semiconductor device and manufacturing method thereof
US20060006393A1 (en) * 2004-07-06 2006-01-12 Ward Allan Iii Silicon-rich nickel-silicide ohmic contacts for SiC semiconductor devices
JP2006332358A (en) 2005-05-26 2006-12-07 Denso Corp Silicon carbide semiconductor device and its manufacturing method
US20070138482A1 (en) * 2005-12-08 2007-06-21 Nissan Motor Co., Ltd. Silicon carbide semiconductor device and method for producing the same
US7790616B2 (en) * 2007-08-29 2010-09-07 Northrop Grumman Systems Corporation Encapsulated silicidation for improved SiC processing and device yield
JP6112699B2 (en) * 2012-03-30 2017-04-12 富士電機株式会社 Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device manufactured by the method
JP5966556B2 (en) * 2012-04-18 2016-08-10 富士電機株式会社 Manufacturing method of semiconductor device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0952796A (en) * 1995-08-18 1997-02-25 Fuji Electric Co Ltd Method for growing silicon carbide crystal and silicon carbide semiconductor device
JP2000208438A (en) * 1999-01-11 2000-07-28 Fuji Electric Co Ltd SiC SEMICONDUCTOR DEVICE
JP2006344688A (en) * 2005-06-07 2006-12-21 Denso Corp Semiconductor device and its manufacturing method
JP2009094392A (en) * 2007-10-11 2009-04-30 Mitsubishi Electric Corp Method for manufacturing silicon carbide semiconductor device
JP2009266969A (en) * 2008-04-23 2009-11-12 Toyota Motor Corp Method of manufacturing semiconductor device
JP2010062524A (en) * 2008-06-02 2010-03-18 Fuji Electric Systems Co Ltd Manufacturing method of silicon carbide semiconductor device
WO2010134344A1 (en) * 2009-05-20 2010-11-25 三菱電機株式会社 Silicon carbide semiconductor device and method for manufacturing same
WO2011115294A1 (en) * 2010-03-16 2011-09-22 合同会社先端配線材料研究所 Silicon carbide electrode, silicon carbide semiconductor element, silicon carbide semiconductor device, and method for forming electrode for silicon carbide
JP2012248729A (en) * 2011-05-30 2012-12-13 National Institute Of Advanced Industrial & Technology SiC SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017120938A (en) * 2013-11-22 2017-07-06 富士電機株式会社 Method for manufacturing silicon carbide semiconductor device

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