JP2013187300A - High-frequency circuit device - Google Patents

High-frequency circuit device Download PDF

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JP2013187300A
JP2013187300A JP2012050475A JP2012050475A JP2013187300A JP 2013187300 A JP2013187300 A JP 2013187300A JP 2012050475 A JP2012050475 A JP 2012050475A JP 2012050475 A JP2012050475 A JP 2012050475A JP 2013187300 A JP2013187300 A JP 2013187300A
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main line
electrode pad
pad
frequency circuit
circuit device
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Takao Ikeda
隆雄 池田
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Toshiba Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Waveguides (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency circuit device which enables good wire bonding and which can obtain good high-frequency characteristics across a wide frequency band.SOLUTION: A high-frequency circuit device of an embodiment comprises: a main line provided on a surface of a dielectric substrate; a ground pad which is provide at a distance from the main line and grounded; an electrode pad which is provided in a place extending from the end of the mainline and at a distance from the main line and connected by the main line and a wire.

Description

本発明の実施形態は、ボンディングワイヤを有する高周波回路装置に関する。   Embodiments described herein relate generally to a high-frequency circuit device having a bonding wire.

例えば携帯端末機器の高周波用の半導体チップを、小型でかつ軽量にするためにMMIC(Monolithic Microwave IC)が多く用いられる。このようなMMICは主基板・パッケージに設置固定されて、組み立てられる。   For example, MMIC (Monolithic Microwave IC) is often used to make a high-frequency semiconductor chip of a portable terminal device small and light. Such an MMIC is installed and fixed on the main board / package and assembled.

MMICにおいて、検査時に高周波プローブで良好なRF特性を得るために、インピーダンスを50Ωにするが、そのために主線路の幅は狭くすることが多い。例えばMMICチップのGaAs製の基板を用いるとする。その基板の厚さを100μmとし特性インピーダンスが50Ωになるようにするためには、主線路の幅は70μm程度となる。この主線路の一端に接続されるRFパッドの幅をこの程度とすると、十分特性の良好なワイヤボンディングを行うことができない。   In the MMIC, in order to obtain good RF characteristics with a high-frequency probe during inspection, the impedance is set to 50Ω, and therefore the width of the main line is often narrowed. For example, assume that a GaAs substrate of an MMIC chip is used. In order to make the thickness of the substrate 100 μm and the characteristic impedance 50Ω, the width of the main line is about 70 μm. If the width of the RF pad connected to one end of the main line is set to this level, wire bonding with sufficiently good characteristics cannot be performed.

そのため、RFパッドの幅を大きくする必要があるが、特に高い周波数領域においては、RFパッドと主線路が接続される部分において寄生容量が大きくなって、RF特性を劣化させてしまう。   For this reason, it is necessary to increase the width of the RF pad. However, in a particularly high frequency region, the parasitic capacitance increases at the portion where the RF pad and the main line are connected, and the RF characteristics are deteriorated.

そこで、図5に示すように、RFパッド(パッド主部)41の両側に所定間隔を空けてパッド副部42を設け、ワイヤをチップ外の配線とパッド主部とパッド副部にまたがってボンディングを行う構造が考えられた。図5において、裏面に接地金属膜が設けられたGaAs基板43の上面に主線路44が設けられ、その端部にRFパッド41が設けられている。このRFパッド41の両側に離されて接地パッド45が設けられ、これはバイアホール46により接地されている。上記RFパッド(パッド主部)41の両側に所定間隔のスリットを介してパッド副部42が設けられている。   Therefore, as shown in FIG. 5, a pad sub-portion 42 is provided on both sides of the RF pad (pad main portion) 41 with a predetermined interval, and the wire is bonded across the wiring outside the chip, the pad main portion, and the pad sub-portion. The structure to do was considered. In FIG. 5, a main line 44 is provided on the upper surface of a GaAs substrate 43 provided with a ground metal film on the back surface, and an RF pad 41 is provided at an end thereof. Ground pads 45 are provided on both sides of the RF pad 41 and are grounded by via holes 46. Pad sub-portions 42 are provided on both sides of the RF pad (pad main portion) 41 via slits with a predetermined interval.

特開2011−233906号公報JP 2011-233906 A

従来の図5に示すような構造の高周波回路装置にすれば、特定の周波数においてその影響を最小限にするよう設計することが可能であるが、広い周波数帯域にわたって影響を低減することは難しい。   The conventional high-frequency circuit device having the structure shown in FIG. 5 can be designed to minimize the influence at a specific frequency, but it is difficult to reduce the influence over a wide frequency band.

この発明は、良好なワイヤボンディングを行うことができ、しかも広い周波数帯域にわたって良好な高周波特性が得られる、高周波回路装置を提供する。   The present invention provides a high-frequency circuit device capable of performing good wire bonding and obtaining good high-frequency characteristics over a wide frequency band.

上記の課題を解決するために、本発明の一実施形態は、誘電体基板の表面上に設けられた主線路と、この主線路から離して設けられ接地される接地パッドと、前記主線路の端部の延長上で、この主線路から離して設けられ前記主線路とワイヤにより接続される電極パッドと、を有する高周波回路装置を提供する。   In order to solve the above-described problem, an embodiment of the present invention includes a main line provided on a surface of a dielectric substrate, a ground pad provided apart from the main line and grounded, and the main line. Provided is a high-frequency circuit device having an electrode pad provided on an extension of an end portion and spaced apart from the main line and connected to the main line by a wire.

一実施形態の高周波回路装置(半導体回路チップ)の構成を示す図である。It is a figure which shows the structure of the high frequency circuit apparatus (semiconductor circuit chip) of one Embodiment. 一実施形態の高周波回路装置を主基板に接地した状態を示す図である。It is a figure which shows the state which earth | grounded the high frequency circuit apparatus of one Embodiment to the main board | substrate. 図1に示す高周波回路装置の使用波長とギャップ幅の関係を示す図である。It is a figure which shows the relationship between the use wavelength and gap width of the high frequency circuit apparatus shown in FIG. 他の実施形態の高周波回路装置の構成を示す図である。It is a figure which shows the structure of the high frequency circuit apparatus of other embodiment. 従来の高周波回路装置の構成例を示す図である。It is a figure which shows the structural example of the conventional high frequency circuit apparatus.

一実施形態について図面を用いて以下に説明する。一実施形態の高周波回路装置である半導体回路チップ10を図1に示す。   An embodiment will be described below with reference to the drawings. A semiconductor circuit chip 10 which is a high-frequency circuit device of one embodiment is shown in FIG.

例えば裏面に接地導体が設けられた誘電体基板11例えばGaAs基板の表面に、例えばメタル蒸着により線路幅が約70μmの主線路12が設けられる。この主線路12の幅をw1とする。裏面に設けられた接地導体と誘電体基板11と主線路12によりマイクロストリップ線路が構成される。   For example, a main line 12 having a line width of about 70 μm is provided on the surface of a dielectric substrate 11 having a ground conductor on the back surface, for example, a GaAs substrate, for example, by metal deposition. The width of the main line 12 is assumed to be w1. A microstrip line is constituted by the ground conductor, the dielectric substrate 11 and the main line 12 provided on the back surface.

図示していないが主線路12には、抵抗などの受動素子やトランジスタなどの能動素子が回路素子として接続される。   Although not shown, a passive element such as a resistor and an active element such as a transistor are connected to the main line 12 as a circuit element.

主線路12の長さ方向(x方向)に対して垂直方向の両側に、接地パッド13a,13bが設けられ、これらの接地パッド13a,13bは各々バイアホール14a,14bにより裏面の接地導体に接続されている。   Ground pads 13a and 13b are provided on both sides in the direction perpendicular to the length direction (x direction) of the main line 12, and these ground pads 13a and 13b are connected to ground conductors on the back surface by via holes 14a and 14b, respectively. Has been.

そして、主線路12の端部の延長上(x方向)、所定の距離Wg離して、例えば方形形状の電極パッド15が設けられる。電極パッド15のx方向の幅をWxとし、垂直方向(y方向)の幅をWyとする。主線路12と電極パッド15は1本、もしくは複数本のワイヤ17により接続されている。   Then, on the extension of the end of the main line 12 (x direction), for example, a rectangular electrode pad 15 is provided at a predetermined distance Wg. The width of the electrode pad 15 in the x direction is Wx, and the width in the vertical direction (y direction) is Wy. The main line 12 and the electrode pad 15 are connected by one or a plurality of wires 17.

図2に、上記半導体回路チップ10を主基板21の上に載置、固定した状態を示す。電極パッド15は、例えば3本のワイヤ22a,22b,22cにより主基板21上の接続パッド23に接続される。   FIG. 2 shows a state in which the semiconductor circuit chip 10 is mounted and fixed on the main substrate 21. The electrode pad 15 is connected to the connection pad 23 on the main substrate 21 by, for example, three wires 22a, 22b, and 22c.

いま、ワイヤの直径を25μmとすると、このワイヤにより接続される幅はワイヤの潰れなども考慮して60μm程度必要となる。電極パッド15上に3本のワイヤが一列に接続されるとすると、このy軸方向の幅Wyは180μm程度必要となる。同様に、x方向に2本のワイヤが電極パッド15上に接続されるとすると、x軸方向の幅Wxは120μm程度以上となる。したがって電極パッド15としては、120×180μm以上の大きさの形状をしていれば、図2に示した状況でワイヤを接続することが可能である。このように上述の電極パッドの幅により、チップ外の端子と接続されるワイヤの最大の本数が限られる。   Now, assuming that the diameter of the wire is 25 μm, the width connected by this wire needs to be about 60 μm in consideration of the collapse of the wire. If three wires are connected in a row on the electrode pad 15, the width Wy in the y-axis direction is required to be about 180 μm. Similarly, if two wires are connected on the electrode pad 15 in the x direction, the width Wx in the x-axis direction is about 120 μm or more. Therefore, if the electrode pad 15 has a shape of 120 × 180 μm or more, it is possible to connect wires in the situation shown in FIG. As described above, the maximum number of wires connected to the terminals outside the chip is limited by the width of the electrode pad described above.

図1に示すギャップ幅Wgと使用周波数との関係を、図3に示す。図3において横軸は使用周波数f(MHz)、縦軸は主線路12端部と電極パッド15の間のギャップ幅Wg(mm)を示す。   The relationship between the gap width Wg shown in FIG. 1 and the operating frequency is shown in FIG. In FIG. 3, the horizontal axis represents the operating frequency f (MHz), and the vertical axis represents the gap width Wg (mm) between the end of the main line 12 and the electrode pad 15.

実線31は、使用波長λの1/20を示しており、点線32は誘電体基板11の厚さTの1/3の値を示す。通常、波長λの20分の1程度以下にあり、また誘電体基板の1/3以上であることが好ましいので、各使用周波数に対してギャップ幅Wgがこの間の実線と点線に囲まれた範囲ならば好ましいことになる。   A solid line 31 indicates 1/20 of the operating wavelength λ, and a dotted line 32 indicates a value of 1/3 of the thickness T of the dielectric substrate 11. Usually, it is about 1/20 or less of the wavelength λ, and preferably 1/3 or more of the dielectric substrate, so that the gap width Wg is surrounded by a solid line and a dotted line between the respective operating frequencies. Then it is preferable.

例えば、使用周波数が1000MHzでは、ギャップ幅Wgは、約0.4mm〜約30mm位、主線路12と電極パッド15を離してあればこの半導体回路チップを使用できる。また、使用周波数が10000MHzでは、ギャップ幅Wgが約0.1mmから約2mm程度の範囲でこのチップを使用可能である。   For example, when the operating frequency is 1000 MHz, the semiconductor circuit chip can be used as long as the gap width Wg is about 0.4 mm to about 30 mm and the main line 12 and the electrode pad 15 are separated. Further, when the operating frequency is 10,000 MHz, this chip can be used in the range where the gap width Wg is about 0.1 mm to about 2 mm.

ところで、上記実施形態では電極パッドとして矩形状のものを用いた場合について述べたが、この電極パッドの形状は方形に限られず、例えば図4に示すように台形形状であってもよい。この実施形態では、電極パッド35は、台形の短辺を主線路32に向けた台形形状としてある。参照符号31〜34bは、図1に示した実施形態における参照符号11〜14bと同じものを示す。   By the way, although the case where the rectangular thing was used as an electrode pad was described in the said embodiment, the shape of this electrode pad is not restricted to a square, For example, a trapezoid shape may be sufficient as shown in FIG. In this embodiment, the electrode pad 35 has a trapezoidal shape with the short side of the trapezoid facing the main line 32. Reference numerals 31 to 34b are the same as the reference numerals 11 to 14b in the embodiment shown in FIG.

すなわち、裏面に接地導体が設けられた誘電体基板31、例えばGaAs基板の表面に、例えばメタル蒸着により線路幅が約70μmの主線路32が設けられる。この主線路32の幅をw1とする。裏面に設けられた接地導体と誘電体基板31と主線路32によりマイクロストリップ線路が構成される。   That is, a main line 32 having a line width of about 70 μm is provided on the surface of a dielectric substrate 31 having a ground conductor on the back surface, for example, a GaAs substrate, for example, by metal deposition. The width of the main line 32 is set to w1. The ground strip, the dielectric substrate 31 and the main line 32 provided on the back surface constitute a microstrip line.

主線路32の端部の延長上、所定の距離(ギャップ幅)離して、例えば台形形状の電極パッド35が設けられる。主線路32と電極パッド35は1本、もしくは複数本のワイヤ37により接続されている。   On the extension of the end of the main line 32, for example, a trapezoidal electrode pad 35 is provided at a predetermined distance (gap width). The main line 32 and the electrode pad 35 are connected by one or a plurality of wires 37.

電極パッド35をこのような形状とすれば、例えば図2に示すように、電極パッド35と主線路に接続されるワイヤが少なく、外部の主基板に接続されるワイヤが多い場合に、好ましい。なぜなら、パッド幅増加による容量の増加などによる特性劣化を抑えるためには、電極パッドに接続されるこれらのワイヤはできるだけ短いことが好ましいが、電極パッドをこのような台形形状とすれば、ワイヤを短くすることができるからである。   The electrode pad 35 having such a shape is preferable when, for example, as shown in FIG. 2, there are few wires connected to the electrode pad 35 and the main line and many wires are connected to the external main substrate. This is because these wires connected to the electrode pads are preferably as short as possible in order to suppress characteristic deterioration due to an increase in capacitance due to an increase in pad width. However, if the electrode pads have such a trapezoidal shape, the wires This is because it can be shortened.

勿論、電極パッドの形状については図1に示した方形形状、図4に示した台形形状に限られず、どのような形状であってもよい。   Of course, the shape of the electrode pad is not limited to the square shape shown in FIG. 1 and the trapezoidal shape shown in FIG. 4, and may be any shape.

上記実施形態では、主線路の両側に接地パッドが設けられている例について説明したが、片方側にのみ接地パッドを有するものにも本発明は適用できる。また、上記実施形態では、誘電体基板の裏面に設けられた接地導体に、接地パッドが接続されて設置される態様について説明したが、接地パッドは他の方法で接地されていてもよい。   In the above-described embodiment, the example in which the ground pads are provided on both sides of the main line has been described. However, the present invention can also be applied to those having ground pads only on one side. Moreover, although the said embodiment demonstrated the aspect by which a ground pad was connected and installed in the ground conductor provided in the back surface of the dielectric substrate, the ground pad may be earth | grounded by the other method.

本発明のいくつかの実施形態を説明したがこれらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。   Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

10・・・・半導体回路チップ
11・・・・誘電体基板
12・・・・主線路
13a,13b・・・・接地パッド
14a,14b・・・・バイアホール
15・・・・電極パッド
17,22a,22b,22c・・・・ワイヤ
21・・・・主基板
23・・・・接続パッド
DESCRIPTION OF SYMBOLS 10 ... Semiconductor circuit chip 11 ... Dielectric substrate 12 ... Main line 13a, 13b ... Ground pad 14a, 14b ... Via hole 15 ... Electrode pad 17, 22a, 22b, 22c ... Wire 21 ... Main board 23 ... Connection pad

Claims (6)

誘電体基板の表面上に設けられた主線路と、
この主線路から離して設けられ接地される接地パッドと、
前記主線路の端部の延長上で、この主線路から離して設けられ前記主線路とワイヤにより接続される電極パッドと、
を有することを特徴とする高周波回路装置。
A main line provided on the surface of the dielectric substrate;
A ground pad that is provided apart from the main line and grounded;
On the extension of the end of the main line, an electrode pad provided apart from the main line and connected to the main line by a wire;
A high frequency circuit device comprising:
前記電極パッドは、矩形形状をしてなることを特徴とする請求項1記載の高周波回路装置。   The high-frequency circuit device according to claim 1, wherein the electrode pad has a rectangular shape. 前記電極パッドは、台形形状をしてなることを特徴とする請求項1記載の高周波回路装置。   The high-frequency circuit device according to claim 1, wherein the electrode pad has a trapezoidal shape. 裏面に接地導体が設けられた誘電体基板と、
この誘電体基板の表面上に設けられ回路素子に接続された主線路と、
この主線路の両側でこの主線路から離して設けられ前記接地導体に接続されて接地される接地パッドと、
前記主線路の端部の延長上でこの主線路から所定間隔、離して設けられ前記主線路とワイヤにより接続される電極パッドと、
を有する高周波回路装置。
A dielectric substrate provided with a ground conductor on the back surface;
A main line provided on the surface of the dielectric substrate and connected to a circuit element;
A ground pad that is provided on both sides of the main line and is separated from the main line and connected to the ground conductor;
An electrode pad provided on the extension of the end of the main line at a predetermined distance from the main line and connected to the main line by a wire;
A high-frequency circuit device.
前記電極パッドは、矩形状をしてなることを特徴とする請求項4記載の高周波回路装置。   The high-frequency circuit device according to claim 4, wherein the electrode pad has a rectangular shape. 前記電極パッドは、前記主線路に向かう辺が短い台形形状をしてなることを特徴とする請求項4記載の高周波回路装置。   The high-frequency circuit device according to claim 4, wherein the electrode pad has a trapezoidal shape with a short side toward the main line.
JP2012050475A 2012-03-07 2012-03-07 High-frequency circuit device Pending JP2013187300A (en)

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