JP2013182990A - Semiconductor device and substrate assembly - Google Patents

Semiconductor device and substrate assembly Download PDF

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JP2013182990A
JP2013182990A JP2012045334A JP2012045334A JP2013182990A JP 2013182990 A JP2013182990 A JP 2013182990A JP 2012045334 A JP2012045334 A JP 2012045334A JP 2012045334 A JP2012045334 A JP 2012045334A JP 2013182990 A JP2013182990 A JP 2013182990A
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photoelectric conversion
chip
conversion chip
semiconductor device
light
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Hideki Terasawa
英己 寺澤
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Denso Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Abstract

PROBLEM TO BE SOLVED: To have a small size structure including an optical signal interface and achieving low costs and achieve excellent productivity.SOLUTION: A semiconductor device 1 includes an LSI chip 2 and a photoelectric conversion chip 3. A photoelectric conversion part 10 including a light receiving element 9 and a through via 12, penetrating from a surface 8 to a rear surface 13 and serving as a transmission path of a photoelectric conversion signal, are formed on a semiconductor substrate of the photoelectric conversion chip 3, and the photoelectric conversion chip 3 receives an optical signal through a window part 11. The photoelectric conversion chip 3 is made into a package substrate. The rear surface 13 of the photoelectric conversion chip 3 and an element formation surface 5 of the LSI chip 2 are disposed so as to face each other and both chips are connected with each other in a flip chip connection method.

Description

本発明は、光信号インターフェースを有する半導体装置および基板組立体に関する。   The present invention relates to a semiconductor device and a substrate assembly having an optical signal interface.

半導体技術の発展により、大規模集積回路（ＬＳＩ）の飛躍的な動作速度の向上や、取り扱われるデータの伝送レートの高速化が図られてきている。ＣＰＵの動作周波数は数ＧＨｚに達し、ハイビジョン動画データの通信データレートは数Ｇｂｐｓ〜数百Ｇｂｐｓが必要と言われている。しかしながら、ＬＳＩの内部が高速化されても、その電気信号を外部にインターフェースするための半導体パッケージおよびプリント基板で対応できる速度は、ＬＳＩ内部における速度に対し向上しきれていない。   With the development of semiconductor technology, a dramatic increase in operating speed of large scale integrated circuits (LSIs) and an increase in the transmission rate of handled data have been achieved. It is said that the operating frequency of the CPU reaches several GHz, and the communication data rate of the high-definition moving image data needs to be several Gbps to several hundred Gbps. However, even if the internal speed of the LSI is increased, the speed that can be handled by the semiconductor package and the printed circuit board for interfacing the electric signal to the outside cannot be improved as compared with the internal speed of the LSI.

一般に、ワイヤボンディングを採用するパッケージでは、ワイヤに数ｎＨのインダクタンスがある。このため、信号周波数が１ＧＨｚを超えると、波形品質が劣化して信号伝送が難しくなる。そこで、信号周波数が高いＬＳＩでは、ワイヤボンディングではなくフリップチップ接続技術を使ったパッケージが用いられている。しかし、フリップチップ接続を採用した場合でも、実装密度が高くなると、パッケージ基板（インターポーザ）の配線数が増加して複雑化し、配線パターンの幅が細くなる。そのため、配線パターンのインダクタンスが増加して波形品質の劣化が生じる。   In general, in a package employing wire bonding, the wire has an inductance of several nH. For this reason, when the signal frequency exceeds 1 GHz, the waveform quality deteriorates and signal transmission becomes difficult. Therefore, an LSI having a high signal frequency uses a package using a flip chip connection technique instead of wire bonding. However, even when flip chip connection is employed, if the mounting density is increased, the number of wirings of the package substrate (interposer) is increased and complicated, and the width of the wiring pattern is reduced. As a result, the inductance of the wiring pattern increases and the waveform quality deteriorates.

また、プリント基板上の配線では、波形品質を維持するため、伝送線路の差動化、インピーダンスマッチング、プリエンファシス、低電圧化（例えばＬＶＤＳ：Low Voltage Differential Signal）などのシグナルインテグリティ技術、或いは信号ビット間のタイミングずれへの対策としてのパラレルからシリアルへの変換技術などが次々と適用されている。その結果、現在では数ＧＨｚまでの電気信号をプリント基板上で伝送することが可能となっている。しかし、これ以上の高速化は、インターフェース自体の多チャンネル化（多レーン化）を進めるしかない。しかし、コストおよびサイズの増大やクロストークなどの問題から難しくなってきている。   For wiring on printed circuit boards, signal integrity technologies such as transmission line differentiation, impedance matching, pre-emphasis, and low voltage (for example, LVDS: Low Voltage Differential Signal) or signal bits are used to maintain waveform quality. Conversion techniques from parallel to serial, etc. have been applied one after another as countermeasures against timing gaps. As a result, it is now possible to transmit electrical signals up to several GHz on a printed circuit board. However, higher speeds can only be achieved by making the interface itself multi-channel (multi-lane). However, it has become difficult due to problems such as an increase in cost and size and crosstalk.

これに対し、ＬＳＩの外部と高速にデータを授受する別のアプローチとして、光配線を用いた技術が提案されている。例えば特許文献１に記載されているように、半導体パッケージに光・電気変換インターフェースモジュールを設け、プリント基板やボンディングワイヤを経由せずに光ファイバなどの光伝送路にアクセスすることにより、他のＬＳＩなどの外部部品との間で光信号インターフェースを図る技術が知られている。また、特許文献２に記載されているように、半導体パッケージと光・電気変換インターフェースモジュール部とを分離して設け、ピンとジャックで電気的に接続することにより光信号インターフェースを図る技術も知られている。   On the other hand, a technique using optical wiring has been proposed as another approach for exchanging data with the outside of an LSI at high speed. For example, as described in Patent Document 1, an optical / electrical conversion interface module is provided in a semiconductor package, and an optical transmission line such as an optical fiber is accessed without going through a printed circuit board or a bonding wire. A technique for providing an optical signal interface with external parts such as the above is known. In addition, as described in Patent Document 2, a technique for providing an optical signal interface by separately providing a semiconductor package and an optical / electrical conversion interface module unit and electrically connecting them with pins and jacks is also known. Yes.

特開２００６−５９８８４号公報JP 2006-59884 A 特開２００４−２５３４５６号公報JP 2004-253456 A

しかしながら、上記特許文献１、２に記載された手段は、光・電気変換インターフェースモジュールを別で準備しておき、パッケージを実装基板（製品基板）に実装した後に機械的および電気的に接続するという複雑な構造を有している。このため、サイズが大きく実装高さも高くなり、ＬＳＩを実装した基板組立体や製品の小型化がしにくい、基板組立体の生産性が上がりにくく大量生産が難しい、コストが高くなるという課題があった。   However, the means described in the above-mentioned Patent Documents 1 and 2 are that the optical / electrical conversion interface module is prepared separately, and the package is mounted on the mounting substrate (product substrate) and then mechanically and electrically connected. It has a complicated structure. For this reason, there is a problem that the size is large and the mounting height is high, it is difficult to downsize the board assembly and product on which the LSI is mounted, the productivity of the board assembly is difficult to increase, mass production is difficult, and the cost is high. It was.

本発明は上記事情に鑑みてなされたもので、その目的は、光信号インターフェースを備え、小型で低コストの構造を持ち、生産性に優れた半導体装置および基板組立体を提供することにある。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device and a substrate assembly having an optical signal interface, a small and low-cost structure, and excellent productivity.

請求項１に記載した半導体装置は、回路を構成する素子が形成された回路チップと光電変換チップとを備えている。光電変換チップは、半導体基板に、発光素子および／または受光素子を含む光電変換部と、表面から裏面に貫通して光電変換信号の伝送経路となる貫通電極とが形成されており、表面に設けられた窓部を通して光信号の受発光を行う。このように貫通電極を介して光電変換信号を伝送するので、インダクタンスによる波形品質の低下を抑制することができる。光電変換チップと回路チップは、光電変換チップの裏面と回路チップの素子形成面またはその反対面とが対向するように積み重ねられ、光電変換チップの裏面における貫通電極の開口部を介して回路チップと光電変換チップとの間で電気的接続がとられている。   A semiconductor device according to a first aspect includes a circuit chip on which elements constituting a circuit are formed and a photoelectric conversion chip. The photoelectric conversion chip includes a photoelectric conversion part including a light emitting element and / or a light receiving element and a through electrode that penetrates from the front surface to the back surface and serves as a transmission path for a photoelectric conversion signal. The optical signal is received and emitted through the window. Thus, since a photoelectric conversion signal is transmitted through a penetration electrode, the fall of the waveform quality by inductance can be controlled. The photoelectric conversion chip and the circuit chip are stacked such that the back surface of the photoelectric conversion chip and the element formation surface of the circuit chip or the opposite surface thereof are opposed to each other, and the circuit chip and the circuit chip are arranged through the opening of the through electrode on the back surface of the photoelectric conversion chip. Electrical connection is established with the photoelectric conversion chip.

この光信号インターフェースを備えた半導体装置は、回路チップと光電変換チップとが積み重ねられて一体となり、光電変換機能を持った１つの半導体チップとして取り扱うことができる。従って、従来のように光・電気変換モジュールを別で準備しておき、半導体パッケージを実装基板（製品基板）に実装した後に機械的および電気的に接続するという複雑な構造をとる必要がない。その結果、半導体装置を小型、薄型、低コストに製造することができる。また、半導体装置の製造工程が単純になるため、生産性が上がり大量生産にも対応可能となる。   A semiconductor device provided with this optical signal interface can be handled as one semiconductor chip having a photoelectric conversion function by stacking and integrating a circuit chip and a photoelectric conversion chip. Therefore, it is not necessary to prepare a separate optical / electrical conversion module as in the prior art, and take a complicated structure of mechanically and electrically connecting the semiconductor package after mounting it on a mounting substrate (product substrate). As a result, the semiconductor device can be manufactured in a small size, a thin shape, and a low cost. Further, since the manufacturing process of the semiconductor device is simplified, productivity is increased and it is possible to cope with mass production.

請求項２に記載した手段によれば、光電変換チップをパッケージ基板（インターポーザ）として用いる。そして、その光電変換チップの裏面に回路チップが搭載されて半導体パッケージが構成される。その半導体パッケージは、光電変換チップの表面が実装基板と対向するように実装される。この構成によれば、半導体装置に用いられていた従来のパッケージ基板を光電変換チップに置き替え、特別な工程ではなく従来と同様のパッケージ組み立て工程を経ることにより、光信号インターフェースを備えた半導体装置を製造することができる。   According to the means described in claim 2, the photoelectric conversion chip is used as a package substrate (interposer). A circuit chip is mounted on the back surface of the photoelectric conversion chip to form a semiconductor package. The semiconductor package is mounted such that the surface of the photoelectric conversion chip faces the mounting substrate. According to this configuration, the conventional package substrate used in the semiconductor device is replaced with a photoelectric conversion chip, and a semiconductor device having an optical signal interface is obtained by performing a package assembly process similar to the conventional one instead of a special process. Can be manufactured.

請求項３に記載した手段によれば、光電変換チップの裏面と回路チップの素子形成面とが対向し、両チップはフリップチップ接続されている。この構成によれば、光電変換チップと回路チップとの間のインダクタンスを低減できるので、周波数が高い光電変換信号の波形品質を極力維持したまま伝送することができる。   According to the means described in claim 3, the back surface of the photoelectric conversion chip and the element formation surface of the circuit chip face each other, and both chips are flip-chip connected. According to this configuration, since the inductance between the photoelectric conversion chip and the circuit chip can be reduced, transmission can be performed while maintaining the waveform quality of the photoelectric conversion signal having a high frequency as much as possible.

請求項４に記載した手段によれば、光電変換チップの表面にガラス基板が貼り付けられているので受発光面を保護できる。このガラス基板には、ウエハの研削などの薄化工程で用いるガラス支持基板をそのまま流用してもよい。   According to the means described in claim 4, since the glass substrate is attached to the surface of the photoelectric conversion chip, the light emitting / receiving surface can be protected. As the glass substrate, a glass supporting substrate used in a thinning process such as wafer grinding may be used as it is.

請求項５に記載した手段によれば、パッケージ基板に回路チップが搭載されてワイヤボンディングされており、回路チップの素子形成面に裏面が対向するように光電変換チップが搭載されてフリップチップ接続されている。この構成によれば、例えば回路チップに光電変換チップをフリップチップ接続して一体化し、それを１つの半導体チップとしてパッケージ基板に実装することができる。これにより、従来のチップ組み立て技術および基板実装技術を用いて製造することができ、構造を簡単化できるとともに生産性を高めることができる。   According to the means described in claim 5, the circuit chip is mounted on the package substrate and wire-bonded, and the photoelectric conversion chip is mounted and flip-chip connected so that the back surface faces the element formation surface of the circuit chip. ing. According to this configuration, for example, a photoelectric conversion chip can be flip-chip connected to a circuit chip and integrated, and then mounted as a single semiconductor chip on a package substrate. Thereby, it can manufacture using the conventional chip assembly technique and board | substrate mounting technique, and while being able to simplify a structure, productivity can be improved.

請求項６に記載した手段によれば、光電変換チップの光電変換部への入出射光をガイドする光伝送路と光電変換チップの窓部とを光学的に結合する光学結合部を備えている。これにより、光伝送路と半導体装置との光学的結合が容易になる。   According to the sixth aspect of the present invention, the optical coupling portion that optically couples the optical transmission path that guides the light entering and exiting the photoelectric conversion portion of the photoelectric conversion chip and the window portion of the photoelectric conversion chip is provided. This facilitates optical coupling between the optical transmission line and the semiconductor device.

請求項７に記載した手段によれば、光電変換チップとして、発光素子を含む光電変換部が形成された第１光電変換チップと、受光素子を含む光電変換部が形成された第２光電変換チップとを備えている。光学結合部は、第１ミラーと第２ミラーを備えている。第１光電変換チップの窓部から出射された光は、第１ミラーを透過して光伝送路に入射する。光伝送路から出射された光は、第１ミラーと第２ミラーで反射して第２光電変換チップの窓部に入射する。これにより、外部装置との間で光信号の授受を行うことができる。   According to the means described in claim 7, as the photoelectric conversion chip, a first photoelectric conversion chip in which a photoelectric conversion unit including a light emitting element is formed, and a second photoelectric conversion chip in which a photoelectric conversion unit including a light receiving element is formed. And. The optical coupling unit includes a first mirror and a second mirror. The light emitted from the window portion of the first photoelectric conversion chip passes through the first mirror and enters the optical transmission path. The light emitted from the optical transmission path is reflected by the first mirror and the second mirror and enters the window portion of the second photoelectric conversion chip. Thereby, an optical signal can be exchanged with an external device.

請求項８に記載した手段によれば、光電変換チップの表面にガラス基板が貼り付けられているので受発光面を保護できる。このガラス基板には、ウエハの研削などの薄化工程で用いるガラス支持基板をそのまま流用してもよい。   According to the means described in claim 8, since the glass substrate is attached to the surface of the photoelectric conversion chip, the light emitting / receiving surface can be protected. As the glass substrate, a glass supporting substrate used in a thinning process such as wafer grinding may be used as it is.

請求項９に記載した基板組立体は、光電変換チップの表面が基板に対向するように実装される請求項１ないし４の何れかに記載の半導体装置と、光電変換チップの光電変換部への入出射光をガイドする光伝送路と、実装された光電変換チップの窓部に対向する位置に光伝送路の挿入孔または入出射光の光路が設けられた実装基板とを備えている。   The substrate assembly according to claim 9 is mounted so that the surface of the photoelectric conversion chip faces the substrate, and the semiconductor device according to any one of claims 1 to 4 and the photoelectric conversion unit of the photoelectric conversion chip are connected to the photoelectric conversion unit. An optical transmission path that guides incoming / outgoing light and a mounting substrate in which an insertion hole of the optical transmission path or an optical path of incoming / outgoing light is provided at a position facing the window portion of the mounted photoelectric conversion chip.

本発明の第１の実施形態を示す半導体装置の縦断面図1 is a longitudinal sectional view of a semiconductor device showing a first embodiment of the present invention; 基板組立体の縦断面図Longitudinal section of board assembly 本発明の第２の実施形態を示す図１相当図FIG. 1 equivalent diagram showing a second embodiment of the present invention 本発明の第３の実施形態を示す図２相当図FIG. 2 equivalent view showing the third embodiment of the present invention 本発明の第４の実施形態を示す図２相当図FIG. 2 equivalent view showing a fourth embodiment of the present invention

各実施形態において実質的に同一部分には同一符号を付して説明を省略する。
（第１の実施形態）
以下、第１の実施形態について図１および図２を参照しながら説明する。図１、図２は、それぞれ半導体装置およびその基板組立体を模式的に示す縦断面図である。半導体装置１は、ＣＰＵ、ＡＳＳＰ、ＦＰＧＡなどのプロセッサーＬＳＩとして形成されたＬＳＩチップ２（回路チップに相当）と、図示しない他の半導体装置、デバイス、機器等との間で光信号による高速データ伝送を行う光電変換チップ３とが積み重ねられた構成を備えている。 In each embodiment, substantially the same parts are denoted by the same reference numerals and description thereof is omitted.
(First embodiment)
Hereinafter, a first embodiment will be described with reference to FIGS. 1 and 2. 1 and 2 are longitudinal sectional views schematically showing a semiconductor device and a substrate assembly thereof, respectively. The semiconductor device 1 is a high-speed data transmission using an optical signal between an LSI chip 2 (corresponding to a circuit chip) formed as a processor LSI such as a CPU, an ASSP, or an FPGA and another semiconductor device, device, equipment, etc. (not shown). The photoelectric conversion chip 3 that performs the above is stacked.

半導体装置１は、光電変換チップ３をパッケージ基板（インターポーザ）として用いている。すなわち、光電変換チップ３に、ＬＳＩチップ２、図示しない半導体チップ、受動部品（チップ抵抗、チップコンデンサ、チップインダクタ）などを実装することにより半導体パッケージ４が構成されている。ＬＳＩチップ２は、光電変換チップ３にフリップチップ実装されている。   The semiconductor device 1 uses the photoelectric conversion chip 3 as a package substrate (interposer). That is, the semiconductor package 4 is configured by mounting the LSI chip 2, a semiconductor chip (not shown), passive components (chip resistor, chip capacitor, chip inductor) and the like on the photoelectric conversion chip 3. The LSI chip 2 is flip-chip mounted on the photoelectric conversion chip 3.

ＬＳＩチップ２は通常の半導体チップと同様であり、半導体基板の表（おもて）面である素子形成面５に、回路を構成する多数の素子、配線層および電極６が形成されている。電極６にはバンプ７が形成されている。光電変換チップ３は、半導体基板の表（おもて）面８に、受光素子９を含む光電変換部１０および必要に応じて他の回路素子や配線層が形成されている。この表面８において受光素子９の受光面に対応した位置には、光信号を透過する窓部１１が形成されている。   The LSI chip 2 is the same as a normal semiconductor chip, and a large number of elements, wiring layers, and electrodes 6 constituting a circuit are formed on an element formation surface 5 that is a front surface of a semiconductor substrate. Bumps 7 are formed on the electrodes 6. In the photoelectric conversion chip 3, a photoelectric conversion unit 10 including a light receiving element 9 and other circuit elements and wiring layers as necessary are formed on a front surface 8 of a semiconductor substrate. A window portion 11 that transmits an optical signal is formed on the surface 8 at a position corresponding to the light receiving surface of the light receiving element 9.

光電変換チップ３には多数の貫通ビア１２（貫通電極に相当）が形成されている。光電変換部１０により光信号から変換された電気信号（光電変換信号）は、配線層と貫通ビア１２を通してＬＳＩチップ２に伝送される。貫通ビア１２の裏面１３側の開口部には、バンプ７と相対する位置に電極１４が形成されており、この貫通ビア１２の開口部を介してＬＳＩチップ２との間で電気的接続がとられている。また、貫通ビア１２の表面８側の開口部には、必要に応じて半田ボール１５が設けられている。貫通ビア１２は、光電変換信号の伝送に用いられる他、光電変換部１０の制御信号や他の回路で用いる信号の伝送、電源の供給などにも用いられる。   A number of through vias 12 (corresponding to through electrodes) are formed in the photoelectric conversion chip 3. The electrical signal (photoelectric conversion signal) converted from the optical signal by the photoelectric conversion unit 10 is transmitted to the LSI chip 2 through the wiring layer and the through via 12. An electrode 14 is formed in the opening on the back surface 13 side of the through via 12 at a position facing the bump 7, and electrical connection is established between the through via 12 and the LSI chip 2 through the opening of the through via 12. It has been. A solder ball 15 is provided in the opening on the surface 8 side of the through via 12 as necessary. The through via 12 is used not only for transmitting a photoelectric conversion signal, but also for transmitting a control signal of the photoelectric conversion unit 10 and a signal used in another circuit, supplying power, and the like.

この半導体パッケージ４は、以下のように製造される。はじめに、ＬＳＩチップ２と光電変換チップ３を別々に製造する。続いて、光電変換チップ３をパッケージ基板とし、通常のパッケージ製造と同様の工程を用いて、光電変換チップ３の裏面１３にＬＳＩチップ２をはじめ図示しない各種チップ部品を実装する。この場合、光電変換チップ３の裏面１３とＬＳＩチップ２の素子形成面５とが対向するように積み重ねてフリップチップ接続（半田−半田、金−半田、金−金超音波接続など）をする。   The semiconductor package 4 is manufactured as follows. First, the LSI chip 2 and the photoelectric conversion chip 3 are manufactured separately. Subsequently, the photoelectric conversion chip 3 is used as a package substrate, and various chip components (not shown) such as the LSI chip 2 are mounted on the back surface 13 of the photoelectric conversion chip 3 by using the same process as in normal package manufacturing. In this case, the flip-chip connection (solder-solder, gold-solder, gold-gold ultrasonic connection, etc.) is performed by stacking so that the back surface 13 of the photoelectric conversion chip 3 and the element formation surface 5 of the LSI chip 2 face each other.

この半導体パッケージ４を実装基板１６（製品基板）に半田実装して基板組立体１７を製造する。実装基板１６には、光電変換チップ３の窓部に対向する位置に光ファイバ１８（光伝送路に相当）の挿入孔１９が形成されている。半導体パッケージ４の半田実装後、光ファイバ１８を挿入孔１９に挿通して樹脂やテープなどで固定する。この場合、半田実装による位置誤差を考慮して受光素子９（受光エリア）の大きさ、ファイバ径、孔径、孔位置とすることにより、光ファイバ１８から出射した光信号が確実に受光エリアに達することを保証できる。   The semiconductor package 4 is solder mounted on a mounting board 16 (product board) to manufacture a board assembly 17. An insertion hole 19 for an optical fiber 18 (corresponding to an optical transmission path) is formed in the mounting substrate 16 at a position facing the window portion of the photoelectric conversion chip 3. After solder mounting of the semiconductor package 4, the optical fiber 18 is inserted into the insertion hole 19 and fixed with resin or tape. In this case, the light signal emitted from the optical fiber 18 surely reaches the light receiving area by setting the size, the fiber diameter, the hole diameter, and the hole position of the light receiving element 9 (light receiving area) in consideration of the position error due to solder mounting. I can guarantee that.

上記構成を備えた半導体装置１によれば、ＬＳＩチップ２で用いるデータのうち通信データレートが比較的低く、電気信号インターフェースでも波形品質の劣化が小さくなるものは、実装基板１６および光電変換チップ３の貫通ビア１２を介してＬＳＩチップ２との間で伝送される。一方、通信データレートが高く、電気信号インターフェースでは波形品質の劣化が問題となるデータに対しては、光信号インターフェースが用いられる。光ファイバ１８から出射した光信号は受光素子９で受光され、光電変換部１０で電気信号に変換されて貫通ビア１２を通してＬＳＩチップ２に伝送される。   According to the semiconductor device 1 having the above configuration, among the data used in the LSI chip 2, the communication data rate is relatively low, and the deterioration of the waveform quality is small even in the electric signal interface. Is transmitted to and from the LSI chip 2 through the through via 12. On the other hand, an optical signal interface is used for data in which the communication data rate is high and deterioration of waveform quality is a problem in the electric signal interface. An optical signal emitted from the optical fiber 18 is received by the light receiving element 9, converted into an electric signal by the photoelectric conversion unit 10, and transmitted to the LSI chip 2 through the through via 12.

以上説明したように、本実施形態の半導体装置１は、ＬＳＩチップ２と光電変換チップ３とが一体となり、電気信号インターフェースと光信号インターフェースとを備えた１つの半導体チップとして取り扱うことができる。従って、半導体装置１を小型、薄型、低コストに製造することができる。また、半導体装置１の製造工程が単純になるため、生産性が上がり大量生産にも対応可能となる。特に、光電変換チップ３をパッケージ基板として用いているので、従来と同様のパッケージ組み立て工程を用いて光信号インターフェースを備えた半導体装置１（半導体パッケージ４）を製造することができる。また、ＬＳＩチップ２を光電変換チップ３にフリップチップ実装したので、貫通ビア１２を介して伝送された光電変換信号の波形品質を極力維持したままＬＳＩチップ２に伝送することができる。ボンディングワイヤを保護するための樹脂モールドも不要となる。   As described above, the semiconductor device 1 of the present embodiment can be handled as one semiconductor chip including the LSI chip 2 and the photoelectric conversion chip 3 and having an electric signal interface and an optical signal interface. Therefore, the semiconductor device 1 can be manufactured in a small size, a thin shape, and a low cost. Further, since the manufacturing process of the semiconductor device 1 is simplified, the productivity is increased and it is possible to cope with mass production. In particular, since the photoelectric conversion chip 3 is used as a package substrate, the semiconductor device 1 (semiconductor package 4) provided with the optical signal interface can be manufactured using the same package assembly process as the conventional one. Further, since the LSI chip 2 is flip-chip mounted on the photoelectric conversion chip 3, it can be transmitted to the LSI chip 2 while maintaining the waveform quality of the photoelectric conversion signal transmitted through the through via 12 as much as possible. A resin mold for protecting the bonding wire is also unnecessary.

本実施形態の半導体装置１は、画像処理ＬＳＩとの間で画像データを高速に伝送する必要がある機器、メモリまたは外部記憶機器との間でデータを高速に伝送する必要がある機器、携帯電話通信や近距離無線通信などの無線通信デバイスとの間で通信データを高速に伝送する必要がある機器、ＬＡＮまたは光ファイバを介して通信する有線通信デバイスとの間で通信データを高速に伝送する必要がある機器、光ＬＡＮなどの光通信網との間でデータを高速に伝送する必要がある機器などに好適である。これらの機器において、メイン実装基板上の半導体装置間の配線の他、実装基板間、筐体間の配線などにも広く適用することができる。   The semiconductor device 1 according to the present embodiment includes a device that needs to transmit image data to and from an image processing LSI at a high speed, a device that needs to transmit data to and from a memory or an external storage device, and a mobile phone. High-speed transmission of communication data between devices that require high-speed transmission of communication data to / from wireless communication devices such as communication and short-range wireless communication, and wired communication devices that communicate via a LAN or optical fiber It is suitable for a device that needs to be transmitted or a device that needs to transmit data at high speed with an optical communication network such as an optical LAN. In these devices, in addition to wiring between semiconductor devices on the main mounting substrate, the present invention can be widely applied to wiring between mounting substrates and between housings.

（第２の実施形態）
図３に示す半導体装置２１には、受光面を保護するため、光電変換チップ３の表面８に透明のガラス基板２２が貼り付けられている。この場合、電気的接続を取るため、半田ボール１５の取り付け位置のガラスをエッチングなどで取り除いてから半田ボール１５を設ける。このガラス基板２２には、光電変換チップ３の半導体基板の裏面研削（薄化工程）を行う際に割れや反りを抑止する目的で貼り付けられるガラス支持基板をそのまま流用してもよい。ガラス基板２２を保護層としたので、半導体装置２１の取り扱いが一層容易になり、信頼性も高められる。 (Second Embodiment)
In the semiconductor device 21 shown in FIG. 3, a transparent glass substrate 22 is attached to the surface 8 of the photoelectric conversion chip 3 in order to protect the light receiving surface. In this case, in order to make an electrical connection, the solder ball 15 is provided after the glass at the mounting position of the solder ball 15 is removed by etching or the like. As the glass substrate 22, a glass supporting substrate attached for the purpose of suppressing cracking and warping when the back surface grinding (thinning step) of the semiconductor substrate of the photoelectric conversion chip 3 may be used as it is. Since the glass substrate 22 is used as a protective layer, the semiconductor device 21 can be handled more easily and the reliability can be improved.

（第３の実施形態）
図４に示す半導体装置３１は、光電変換チップ３をパッケージ基板とし、光電変換チップ３の裏面１３に２つのＬＳＩチップ２ａ、２ｂと図示しない各種チップ部品を実装することにより半導体パッケージ３２を構成している。この場合、光電変換チップ３の裏面１３とＬＳＩチップ２ａ、２ｂの素子形成面５とが対向するように積み重ねられてフリップチップ接続されている。ＬＳＩチップ２ａ、２ｂには、それぞれ受光素子９ａ、９ｂを含む光電変換部１０ａ、１０ｂが形成されている。光電変換チップ３の裏面１３には、ＬＳＩチップ２ａ、２ｂの間の電気信号配線としてパターン３３が形成されている。 (Third embodiment)
A semiconductor device 31 shown in FIG. 4 includes a photoelectric conversion chip 3 as a package substrate, and a semiconductor package 32 is configured by mounting two LSI chips 2a and 2b and various chip components (not shown) on the back surface 13 of the photoelectric conversion chip 3. ing. In this case, the back surface 13 of the photoelectric conversion chip 3 and the element formation surfaces 5 of the LSI chips 2a and 2b are stacked so as to face each other and are flip-chip connected. On the LSI chips 2a and 2b, photoelectric conversion units 10a and 10b including light receiving elements 9a and 9b are formed. On the back surface 13 of the photoelectric conversion chip 3, a pattern 33 is formed as an electric signal wiring between the LSI chips 2a and 2b.

この半導体パッケージ３２を実装基板１６に半田実装して基板組立体３４を製造する。実装基板１６には、光電変換チップ３の窓部１１ａ、１１ｂに対向する位置に、それぞれ光ファイバ１８ａ、１８ｂの挿入孔１９ａ、１９ｂが形成されている。その他の構成は第１の実施形態と同様である。   The semiconductor package 32 is solder mounted on the mounting substrate 16 to manufacture the substrate assembly 34. In the mounting substrate 16, insertion holes 19 a and 19 b for optical fibers 18 a and 18 b are formed at positions facing the windows 11 a and 11 b of the photoelectric conversion chip 3, respectively. Other configurations are the same as those of the first embodiment.

本実施形態によれば、光電変換チップ３に対し２つのＬＳＩチップ２ａ、２ｂを一体化して１つの半導体チップとして取り扱うことができるので、より多機能なシステムを実現することができる。また、光電変換チップ３に光電変換部１０ａ、１０ｂを複数設けることにより、同時に複数の半導体装置、デバイス等との間で光通信インターフェースを構築することができ、より複雑な構成を持つシステムを実現できる。その他、第１の実施形態と同様の作用、効果が得られる。   According to the present embodiment, since the two LSI chips 2a and 2b can be integrated with the photoelectric conversion chip 3 and handled as one semiconductor chip, a more multifunctional system can be realized. In addition, by providing a plurality of photoelectric conversion units 10a and 10b in the photoelectric conversion chip 3, an optical communication interface can be established with a plurality of semiconductor devices and devices at the same time, and a system with a more complicated configuration can be realized. it can. In addition, operations and effects similar to those of the first embodiment can be obtained.

（第４の実施形態）
図５に示す半導体装置４１は、ＬＳＩチップ２、光電変換チップ３、４２、光学結合部４３およびパッケージ基板４４から構成されている。光電変換チップ４２（第１光電変換チップに相当）は、半導体基板の表面８に、発光素子４５を含む光電変換部４６および必要に応じて他の回路素子や配線層が形成されている。この表面８において発光素子４５の発光面に対応した位置には、窓部１１が形成されている。貫通ビア１２などの他の構成は、受光素子９を含む光電変換部１０を備えた光電変換チップ３（第２光電変換チップに相当）と同様である。 (Fourth embodiment)
A semiconductor device 41 shown in FIG. 5 includes an LSI chip 2, photoelectric conversion chips 3 and 42, an optical coupling unit 43, and a package substrate 44. In the photoelectric conversion chip 42 (corresponding to the first photoelectric conversion chip), a photoelectric conversion unit 46 including a light emitting element 45 and other circuit elements and wiring layers as necessary are formed on the surface 8 of the semiconductor substrate. A window portion 11 is formed on the surface 8 at a position corresponding to the light emitting surface of the light emitting element 45. Other configurations such as the through via 12 are the same as those of the photoelectric conversion chip 3 (corresponding to the second photoelectric conversion chip) including the photoelectric conversion unit 10 including the light receiving element 9.

光学結合部４３は、下面が光電変換チップ３、４２の表面８に当接するように取り付けられており、光ファイバ１８と光電変換チップ３、４２の窓部１１とを光学的に結合する。光学結合部４３は、光ファイバ１８をガイドおよび支持して光軸を規定軸に合わせ込むガイド部４７を備えている。内部には、入出射光に対し４５度の角度を持つ第１ミラー４８と第２ミラー４９が平行に設けられている。第１ミラー４８は、光電変換チップ４２の窓部１１から出射された光を透過させて光ファイバ１８に入射させるとともに、光ファイバ１８から出射された光を反射させる。第２ミラー４９は、第１ミラー４８で反射した光を反射させて光電変換チップ３の窓部１１に入射させる。   The optical coupling portion 43 is attached so that the lower surface thereof is in contact with the surface 8 of the photoelectric conversion chips 3 and 42, and optically couples the optical fiber 18 and the window portion 11 of the photoelectric conversion chips 3 and 42. The optical coupling portion 43 includes a guide portion 47 that guides and supports the optical fiber 18 and aligns the optical axis with a specified axis. Inside, a first mirror 48 and a second mirror 49 having an angle of 45 degrees with respect to the incoming and outgoing light are provided in parallel. The first mirror 48 transmits the light emitted from the window portion 11 of the photoelectric conversion chip 42 so as to enter the optical fiber 18 and reflects the light emitted from the optical fiber 18. The second mirror 49 reflects the light reflected by the first mirror 48 so as to enter the window 11 of the photoelectric conversion chip 3.

この半導体パッケージは、以下のように製造される。すなわち、ＬＳＩチップ２の素子形成面５に表面８が対向するようにして光電変換チップ３、４２をフリップチップ実装する。続いて、光電変換チップ３、４２を実装したＬＳＩチップ２をパッケージ基板４４にダイボンドし、ワイヤ５０を用いてワイヤボンディングを行う。その後、ワイヤ保護のため樹脂５１でモールドし、パッケージ基板４４に半田ボールを設ける。   This semiconductor package is manufactured as follows. That is, the photoelectric conversion chips 3 and 42 are flip-chip mounted so that the surface 8 faces the element forming surface 5 of the LSI chip 2. Subsequently, the LSI chip 2 on which the photoelectric conversion chips 3 and 42 are mounted is die-bonded to the package substrate 44, and wire bonding is performed using the wires 50. Thereafter, the resin 51 is molded for wire protection, and solder balls are provided on the package substrate 44.

次に、光学結合部４３を取り付ける前の半組立体を支持するためのソケット、光電変換部４６を介して発光素子４５を駆動する駆動回路、および光電変換部１０からの光電変換信号を入力するモニタ回路を備えた検査ボードを準備する。この検査ボードのソケットに上記半組立体をセットし、光電変換チップ３、４２の上面に光学結合部４３を仮置きする。発光素子４５を駆動した状態で、光学結合部４３を水平方向（Ｘ−Ｙ方向）に動かし、発光素子４５から第１ミラー４８と第２ミラー４９を介して受光素子９に届く漏れ光信号をモニタする。そして、光電変換信号（漏れ光信号）が最大になる位置で、ポッティング樹脂等を用いて光学結合部４３を固定する。この完成した半導体装置４１をソケットから取り出し、実装基板１６に半田実装する。最後に、光ファイバ１８をガイド部４７に取り付けて樹脂等で固定する。   Next, a socket for supporting the subassembly before attaching the optical coupling unit 43, a drive circuit for driving the light emitting element 45 through the photoelectric conversion unit 46, and a photoelectric conversion signal from the photoelectric conversion unit 10 are input. Prepare an inspection board with a monitor circuit. The semi-assembly is set in the socket of the inspection board, and the optical coupling portion 43 is temporarily placed on the upper surfaces of the photoelectric conversion chips 3 and 42. In a state where the light emitting element 45 is driven, the optical coupling portion 43 is moved in the horizontal direction (XY direction), and a leaked light signal reaching the light receiving element 9 from the light emitting element 45 via the first mirror 48 and the second mirror 49 is received. Monitor. And the optical coupling part 43 is fixed using a potting resin etc. in the position where a photoelectric conversion signal (leakage light signal) becomes the maximum. The completed semiconductor device 41 is taken out from the socket and solder mounted on the mounting substrate 16. Finally, the optical fiber 18 is attached to the guide portion 47 and fixed with resin or the like.

以上説明したように、本実施形態の半導体装置４１は、ＬＳＩチップ２に光電変換チップ３、４２をフリップチップ接続して一体化し、それを１つの半導体チップとしてパッケージ基板４４に実装することができる。従って、電気信号インターフェースと光信号インターフェースとを備えた半導体装置４１を小型、薄型、低コストに製造することができる。また、従来のチップ組み立て技術および基板実装技術を用いて製造することができ、生産性が上がり大量生産にも対応可能となる。さらに、貫通ビア１２を介して伝送された光電変換信号の波形品質を極力維持したままＬＳＩチップ２に伝送することができる。半導体装置４１は、ガイド部４７を有する光学結合部４３を備えているので、光ファイバ１８を容易に接続できるとともに光通信インターフェースの信頼性が高まり、取り扱いも容易になる。   As described above, the semiconductor device 41 of this embodiment can be integrated on the LSI chip 2 by flip-chip connection of the photoelectric conversion chips 3 and 42 and mounted on the package substrate 44 as one semiconductor chip. . Therefore, the semiconductor device 41 including the electric signal interface and the optical signal interface can be manufactured in a small size, a thin shape, and a low cost. Further, it can be manufactured by using conventional chip assembly technology and substrate mounting technology, so that productivity is increased and it is possible to cope with mass production. Furthermore, the photoelectric conversion signal transmitted through the through via 12 can be transmitted to the LSI chip 2 while maintaining the waveform quality as much as possible. Since the semiconductor device 41 includes the optical coupling portion 43 having the guide portion 47, the optical fiber 18 can be easily connected, the reliability of the optical communication interface is increased, and the handling is facilitated.

（その他の実施形態）
以上、本発明の好適な実施形態について説明したが、本発明は上述した実施形態に限定されるものではなく、発明の要旨を逸脱しない範囲内で種々の変形、拡張を行うことができる。 (Other embodiments)
As mentioned above, although preferred embodiment of this invention was described, this invention is not limited to embodiment mentioned above, A various deformation | transformation and expansion | extension can be performed within the range which does not deviate from the summary of invention.

回路チップは、プロセッサーＬＳＩとして形成されたＬＳＩチップ２に限らず、外部との間で高速に信号を授受する必要がある半導体チップであればよい。
各実施形態の光電変換チップは、発光素子を含む光電変換部と受光素子を含む光電変換部とをそれぞれ任意の数だけ組み合わせた構成（ただし、少なくとも１つの光電変換部を有する構成）を備えていてもよい。光電変換部１０、１０ａ、１０ｂ、４６は、光電変換信号を増幅する増幅回路を備えていてもよい。 The circuit chip is not limited to the LSI chip 2 formed as the processor LSI, but may be any semiconductor chip that needs to exchange signals with the outside at high speed.
The photoelectric conversion chip of each embodiment has a configuration in which an arbitrary number of photoelectric conversion units including a light emitting element and a photoelectric conversion unit including a light receiving element are combined (however, a configuration having at least one photoelectric conversion unit). May be. The photoelectric conversion units 10, 10a, 10b, and 46 may include an amplifier circuit that amplifies the photoelectric conversion signal.

第３、第４の実施形態に示す半導体装置３１、４１においても、受発光面を保護するため、光電変換チップ３、４２の表面８に第２の実施形態と同様の透明のガラス基板２２を貼り付けてもよい。
第１ないし第３の実施形態において、光電変換チップ３およびＬＳＩチップ２、２ａ、２ｂをそれぞれ個片に切り出した上で接続するチップｔｏチップの他、チップｔｏウエハ、ウエハｔｏウエハなどの接続形態を用いることができる。 Also in the semiconductor devices 31 and 41 shown in the third and fourth embodiments, a transparent glass substrate 22 similar to that of the second embodiment is provided on the surface 8 of the photoelectric conversion chips 3 and 42 in order to protect the light receiving and emitting surfaces. It may be pasted.
In the first to third embodiments, the photoelectric conversion chip 3 and the LSI chips 2, 2a, 2b are cut into individual pieces and then connected to each other, in addition to chip-to-wafer, wafer-to-wafer, etc. Can be used.

第１ないし第３の実施形態において、光電変換チップ３とＬＳＩチップ２、２ａ、２ｂは、光電変換チップ３の裏面１３とＬＳＩチップ２、２ａ、２ｂの素子形成面５の反対面とが対向するように積み重ねられていてもよい。この場合、ＬＳＩチップ２、２ａ、２ｂは、光電変換チップ３の貫通ビア１２の開口部またはその近傍に形成された電極との間でワイヤボンディングされ、貫通ビア１２の開口部を介して両チップ間で電気的接続がとられる。これにより、光電変換信号は、貫通ビア１２を通して波形品質を極力維持したまま実装基板１６に伝送される。   In the first to third embodiments, the photoelectric conversion chip 3 and the LSI chips 2, 2 a, 2 b are opposed to the back surface 13 of the photoelectric conversion chip 3 and the surface opposite to the element formation surface 5 of the LSI chips 2, 2 a, 2 b. It may be stacked to do. In this case, the LSI chips 2, 2 a, and 2 b are wire-bonded between the opening of the through via 12 of the photoelectric conversion chip 3 or an electrode formed in the vicinity thereof, and both chips are connected via the opening of the through via 12. Electrical connection is made between them. As a result, the photoelectric conversion signal is transmitted to the mounting substrate 16 through the through via 12 while maintaining the waveform quality as much as possible.

第１ないし第３の実施形態において、光電変換チップ３の光電変換部１０、１０ａ、１０ｂへの入出射光をガイドする光伝送路を実装基板１６内に形成し、窓部１１に対向する位置に光伝送路の入出射口（入出射光の光路）を設けてもよい。   In the first to third embodiments, an optical transmission path that guides light entering and exiting the photoelectric conversion units 10, 10 a, and 10 b of the photoelectric conversion chip 3 is formed in the mounting substrate 16, at a position facing the window portion 11. You may provide the entrance / exit port (optical path of incident / exit light) of an optical transmission path.

第４の実施形態において、光電変換チップ４２からの出射光をガイドする光ファイバと、光電変換チップ３への入射光をガイドする光ファイバとが別々に設けられており、これら光ファイバの光軸を定めて固定する他の手段が存在する場合には、光学結合部４３は不要である。   In the fourth embodiment, an optical fiber that guides light emitted from the photoelectric conversion chip 42 and an optical fiber that guides light incident on the photoelectric conversion chip 3 are provided separately, and the optical axes of these optical fibers are provided. If there is another means for determining and fixing the optical coupling portion 43, the optical coupling portion 43 is unnecessary.

第４の実施形態において、ＬＳＩチップ２をパッケージ基板４４にダイボンドしてワイヤボンディングを行った後、光電変換チップ３、４２をフリップチップ実装して半導体装置４１を製造してもよい。   In the fourth embodiment, the semiconductor device 41 may be manufactured by die bonding the LSI chip 2 to the package substrate 44 and performing wire bonding, and then flip-chip mounting the photoelectric conversion chips 3 and 42.

図面中、１、２１、３１、４１は半導体装置、２、２ａ、２ｂはＬＳＩチップ（回路チップ）、３、４２は光電変換チップ（第２、第１光電変換チップ）、４、３２は半導体パッケージ、９、９ａ、９ｂは受光素子、１０、１０ａ、１０ｂ、４６は光電変換部、１１、１１ａ、１１ｂは窓部、１２は貫通電極、１６は実装基板、１７、３４は基板組立体、１８、１８ａ、１８ｂは光ファイバ（光伝送路）、１９、１９ａ、１９ｂは挿入孔、２２はガラス基板、４３は光学結合部、４５は発光素子、４８、４９は第１、第２ミラーである。   In the drawings, 1, 21, 31, and 41 are semiconductor devices, 2, 2a, and 2b are LSI chips (circuit chips), 3, 42 are photoelectric conversion chips (second and first photoelectric conversion chips), and 4, 32 are semiconductors. Package, 9, 9a, 9b are light receiving elements, 10, 10a, 10b, 46 are photoelectric conversion parts, 11, 11a, 11b are window parts, 12 is a through electrode, 16 is a mounting board, 17, 34 is a board assembly, 18, 18a and 18b are optical fibers (optical transmission lines), 19, 19a and 19b are insertion holes, 22 is a glass substrate, 43 is an optical coupling portion, 45 is a light emitting element, and 48 and 49 are first and second mirrors. is there.

Claims (9)

回路を構成する素子が形成された回路チップと、
半導体基板に、発光素子および／または受光素子を含む光電変換部と、表面から裏面に貫通して光電変換信号の伝送経路となる貫通電極とが形成され、表面に設けられた窓部を通して光信号の受発光を行う光電変換チップとを備え、
前記光電変換チップと前記回路チップは、前記光電変換チップの裏面と前記回路チップの素子形成面またはその反対面とが対向するように積み重ねられ、前記光電変換チップの裏面における前記貫通電極の開口部を介して前記回路チップと前記光電変換チップとの間で電気的接続がとられていることを特徴とする半導体装置。 A circuit chip on which elements constituting the circuit are formed;
A photoelectric conversion unit including a light emitting element and / or a light receiving element and a through electrode that penetrates from the front surface to the back surface and serves as a transmission path of a photoelectric conversion signal are formed on a semiconductor substrate, and an optical signal is transmitted through a window portion provided on the front surface. A photoelectric conversion chip that receives and emits
The photoelectric conversion chip and the circuit chip are stacked such that the back surface of the photoelectric conversion chip and the element formation surface of the circuit chip or the opposite surface face each other, and the opening of the through electrode on the back surface of the photoelectric conversion chip A semiconductor device, wherein the circuit chip and the photoelectric conversion chip are electrically connected via each other. 前記光電変換チップをパッケージ基板とし、その光電変換チップの裏面に前記回路チップが搭載されて半導体パッケージが構成され、その半導体パッケージは、前記光電変換チップの表面が実装基板と対向するように実装されることを特徴とする請求項１記載の半導体装置。   The photoelectric conversion chip is a package substrate, and the circuit chip is mounted on the back surface of the photoelectric conversion chip to form a semiconductor package. The semiconductor package is mounted so that the surface of the photoelectric conversion chip faces the mounting substrate. The semiconductor device according to claim 1. 前記光電変換チップの裏面と前記回路チップの素子形成面とが対向し、両チップはフリップチップ接続されていることを特徴とする請求項１または２記載の半導体装置。   3. The semiconductor device according to claim 1, wherein a back surface of the photoelectric conversion chip and an element formation surface of the circuit chip face each other, and both chips are flip-chip connected. 前記光電変換チップの表面にガラス基板が貼り付けられていることを特徴とする請求項１ないし３の何れかに記載の半導体装置。   4. The semiconductor device according to claim 1, wherein a glass substrate is attached to a surface of the photoelectric conversion chip. パッケージ基板に前記回路チップが搭載されてワイヤボンディングされており、前記回路チップの素子形成面に裏面が対向するように前記光電変換チップが搭載されてフリップチップ接続されていることを特徴とする請求項１記載の半導体装置。   The circuit chip is mounted and wire-bonded on a package substrate, and the photoelectric conversion chip is mounted and flip-chip connected so that the back surface faces the element formation surface of the circuit chip. Item 14. A semiconductor device according to Item 1. 前記光電変換チップの光電変換部への入出射光をガイドする光伝送路と前記光電変換チップの窓部とを光学的に結合する光学結合部を備えたことを特徴とする請求項５記載の半導体装置。   6. The semiconductor according to claim 5, further comprising an optical coupling unit that optically couples an optical transmission path that guides light entering and exiting the photoelectric conversion unit of the photoelectric conversion chip and a window portion of the photoelectric conversion chip. apparatus. 前記光電変換チップとして、発光素子を含む光電変換部が形成された第１光電変換チップと、受光素子を含む光電変換部が形成された第２光電変換チップとを備え、
前記光学結合部は、
前記第１光電変換チップの窓部から出射された光を透過させて前記光伝送路に入射させるとともに前記光伝送路から出射された光を反射させる第１ミラーと、
前記第１ミラーで反射した光を反射させて前記第２光電変換チップの窓部に入射させる第２ミラーとを備えていることを特徴とする請求項６記載の半導体装置。 The photoelectric conversion chip includes a first photoelectric conversion chip in which a photoelectric conversion unit including a light emitting element is formed, and a second photoelectric conversion chip in which a photoelectric conversion unit including a light receiving element is formed,
The optical coupling unit is
A first mirror that transmits light emitted from the window portion of the first photoelectric conversion chip and enters the light transmission path and reflects light emitted from the light transmission path;
The semiconductor device according to claim 6, further comprising: a second mirror that reflects the light reflected by the first mirror and causes the light to enter the window portion of the second photoelectric conversion chip. 前記光電変換チップの表面にガラス基板が貼り付けられていることを特徴とする請求項５ないし７の何れかに記載の半導体装置。   The semiconductor device according to claim 5, wherein a glass substrate is attached to a surface of the photoelectric conversion chip. 前記光電変換チップの表面が基板に対向するように実装される請求項１ないし４の何れかに記載の半導体装置と、
前記光電変換チップの光電変換部への入出射光をガイドする光伝送路と、
実装された前記光電変換チップの窓部に対向する位置に前記光伝送路の挿入孔または前記入出射光の光路が設けられた実装基板とを備えていることを特徴とする基板組立体。 The semiconductor device according to any one of claims 1 to 4, wherein the surface of the photoelectric conversion chip is mounted so as to face the substrate;
An optical transmission path that guides the incoming and outgoing light to the photoelectric conversion part of the photoelectric conversion chip;
A board assembly comprising: a mounting board provided with an insertion hole of the optical transmission path or an optical path of the incident / exit light at a position facing a window portion of the mounted photoelectric conversion chip.
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Citations (4)

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JPH04302176A (en) * 1991-03-29 1992-10-26 Hitachi Ltd Semiconductor device
JPH10115732A (en) * 1996-10-08 1998-05-06 Matsushita Electric Ind Co Ltd Optical transmission and reception module
JP2004031455A (en) * 2002-06-21 2004-01-29 Fujitsu Ltd Optical interconnection equipment
JP2006222281A (en) * 2005-02-10 2006-08-24 Fuji Xerox Co Ltd Surface light-emitting device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04302176A (en) * 1991-03-29 1992-10-26 Hitachi Ltd Semiconductor device
JPH10115732A (en) * 1996-10-08 1998-05-06 Matsushita Electric Ind Co Ltd Optical transmission and reception module
JP2004031455A (en) * 2002-06-21 2004-01-29 Fujitsu Ltd Optical interconnection equipment
JP2006222281A (en) * 2005-02-10 2006-08-24 Fuji Xerox Co Ltd Surface light-emitting device

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