JP2013138342A - Information processor and information processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable setting of appropriate waiting time till transition to an energy saving state even if a packet cannot be stored in a temporary storage buffer.SOLUTION: A data control section 113 includes a table in which a pattern of a packet is made to correspond to an operation of CPU 122, and determines to start the CPU 122 on the basis of a packet received by PHY 111 being a physical layer interface and stored in a buffer 117 and of the table in a case of an energy saving state. When the CPU 122 is to be started, a power supply managing section 112 supplies power to the CPU 122 to start the CPU 122. When the packet is not received by the PHY 111 within a prescribed time after the CPU 122 is started, the power supply to the CPU 122 is stopped. When the CPU 122 is started, it determines whether the packet stored in the buffer 117 is perfect or not. When the packet is not perfect, the prescribed time is set in accordance with a type of the packet.

Description

  The present invention relates to an information processing apparatus and an information processing method in the information processing apparatus.

2. Description of the Related Art Conventionally, there is an information processing system in which an arbitrary number of terminal devices and information processing devices such as image processing devices (printers, digital multifunction peripherals, etc.) and server devices are connected via a network that is a communication line. In such an information processing system, one information processing device is generally set so that it can be shared by a plurality of terminal devices. Information processing devices shared by a plurality of terminal devices are connected via a network. Frequently sends signals.
For this reason, for example, if the information processing apparatus is in an energy saving state (also referred to as “energy saving mode” or “low power mode”) in which the operation of a CPU (Central Processing Unit) which is a main processing means is stopped, it is necessary to process Even when no signal (packet) is received, the CPU is activated and wasteful power consumption occurs.

Therefore, there is hardware having a function of temporarily storing received packets until the CPU is restored when a packet that needs to be processed is received in the energy saving state. This hardware constitutes a temporary storage buffer.
In such hardware, if the buffer size of the temporary storage buffer is reduced due to low cost, packets may not enter the temporary storage buffer. In such a case, a method of discarding as an error is known. ing.
A control method for shifting to an energy saving state when a packet to be processed has not been received for a certain period is also known.

On the other hand, Patent Document 1 discloses a configuration in which a determination unit for determining whether or not a packet can be processed is provided and the filter condition of the network control unit is updated.
Patent Document 2 discloses a configuration for controlling on / off of a filter function of a network control unit in conjunction with a power supply state of a controller unit.

However, if the conventional image processing apparatus described above has the function of shifting to the energy saving state described above, if the packet is discarded without entering the temporary storage buffer in the energy saving state, the CPU that has recovered after that The packet itself cannot be recognized.
After the return, if the packet in the temporary storage buffer is discarded, the CPU cannot determine an appropriate waiting time until the state shifts to the energy saving state corresponding to the packet, and cannot set the waiting time. For example, even if the discarded packet is highly important and may be retransmitted early from an external device such as a terminal device, if the previously set waiting time is short, the transition to the energy saving state is accelerated. Therefore, there is a problem that the retransmitted packet is received again in the energy saving state, and the packet cannot be normally processed indefinitely.
And the structure which eliminates this problem is not described in patent documents 1 and 2.

  The present invention has been made in view of the above points, and it is possible to set an appropriate waiting time until shifting to an energy saving state even when a packet does not enter the temporary storage buffer (cannot be stored). Objective.

In order to achieve the above object, the present invention comprises: a receiving unit that receives a packet from outside; a main processing unit that performs a main process of the device; and a power management unit that manages a power source. An information processing apparatus that stops its operation when the main processing means is in an energy saving state, and is characterized as follows.
That is, the first storage means for storing the packet received by the reception means, and a table in which the pattern of the packet is associated with the operation of the main processing means. Based on the packet stored in one storage means and the table, it is determined whether or not the main processing means is to be started up. When starting up, the power management means supplies power to the main processing means. Control means for starting the main processing means is provided.

  The control means supplies power to the main processing means by the power management means when a packet is not received by the receiving means within a predetermined time after the main processing means is activated. Means for stopping the operation. Further, when the main processing means is activated by the control means, it is determined whether or not the packet stored in the first storage means is complete. If the packet is not complete, the main processing means determines the packet according to the type of the packet. Means for setting the predetermined time inside is provided.

  According to this invention, even when a packet does not enter the first storage means (temporary storage buffer), it is possible to set an appropriate waiting time until shifting to the energy saving state.

1 is a block diagram illustrating a configuration example of a control system of an image forming apparatus which is an embodiment of an information processing apparatus according to the present invention. FIG. 2 is a block diagram illustrating a configuration example of main software in the image forming apparatus 100 illustrated in FIG. 1. It is a block diagram which shows the structural example of the communication control part 207 of FIG. It is a block diagram which shows the other structural example of the communication control part 207 of FIG. FIG. 5 is a block diagram illustrating a configuration example of a MAC driver unit 301 in FIGS. 3 and 4.

It is explanatory drawing which shows an example of the corresponding | compatible table which is the pattern set to the data control part 113 of FIG. It is explanatory drawing which shows the address pattern table which is the pattern similarly set to the data control part. It is explanatory drawing which shows an example of the data structure of a packet. 3 is a flowchart illustrating an operation example when the CPU 122 is returned from an energy saving state in the image forming apparatus 100 illustrated in FIG. 1.

6 is a flowchart illustrating an example of an operation performed by the MAC driver unit 301 after the image forming apparatus 100 returns to a normal state. 11 is a flowchart illustrating a first example of “buffer data check” in S12 in FIG. Similarly, it is a flowchart showing a second example of the “buffer data check”. 3 is a flowchart illustrating an example of processing when power is supplied by a communication control unit 207 in FIG. 2.

  Hereinafter, embodiments for carrying out the present invention will be specifically described with reference to the drawings. Note that the present invention can be applied to a network-compatible device that performs communication via a network such as a local area network (LAN). In the embodiment described below, an embodiment in which a network compatible device is used as an image forming apparatus will be described.

FIG. 1 is a block diagram showing a configuration example of a control system of an image forming apparatus which is an embodiment of an information processing apparatus according to the present invention.
The image forming apparatus 100 of this embodiment has an information (data) processing function, is connected to a network, and communicates with other network compatible devices on the network. In this image forming apparatus 100, each unit constituting itself is divided into a plurality of blocks, and power management is performed for each block.

The image forming apparatus 100 includes four blocks 110, 120, 130, and 140 here.
The block 110 includes a physical layer (PHY) interface (hereinafter abbreviated as “PHY”) 111, a power management unit 112, a data control unit 113, gates 114 and 115, a register 116, and a buffer 117. Control relating to power supply to 130 (also referred to as “power supply” or “power supply”) is performed.
The block 120 includes a memory 121, a CPU 122, and a media access control (MAC) unit (hereinafter abbreviated as “MAC”) 123.
Block 130 includes a plotter 131 and block 140 includes a scanner 141.

The PHY 111 is an inter-conversion means for data and electrical signals. The PHY 111 is connected to a network and is connected to a personal computer (PC) or other image forming apparatus on the network and packet data (hereinafter also simply referred to as “packet” or “data”). Send and receive. The PHY 111 has a function as receiving means in the present invention.
The power management unit 112 is power management means and performs power management of the blocks 120, 130, and 140. That is, power supply from the power supply unit (not shown) to the blocks 120, 130, and 140 is stopped and power supply is stopped. The power supply unit is a power supply unit or a storage battery connected to a commercial power supply, and supplies power to the image forming apparatus 100.

The data control unit 113 is a control unit, and includes an integrated circuit such as an ASIC (Application Specific Integrated Circuit).
The data control unit 113 determines whether to supply power to the blocks 120, 130, and 140 and controls data flow. In other words, packet pattern matching is performed, and when a specific condition is matched, power is supplied to the block 120 and returned. Further, the gates 114 and 115 are operated to control the data flow. Further, the size (data amount) of the packet that triggered the return of the block 120 is written in the register 116 as the second storage means. Note that the return corresponds to restarting the CPU 122. Details of the data control unit 113 will be described later.

The gates 114 and 115 are first and second switch means for blocking the data flow, and are controlled by the data control unit 113. In this embodiment, data flows when gates 114 and 115 are open, and data flow is blocked when gates 114 and 115 are closed.
The gate 114 is provided between the PHY 111 and the buffer 117 and controls connection or disconnection between the PHY 111 and the buffer 117.
The gate 115 is provided between the PHY 111 and the MAC 123, and controls connection or disconnection between the PHY 111 and the MAC 123. That is, connection or disconnection between the PHY 111 and the CPU 122 is controlled.

In this embodiment, when the power is supplied only to the block 110 (in the energy saving state), only the gate 114 is opened, and the received packet is stored in the buffer (buffer memory) 117 as the first storage means. It can be done. When power is also supplied to the blocks 120, 130, and 140 (in a normal state), only the gate 115 is open, and the received packet is read by the CPU 122 via the MAC 123.
The register 116 is a storage unit for storing the size of the packet that triggered the return of the block 120 and can be read and written from the CPU 122.

  The buffer 117 is a storage unit for storing a packet received by the PHY 111 (a packet that triggered the return of the block 120). The buffer 117 of this embodiment does not have a memory size (storage capacity) that can store the entire received packet, and may be a memory size that can store a part of the packet. The memory size that can store the entire packet is, for example, 1518 octets. The memory size that can store a part of the packet is, for example, 256 octets. In this embodiment, the memory size of the buffer 117 is 256 octets.

  In this embodiment, when the gate 114 is open, packets received via the PHY 111 are written to the buffer 117. Packets are stored in the buffer 117 in order from the beginning, and if the free space of the buffer 117 is exhausted before the entire packet is stored, the data of the portion of the packet not stored in the buffer 117 is discarded. . Further, when a packet is received when there is no free space in the buffer 117, the buffer 117 is overwritten with the packet.

The memory 121 is a storage unit including a nonvolatile memory such as a ROM, a RAM, and a flash memory, and an application program (hereinafter also referred to as “application” or “application”) for executing the functions of the image forming apparatus 100. Various programs and data (including data indicating setting contents such as time described later) are stored. The memory 121 provides a work area when the CPU 122 executes various control processes.
The CPU 122 controls the entire image forming apparatus 100 according to the program. This function is a function as main processing means.
The MAC 123 performs packet transmission / reception control and error detection by the PHY 111.

The plotter 131 is a printing unit (image forming unit), and performs printing (also referred to as “printing” or “image formation”) on a printing medium such as paper using image data as a visible image.
The scanner 141 is an image reading unit that optically reads an image of a paper document (or a document other than paper) and outputs it as image data.
In addition to the four blocks 110, 120, 130, and 140 described above, other blocks such as a functional unit block for performing facsimile communication and an automatic document feeder (ADF) block may be provided.

In the image forming apparatus 100 of this embodiment, the PHY 111 in the block 110, the data control unit 113, the gates 114 and 115, the register 116, the buffer 117, and the MAC 123 in the block 120 form a communication function unit 150.
The communication function unit 150 controls communication between the image forming apparatus 100 and other apparatuses connected to the image forming apparatus 100 via a network based on data transmitted to the image forming apparatus 100. Further, based on the transmitted data, it is determined whether or not the image forming apparatus 100 is to be returned from the energy saving state to the normal state. When it is determined that the image forming apparatus 100 is to be returned to the normal state, power is supplied to the block 120 and the CPU 122 is restarted to return to the normal state.

  Note that the energy saving state in this embodiment indicates a state in which no power is supplied to the blocks 120, 130, and 140 and only the block 110 is operating. Further, the normal state indicates a state where at least the block 110 and the block 120 are operating. Therefore, the CPU 122 stops operating in the energy saving state, and restarts based on the return instruction from the communication function unit 150.

  Next, the main software (function) configuration of the image forming apparatus 100 shown in FIG. 1 will be described. In addition, although the process by the program which comprises this software is actually performed when CPU122 operate | moves according to the program in the memory 121, suppose that a program performs a process for convenience of explanation. Thereafter, the same applies to the case where the program is described as performing some processing.

FIG. 2 is a block diagram illustrating a configuration example of main software in the image forming apparatus 100 illustrated in FIG.
The image forming apparatus 100 includes a printer function unit 201, a copy function unit 202, a scanner function unit 203, a memory management unit 204, an image processing unit 205, a printer language unit 206, a communication control unit 207, a plotter control unit 208, and scanner control. Each program of the unit 209 is provided.

The printer function unit 201 is a part of the printer application and performs control related to the printer function using the plotter 131 of FIG.
The copy function unit 202 is a copy application, and controls the copy function using the plotter 131 and the scanner 141 in FIG.
A scanner function unit 203 is a scanner application, and performs control related to a scanner (image reading) function using the scanner 141 of FIG.

The memory management unit 204 manages the memory 121 of FIG.
The image processing unit 205 performs various image processing processes necessary for each function including the printer function unit 201, the copy function unit 202, and the scanner function unit 203. This image processing includes data conversion into various types of compressed data including TIFF (Tagged Image File Format) and JPEG (Joint Photographic Experts Group).

The printer language unit 206 is a part of a printer application, analyzes print data (printer job data) of a packet received from the communication control unit 207, and forms an image (image data) for printing by the plotter 131 in FIG. Conversion).
The communication control unit 207 controls the communication function unit 150 including the MAC 123 of FIG. Details of the communication control unit 207 will be described later.
The plotter control unit 208 controls the plotter 131 in FIG.
A scanner control unit 209 controls the scanner 141 in FIG.

In this embodiment, after the CPU 122 is restarted and the block 120 is restored, the communication control unit 207 controls the communication function unit 150 to perform communication. Details of the communication control unit 207 will be described below.
FIG. 3 is a block diagram illustrating a configuration example of the communication control unit 207 of FIG.

The communication control unit 207 includes a MAC driver unit 301, a network stack unit 302, a network application unit 303, a timer 304, and a packet type determination unit 305.
The MAC driver unit 301 controls the MAC 123. Since this is well known, detailed description is omitted.
The network stack unit 302 controls an IP (Internet Protocol) layer and a transport layer. Since this is also well known, detailed description is omitted.

The network application unit 303 performs network control for each function including a printer function and a scanner function.
In the example shown in FIG. 3, the network application unit 303 includes a print data communication unit 303a and a network management communication unit 303b.
The print data communication unit 303a can use a port 9100 that receives print data from a terminal device such as a personal computer and passes the print data to the printer language unit 206 constituting the printer application. This port is a software or hardware interface for inputting / outputting data to / from the outside.

  Further, according to a procedure defined in RFC (Request For Comment) 1179, an LPD protocol (Line Printer Daemon Protocol) that receives print data from a terminal device and passes the print data to the printer language unit 206 can be used.

The RFC is a specification stipulated by IETF, which is an organization that establishes technical standards related to the Internet. For example, IP (RFC 791), TCP (Transmission Control Protocol) (RFC 793), HTTP (Hyper Text Transfer Protocol) (RFC 2616), There are protocols used on the Internet such as FTP (File Transfer Protocol) (RFC959), and various other technical specifications related to the Internet.
The LPD protocol is a type of protocol for connecting to a network printer.

The network management communication unit 303b manages communication for managing network compatible devices that are devices on the network.
This network management communication unit 303b can use SNMP (Simple Network Management Protocol) used for monitoring such as obtaining the status of a network-compatible device.
SNMP is a functional unit based on a protocol (communication protocol) defined for network management.

This SNMP is for monitoring or controlling communication devices including routers and hubs connected to the network through the network.
SNMP is often used in a TCP / IP connection network, but may be used over UDP instead of TCP.
The communication devices to be monitored and controlled are managed in a database called MIB (Management Information Base).
Then, according to the MIB regulations, it is possible to manage the device settings such as checking the modem usage status or resetting the settings.

The timer 304 measures (counts) time. The measurement value (count value) of the timer 304 is operated by the packet type determination unit 305.
The packet type determination unit 305 determines whether the packet received by the MAC 123 in FIG. 1 is the type of packet processed by the network management communication unit 303b or the type of packet processed by the network stack unit 302.
The packet type determination unit 305 also determines whether the packet received by the MAC 123 is a packet type that can be automatically responded in block 110.

In the communication control unit 207 configured as described above, after the response data of the data received when the block 120 is in the power supply state is generated and responded, the received data is data that can be responded in the block 110. When confirmed, the process of the procedure of sending an instruction to stop the power supply to the block 120 by the power management unit 112 can be executed.
In addition, when the block 120 is in a power supply state and the block 110 confirms that there is no reception of data that cannot be responded for a certain period of time, a process of sending an instruction to stop the power supply to the block 120 to the power management unit 112 Can also be executed.

Further, while it is confirmed that no data that cannot be responded has been received by the block 110 for a certain period of time, even if data that can be responded by the block 110 has been received, a process of a procedure for continuing measurement for a certain period is executed.
Furthermore, when it is confirmed that the data that cannot be responded by the block 110 has not been received for a certain period of time, and the data of the preset type that can be responded by the block 110 is received, the power management unit 112 receives the block 120. The procedure for sending an instruction to stop the power supply to is executed.

In the internal configuration example of the communication control unit 207 illustrated in FIG. 3, the case where the packet type determination unit 305 is provided independently of other internal function units is illustrated.
However, as shown in FIG. 4, the packet type determination unit 305 a may be provided inside the network management communication unit 303 b of the network application unit 303, and the packet type determination unit 305 b may be provided inside the network stack unit 302.

FIG. 4 is a block diagram showing another configuration example of the communication control unit 207 in FIG. 2, and the same or corresponding parts as those in FIG.
The network application unit 303 in FIG. 4 performs the same function as the network application unit 303 in FIG. 3 except that a packet type determination unit 305a is provided inside.
The network stack unit 302 in FIG. 4 also performs the same function as the network stack unit 302 in FIG. 3 except that a packet type determination unit 305b is provided inside.

In the case of the configuration example of FIG. 4, the packet type determination unit 305a determines whether the packet received by the MAC 123 of FIG. 1 is the type of packet to be processed by the network management communication unit 303b.
Further, the packet type determination unit 305b determines whether or not the packet received by the MAC 123 in FIG.

Next, details of the MAC driver unit 301 of FIGS. 3 and 4 will be described.
FIG. 5 is a block diagram illustrating a configuration example of the MAC driver unit 301.
The MAC driver unit 301 includes a reception buffer 401, a transmission buffer 402, a buffer check unit 403, and a MAC control unit 404.
The reception buffer 401 stores data received from the MAC 123.
The transmission buffer 402 stores data received from the network stack unit 302.

The buffer check unit 403 checks whether data is stored in the buffer 117.
The MAC control unit 404 controls the MAC 123. That is, the data received from the MAC 123 is stored in the reception buffer 401 and transferred to the network stack unit 302. In addition, the data stored in the transmission buffer 402 by the network stack unit 302 is passed to the MAC 123.

Next, the operation of the block 110 when the image forming apparatus 100 is in the energy saving state will be described.
In the image forming apparatus 100 of this embodiment, when a packet is received in the energy saving state, the data control unit 113 determines whether to restore the block 120 based on the received packet.

Here, the data control unit 113 in FIG. 1 will be described.
In the data control unit 113, a packet pattern for returning the block 120 is set in advance, and it is determined whether or not the received packet matches the set pattern. If it is determined that the received packet matches the set pattern, the gates 114 and 115 are controlled to return the block 120.

Here, the pattern set in the data control unit 113 will be described.
FIG. 6 is an explanatory diagram illustrating an example of a correspondence table that is a pattern set in the data control unit 113.
In the correspondence table 50, destination MAC addresses, matching patterns, and operations at the time of pattern matching are associated.

FIG. 7 is an explanatory diagram showing an address pattern table which is a pattern set in the data control unit 113.
In this address pattern table 60, patterns of destination MAC addresses are shown.

In the data control unit 113, the destination MAC address of the received packet is (1), (2), (3), (4) of the address pattern table 60, and the ether type of the received packet is “0x0000-0x05DC”. If there is, it is determined that the CPU 122 is restarted and the block 120 is returned.
If the destination MAC address of the received packet is (1), (2), (3) of the address pattern table 60, the received packet is “IPv4” and the port is “161”, the CPU 122 is activated. Without saving, keep the energy saving state (sleep).

In this embodiment, the size of data used for such a matching determination may be the minimum necessary.
FIG. 8 is an explanatory diagram illustrating an example of a data structure of a packet.
The packet includes a destination MAC address, a source MAC address, a type, payload data, and FCS (Frame Check Sequence).

The destination MAC address is an address indicating a destination to which payload data is delivered.
The transmission source MAC address is the MAC address of the device itself to which the packet is transmitted, and is usually assigned a unique number burned into the ROM of the device.
The type is a protocol type indicating an upper layer protocol stored in the data field.

As the payload data, application data is stored in the range of 46 to 1500 octets.
FCS is a bit string for checking whether payload data is not broken.
Therefore, when the data control unit 113 determines from the correspondence table 50 and the address pattern table 60 that the CPU 122 is to be restarted by the received packet, the data control unit 113 controls the power management unit 112 and the gates 114 and 115 to restore the block 120. be able to.

Next, restart of the CPU 122 in the image forming apparatus 100 shown in FIG. 1 will be described.
FIG. 9 is a flowchart illustrating an operation example when the CPU 122 is returned from the energy saving state. In each flowchart including this figure, the step is abbreviated as “S”.

In the image forming apparatus 100, the processing of FIG. 9 is started in the energy saving state. First, when the PHY 111 receives a packet in S1, the data control unit 113 performs pattern matching of the received packet using the correspondence table 50 and the address pattern table 60 in S2.
If the received packet does not match any of the packet patterns set in the correspondence table 50, the data control unit 113 ends the process. At this time, the gate 114 is open and the gate 115 is closed.

When the received packet matches any of the packet patterns set in the correspondence table 50 (when the pattern matches), the process proceeds to S3, and the data control unit 113 performs the operation when the pattern matches in the correspondence table 50. refer.
If the operation at the time of pattern matching is sleep, the data control unit 113 ends the process while maintaining the energy saving state without restarting the CPU 122. When the received packet matches a plurality of patterns among the packet patterns set in the correspondence table 50, sleep is enabled as an operation at the time of pattern matching.

On the other hand, if the operation at the time of pattern matching is return, the process proceeds to S4, where the data control unit 113 stores the received packet in the buffer 117 and writes the size of the received packet in the register 116.
Subsequently, in S5, the data control unit 113 performs a gate operation for closing the gate 114 and opening the gate 115.
At this time, the size of the packet written in the buffer 117 does not necessarily match the size of the packet written in the register 116.

  The buffer 117 in this embodiment is 256 octets. Therefore, when the size of the received packet is 1518 octets, only the first 256 octets of the 1518 octets are stored in the buffer 117, and only a part of the packets are stored in the buffer 117. On the other hand, a value of 1518 octets is written in the register 116 as the size of the received packet. Therefore, the size of the packet written in the register 116 is different from the size of the packet stored in the buffer 116. When the size of the received packet is 256 octets, which is the same as the memory size of the buffer 117, all the received packets are stored in the buffer 117 so that they match the size of the packet written to the register 116. become.

In step S6, the data control unit 113 supplies power to the block 120 using the power management unit 112 (ON) (S6). At this time, power may also be supplied to the blocks 130 and 140.
Next, it progresses to S7 and the data control part 113 returns CPU122, and complete | finishes a process. When the CPU 122 returns and restarts, the image forming apparatus 100 enters a normal state.

Next, an operation after the image forming apparatus 100 shown in FIG. 1 returns to the normal state will be described.
FIG. 10 is a flowchart illustrating an operation example of the MAC driver unit 301 after the image forming apparatus 100 returns to the normal state.

In this embodiment, when the CPU 122 is restarted and the image forming apparatus 100 is in a normal state, the MAC driver unit 301 starts the processing of FIG. 10. First, in S 11, it is determined whether or not the value of the register 116 is “0”. judge.
If the value of the register 116 is 0, the process proceeds to S15 and the MAC 123 is initialized.

  In this embodiment, when the value of the register 116 is “0”, the image forming apparatus 100 has not received a packet when returning to the normal state, and returns to the normal state for reasons other than the reception of the packet. You can see that The reason other than the reception of the packet for returning the image forming apparatus 100 to the normal state is, for example, an operation by the user.

On the other hand, if the value of the register 116 is not “0”, the MAC driver unit 301 proceeds to S12 and performs buffer data check to determine whether or not the packet stored in the buffer 117 is broken (check). ) Details of the determination process in S12 will be described later.
If the packet is broken, the process immediately proceeds to S14 as an error, “0” is written in the register 116, and the process proceeds to S15.

If the packet is not broken, the process proceeds to S13, where the packet stored in the buffer 117 is read out and stored in the reception buffer 401 in FIG. At this time, although not shown in the figure, the storage of the packet is notified to the network stack unit 302 of FIG.
Thereafter, the process proceeds to S14, "0" is written in the register 116, the MAC 123 is initialized in S15, and the process ends.

Next, the details of the “buffer data check” in S12 in FIG. 10 will be described.
FIG. 11 is a flowchart showing a first example of the “buffer data check”.
The MAC driver unit 301 first compares the value indicating the size of the packet written in the register 116 in S21 with the value indicating the memory size of the buffer 117.

When the packet size of the register 116 is equal to or smaller than the memory size of the buffer 117, it can be seen that the entire received packet is stored (saved) in the buffer 117.
In that case, the process proceeds to S22, and the FCS of the packet stored in the buffer 117 is checked to determine whether there is an error.
If there is no error (packet is complete), the process proceeds to S23 to perform the corresponding process (herein referred to as “no error process”), returns to the process of FIG. 10, and proceeds to S13. As an error-free process, there is a process of setting a corresponding flag (for example, an error flag) to “0”.

If there is an error (packet is not complete), the process proceeds to S24, and the corresponding process (herein referred to as "error process") is performed. Then, the process returns to the process of FIG. 10, and the process proceeds to S14. The error processing includes processing for setting a corresponding flag (for example, an error flag) to “1” and notifying the network stack unit 302 that the received packet is an error.
On the other hand, if the size of the packet in the register 116 is larger than the memory size of the buffer 117 in S21, it is found that not all the packets are stored in the buffer 117, so the process proceeds to S24 and error processing is performed.

  In this embodiment, when the packet is stored in the reception buffer 401 in FIG. 5 in S13 of FIG. 10, if the data stored in the buffer 117 is a part of a packet having a specific structure, the buffer 117 is stored. The entire packet may be restored based on a part of the packet and stored in the reception buffer 401.

Next, another example of “buffer data check” in S12 in FIG. 10 (processing when restoring a packet) will be described.
FIG. 12 is a flowchart showing a second example of the “buffer data check”.
The MAC driver unit 301 first compares the value indicating the size of the packet written in the register 116 in S31 with the value indicating the memory size of the buffer 117.

When the packet size of the register 116 is equal to or smaller than the memory size of the buffer 117, the FCS of the packet stored in the buffer 117 is checked to determine whether there is an error.
Here, the processes of S34, S33, and S35 are the same as the processes of S22 to S24 in FIG.

In S31, when the packet of the register 116 is larger than the memory size of the buffer 117, the process proceeds to S32 to determine whether or not the packet stored in the buffer 117 is a fixed packet that is a specific packet.
If the packet is a fixed packet, the process proceeds to S33 and the error-free process similar to S23 in FIG. 11 is performed.
If the packet is not a fixed packet, the process proceeds to S35 and error processing similar to S24 in FIG. 11 is performed.

  Note that the standard packet is a packet having a specific data structure that is periodically transmitted from, for example, an OS (Operating System) or the like, and indicates a packet from which a subsequent packet can be estimated from the head packet. In this embodiment, for example, this fixed packet is stored in advance in the memory 121 or the like, and the CPU 122 (MAC driver unit 301) compares the packet stored in the buffer 117 with the fixed packet stored in advance, and the buffer 117 It may be determined whether or not the inside packet is a fixed packet.

  When the buffer 117 is a fixed packet, when the packet is stored in the reception buffer 401 in S13 of FIG. 10, the CPU 122 restores the entire packet by estimating the subsequent packet from the head portion of the packet in the buffer 117. Remember. As an estimation method, for example, in S32, when a part of the packet in the buffer 117 is the same as a part of the standard packet, the missing part of the packet in the buffer 117 is the remaining part of the standard packet. There is something to guess that is the same.

Next, processing at the time of power supply (including the return from the energy saving state) by the communication control unit 207 of FIG. 2 will be described.
FIG. 13 is a flowchart showing an example of processing at the time of power supply by the communication control unit 207 of FIG.

The communication control unit 207 starts the process of FIG. 13 when the block 120 returns to the normal state. First, in step S41, the timer 304 of FIG. 3 or 4 is started to start time measurement.
Next, the process proceeds to S42, where it is determined whether or not the MAC driver unit 301 in FIG. 3 or 4 has received the packet. If it is received, the process proceeds to S47, the time measurement by the timer 304 is stopped and the count value of the timer 304 is counted. Reset (initialize) (measured value) to “0”.

  When the MAC driver unit 301 has not received a packet, it is determined whether or not the count value of the timer 304 has reached “10000 (ms: millisecond)” (S43). That is, it is determined whether or not the measurement time by the timer 304 has reached 10 seconds. Note that the count value = “10000” of the timer 304 corresponds to a predetermined time (predetermined time) set in advance.

If the count value of the timer 304 has not reached “10000”, “1” is added to the count value of the timer 304 (S44), and time measurement by the timer 304 is continued, and then the process returns to S42. The same processing as described above is repeated.
Thereafter, when the count value of the timer 304 reaches “10000”, it is confirmed that the packet that needs to be processed in the block 120 in FIG. 1 has not been received for a predetermined time, and the process proceeds to S45.

  Here, the predetermined time is estimated from the received packet type (Ether type, TCP / UDP, port number, etc.) until the next packet is received, and the optimum time according to the predicted time. And data indicating the time can be stored in the memory 121 (actually a non-volatile memory) in FIG. An arbitrary time can also be set according to a user request (a request from a terminal device or an operation unit (not shown) of the image forming apparatus 100 by a user operation).

In S45, the time measurement by the timer 304 is stopped and the count value of the timer 304 is reset to “0”.
In the next S46, an instruction to stop the power supply to the block 120 of FIG. 1 is transmitted to the power management unit 112 of the block 110, the power supply is stopped, and the process is terminated.

  Note that the determination process of “buffer data check” in S12 of FIG. 10 is deleted, and the MAC driver unit 301 stores not only the packet in the reception buffer 401 but also the value of the register 116 in the memory 121 in S13. Processing can also be performed, and the stored value can be passed to the network stack unit 302.

  In this case, when the passed packet is a packet stored in the buffer 117, the network stack unit 302 performs a determination process similar to S12 in FIG. 10 (FIG. 11 or FIG. 12), and determines whether the packet is an error. It is advisable to check whether or not to process. And even if the packet is in error, predict the time until the next packet is received from the received packet type (Ether type, TCP / UDP, port number, etc.) from the top of the stored packet Can do. Therefore, as the predetermined time to be compared with the count value of the timer 304, an optimum time according to the predicted time can be set.

  As described above, according to the image forming apparatus of this embodiment, the data control unit 113 in FIG. 1 has a table in which the packet pattern and the operation of the CPU 122 are associated with each other, and is received by the PHY 111 in the energy saving state. Whether or not to activate the CPU 122 is determined based on the packet and table stored in the buffer 117. When the CPU 122 is activated, the power management unit 112 supplies power to the CPU 122 to activate the CPU 122. If no packet is received by the PHY 111 within a predetermined time, the power supply management unit 112 stops the power supply to the CPU 122. When activated, the CPU 122 determines whether or not the packet stored in the buffer 117 is complete. If the packet is not complete, the CPU 122 sets the predetermined time according to the type of the packet.

Therefore, even when the packet does not enter the buffer 117 (temporary storage buffer), it is possible to set an appropriate waiting time until shifting to the energy saving state.
In addition, the network function can be maintained while reducing the memory size of the buffer 117 for storing packets received in the energy saving state.
Furthermore, since the memory size of the buffer 117 can be reduced, the number of gates constituting the buffer 117 can be reduced. For this reason, the gates constituting the block 110 operating in the energy saving state can be reduced, and the power consumption in the energy saving state can be reduced.

In this embodiment, the CPU 122 is provided only in the block 120, but the present invention is not limited to this. For example, a CPU for plotter control may be separately provided in the block 130, or a CPU for scanner control may be separately provided in the block 140.
The data control unit 113 can also be configured by a dedicated CPU and program. In this case, the function of the data control unit 113 may be realized by a dedicated CPU executing the program.

As described above, the embodiment in which the present invention is applied to the image forming apparatus has been described. However, the present invention is not limited to this, and various types of information processing such as other image processing apparatuses such as an image reading apparatus (scanner apparatus or the like), personal computers, and the like. Applicable to the device.
In addition, this invention is not limited to embodiment mentioned above, It cannot be overemphasized that all the technical matters contained in the technical idea described in the claim are object.

50: Correspondence table 60: Address pattern table 100: Image forming apparatuses 110, 120, 130, 140: Block 111: PHY 112: Power management unit 113: Data control unit 114, 115: Gate 116: Register 117: Buffer 121: Memory 122: CPU 123: MAC
131: Plotter 141: Scanner 150: Communication function unit 201: Printer function unit 202: Copy function unit 203: Scanner function unit 204: Memory management unit 205: Image processing unit 206: Printer language unit 207: Communication control unit 208: Plotter control Unit 209: Scanner control unit 301: MAC driver unit 302: Network stack unit 303: Network application unit 303a: Print data communication unit 303b: Network management communication unit 304: Timers 305, 305a, 305b: Packet type determination unit 401: Reception buffer 402: Transmission buffer 403: Buffer check unit 404: MAC control unit

JP 2009-49699 A JP 2005-269103 A

Claims (6)

Information processing that includes a receiving unit that receives a packet from the outside, a main processing unit that performs main processing of the apparatus, and a power management unit that manages power, and stops operation when the main processing unit is in an energy saving state A device,
First storage means for storing packets received by the receiving means;
A table in which packet patterns and operations of the main processing means are associated with each other, and in the energy saving state, the main processing means is based on the packets stored in the first storage means and the table; Determining whether or not to start, and in the case of starting, provided with a control means for supplying power to the main processing means by the power management means to start the main processing means,
The control means stops the power supply to the main processing means by the power management means when a packet is not received by the receiving means within a preset time after the main processing means is activated. Having means to
When activated by the control means, the main processing means determines whether or not the packet stored in the first storage means is complete, and if not, the main processing means determines the predetermined time according to the type of the packet. An information processing apparatus having means for setting the inside of the information processing apparatus. The information processing apparatus according to claim 1,
Providing a second storage means in which the size of the packet is written;
The control means includes means for writing, in the second storage means, the size of the packet that is the basis of the determination when it is determined to activate the main processing means,
When activated by the power management means, the main processing means compares the memory size of the first storage means with the size of the packet written to the second storage means, and the first storage means And determining that the packet stored in the first storage means is not complete when the memory size of the means is smaller than the size of the packet written in the second storage means. .   When the main processing unit determines that the packet stored in the first storage unit is not complete, a partial pattern of the packet stored in the first storage unit is a specific pattern The whole packet received from a part of the packet stored in the first storage means is restored when the pattern is a specific pattern. Information processing device.   When the memory size of the first storage unit is equal to or larger than the size of the packet written in the second storage unit, the main processing unit stores the packet stored in the first storage unit. The information processing apparatus according to claim 2, wherein the information processing apparatus determines that the packet is complete and reads the received packet from the first storage unit. The information processing apparatus according to any one of claims 1 to 4,
First switch means for controlling connection or disconnection between the receiving means and the first storage means;
Providing a second switch means for controlling connection or disconnection between the receiving means and the main processing means;
The control means includes
In the case of the energy saving state, the receiving means and the first storage means are connected by the first switch means, and the receiving means and the main processing means are disconnected by the second switch means,
When it is determined that the main processing means is to be activated, the receiving means and the first storage means are shut off by the first switch means, and the receiving means and the main processing means are shut off by the second switch means. And an information processing apparatus. Receiving means for receiving a packet from the outside; main processing means for performing main processing of the apparatus; power management means for managing power; first storage means for storing packets received by the receiving means; An information processing apparatus comprising: the receiving unit, the main processing unit, the power management unit, and a control unit that performs various controls on the first storage unit, and stops operation when the main processing unit is in an energy saving state An information processing method in
The control means refers to a table associating the packet pattern with the operation of the main processing means, and based on the packet and the table stored in the first storage means in the energy saving state. To determine whether or not to activate the main processing means, and when starting, the power management means supplies power to the main processing means to activate the main processing means, and the main processing means When a packet has not been received by the receiving means within a predetermined time set after the activation, the power management means stops the power supply to the main processing means,
When the main processing means is activated by the control means, it determines whether or not the packet stored in the first storage means is complete, and if it is not complete, the predetermined time is determined according to the type of the packet. An information processing method characterized by setting the inside.

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