JP2013121234A - Power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power conversion device that can suppress resonance of a DC link section irrespective of the magnitude of a motor load.SOLUTION: The power conversion device comprises: a high pass filter 13 for extracting an AC component VdcAC of a voltage of the DC link section; phase leading means 14 for leading VdcAC over ninety degrees to output a leading AC component VdcAC90; a weighting section 15 for outputting a value resulting from the addition of a value that is VdcAC multiplied by a gain p and a value that is VdcAC90 multiplied by a gain (1-p); and a gain section 19 for multiplying an output of the weighting section 15 by a predetermined gain to output a correction signal Vcmp. A control unit controls an inverter on the basis of a signal resulting from the addition of the correction signal Vcmp to a voltage command V*.

Description

  The present invention relates to a power conversion device in which a converter and an inverter are integrated with each other through a DC link unit, which is used for driving an AC motor or the like.

  The main circuit of the power conversion device that drives the AC motor is composed of a converter that rectifies AC power from the system power supply and an inverter that reconverts the AC power into AC power suitable for the AC motor, and a DC link that is a DC link unit therebetween. Is connected to a smoothing capacitor. When a power converter is connected to the system power supply, an LC resonance circuit is formed by the reactor of the system power supply and the smoothing capacitor. In a three-phase diode converter, it is known that a pulsation of 6 times the power frequency occurs on the DC output side with the rectification operation. For this reason, when the resonance frequency matches 6 times the system power supply frequency, the DC link voltage inside the main circuit vibrates greatly. As a result, the main circuit components may be damaged or the AC motor control may become unstable.

In particular, when a smoothing capacitor having a small capacity is used, the resonance frequency with the reactor becomes high, and this problem often occurs. In order to solve the above problem, a technique for suppressing resonance is introduced.
For example, in Patent Document 1, instead of extracting the pulsating component of the DC link voltage and obtaining the differential amount of the vibration, the amount of change per predetermined time is generated by a method using pseudo-differential that generates a phase advance amount. Thus, a method of suppressing the pulsation of the DC link voltage by correcting the frequency of the inverter output voltage using the signal is adopted. The phase lead process for generating the differential signal of the DC link voltage is designed so that a specific phase lead amount is generated for a frequency component that is six times the power supply frequency.

JP 2007-181358 (FIG. 10, claim 2 on page 2, paragraph 0034, etc.)

  In the apparatus of Patent Document 1, the frequency command is corrected using a pseudo differential component. Pseudo-differentiation corresponds to constant phase advance compensation. However, in an actual motor, the magnitude of the lead phase angle effective for resonance suppression differs depending on the magnitude of the load. Therefore, in patent document 1, if the magnitude | size of a motor load changes, the resonance suppression performance will fall. For this reason, in order to maintain the resonance suppression performance, there has been a problem that the amount of compensation becomes large and the inverter output voltage may be saturated.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a power converter that can suppress the resonance of the DC link section regardless of the magnitude of the motor load.

The power converter according to the present invention is connected between an AC power source and a DC link unit, converts the AC power of the AC power source into DC power and outputs the DC power to the DC link unit, and between the DC link unit and the AC load. An inverter that converts the DC power of the DC link unit into AC power and outputs it to an AC load, a capacitor connected to the DC link unit, and a control unit that controls the inverter based on a voltage command. There,
Voltage detection unit for detecting the voltage of the DC link unit, filter unit for extracting the AC component of the voltage detected by the voltage detection unit, and phase advance for outputting a phase advance AC component obtained by advancing the AC component extracted by the filter unit by 90 degrees Means, the AC component multiplied by a gain p (p is a variable that increases in accordance with an increase in the output of the inverter and fluctuates in the range of 0 ≦ p ≦ 1), and the gain (1-p ), And a gain unit for outputting a correction signal obtained by multiplying the output of the weighting unit by a predetermined gain.
The control unit controls the inverter based on a signal obtained by adding a correction signal to the voltage command.

  As described above, the power conversion device according to the present invention includes the weighting unit based on the variable p, and generates the correction signal whose phase is adjusted according to the output of the inverter. Therefore, a high resonance suppression effect can be exhibited. Therefore, the resonance suppression effect can be obtained with a small amount of compensation, and saturation of the inverter output voltage can be prevented.

It is a block diagram which shows the structure of the power converter device made into object by each embodiment of this invention. It is a block diagram which shows the structure in the control unit 7 in Embodiment 1-4 of this invention. It is the circuit diagram which showed an example of the electric current path | route which LC resonance generate | occur | produces. It is a model figure which paid its attention to the pulsation frequency component of DC link voltage of a power converter device. It is the frequency characteristic figure which showed the transfer characteristic of (DELTA) vq to (DELTA) iq of an induction motor. It is a block diagram which shows the structure in the variable p calculation part 26 in Embodiment 1 of this invention. FIG. 5 is a model diagram in which the current source 24 in the model of FIG. 4 is replaced with an R circuit. FIG. 5 is a model diagram when the current flowing through the current source 24 in the model of FIG. It is a characteristic view which showed the difference in the presence or absence of resonance suppression implementation in Embodiment 1 of this invention. It is a block diagram which shows the structure in the variable p calculation part 26 in Embodiment 2 of this invention. It is a block diagram which shows the structure in the variable p calculation part 26 in Embodiment 3 of this invention. It is a block diagram which shows the structure in the variable p calculation part 26 in Embodiment 4 of this invention. It is a block diagram which shows the structure in the control unit 7 in Embodiment 5 of this invention. It is a block diagram which shows the structure in the variable p calculation part 26 in Embodiment 5 of this invention.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of a power conversion device according to Embodiment 1 of the present invention. A converter 2 that converts the AC power of the three-phase AC power source 1 into DC power and outputs the DC power to the DC link unit 5, and outputs AC power using the DC power of the DC link unit 5 as input to the load motor 3 as an AC load. And an inverter 4 for supplying AC power, and a capacitor 6 is connected to a DC link unit 5 that is connected between the converter and the inverter and exchanges DC power. The control unit 7 as the control unit controls the inverter 4 based on the voltage command as will be described later.
Then, the voltage detection unit 8 collects the DC link voltage Vdc, and the control unit 7 generates gate signals Gu +, Gu−, Gv +, Gv−, Gw +, and Gw−.

FIG. 2 is a control block diagram showing the internal configuration of the control unit 7 in FIG. Here, resonance suppression control is added to the V / f control system that keeps the ratio between the motor voltage and the frequency constant.
The input of the control unit 7 is a DC link voltage Vdc and a frequency command ω * which is a speed command, and outputs are gate signals Gu +, Gu−, Gv +, Gv−, Gw +, Gw−.
In the V / f table 9 as the voltage command generation unit, the frequency command ω * is input and the voltage command amplitude V * is output via the table 9. Further, the frequency command ω * is integrated by the integrator 10 to output the voltage command phase θ *.
The gate signal generation unit 11 generates an output voltage command using the DC link voltage Vdc, the voltage command amplitude V * (V ′ *), and the phase θ *, and performs PWM processing to Gu +, Gu−, Gv +, Gv−, Gw + and Gw− are generated. In the gate signal generation unit 11, the DC link voltage Vdc is used for pulse width correction for gate signal generation.

Next, the resonance suppression control block 12 will be described. The resonance suppression control block 12 receives the DC link voltage Vdc and outputs a resonance suppression correction signal Vcmp. The correction signal Vcmp is added to the voltage command V * by V / f control (V * + Vcmp = V ′ *), and a compensation operation is performed.
The correction signal Vcmp is calculated by the following procedure. First, the pulsation component (alternating current component) VdcAC of the DC link voltage Vdc is extracted using the high-pass filter 13 as a filter unit. The phase advance means 14 is used to advance the pulsation component VdcAC by 90 degrees from the original signal, and the phase advance pulsation component VdcAC90 is output.
As a specific method of the phase advance means 14, there are a method of differentiating VdcAC to advance 90 degrees, and a method of making VdcAC delayed by 3/4 period to make it correspond to 90 degrees advance.

Next, the weighting unit 15 will be described. A gain 16 and a gain 17 are provided for weighting the pulsation component VdcAC and the phase advance pulsation component VdcAC90. The outputs of the gains 16 and 17 are added by the adder 18.
Note that the variable p set by the gain 16 and the gain 17 is calculated by a variable p calculator 26 described later.
A correction signal Vcmp is generated by multiplying the output of the adder 18 by the gain K of the gain unit 19. The adder 20 is used to correct the voltage command amplitude V * to V ′ * and output it.

Next, the principle that the pulsation of the DC link voltage Vdc is reduced by the action of the resonance suppression control block 12 of FIG. FIG. 3 is a circuit diagram of the power converter. It is composed of a three-phase AC power source 1, an AC reactor 21, a converter 2, a capacitor 6, an inverter 4, and a load motor 3.
FIG. 4 is a model focusing on the pulsation frequency component of the DC link voltage Vdc of the power conversion device of FIG. An AC power source 22, an AC reactor 23, a capacitor 6, and a current source 24 are included.
The AC power supply 22 is an AC power supply that simulates the pulsation of the DC link voltage Vdc generated by the converter 2. Since the three-phase AC power source 1 has three phases, the frequency f is six times the power frequency here.

In the model of FIG. 4, pulsation (ripple) components are handled, and therefore, the voltage of the AC power supply 22 is expressed as vsr, the voltage of the capacitor 6 is expressed as vdcr, and Vs and Vdc of the actual circuit.
FIG. 3 also shows an example of a voltage or current path where LC resonance occurs. In the path shown in FIG. 3, since the current passes through the AC reactor 21 twice, the size of the AC reactor 23 shown in FIG. 4 is twice the inductance value of the AC reactor 21.

  When the resonance frequency of the AC reactor 23 and the capacitor 6 takes a value that matches the frequency f of the AC power supply 22, that is, a frequency that is six times the frequency of the three-phase AC power supply 1, resonance of the system power supply occurs. At this time, the inductance L of the AC reactor 23 takes the value of equation (1).

Here, the current source 24 is a model simulating the inverter 4 and the load motor 3. By controlling the inverter 4, an arbitrary current can flow, so that the current source is used. In addition, the current source 24 simulates a current that flows under control according to the pulsation of the DC link voltage.
By the way, in order to clarify the operation of the resonance suppression control in the present invention, it is necessary to examine the current source 24 when the correction signal Vcmp related to the pulsation component is applied, that is, the behavior of the current. In that case, since the analysis is not always simple in the form of the current source, first, as a stage before the analysis, the current source 24 in FIG. 4 is expressed by a circuit in which resistors are connected in series as shown in FIG. What can be done will be explained by equation (1) and the following equations (2) to (8).

  The load motor 3 is an AC motor, and is often controlled by handling various quantities such as motor voltage and current on two-axis orthogonal coordinates (dq coordinates). Here, assuming that the axis expressing the torque current of the AC motor is the q axis, the output power P of the inverter is generally expressed by the equation (2) using the q axis voltage vq and the q axis current iq.

  When the q-axis voltage vq of the inverter is pulsated, the output power P of the inverter and its pulsation amount ΔP can be expressed by the following equations (3) and (4).

  Since Δiq and Δvq are very small compared to iq and vq, the term ΔvqΔiq is negligibly small. Accordingly, the amount of pulsation ΔP needs to take into account only the second and third items on the right side of equation (3), and is as shown in equation (4).

As an example, FIG. 5 shows the transfer characteristics of a standard 3.7 kW induction motor. This is a frequency characteristic of the phase when Δvq is input and Δiq is output. At a power supply frequency of 50 Hz or 60 Hz (approximately 2000 rad / s), Δiq exhibits a delay characteristic of about 90 degrees with respect to Δvq. Not only induction motors but also other types of motors such as synchronous motors are electrically RL circuits based on resistance and inductance, so Δiq is delayed in phase from Δvq.
As a result, since iq and vq are constant values, the first term vqΔiq of the pulsating power ΔP of the motor shown in equation (4) is delayed by about 90 degrees compared to Δvq, and the second term Δvqiq is in phase. It becomes.

  Further, the inverter input power P + ΔP is expressed by the equation (5) using the inverter input voltage Vdc and the inverter input current Idc. Here, it is assumed that inverter input power = output power.

  The inverter input voltage Vdc has a direct current component larger than the pulsation component vdcr. For this reason, it can be regarded as a substantially constant value. When both sides of equation (5) are divided by Vdc, Idc is obtained from equation (6). Therefore, the inverter input current Idc can be considered to generate pulsation with a phase delay in phase with the pulsation amount ΔP.

  From the above examination, it can be seen that the current source 24 simulating the inverter / motor of FIG. 4 has a delay characteristic compared to Δvq.

By the way, it is as follows when the degree of the phase delay changes according to the magnitude of the load by examining the above equation (4).
That is, when the motor load is large, iq becomes large and the second term of the equation (4) becomes dominant, and therefore the phase characteristics of Δvq → ΔP are substantially in phase.
On the contrary, when the motor load is small, iq becomes small, the first term of the equation (4) becomes dominant, and the phase characteristic of Δvq → ΔP is delayed by about 90 degrees.

  Thus, since the phase relationship between Δvq and ΔP changes depending on the magnitude of the motor load, when obtaining the correction signal Vcmp using Δvq and therefore VdcAC, it is necessary to control not only the magnitude but also the phase.

The weighting unit 15 attempts to eliminate the phase shift between Δvq and thus VdcAC and ΔP by adjusting the phase relationship according to the magnitude of the motor load.
Here, the variable p set by the gains 16 and 17 of the weighting unit 15 is determined by the equation (7).

The numerator of the equation (7) corresponds to the output power value Pout of the inverter 4 and can be derived by the product of vq and iq. The denominator Pmax is an output power value at which p = 1. Pmax is a constant that varies depending on the rating of the load motor 3, but here it is set as the output power setting value of the inverter.
The variable p takes the range of the equation (8).

When the value of the variable p derived from the equation (7) is out of the range of the equation (8), the value is corrected to be within the range of the equation (8).
This is a case where Pout> Pmax, that is, when the output power value Pout is overloaded, p> 1, and stable weighting calculation is impossible, and thus approximates to p = 1.

FIG. 6 is a block diagram showing a specific configuration of the variable p calculation unit 26 that calculates and outputs the variable p according to the equation (7).
Hereinafter, a method for calculating the variable p will be described. The dq converter 40 derives q-axis current components iq ′ of the current detection values iu, iv, iw of the load motor 3 from a current detection unit (not shown) using the phase angle command θ *. The multiplier 41 multiplies iq ′ by the voltage command value V * (value before correction) to derive the output power value P′out.

Then, the output power value Pout from which the pulsation of the output power value P′out is removed is derived using the low-pass filter 42. This is provided to prevent control interference because the current detection values iu, iv, and iw include pulsation components due to resonance control. If the low-pass filter 42 is used, the control response for resonance suppression is lowered. Therefore, if it is desired to increase the control response, the low-pass filter 42 may not be provided.
Finally, the divider 43 divides the output power value Pout by the output power rated value Pmax to derive the variable p.
When the low-pass filter 42 is not used, the variable p may be calculated using an instantaneous value, a peak value, or the like of the output power value.

The weighting unit 15 performs the weighting process using the variable p derived as described above to calculate the VdcAC with no phase advance (output without passing through the phase advance means 14) as the q-axis current component iq, and hence the output power value Pout, increases. Reflect a lot. This corresponds to a case where the motor load is large.
Conversely, the smaller the q-axis current component iq, and hence the output power value Pout, reflects more VdcAC90 of 90 degree phase advance (output through the phase advance means 14). This corresponds to a case where the motor load is small. Since the characteristic of VdcAC → ΔP is delayed by 90 degrees, VdcAC and ΔP are substantially in phase by advancing the phase of VdcAC.
That is, by this weighting process, the current source 24 in FIG. 4 can be regarded as an R circuit having only the resistor Rd. FIG. 7 shows a circuit diagram in which the current source 24 of the model of FIG. 4 is replaced with an R circuit.

As described above, since it has been confirmed that the current source 24 can be equivalently replaced by the R circuit 25 by the weighting unit 15, it will be described below that the pulsation of the DC link voltage Vdc can be reduced based on this equivalent circuit.
First, consider the case where resonance is not suppressed. FIG. 8 is an equivalent model when the current flowing through the current source 24 is 0, that is, Rd → ∞.
A transfer function of the inter-capacitor voltage vdcr is derived from the power supply voltage vsr. Equations (A-1) to (A-2) can be derived from the circuit equations.
However, in the following Laplace-transformed equations, Vsr is used as the voltage vsr, Vdcr is used as the voltage vdcr, I1 is used as the current i1, and I2 is used as the current i2.

  When formula (A-2) is arranged by current I1, formula (A-3) is obtained.

  Substituting the equation (A-3) into the equation (A-1) and organizing it with Vdcr / Vsr yields the equation (A-4).

Substituting s = jωc for s in (A-4) and rearranging results in (A-5).
However, ωc is an angular frequency of the resonance frequency fc.

  Since the L and C values are determined so that LC resonance occurs at the resonance frequency fc, equation (A-6) is established.

  Since the denominator of the expressions (A-6) to (A-5) = 0, the gain becomes ∞ and Vdcr diverges. From the above, the resonance phenomenon can be confirmed.

Next, a transfer function of the inter-capacitor voltage vdcr is derived from the power supply voltage vsr using a model that simulates the resonance suppression operation of FIG.
Equations (B-1) to (B-3) can be derived from the circuit equations.

  If the equation (B-2) is arranged by I2, the equation (B-4) is obtained.

  By substituting the equation (B-4) into the equation (B-1) and rearranging it with I1, the equation (B-5) can be derived.

  Substituting the equation (B-5) into the equation (B-3) and rearranging it with Vdcr / Vsr yields the equation (B-6).

  Substituting s = jωc for s in (B-6) and rearranging results in (B-7).

  Since the L and C values are determined so that LC resonance occurs at the resonance frequency fc, the equation (B-8) is established.

  By simplifying equation (B-7) using equation (B-8), equation (B-9) can be derived.

  Taking the absolute value of equation (B-9), equation (B-10) can be derived.

Comparing equation (A-5) with equation (B-10), under resonance conditions, in equation (A-5), Vdcr / Vsr is ∞, whereas in equation (B-10), it is finite. It is possible to confirm the effect of suppressing pulsation.
Further, from equation (B-10), the pulsation decreases as the impedance of the R circuit simulating the motor / inverter decreases. And reducing this impedance corresponds to setting the gain K of the gain 19 in the resonance suppression control block 12 of FIG.

  FIG. 9 is a diagram illustrating an example of the resonance suppression operation described above, and compares the DC link voltage Vdc when the output voltage command is corrected and not corrected using the correction signal Vcmp. . When the output voltage command is corrected by the correction signal Vcmp, it can be confirmed that the pulsation of the DC link voltage Vdc is reduced.

  As described above, in the power conversion device according to the first embodiment of the present invention, by using the resonance suppression control block 12, the pulsation frequency of the DC link voltage generated by the converter 2, the three-phase AC power supply 1, and the converter Even if the LC resonance frequency of the AC reactor 21 between the two and the capacitor 6 of the DC link 5 match, expansion of DC link voltage pulsation can be suppressed, stable power can be supplied to the inverter and motor, and the system can be operated stably. can do.

  Further, by performing a weighting process using the variable p = Pout / Pmax, the phase advance amount of VdcAC can be controlled to make the correction signal Vcmp generated based on this VdcAC substantially in phase with ΔP. Thereby, a high resonance suppression effect can be exhibited regardless of the magnitude of the motor load. Therefore, the resonance suppression effect can be obtained with a small amount of compensation, so that the inverter output voltage saturation can be prevented.

  Further, such an increase in DC link voltage pulsation due to resonance often occurs when the DC link capacitor 6 has a small capacity, but this kind of problem is solved by the resonance suppression control block 12 according to the present invention. be able to.

Embodiment 2. FIG.
In the second embodiment, the variable p set by the gains 16 and 17 of the weighting unit 15 is determined by the equation (2-1).

In the equation (2-1), iqout is the q-axis output current value of the load motor 3, and iqmax is the q-axis output current value at which p = 1. Although iqmax is a constant that varies depending on the rating of the load motor 3, it is herein set to the output current setting value of the inverter.
The variable p takes the range of the formula (2-2).

  When the value of the variable p derived from the equation (2-1) is out of the range of the equation (2-2), it is within the range of the equation (2-2) for the same reason as described in the first embodiment. Correct so that

FIG. 10 is a block diagram showing a specific configuration of the variable p calculation unit 26 that derives and outputs the variable p by the equation (2-1).
Hereinafter, a method for calculating the variable p will be described. The dq converter 40 derives q-axis current components iq ′ of the current detection values iu, iv, iw of the load motor 3 from a current detection unit (not shown) using the phase angle command θ *.

Then, using the low-pass filter 42, the output current value iqout from which the pulsation of the q-axis current component iq ′ is removed is derived. This is provided to prevent control interference because the current detection values iu, iv, and iw include pulsation components due to resonance control. If the low-pass filter 42 is used, the control response for resonance suppression is lowered. Therefore, if it is desired to increase the control response, the low-pass filter 42 may not be provided.
Finally, the divider 43 divides the q-axis output current value iqout by the q-axis output current set value iqmax to derive the variable p.

As described above, in the second embodiment of the present invention, since the weighting process using the variable p = iqout / iqmax is performed, as can be seen from FIG. 10, the configuration of the variable p calculation unit 26 is the same as that of the previous implementation. It becomes simpler than the case of form 1.
In general, since the output power tends to increase as the q-axis current increases, the phase advance amount of VdcAC is almost the same as in the first embodiment in which the variable p is calculated based on the equation (7). And the correction signal Vcmp created based on this VdcAC can be made substantially in phase with ΔP. Thereby, a high resonance suppression effect can be exhibited regardless of the magnitude of the motor load. Therefore, the resonance suppression effect can be obtained with a small amount of compensation, so that the inverter output voltage saturation can be prevented.

Embodiment 3 FIG.
In the third embodiment, the variable p set by the gains 16 and 17 of the weighting unit 15 is determined by the equation (3-1).

In the equation (3-1), irmsout is an effective output current value of the load motor 3, and irmsmax is an effective output current value at which p = 1. Irmsmax is a constant that varies depending on the rating of the load motor 3, but here, it is an effective value for setting the output current of the inverter.
The variable p takes the range of the expression (3-2).

  When the value of the variable p derived from the expression (3-1) is out of the range of the expression (3-2), it is within the range of the expression (3-2) for the same reason as described in the first embodiment. Correct so that

FIG. 11 is a block diagram showing a specific configuration of the variable p calculation unit 26 that derives and outputs the variable p by the equation (3-1).
Hereinafter, a method for calculating the variable p will be described. The effective current value irms ′ derived from the equation (3-3) based on the detected current values iu, iv, iw of the load motor 3 from the current detection unit (not shown) is used.

The low-pass filter 42 is used to derive the output current effective value irmsout from which the pulsation of the output current effective value irms'out is removed. This is provided to prevent control interference because the current detection values iu, iv, and iw include pulsation components due to resonance control. If the low-pass filter 42 is used, the control response for resonance suppression is lowered. Therefore, if it is desired to increase the control response, the low-pass filter 42 may not be provided.
Finally, the divider 43 divides the output current effective value irmsout by the output current setting effective value irmsmax to derive the variable p.

As described above, in the third embodiment of the present invention, since the weighting process using the variable p = irmsout / irmsmax is performed, the dq converter 40 is configured as the variable p calculation unit 26 as can be seen from FIG. Although there is an advantage that it becomes unnecessary, it can be said that it is disadvantageous in that it is necessary to calculate the effective value of the detection current.
In general, as the output current effective value increases, the output power tends to increase. Therefore, the phase advance of VdcAC is almost the same as in the first embodiment in which the variable p is calculated based on the equation (7). By controlling the amount, the correction signal Vcmp created based on this VdcAC can be made substantially in phase with ΔP. Thereby, a high resonance suppression effect can be exhibited regardless of the magnitude of the motor load. Therefore, the resonance suppression effect can be obtained with a small amount of compensation, so that the inverter output voltage saturation can be prevented.

Embodiment 4 FIG.
Generally, it is known that the DC voltage Vdc of the capacitor 6 of the DC link unit 5 is highest when there is no load, and the DC voltage Vdc decreases as the load increases. In the fourth embodiment, this characteristic is used to determine the value of the variable p.
That is, in the fourth embodiment, the variable p set by the gains 16 and 17 of the weighting unit 15 is determined by the equation (4-1).

Vdcmin in the equation (4-1) is a DC link voltage value in which p = 1. Vdcmax is a voltage value at which p = 0. For example, in the case of a power supply 200V system, Vdcmax = 265V. Vdcmin = 250V.
The Vdcmax is 265V because the VdcDC value at no load is employed in the power supply 200V system. Conversely, Vdcmin is 250 V because the VdcDC value at the rated output is adopted.

FIG. 12 is a block diagram showing a specific configuration of the variable p calculation unit 26 that derives and outputs the variable p by the equation (4-1).
Hereinafter, a method for calculating the variable p will be described. Using the low-pass filter 42, the DC voltage VdcDC is derived by removing the pulsating component of Vdc, that is, the component of 6 times the power supply frequency superimposed on Vdc. Therefore, the cut-off frequency of the low-pass filter 42 may be about 100 Hz.

  Then, the subtractor 44 subtracts VdcDC from Vdcmax, the subtractor 45 subtracts Vdcmin from Vdcmax, and finally the divider 43 divides the former value by the latter value to obtain the variable p. To derive.

As described above, in the fourth embodiment of the present invention, since the weighting process using the variable p = (Vdcmax−Vdcout) / (Vdcmax−Vdcmin) is performed, as can be seen from FIG. Since the calculation is not necessary, the calculation of the variable p becomes very simple.
On the other hand, since the variable p is set based on empirical characteristics between the DC voltage VdcDC and the load amount, the resonance suppression effect is more than that of the conventional device in that it can follow a change in the load amount. Although it is excellent, it must be said that it is slightly inferior to the embodiments described above.

Embodiment 5 FIG.
In the first to fourth embodiments, examples of application to a motor control system based on V / f control have been described. However, the present invention is applied to a motor control system based on a speed control system and a current control system. May be. FIG. 13 is an internal configuration diagram of the control unit 7 in the fifth embodiment, and is a resonance suppression control block diagram when a speed control system is applied to the synchronous motor.
The control block described in the first embodiment is replaced with a speed control system, and resonance suppression control is realized by adding correction to the q-axis voltage command vq *. The resonance suppression control block 27 may be the same as that described in FIG.

  Hereinafter, the details of the portion related to the voltage command generation unit in the block diagram will be described. The difference between the speed (frequency) command ω * and the detected motor speed (frequency) ω is derived by the subtractor 28, and the PI controller 29 is used so that the motor speed ω follows the speed command ω *. , Q-axis current command iq * is created. The deviation between the q-axis current command iq * and the q-axis current iq is derived from the subtracter 30, and the PI controller 31 is used to cause the q-axis current command iq to follow the q-axis current command iq *. Create vq *. The above 28-31 comprises the speed command part which generate | occur | produces q-axis voltage command vq *. Also for the d-axis, a deviation between the current command id * and the d-axis current id is derived by the subtractor 32, and the d-axis voltage command vd * is created using the PI controller 33.

A correction signal Vcmp for resonance suppression control is added to the q-axis voltage command vq * by the adder 20 to obtain a corrected q-axis voltage command vq ′ *. The phase angle θ is derived using the integrator 34 at the actual speed ω.
Using the DC link voltage Vdc, the d-axis voltage command vd *, the corrected q-axis voltage command vq ′ *, and the phase angle θ, the gate signal generation unit 35 performs inverse dq conversion to generate an output voltage command for each phase. The gate signals Gu +, Gu−, Gv +, Gv−, Gw +, Gw− are generated by PWM processing.

In the fifth embodiment, since vector control on the dq axis is adopted, as shown in FIG. 14, the configuration of the variable p calculation unit 26 is simpler than the cases of FIG. 6 and FIG. Can be.
That is, as shown in FIG. 14A, by using the q-axis current command iq * obtained on the control block of FIG. 13 in place of the q-axis current iq ′ of the variable p calculation unit 26 of FIG. , Dq converter 40 can be omitted.
Further, as shown in FIG. 14B, by using the q-axis current command iq * obtained on the control block of FIG. 13 in place of the q-axis current iq ′ of the variable p calculation unit 26 of FIG. , Dq converter 40 can be omitted.
However, although FIG. 14 shows a case where the low-pass filter 42 is not provided, it may be provided as necessary.

  As described above, also in the fifth embodiment, the same effects as those of the previous embodiments can be obtained. That is, by performing the weighting process using the variable p, it is possible to control the phase advance amount of VdcAC and make the correction signal Vcmp created based on this VdcAC substantially in phase with ΔP. Thereby, a high resonance suppression effect can be exhibited regardless of the magnitude of the motor load. Therefore, the resonance suppression effect can be obtained with a small amount of compensation, so that the inverter output voltage saturation can be prevented.

  Further, such an increase in DC link voltage pulsation due to resonance often occurs when the DC link capacitor 6 has a small capacity, but this kind of problem is solved by the resonance suppression control block 12 according to the present invention. be able to.

In addition, as a calculation method of the variable p used in the weighting unit 15, as long as a value that increases as the output of the inverter 4 increases and fluctuates in the range of 0 ≦ p ≦ 1 is obtained, the previous method is not necessarily used. The method is not limited to the method exemplified in each embodiment.
In each embodiment, the induction motor is described as an example of the AC load. However, the present invention is applicable to an AC load other than the motor even when another type of motor, for example, a synchronous motor is driven. It is applicable and has the same effect.

  Further, within the scope of the invention, the present invention can be freely combined with each other, or can be appropriately modified or omitted.

1 Three-phase AC power supply, 2 converter, 3 load motor, 4 inverter,
5 DC link section, 6 capacitor, 7 control unit, 8 voltage detection section,
9 V / f table, 11, 35 gate signal generator,
12, 27 Resonance suppression control block, 13 High-pass filter, 14 Phase advance means,
15 weighting unit, 16, 17 gain, 18, 20 adder, 19 gain unit,
21, 23 AC reactor, 24 current source, 25 R circuit, 26 variable p calculation unit,
40 dq converter, 41 multiplier, 42 low-pass filter, 43 divider,
29, 31, 33 PI controller.

Claims (9)

A converter connected between an AC power source and a DC link unit for converting AC power of the AC power source into DC power and outputting the DC power to the DC link unit, connected between the DC link unit and an AC load and the DC link An inverter that converts the DC power of the unit into AC power and outputs the AC power to the AC load, a capacitor connected to the DC link unit, and a control unit that controls the inverter based on a voltage command, ,
A voltage detection unit that detects the voltage of the DC link unit, a filter unit that extracts an AC component of the voltage detected by the voltage detection unit, and a phase advance AC component obtained by advancing the AC component extracted by the filter unit by 90 degrees Phase advance means, a value obtained by multiplying the AC component by a gain p (p is a variable that increases in accordance with an increase in the output of the inverter and fluctuates in a range of 0 ≦ p ≦ 1), and the phase AC component A weighting unit that outputs a value obtained by adding the value multiplied by the gain (1-p), and a gain unit that outputs a correction signal obtained by multiplying the output of the weighting unit by a predetermined gain,
The said control part controls the said inverter based on the signal which added the said correction signal to the said voltage command, The power converter device characterized by the above-mentioned. The power converter according to claim 1, wherein the variable p is calculated by the following equation.
p = Pout / Pmax
Where Pout: output power value of the inverter Pmax: output power set value of the inverter The power converter according to claim 1, wherein the variable p is calculated by the following equation.
p = iout / imax
Where iout: output current value of the inverter imax: output current setting value of the inverter When the inverter outputs a three-phase (u, v, w phase) alternating current,
The power converter according to claim 1, wherein the variable p is calculated by the following equation.
p = irmsout / irmsmax
However, irmsout: the output current effective value of the inverter = √ (iu ² + iv ² + iw ² )
irmsmax: the output current setting effective value of the inverter The power converter according to claim 1, wherein the variable p is calculated by the following equation.
p = (Vdcmax−Vdcout) / (Vdcmax−Vdcmin)
Where Vdcout: DC voltage value of the DC link unit Vdcmax: DC voltage maximum value of the DC link unit Vdcmin: DC voltage minimum value of the DC link unit 6. The output value (Pout, iout, irmsout, Vdcout) used for calculation of the variable p according to any one of claims 2 to 5 is a value obtained by removing a pulsating component through a low-pass filter. A power conversion device characterized by being configured as described above. The electric power according to any one of claims 1 to 6, wherein the AC load is an AC motor, and the control unit includes a voltage command generation unit that generates the voltage command based on a speed command. Conversion device. The voltage command generation unit is a V / f control unit that generates a voltage command from the speed command based on (voltage / frequency) = constant relationship,
The power converter according to claim 7, wherein the control unit controls the inverter based on a signal obtained by adding the correction signal to the voltage command from the V / f control unit. The voltage command generation unit is a speed command unit that generates a q-axis voltage command on dq 2-axis orthogonal coordinates so that a speed detection value follows the speed command,
The power converter according to claim 7, wherein the control unit controls the inverter based on a signal obtained by adding the correction signal to the q-axis voltage command from the speed command unit.

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