JP2013115162A - Field effect transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a field effect transistor having a semiconductor layer including a CNT, which achieves high mobility and a high on-off ratio, and which reduces a turn-on voltage and a hysteresis.SOLUTION: A field effect transistor comprises a semiconductor layer containing a carbon nanotube to which conjugated polymer adheres at least to a part of a surface, a gate insulation layer containing polymer and inorganic oxide fine particles, a gate electrode, a source electrode and a drain electrode.

Description

  The present invention relates to a field effect transistor. More specifically, the present invention relates to a field effect transistor containing a carbon nanotube in a semiconductor layer.

  In recent years, field effect transistors (hereinafter referred to as FETs) using an organic semiconductor having excellent moldability as a semiconductor layer have been proposed. By using an organic semiconductor as an ink, it becomes possible to form a circuit pattern directly on a substrate by an ink-jet printing method or a screen printing method. Therefore, an inorganic semiconductor that requires a conventional high-vacuum process is used. Instead of the conventional FET, FETs using organic semiconductors have been actively studied.

As an important index indicating the performance of the FET, mobility and on / off ratio can be cited. The improvement in mobility means that the on-current is increased. On the other hand, improving the on / off ratio means increasing the on-current and decreasing the off-current. Both of these improve the switching characteristics of the FET, leading to achieving high gradation in a liquid crystal display device, for example. For example, in the case of a liquid crystal display device, the mobility 0.1cm ² / V · sec or higher, the on-off ratio 10 ⁵ or more is required.

  As a technique for improving mobility, a method using a polymer composite having a conjugated polymer such as polythiophenes and a carbon nanotube (hereinafter referred to as CNT) is disclosed (for example, see Patent Document 1). However, when a semiconductor layer formed from a polymer composite containing CNT is used, the mobility is improved, but there is a problem that the turn-on voltage and the hysteresis are increased. These cause problems such as high drive voltage and low drive stability, and therefore it is essential to reduce the turn-on voltage and hysteresis. The hysteresis that is a problem here is estimated to be caused by charge traps caused by impurities contained in the semiconductor layer and the insulating layer.

  As a technique for reducing the turn-on voltage and hysteresis, a method of providing an insulating layer (overcoat layer) on the side opposite to the gate insulating layer with respect to the organic semiconductor layer is disclosed (see Patent Document 2). However, even in this method, reduction of the turn-on voltage and hysteresis is not always sufficient. On the other hand, as a method for reducing the turn-on voltage of the organic semiconductor FET, several methods for dispersing high dielectric constant inorganic compound particles in the gate insulating layer have been disclosed, but the effect on the hysteresis is not mentioned (patent) References 3 to 4 and Non-Patent Document 1). For example, Patent Document 4 mentions CNT as an example of a semiconductor layer, but does not mention the influence on hysteresis. Non-Patent Document 1 uses a mixed material of barium titanate and polymethylmethacrylate for the gate insulating layer of an FET using CNT as a semiconductor layer. This is intended to increase the thickness of the gate insulating layer. No mention is made of the effect of reducing hysteresis.

JP 2006-265534 A JP 2009-283924 A Japanese Patent No. 3515507 JP 2008-130910 A

Journal of Applied Physics 108, 102811 (2010)

  An object of the present invention is to maintain a high mobility and a high on / off ratio and achieve a low turn-on voltage and a low hysteresis in a field effect transistor having a semiconductor layer containing CNTs.

  The field effect transistor according to the present invention includes a semiconductor layer containing a carbon nanotube having a conjugated polymer attached to at least a part of its surface, a polymer, an inorganic oxide fine particle comprising oxygen and an element belonging to any of groups 3 to 14 A gate insulating layer, a gate electrode, a source electrode, and a drain electrode.

  The present invention can provide a field effect transistor that achieves high mobility, high on / off ratio, low turn-on voltage, and low hysteresis at high levels.

Schematic sectional view showing an FET which is one embodiment of the present invention Schematic sectional view showing an FET which is another embodiment of the present invention

  The field effect transistor of the present invention will be described.

  The field effect transistor according to the present invention includes a semiconductor layer containing a carbon nanotube (hereinafter referred to as a CNT composite) having a conjugated polymer attached to at least a part of its surface, and a gate insulation containing a polymer and inorganic oxide fine particles. It has a layer. While the semiconductor layer contains a CNT composite, an FET having a high mobility and a high on / off ratio can be obtained, while the turn-on voltage and hysteresis are high, which is characteristic of an FET having a semiconductor layer containing CNT. There was a problem. According to the present invention, by using a gate insulating layer containing a polymer and inorganic oxide fine particles, the problems peculiar to an FET including a semiconductor layer containing a CNT composite can be greatly improved.

  1 to 2 are schematic cross-sectional views showing examples of the FET of the present invention. In the FET shown in FIG. 1, a source electrode 5 and a drain electrode 6 are formed on a substrate 1 having a gate electrode 2 covered with a gate insulating layer 3, and a semiconductor layer 4 is formed thereon. In the FET shown in FIG. 2, a semiconductor layer 4 is formed on a substrate 1 having a gate electrode 2 covered with a gate insulating layer 3, and a source electrode 5 and a drain electrode 6 are formed thereon.

  Although there is no restriction | limiting in particular as a material used for the board | substrate 1, For example, inorganic materials, such as a silicon wafer, glass, an alumina sintered compact, a polyimide, polyester, polycarbonate, polysulfone, polyethersulfone, polyethylene, polyphenylene sulfide, polyparaxylene And organic materials such as

  The material used for the gate electrode 2, the source electrode 5 and the drain electrode 6 is not particularly limited. For example, conductive metal oxides such as tin oxide, indium oxide and indium tin oxide (ITO), or platinum, gold and silver , Copper, iron, tin, zinc, aluminum, indium, chromium, lithium, sodium, potassium, cesium, calcium, magnesium, palladium, molybdenum, metals such as amorphous silicon and polysilicon, and alloys thereof, copper iodide, copper sulfide Inorganic conductive materials such as polythiophene, polypyrrole, polyaniline, polyethylenedioxythiophene and polystyrenesulfonic acid complexes, conductive polymers whose conductivity has been improved by doping with iodine, etc., conductive carbon such as carbon nanotubes and graphene Material etc. But it is lower, but the invention is not limited thereto. These electrode materials may be used alone, or a plurality of materials may be laminated or mixed.

  Examples of the method for forming the gate electrode 2, the source electrode 5, and the drain electrode 6 include resistance heating vapor deposition, electron beam, sputtering, plating, CVD, ion plating coating, ink jet, and printing. If it is possible, there is no particular limitation. As an electrode pattern forming method, the electrode thin film prepared by the above method may be formed into a desired shape by a known photolithography method, or a mask having a desired shape may be formed at the time of electrode material vapor deposition or sputtering. A pattern may be formed through the pattern.

  The gate insulating layer 3 contains a polymer and inorganic oxide fine particles. The film thickness of the gate insulating layer 3 is preferably 50 nm to 3 μm, and more preferably 100 nm to 1 μm, because if it is too thin, it causes a leakage current, and if it is too thick, the electric field effect obtained becomes insufficient. The gate insulating layer 3 may be a single layer or a plurality of layers. The film thickness of the gate insulating layer 3 can be measured with a stylus type step gauge. Specifically, the level difference between the surface of the substrate and the surface of the gate insulating layer is measured with a stylus-type step gauge by removing the gate insulating layer from a part of the substrate. In addition, one layer may be formed from a plurality of insulating materials, or a plurality of insulating materials may be stacked. The gate insulating layer can be obtained by applying a solution or dispersion containing a polymer and inorganic oxide fine particles and drying it. Specifically, as a coating method, a spin coating method, a blade coating method, a slit die coating method, a screen printing method, a bar coater method, a mold method, a printing transfer method, a dip pulling method, an ink jet method, a drop cast method, or the like is preferably used. The coating method can be selected according to the characteristics of the coating film to be obtained, such as coating film thickness control and orientation control. The formed coating film may be annealed in the air, under reduced pressure, or in an inert gas atmosphere (in a nitrogen or argon atmosphere). The annealing temperature is preferably in the range of 100 to 300 ° C., more preferably 100 to 200 ° C. from the viewpoint of forming a gate insulating film on the plastic substrate.

  The polymer used for the gate insulating layer 3 is preferably soluble in a solvent, and the skeleton may be linear, cyclic, or branched. Moreover, it is preferable that a functional group having crosslinkability, a functional group having polarity, or a functional group for controlling various properties of the polymer is introduced into the side chain. By using a polymer in which these characteristics are controlled, in the FET element manufacturing process, for example, coating properties, surface flatness, solvent resistance, transparency, good wettability of other inks, and the like can be obtained. A good FET element having excellent durability and stability after the formation of the FET element can be obtained.

  The polymer used in the present invention is not particularly limited as long as it exhibits an insulating property to the extent that the FET functions normally. For example, polysiloxane, polyvinylphenol, polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride Polysiloxane, polyvinylphenol and the like can be used. Moreover, what copolymerized other polymers with these polymers, and what mixed can also be used. Any of these can be preferably used, but polysiloxane and polyvinylphenol are more preferably used.

  As the inorganic oxide fine particles contained in the gate insulating layer 3, inorganic oxide fine particles composed of an element belonging to any of Groups 3 to 14 and oxygen are used. Thereby, a high-performance field effect transistor can be obtained. Among these, it is preferable to use fine particles of an inorganic oxide represented by the formula (1). One kind of inorganic oxide fine particles may be used alone, or a plurality of kinds may be mixed and used.

MxOy (1)
(In the formula, M represents an inorganic element belonging to any of Groups 3 to 14, O represents an oxygen atom, and x and y each represents an integer of 1 to 4.)
Preferable examples of M include titanium, zirconium, hafnium, zinc, cadmium, aluminum, gallium, indium, silicon, germanium, and tin. In addition to these preferable examples, the same effect can be expected in a gate insulating layer having inorganic oxide fine particles.

As particularly preferred examples, specifically, zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), silicon oxide (SiO ₂ ), titanium oxide (TiO ₂ ), tin oxide (SnO ₂ ), hafnium oxide (HfO) ₂ ), and the like. Examples of commercially available inorganic oxide fine particles are listed below. Zirconium oxide particles include “Nanouse (registered trademark)” OZ-S30K-AC having a number average particle diameter of 9 nm, “Nanouse” OZ-S30K having a number average particle diameter of 10 nm, and “Nanouse” OZ-S30M having a number average particle diameter of 30 nm. (Product name, manufactured by Nissan Chemical Industries, Ltd.), zirconium oxide particles (manufactured by Kojundo Chemical Laboratory Co., Ltd.), and the like. Examples of silicon oxide particles include IPA-ST, MIBK-ST, PMA-ST having a number average particle diameter of 12 nm, IPA-ST-L having a number average particle diameter of 45 nm, IPA-ST-ZL having a number average particle diameter of 100 nm, and number average. PGM-ST with a particle size of 15 nm (trade name, manufactured by Nissan Chemical Industries, Ltd.), “Oscar (registered trademark)” 101 with a number average particle size of 12 nm, “Oscar” 105 with a number average particle size of 60 nm, number average particles “Oscal” 106 with a diameter of 120 nm, “Cataloid (registered trademark)”-S with a number average particle diameter of 5 to 80 nm (trade name, manufactured by Catalyst Kasei Kogyo Co., Ltd.), “Quatron (registered trademark) with a number average particle diameter of 16 nm ) “PL-2L-PGME”, “Quartron” PL-2L-BL with a number average particle diameter of 17 nm, “Quartron” PL-2L-DAA, number average particle diameter of 18-20 m "Quarton" PL-2L, GP-2L (trade name, manufactured by Fuso Chemical Industry Co., Ltd.), silica (SiO2) SG-SO100 (trade name, manufactured by Kyoritsu Material Co., Ltd.) having a number average particle size of 100 nm And “Lelosil® (registered trademark)” (trade name, manufactured by Tokuyama Corporation) having a number average particle diameter of 5 to 50 nm. As the silicon oxide-titanium oxide composite particles, “OPTRAIK (registered trademark)” TR-502, “OPTRAIK” TR-503, “OPTRAIK” TR-504, “OPTRAIK” TR-513, “OPTRAIK” TR -520, "Optlake" TR-527, "Optlake" TR-528, "Optolaike" TR-529 and the like. Examples of the titanium oxide particles include “Optlake” TR-505 (trade name, manufactured by Catalyst Kasei Kogyo Co., Ltd.) etc. Also, tin oxide-zirconium oxide composite particles (manufactured by Catalyst Kasei Kogyo Co., Ltd.) And tin oxide particles (manufactured by Kojundo Chemical Laboratory Co., Ltd.) Among them, particularly preferred are zirconium oxide, silicon oxide (SiO ₂ ), and titanium oxide (TiO ₂ ).

  The particle size of the inorganic oxide fine particles is not particularly limited, but in order to keep the surface of the gate insulating layer smooth, the number average particle size is preferably 100 nm or less, and more preferably 50 nm or less. The lower limit is not particularly limited, but is preferably 5 nm or more. The number average particle diameter of the inorganic oxide fine particles can be measured by a dynamic light scattering method. Further, the shape of the inorganic oxide fine particles is not particularly limited, but in order to keep the surface of the gate insulating layer smooth, a shape with a low aspect ratio is preferable, and a spherical shape is more preferable. Although there is no restriction | limiting in particular in content of the inorganic oxide fine particle in the gate insulating layer 3, It is preferable that it is 1-10000 weight part with respect to 100 weight part of polymers. Considering the ease of forming the gate insulating layer, it is more preferably 10 to 1000 parts by weight. Furthermore, it is more preferable that it is 100 to 300 parts by weight because a sufficient effect of reducing the turn-on voltage and hysteresis can be obtained.

  The composition containing the polymer and the inorganic oxide fine particles used for obtaining the gate insulating layer contains a solvent. The solvent is not particularly limited, but ethylene glycol monomethyl ether, ethylene glycol monoethyl ether, propylene glycol monomethyl ether, propylene glycol monoethyl ether, propylene glycol mono n-butyl ether, propylene glycol mono t-butyl ether, ethylene glycol dimethyl ether. , Ethers such as ethylene glycol diethyl ether, ethylene glycol dibutyl ether, diethylene glycol ethyl methyl ether, ethylene glycol monoethyl ether acetate, propylene glycol monomethyl ether acetate, propyl acetate, butyl acetate, isobutyl acetate, 3-methoxybutyl acetate, 3- Methyl-3-methoxybutyl acetate , Esters such as methyl lactate, ethyl lactate and butyl lactate, ketones such as acetylacetone, methylpropylketone, methylbutylketone, methylisobutylketone, cyclopentanone and 2-heptanone, butyl alcohol, isobutyl alcohol and pentanol 4-methyl-2-pentanol, 3-methyl-2-butanol, 3-methyl-3-methoxybutanol, alcohols such as diacetone alcohol, aromatic hydrocarbons such as toluene and xylene, γ-butyrolactone, and cyclic esters such as β-butyrolactone. Among them, it is preferable to contain an organic solvent having a boiling point of 110 to 200 ° C. at 1 atmosphere. If the boiling point is 110 ° C. or higher, the volatilization of the solvent is suppressed during coating of the gate insulating layer, and the coating property is improved. If the boiling point is 200 ° C. or lower, the solvent remaining in the film is small, and the chemical resistance and A gate insulating film having excellent insulating properties can be obtained. More preferably, the boiling point is 130 ° C to 190 ° C.

  These solvents can be used alone or in combination of two or more. When two or more solvents are used, it is possible to contain one or more low-boiling solvents having a boiling point of less than 110 ° C under atmospheric pressure or high-boiling solvents having a boiling point of more than 200 ° C under atmospheric pressure.

  The composition containing the polymer and the inorganic oxide fine particles may further contain a surfactant for improving the wettability to the substrate and a curing agent / crosslinking agent for promoting the curing of the polymer.

  For the semiconductor layer 4, a CNT composite or a mixture of a CNT composite and an organic semiconductor is used.

  The length of the CNT used for the CNT composite is preferably at least shorter than the distance (channel length) between the source electrode and the drain electrode. When longer than this, it will cause a short circuit between electrodes. For this reason, it is preferable to use a CNT whose length is at least shorter than the distance (channel length) between the source electrode and the drain electrode, or to perform a step of making the CNT shorter than the channel length. In general, commercially available CNTs are distributed in length, and CNTs longer than the channel length may be included. When a long CNT is included, a short circuit between the electrodes can be reliably prevented by adding a step of making the length shorter than the channel length. The average length of CNTs depends on the distance between the electrodes, but is preferably 5 μm or less, more preferably 1 μm or less. The diameter of the CNT is not particularly limited, but is 1 nm or more and 100 nm or less, more preferably 50 nm or less. The length of CNT can be evaluated using a transmission electron microscope or an atomic force microscope. The diameter of the CNT can be evaluated by resonance Raman scattering in addition to the electron microscope.

  The CNT composite is obtained by attaching a conjugated polymer to at least a part of the surface of CNT. By attaching the conjugated polymer, CNTs are uniformly dispersed in the solvent. As a result, the CNTs can be more uniformly dispersed on the substrate, and an FET having a high on / off ratio can be obtained. Further, by uniformly dispersing in a solvent, it can be stably used even by a coating method such as an ink jet method. The state where the conjugated polymer is attached to at least a part of the surface of the CNT means a state where a part or all of the surface of the CNT is covered with the conjugated polymer. The reason why the conjugated polymer can coat CNT is presumed to be that interaction occurs due to the overlap of π electron clouds derived from the respective conjugated structures. Whether or not CNT is coated with a conjugated polymer can be identified by the elemental analysis such as X-ray photoelectron spectroscopy (XPS) and the weight ratio of the deposit to the CNT.

  The conjugated polymer is attached to the CNT by (I) a method in which the CNT is added and mixed in the molten conjugated polymer, and (II) the conjugated polymer is dissolved in a solvent, and the CNT is dissolved therein. A method of adding and mixing, (III) a method in which CNTs are predispersed in advance with ultrasonic waves, etc., and a conjugated polymer is added and mixed therewith, and (IV) a conjugated polymer and CNT are placed in a solvent. And a method of mixing the mixed system by irradiating ultrasonic waves. In the present invention, any method may be used, and any method may be combined.

  The conjugated polymer covering the CNT is a polythiophene polymer, a polypyrrole polymer, a polyaniline polymer, a polyacetylene polymer, a poly-p-phenylene polymer, a poly-p-phenylene vinylene polymer, Examples thereof include polyfluorene polymers, but are not particularly limited. As the polymer, in addition to those in which single monomer units are arranged, those obtained by block copolymerization or random copolymerization of different monomer units may be used. Further, graft-polymerized products can also be used. Among the above polymers, in the present invention, polythiophene polymers and polyfluorene polymers that are easily attached to CNTs and easily form CNT complexes are preferably used. The specific example of the conjugated polymer which coat | covers CNT below is given. As the polythiophene polymer, one having a side chain in a polymer having a poly-thiophene skeleton is preferable. Specific examples include poly-3-alkylthiophene (alkyl group) such as poly-3-methylthiophene, poly-3-butylthiophene, poly-3-hexylthiophene, poly-3-octylthiophene, poly-3-dodecylthiophene, and the like. Is preferably 1-12); poly-3-alkoxythiophene such as poly-3-methoxythiophene, poly-3-ethoxythiophene, poly-3-dodecyloxythiophene (the carbon number of the alkoxy group is preferably 1) -12); poly-3-alkoxy-4-alkylthiophene such as poly-3-methoxy-4-methylthiophene, poly-3-dodecyloxy-4-methylthiophene (the number of carbons of the alkoxy group and the alkyl group is preferably 1-12); poly-3-thiohexylthiophene and poly-3-thiodode Poly-3-thio-alkylthiophene such as Le thiophene (number of carbon atoms in the alkyl group is preferably 1 to 12) are exemplified, can be used singly or in combination. Among these, poly-3-alkylthiophene or poly-3-alkoxythiophene is preferable. As the former, poly-3-hexylthiophene is particularly preferable. Examples of the polyfluorene polymer include poly (9,9-dioctylfluorenyl-2,7-diyl) and poly {(9,9-dioctylfluorenyl-2,7-diyl) -alt- [4. 7-bis (3-decyloxythien-2-yl) -2,1,3-benzothiadiazole] -5 ′, 5′-diyl}, poly {(9,9-dioctylfluorenyl-2,7- Diyl) -alt- (benzo [2,1,3] thiadiazole-4,8-diyl)}, poly {(9,9-dioctylfluorenyl-2,7-diyl) -co-bithiophene}}, poly [(9,9-dihexylfluorene-2,7-diyl) -alt- (2,5-dimethyl-1,4-phenylene)] and the like. The preferred molecular weight of the polythiophene polymer and the polyfluorene polymer is 800 to 100,000 in terms of number average molecular weight. Further, the polymer need not necessarily have a high molecular weight, and may be an oligomer composed of a linear conjugated system.

  As the organic semiconductor used in combination with the CNT composite, any material exhibiting semiconductivity can be used regardless of the molecular weight, and a material having high carrier mobility can be preferably used. Further, those soluble in an organic solvent are more preferable, and the semiconductor layer can be easily formed by applying the solution to a glass substrate or a plastic substrate. Although the kind of organic semiconductor is not particularly limited, polythiophenes such as poly-3-hexylthiophene and polybenzothiophene, poly (2,5-bis (2-thienyl) -3,6-dipentadecylthieno [3,2 -B] thiophene), poly (4,8-dihexyl-2,6-bis (3-hexylthiophen-2-yl) benzo [1,2-b: 4,5-b ′] dithiophene), poly (4 Mainly thiophene units such as -octyl-2- (3-octylthiophen-2-yl) thiazole), poly (5,5'-bis (4-octylthiazol-2-yl) -2,2'-bithiophene) Compounds contained in the chain, polypyrroles, poly (p-phenylene vinylenes) such as poly (p-phenylene vinylene), polyanilines, polyacetylenes, polydiacetylenes , Polycarbazoles, polyfurans such as polyfuran and polybenzofuran, polyheteroaryls having a nitrogen-containing aromatic ring such as pyridine, quinoline, phenanthroline, oxazole and oxadiazole, anthracene, pyrene, naphthacene, pentacene, hexacene , Condensed polycyclic aromatic compounds such as rubrene, heteroatom-containing aromatic compounds such as furan, thiophene, benzothiophene, dibenzofuran, pyridine, quinoline, phenanthroline, oxazole, oxadiazole, 4,4′-bis (N- ( Aromatic methyl derivatives represented by 3-methylphenyl) -N-phenylamino) biphenyl, biscarbazole derivatives such as bis (N-allylcarbazole) or bis (N-alkylcarbazole), pyrazoline derivatives, Tilben compounds, hydrazone compounds, metal phthalocyanines such as copper phthalocyanine, metal porphyrins such as copper porphyrin, distyrylbenzene derivatives, aminostyryl derivatives, aromatic acetylene derivatives, naphthalene-1,4,5,8-tetracarboxylic Examples thereof include condensed ring tetracarboxylic acid diimides such as acid diimide and perylene-3,4,9,10-tetracarboxylic acid diimide, and organic dyes such as merocyanine, phenoxazine and rhodamine. Two or more of these may be contained. Among these, an organic semiconductor having a thiophene skeleton is preferable.

  The CNT composite can be used as a CNT composite dispersion dispersed in a solvent. Specific examples of the organic solvent include halogen-containing hydrocarbons such as chlorobenzene, o-dichlorobenzene, chloroform and dichloromethane, aliphatic hydrocarbons such as decahydronaphthalene and decane, ethylene glycol monomethyl ether, ethylene glycol monoethyl ether , Ethers such as propylene glycol monomethyl ether, propylene glycol monoethyl ether, propylene glycol mono n-butyl ether, propylene glycol mono t-butyl ether, ethylene glycol dimethyl ether, ethylene glycol diethyl ether, ethylene glycol dibutyl ether, diethylene glycol ethyl methyl ether, ethylene Glycol monoethyl ether acetate, propylene glycol monomethyl ether acetate Esters, propyl acetate, butyl acetate, isobutyl acetate, 3-methoxybutyl acetate, 3-methyl-3-methoxybutyl acetate, methyl lactate, ethyl lactate, butyl lactate, ethyl benzoate, methyl benzoate, etc., acetylacetone , Ketones such as methyl propyl ketone, methyl butyl ketone, methyl isobutyl ketone, cyclopentanone, 2-heptanone, butyl alcohol, isobutyl alcohol, pentanol, 4-methyl-2-pentanol, 3-methyl-2-butanol Alcohols such as 3-methyl-3-methoxybutanol and diacetone alcohol, aromatic carbonization such as toluene, xylene, tetrahydronaphthalene, 1,2,3-trimethylbenzene and 1,2,3,5-tetramethylbenzene water S, .gamma.-butyrolactone, cyclic esters such as β- butyrolactone, although such N- methylpyrrolidinone include, but are not limited thereto.

  The CNT composite dispersion may further contain a surfactant for improving wettability to the gate insulating layer.

  The semiconductor layer 4 can be obtained by applying a CNT composite dispersion and drying it. As specific examples of the coating method, a spin coating method, a blade coating method, a slit die coating method, a screen printing method, a bar coater method, a mold method, a printing transfer method, a dip-up method, an inkjet method, and the like can be preferably used. The coating method can be selected according to the characteristics of the coating film to be obtained, such as film thickness control and orientation control. The formed coating film may be annealed in the air, under reduced pressure, or in an inert gas atmosphere (in a nitrogen or argon atmosphere). As an annealing temperature, the range of 100-300 degreeC is preferable, and it is more preferable that it is 100-200 degreeC from a viewpoint of formation of the semiconductor layer on a plastic substrate.

  In the formed FET, the current flowing between the source electrode and the drain electrode can be controlled by changing the gate voltage. The mobility of the FET can be calculated using the following equation (a).

μ = (δId / δVg) L · D / (W · ε r · ε · Vsd) (a)
However Id is the current between the source and drain, Vsd is the voltage between the source and the drain, Vg is the thickness of the gate voltage, D is the insulating layer, L is the channel length, W is the channel width, epsilon _r is the relative dielectric gate insulating layer The rate, ε, is the dielectric constant of vacuum (8.85 × 10 ⁻¹² F / m).

  Further, the on / off ratio can be obtained from the ratio of the value of Id (on current) at a certain negative gate voltage to the value of Id (off current) at a certain positive gate voltage.

Hysteresis, gate voltages Vg ¹ at Id = ^{10 -8} A in applying the the Vg from positive to negative, the gate voltage Vg ² at Id = ^{10 -8} A in applying from negative Vg to a positive The absolute value | Vg ¹ −Vg ² |

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated, this invention is not limited by these Examples.

Example 1
(1) Preparation of CNT Complex Dispersion 0.10 g of poly-3-hexylthiophene (Aldrich, regioregular, number average molecular weight (Mn): 13000, hereinafter referred to as P3HT), which is a conjugated polymer, was added to 5 ml of chloroform. In addition to the flask which entered, the chloroform solution of P3HT was obtained by ultrasonically stirring in an ultrasonic cleaning machine (US-2 manufactured by Inoue Seieido Co., Ltd., output 120 W). Subsequently, this solution was taken in a dropper, and 0.5 ml was dropped into a mixed solution of 20 ml of methanol and 10 ml of 0.1N hydrochloric acid to perform reprecipitation. The solid P3HT was collected by filtration with a 0.1 μm pore size membrane filter (PTFE: tetrafluoroethylene), rinsed well with methanol, and then the solvent was removed by vacuum drying. Further, dissolution and reprecipitation were performed again to obtain 90 mg of reprecipitation P3HT.

  Add 1.0 mg of single-walled CNT (single-walled carbon nanotubes manufactured by CNI, purity 95%) and 1.0 mg of the above P3HT into 10 ml of chloroform, and ultrasonically homogenizer (VCX manufactured by Tokyo Rika Kikai Co., Ltd.) -500) for 30 minutes with an output of 250 W. When the ultrasonic irradiation was performed for 30 minutes, the irradiation was stopped once, 1.0 mg of the above P3HT was added, and further ultrasonic irradiation was performed for 1 minute, whereby the CNT composite dispersion A (CNT concentration 0.1 g / l) was obtained.

  In order to examine whether or not P3HT was adhered to the CNT in the CNT complex dispersion A, 5 ml of the dispersion A was filtered using a membrane filter, and CNT was collected on the filter. The collected CNTs were quickly transferred onto a silicon wafer before the solvent was dried to obtain dried CNTs. When this CNT was subjected to elemental analysis using X-ray photoelectron spectroscopy (XPS), sulfur element contained in P3HT was detected. Therefore, it was confirmed that P3HT was adhered to the CNT in the CNT composite dispersion A.

  After adding 5 ml of o-dichlorobenzene (boiling point 180 ° C., hereinafter referred to as o-DCB) to the CNT complex dispersion A, chloroform as a low boiling point solvent was distilled off using a rotary evaporator. Substitution with DCB gave CNT composite dispersion B. Next, the dispersion B was filtered using a membrane filter (pore size: 3 μm, diameter: 25 mm, Omnipore membrane manufactured by Millipore) to remove CNTs having a length of 10 μm or more. The obtained filtrate was diluted by adding o-DCB to obtain a CNT composite dispersion C (CNT concentration 0.06 g / l with respect to the solvent).

(2) Synthesis of polysiloxane solution for insulating layer 61.29 g (0.45 mol) of methyltrimethoxysilane, 12.31 g (0.05 mol) of β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane, and 99.15 g (0.5 mol) of phenyltrimethoxysilane was dissolved in 203.36 g of propylene glycol monomethyl ether acetate (hereinafter referred to as PGMEA), and 54.90 g of water and 0.864 g of phosphoric acid were added thereto with stirring. It was. The obtained solution was heated at a bath temperature of 105 ° C. for 2 hours, the internal temperature was raised to 90 ° C., and a component mainly composed of methanol as a by-product was distilled out. Subsequently, the bath temperature is heated at 130 ° C. for 2.0 hours, the internal temperature is raised to 118 ° C., and a component mainly composed of water and PGMEA is distilled off, and then cooled to room temperature, and a solid content concentration of 44.7 wt% is obtained. A siloxane solution A was obtained.

(3) Preparation of Gate Insulating Material Solution 11.2 g of the obtained polysiloxane solution A was weighed, and zirconium oxide fine particle dispersion (“Nanouse” OZ-S30K-AC (manufactured by Nissan Chemical Co., Ltd.)): zirconium oxide fine particle concentration 30.7 wt.%) 48.9 g and PGMEA 39.9 g were mixed and dissolved by stirring at room temperature for 2 hours. Gate insulating material solution B (polymer solid content concentration 5 wt%, zirconium oxide fine particle solid content concentration 15 wt%) )

(4) Fabrication of FET The FET of FIG. 1 was fabricated. A gate electrode 2 was formed on a glass substrate 1 (thickness 0.7 mm) by vacuum evaporation of chromium with a thickness of 5 nm and then gold with a thickness of 50 nm through a metal mask by a resistance heating method. Next, the gate insulating material solution B prepared in the above (2) is spin-coated (2000 rpm × 30 seconds) on the glass substrate on which the gate electrode is formed, and the obtained coating film is applied at 200 ° C. under a nitrogen stream at 1 ° C. By performing heat treatment for a time, a gate insulating film having a thickness of 600 nm was obtained, and the gate insulating layer 3 was formed. On the substrate on which the gate insulating layer was formed, gold was vacuum-deposited so as to have a thickness of 50 nm. Next, a positive resist solution was dropped and applied using a spinner, and then dried on a hot plate at 90 ° C. to form a resist film. The obtained resist film was irradiated with ultraviolet rays through a photomask using an exposure machine. Subsequently, the substrate was immersed in an alkaline aqueous solution, the ultraviolet irradiation part was removed, and a resist film patterned into an electrode shape was obtained. The obtained substrate was immersed in a gold etching solution (manufactured by Aldrich, Gold etchant, standard), and the gold in the portion where the resist film was removed was dissolved and removed. The obtained substrate was immersed in acetone, the resist was removed, washed with pure water, and dried on a hot plate at 100 ° C. for 30 minutes. Thus, a gold source / drain electrode having an electrode width (channel width) of 0.2 mm, an electrode interval (channel length) of 20 μm, and a thickness of 50 nm was obtained.

  Next, the CNT composite dispersion C prepared in (1) above is applied onto the substrate on which the electrodes are formed using an inkjet method, and is heat-treated at 150 ° C. for 30 minutes in a nitrogen stream on a hot plate. Thus, an FET having the CNT composite dispersion film as a channel layer was produced. At this time, a simple discharge experiment set PIJL-1 (manufactured by Cluster Technology Co., Ltd.) was used for the ink jet apparatus.

(5) Evaluation of FET The characteristics of the source-drain current (Id) -source-drain voltage (Vsd) when the gate voltage (Vg) of the FET was changed were measured. The measurement was performed in the air using a semiconductor characteristic evaluation system 4200-SCS type (manufactured by Keithley Instruments Co., Ltd.). When the mobility in the linear region was determined from the change in the value of Id at Vsd = −5 V when Vg = + 30 to −30 V, it was 0.56 cm ² / V · sec. Further, when the on / off ratio was determined from the ratio between the maximum value and the minimum value of Id at this time, it was 1 × 10 ⁵ . In the IV curve when Vg was swept from +30 to -30V, the value of Vg at which the value of current I suddenly rose was read as the turn-on voltage and found to be + 3V. Furthermore, when the hysteresis was determined from the absolute value | Vg ¹ −Vg ² | of the gate voltage difference between the return and return at Id = 10 ⁻⁸ A, it was 0V. The results are shown in Table 1.

Example 2
An FET was prepared in the same manner as in Example 1 except that a silicon oxide fine particle solution (PMA-ST (manufactured by Nissan Chemical Industries, Ltd.): silicon oxide fine particle concentration 30.7 wt%) was used instead of the zirconium oxide fine particle solution. The characteristics were measured. The results are shown in Table 1.

Example 3
A polyvinylphenol solution C was prepared by dissolving 25 g of polyvinylphenol (manufactured by Aldrich: weight average molecular weight: 11000) in 75 g of PGMEA. Instead of the polysiloxane solution A, a polyvinylphenol solution C (solid content concentration 25.0% by weight) is used, and the preparation ratio of the gate insulating material solution B is 20.0 g of the polyvinylphenol solution C, 48.9 g of the zirconium oxide fine particle dispersion, and PGMEA31. A FET was prepared in the same manner as in Example 1 except that the solid content concentration was changed to 5% by weight of polyvinylphenol and 15% by weight of zirconium oxide fine particles, and the characteristics were measured. The results are shown in Table 1.

Example 4
An FET was prepared in the same manner as in Example 1 except that poly (9,9-dioctylfluorene-alt-benzothiadiazole) (manufactured by Aldrich, Mn: 10,000 to 20000 (hereinafter referred to as F8BT)) was used instead of P3HT. The characteristics were measured. The results are shown in Table 1. F8BT was used without purification.

Example 5
The preparation ratio of the gate insulating material solution B was changed to 22.4 g of polysiloxane solution A, 32.6 g of zirconium oxide fine particle dispersion, and 45.0 g of PGMEA, and the respective solid content concentrations were 10% by weight of polysiloxane and 10% by weight of zirconium oxide fine particles. An FET was produced in the same manner as in Example 1 except that the characteristics were measured, and the characteristics were measured. The results are shown in Table 1.

Example 6
Instead of zirconium oxide fine particle solution, titanium oxide fine particle solution ("Optlake" TR-505 (manufactured by Catalyst Kasei Kogyo Co., Ltd.): solid content concentration 15.0% by weight) is used. The same as Example 1 except that the polysiloxane solution A was 22.4 g, the zirconium oxide fine particle dispersion was 66.7 g, and the PGMEA was 10.9 g, and the respective solid content concentrations were changed to 10 wt% polysiloxane and 10 wt% titanium oxide fine particles. Thus, an FET was fabricated and the characteristics were measured. The results are shown in Table 1.

Comparative Example 1
An FET was prepared in the same manner as in Example 1 except that the preparation ratio of the gate insulating material solution B was changed to 44.8 g of polysiloxane solution A and 55.2 g of PGMEA, and the solid content concentration of polysiloxane was 20 wt%. Was measured. The results are shown in Table 1.

Comparative Example 2
An FET was produced in the same manner as in Comparative Example 1 except that F8BT was used instead of P3HT, and the characteristics were measured. The results are shown in Table 1. F8BT was used without purification.

Comparative Example 3
Using the polyvinylphenol solution C prepared in Example 3 instead of the polysiloxane solution A, the preparation ratio of the gate insulating material solution B was changed to 80.0 g of polyvinylphenol solution C and 20.0 g of PGMEA, and the solid content concentration of polyvinylphenol was changed to An FET was produced in the same manner as in Example 1 except that the content was 20% by weight, and the characteristics were measured. The results are shown in Table 1.

Comparative Example 4
Tetrahydrofurfuryl alcohol (THFA) 140 g, dispersant “HOA-MPL” (manufactured by Kyoeisha Chemical Co., Ltd.) 20 g, inorganic particles “T-BTO-030R” (barium titanate fine particles, Toda Kogyo Co., Ltd., average particle) 400 g (diameter 30 nm) was mixed. Next, 400 g of zirconia beads (manufactured by Nikkato Co., Ltd., YTZ balls, size φ0.05 mm) are filled in the vessel of the bead mill “Ultra Apex Mill UAM-015” (manufactured by Kotobuki Industries Co., Ltd.), and the rotor is rotated. The mixed liquid was sent and circulated in the vessel to disperse the inorganic particles. Dispersion was carried out at a rotor peripheral speed of 9.5 m / s for 2 hours, and THFA was further added to adjust the solid content concentration to 30.7%, whereby a barium titanate fine particle dispersion Y was obtained.

  An FET was prepared in the same manner as in Example 1 except that the barium titanate fine particle dispersion Y was used instead of the zirconium oxide fine particle solution, and the characteristics were measured. The results are shown in Table 1.

DESCRIPTION OF SYMBOLS 1 Substrate 2 Gate electrode 3 Gate insulating layer 4 Semiconductor layer 5 Source electrode 6 Drain electrode

Claims (4)

A field effect transistor having a semiconductor layer, a gate insulating layer, a gate electrode, a source electrode and a drain electrode, wherein the semiconductor layer contains carbon nanotubes having a conjugated polymer attached to at least a part of a surface thereof, and the gate A field effect transistor, wherein the insulating layer contains a polymer and inorganic oxide fine particles, and the inorganic oxide fine particles are inorganic oxide fine particles composed of an element belonging to any of Groups 3 to 14 and oxygen. 2. The field effect transistor according to claim 1, wherein the inorganic oxide fine particles contain one or more inorganic oxides represented by the following formula (1).
MxOy (1)
(In the formula, M is selected from elements belonging to groups 3 to 14. O represents an oxygen atom, and x and y each represents an integer of 1 to 4.) The field effect transistor according to claim 2, wherein, in the formula (1), M is selected from the group consisting of titanium, zirconium, hafnium, zinc, cadmium, aluminum, gallium, indium, silicon, germanium, and tin. The field effect type according to any one of claims 1 to 3, wherein the inorganic oxide fine particles contain at least one of zirconium oxide, aluminum oxide, silicon oxide, titanium oxide, tin oxide, and hafnium oxide. Transistor.

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