JP2013097580A - Dynamic analysis device, dynamic analysis system, dynamic analysis method and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily and accurately analyze the operation of a control device or the like.SOLUTION: A dynamic analysis device 6 is connected to an address bus 11, a data bus 12, and a control signal line 13 to which a CPU 3 to be analyzed is connected. The dynamic analysis device 6 includes: a data analysis part for specifying processing content, for example, functions or variables under execution from the value of an address on the address bus 11, and for specifying processing data, for example, values of variables from data on the data bus 12; a storage part for storing history information including the history of the processing content and the processing data analyzed by the data analysis part; and a history information providing means for providing the history information stored in the storage part in response to an access from a dynamic analysis tool 7.

Description

  The present invention relates to a dynamic analysis apparatus, an operation analysis system, an operation analysis method, and a computer program that causes a computer to execute dynamic analysis.

  In a program operation test or failure analysis, when a specific memory is accessed or a function transition is analyzed, a dedicated ICE (In Circuit Emulator) is generally connected to the computer for analysis. Alternatively, a debug print statement is embedded in the source code of the program, and the data contents are output and analyzed.

The ICE simulates the operation of the CPU with a dedicated device, and includes a step execution function for executing a program in units of one line, a pause function (Break) during execution, a display function of designated memory contents, and the like. ICE includes the full ICE type in which the CPU function of the board is changed to an IC socket and the CPU function is completely replaced with ICE, and the JTAG ICE type in which the CPU is accessed by JTAG communication to control the execution state.
When using any type of ICE, it is necessary to connect a dedicated IC socket or JTAG connector on the board. Since ICE is mostly used at the time of program creation, IC sockets and JTAG connectors are often deleted from final mass-produced boards.

  Debug printing is a technique for embedding a test code in a program and outputting the value of specific data to the outside, and does not require an external device such as ICE. However, the actual operation performance, execution timing, and the like differ from actual mass-produced products depending on the position and amount of the debug print.

  Patent Document 1 discloses a method in which there is no difference in operation timing between a test and an operation. This method observes an address signal and a control signal on a bus and outputs an activation request signal when detecting that a specific address of a preset data storage circuit is accessed, and an activation request signal In response to the above, it is equipped with a circuit that stores the data at a specific address in the trace data save area and controls to store the data from the latest data up to a certain number of times before, and debug using the normal program used during operation A method has been proposed. According to this method, the processing capability of the central control circuit is utilized, and there is no difference in operation timing between debugging and operation.

Japanese Patent Laid-Open No. 3-211634 (FIG. 1)

  In the technique of the above-mentioned patent document 1, since the memory value is stored when the CPU accesses a specific memory address, the transition of the memory value can be analyzed, but the transition of the executed processing content, for example, There was a problem that it was impossible to analyze which processing function accessed a specific memory.

  In the technique of Patent Document 1, since only a memory value can be stored, there is no means for investigating when it is desired to investigate the occurrence transition of an exception error or the like.

The present invention has been made to solve the above-described problems, and an object of the present invention is to make it possible to more easily analyze the operation of a control device and the like.
Another object of the present invention is to make it possible to analyze the processing operation of the control device and the like more accurately.

In order to achieve the above object, the dynamic analysis apparatus of the present invention is
A bus data analysis unit that identifies the processing contents from the address value on the address bus and identifies the processing data from the data on the data bus;
A storage unit for storing history information including at least a part of a history of processing data and processing data analyzed by the bus data analysis unit;
In response to an external access, history information providing means for providing history information stored in the storage unit;
Is provided.

  According to the present invention, operation analysis can be easily performed.

It is a block diagram of the dynamic analysis system which concerns on Embodiment 1 of this invention. It is a block diagram which shows the physical structure of the dynamic analyzer shown in FIG. 1 is a configuration diagram showing a functional configuration of a dynamic analysis device according to a first embodiment. (A) And (b) is a figure which shows the function address range and variable address value which are stored in the data management part shown in FIG. (A)-(c) is a figure which shows the example of the function transition log | history stored in the data management part shown in FIG. 3, a variable transition log | history, and a variable fixed time log | history. (A)-(c) is a figure which shows the example of the function transition history condition stored in the data management part shown in FIG. 3, the variable transition history condition, and a fixed time history condition. 2 is a configuration diagram of a dynamic analysis tool according to Embodiment 1. FIG. It is a figure for demonstrating the use scene (environment) of a dynamic analysis system. It is a memory access timing chart. 4 is a flowchart illustrating processing of a bus data monitoring unit according to the first embodiment. 3 is a flowchart showing processing of a bus data analysis unit according to the first embodiment. It is the figure which showed the process of the regular data processing part which concerns on Embodiment 1 with the flowchart. It is a function block diagram of the dynamic analyzer which concerns on Embodiment 2 of this invention. It is a figure for demonstrating task transition timing. 10 is a flowchart of processing of a task analysis unit according to the second embodiment. It is a figure which shows the log | history of the change of a task, and the timing of a task change. It is a block diagram of the dynamic analyzer which concerns on Embodiment 3 of this invention. It is a timing chart for demonstrating bus occupation time. 10 is a flowchart of processing of a bus occupancy rate analysis unit according to the third embodiment.

Embodiment 1 FIG.
Hereinafter, the equipment control system provided with the dynamic analysis system which concerns on Embodiment 1 of this invention is demonstrated.

  As shown in FIG. 1, the facility control system 1 according to this embodiment includes a facility control device 2 and a dynamic analysis tool 7.

  The equipment control device 2 functions as a control device for any equipment such as an air conditioner and a power control device. In terms of hardware, a CPU 3 (Central Processing Unit) is a central processing unit that executes a program. , ROM4 (Read Only Memory), which is a non-volatile memory for storing programs, RAM5 (Random Access Memory), which is a volatile memory for storing variables, and the like, and dynamic analysis of data flowing on the bus A dynamic analysis device 6 is provided. The CPU 3, the ROM 4, the RAM 5, and the dynamic analysis device 6 are connected to each other by an address bus 11, a data bus 12, and a control signal line 13.

  The equipment control device 2 is connected to a dynamic analysis tool 7 for instructing dynamic analysis contents, displaying a dynamic analysis result, and the like through a communication line 14 so that they can communicate with each other.

CPU3, ROM4, RAM5 is used for control of arbitrary equipment.
On the other hand, the dynamic analysis device 6 is used to dynamically analyze the operation of the CPU 3, and in terms of hardware, as shown in FIG. 2, a processor 161, a receiving circuit 162, and a storage 163 and a communication control device 164.
The processor 161 is composed of a central processing unit such as a CPU or a field-programmable gate array (FPGA), and executes various operation functions stored later in the storage unit 163 to execute various functions described later with reference to FIG. Realize.
The receiving circuit 162 is composed of a unidirectional buffer and the like, and transmits signals on the data bus 11, the data bus 12, and the control signal line 13 to the processor 161. On the other hand, even if the processor 161 outputs a signal temporarily, This circuit does not output on the bus 11, the data bus 12, and the control signal line 13.
The storage unit 163 includes a ROM, a flash memory, a RAM, a hard disk, and the like, stores an operation program for the processor 161, functions as a work memory for the processor, and stores various data.
The communication control device 164 controls mutual communication between the dynamic analysis device 6 and the dynamic analysis tool 7.
With the above-described configuration, the dynamic analysis device 6 is output by the CPU 3 on the control signal line 13, the control signal that triggers reading and writing, the address value output on the address bus 11, and the data bus 12 The communication data content is analyzed by monitoring the output data. The dynamic analysis device 6 may be a one-chip microcomputer with a built-in memory, or may be configured as a multi-chip or a discrete circuit on a board different from the board on which the CPU or the like is arranged. It is also possible to connect.

  Functionally, the dynamic analysis device 6 includes a bus data monitoring unit 20, a bus data analysis unit 30, a data management unit 40, a communication control unit 60, and a communication interface 70 as shown in FIG. Prepare.

The bus data monitoring unit 20 is connected to the address bus 11, the data bus 12, and the control signal line 13, and includes an address bus monitoring unit 21, a data bus monitoring unit 22, and a control signal monitoring unit 23.
The address bus monitoring unit 21 monitors address data transmitted on the address bus 11. The data bus monitoring unit 22 monitors data transmitted on the data bus 12. The control signal monitoring unit 23 monitors a control signal transmitted on the control signal line 13.

  The data bus monitoring unit 20 determines the determination timing of the bus data (address data and data) from the control signal by the control signal monitoring unit 23, the address value acquired by the address bus monitoring unit 21 when the bus data is determined, and the data bus monitoring The data value acquired by the unit 22 and the write / read classification acquired by the control signal monitoring unit 23 are notified to the data bus analyzing unit 21.

The bus data analysis unit 30 is connected to the bus data monitoring unit 20 and the data management unit 40, and includes an execution function analysis unit 31, a variable data storage unit 32, and a monitoring data storage unit 33.
The execution function analysis unit 31 analyzes (specifies) the function currently executed by the CPU 3 based on the address value notified from the bus data monitoring unit 20. That is, the function stored in the position where the CPU 3 outputs and reads the address is specified.
The variable data analysis unit 32 analyzes (specifies) the variable accessed by the CPU 3. That is, the variable stored in the position where the CPU 3 outputs the address and reads it is specified.
The monitoring data storage unit 33 stores the analyzed data in the management data storage unit 40 as monitoring data 42.
The scheduled data processing unit 34 periodically analyzes (specifies) the values of the variables and stores them as monitoring data 42 in the management data storage unit 40.

The data management unit 40 is connected to the bus data analysis unit 30 and the communication control unit 60, and includes an address map 41, monitoring data 42, and control data 43, and stores various data.
The address map 41 includes a function address range 44 that is an address value indicating an area range in which functions are stored in an address space of the ROM 4 and the RAM 5, and a variable that is an address value indicating an area range in which variables are stored. Address value 45.
Specifically, as shown in FIG. 4, the function address range 44 includes an address range and functions F1, F2,. . . And the variable address value 45 includes an address and the variables A, B. . . Is stored.
As the address map 41, an address map automatically generated when compiling a program executed by the CPU 3 can be used.

The monitoring data 42 shown in FIG. 3 includes a variable current value 46 that is a current value of each variable, a function transition history 47 in which a transition history of a function executed by the CPU 3 is recorded, and a transition of variables and values accessed by the CPU 3. A variable transition history 48 including information indicating a history and a caller function at the time of variable change, and a variable fixed history 49 in which a fixed variable value and a collection time are recorded are included.
More specifically, in the function transition history 47, as shown in FIG. 5A, a function that matches a function transition history condition 50 described later, among a series of functions executed by the CPU 3, is determined in advance. A forward (previously executed) function and a backward (subsequently executed) function of a given depth (number).
As shown in FIG. 5B, the variable transition history 48 includes a variable that matches a variable transition history condition 51 to be described later and a predetermined depth (number) of a series of variables processed by the CPU 3. For the forward (previously processed) variable, a set of the variable, its value, processing date and time, and access source function is stored. For example, the variable transition history 48 stores data that records changes in the value of each variable and from which function the variable has been rewritten. Note that data indicating the order in which variables are rewritten may be stored.
As shown in FIG. 5C, the variable scheduled history 49 includes the value of each variable and the collection time.

  The control data 43 shown in FIG. 3 includes a function transition history condition 50 that describes a condition for starting storage of a function transition history, a variable transition history condition 51 that describes a condition for starting recording of a variable transition history, and a variable schedule. A scheduled history condition 52 describing conditions for starting history recording is included.

Specifically, as shown in FIG. 6A, the function transition history condition 50 includes: 1) a condition for starting recording of a function transition history, for example, that a specific function is detected, Arbitrary conditions such as detecting changes to the function, etc. 2) The number (forward depth) to be extracted as a history of the functions in front of the function that matched the conditions (executed first) (forward depth) and the conditions Data that correlates the number (rear depth) extracted as a history among the functions that follow (executed later) the function is stored.
In addition, as shown in FIG. 6 (b), the variable transition history condition 52 is 1) a condition for starting recording of a variable transition history, for example, that a variable is detected, and that a certain variable satisfies a specific condition. 2) It stores data associating an arbitrary condition such as having become, and 2) the number (forward depth) to be extracted as a history out of variables accessed in front of variables that meet the condition.
Moreover, as shown in FIG.6 (c), the regular history condition 52 memorize | stores the fixed period for recording a variable.

  The communication control unit 60 shown in FIG. 3 is connected to the data management unit 40 and the communication interface 70, and stores an address map storage unit 61 that stores a specified address map in the data management unit 40, and monitoring data from the data management unit 40. A monitoring data reading unit 62 that reads data and a control data storage unit 63 that stores designated control data in the data management unit 40 are provided to transmit and receive various data to and from the dynamic analysis tool 7.

  The communication interface 70 is an interface for the communication line 14. Data is transmitted to and received from the dynamic analysis tool 7 via the communication interface 70.

  The dynamic analysis tool 7 shown in FIG. 1 is a device that communicates with the dynamic analysis device 6 and displays an analysis result. As shown in FIG. 7, the dynamic analysis tool 7 includes a display device 81 such as a liquid crystal display device and an EL display device, an input device such as a keyboard and a mouse, a control unit 83 that controls display contents and input contents, and communication. A communication control unit 84 that controls the data, a data management unit 85 that stores data acquired from the dynamic analysis device 6 and processed data, and a communication interface 86 that is an interface with the dynamic analysis device 6. A general-purpose personal computer may be used as the dynamic analysis tool, or dedicated hardware may be used.

  Of the above configuration, the facility control device 2 is accommodated in the facility device 100 in any operating state, for example, as shown in FIG. In this case, the CPU 3, the ROM 4, and the RAM 5 function as a normal control device (controller) of the equipment device 100. The dynamic analysis device 6 analyzes the processing of the CPU 3. The dynamic analysis tool 7 is appropriately connected to the dynamic analysis device 6 through the communication line 14 as appropriate at the time of failure or maintenance, for example. The installation position of the dynamic analysis tool 7 may be on-site or remote. When remote, the communication line 14 may be a dedicated line, a general line, or a communication network such as the Internet. A similar configuration may be configured at the development stage of the facility device 100.

  Further, in the development stage or the like, the equipment control device 2 can be used by being connected to the equipment 100 as shown in FIG. 8B, for example. In this case, the installation position of the equipment control device 2 and the dynamic analysis tool 7 may be on-site or remote.

Next, operation | movement of the equipment control system 1 which has the said structure is demonstrated.
The CPU 3 of the equipment control device 2 executes an operation for controlling the equipment 100 by executing a program stored in the ROM 4.
The CPU 3 operates the equipment 100 by executing a control program stored in the ROM 4 and controlling each part in the equipment 100.
The dynamic analysis device 6 dynamically performs various analysis operations in parallel with the operation of the CPU 3.
Hereinafter, the operation of the dynamic analysis device 6 will be described for each functional part.
First, a process performed by the bus data monitoring unit 20 for determining data flowing on the bus will be described.

In general, when the CPU accesses the memory, the read / write classification, the address bus, and the data bus data determination timing can be determined by a combination of a plurality of control signals.
For example, as illustrated in FIG. 9, the address of the access position is output on the address bus 11, and subsequently, the control signals A and B (for example, the row strobe signal and the column strobe signal) on the control signal line 13 are read out. Alternatively, the state is sequentially switched to a state indicating writing, and then data on the data bus 12 is determined. Therefore, for example, a predetermined delay time D1 from when the control signal A is output until the bus data is determined or a predetermined delay time D2 from when the control signal B is output until the bus data is determined is measured in advance. In addition, the elapsed time after the control signal A or B is output is measured, and the timing at which the time D1 or the control signal B is output after the control signal A is output and the time D2 is measured is defined as the data determination time. It is possible to specify.
For example, the bus monitoring unit 20 monitors bus data in this way.

Next, the processing operation of the bus data monitoring unit 20 in the dynamic analysis device 6 will be described with reference to the flowchart of FIG.
When the main power supply is turned on, the bus data monitoring unit 20 starts the operation shown in FIG.
The control signal monitoring unit 23 determines whether the on / off by the operation of the on / off switch of the operation panel of the equipment device 100 is on or off (step S0), and when it is not off (step S0) S0; No), the CPU 3 monitors a control signal output via the control line 13 to the access target memory (ROM 4 or RAM 5 in FIG. 1). The control signal monitoring unit 23 monitors the control signal to the target memory (step S1a), and determines whether or not the control signal on the control signal line 13 has changed to a read or write state (step S1b).
If it is determined that there is no change in the control signal or a change to a state other than the read or write state (step S1b: No), the process returns to step S0.

  When it is detected that the control signal has changed to the read or write state, the address bus monitoring unit 21 holds the address value specified by the address signal output on the address bus 11 (step S1c).

  Subsequently, the process waits until the data on the data bus 12 is confirmed (step S1d). When the data is confirmed, the data value represented by the data signal on the data bus is held (step S1e).

  Finally, the control signal value (read / write), address value, and data value are notified to the bus data analysis unit 30 (step S1f). Thereafter, the process returns to step S0 to return to the signal line monitoring state. When it is determined in step S0 that the power is off (step S0; Yes), the current process is terminated.

Next, processing for analyzing data notified from the bus data monitoring unit 20 in the bus data analysis unit 30 will be described with reference to FIG.
The bus data analysis unit 30 starts the process shown in FIG. 11 every time data is supplied from the bus data monitoring unit 20 while the main power is on.
First, the bus data analysis unit 30 compares the address value notified from the bus data monitoring unit 20 with the function address range 44 and the variable address value 45 stored in the address map 41 in the data management unit 40. It is determined whether a function is being executed, a variable value is being accessed, or other processing is being performed (step S2a).

  When it is determined that the address value is within the function address range (step S2a: function address range), the execution function analysis unit 31 performs processing. The execution function analysis unit 31 identifies the function stored (analyzed) stored in the area specified by the address, and whether the function (the function stored at the accessed position) is the same as the previous function. If it is determined whether or not they are the same function (step S2b; Yes), the function is not changed, and the data analysis process is terminated.

  When it is determined that the analyzed function (the function stored at the accessed position) is different from the previous (currently executing) function, that is, the execution function has changed (step S2b; No), the function name The function ID associated with is added to the temporary buffer arranged inside, and the function transition history is held (step S2c).

  Next, it is determined whether or not the change of the execution function determined this time corresponds to a rearward (subsequent) transition of the specified function that matches the function transition history condition 50 by the subsequent processing of step S2f (step S2d). . When it is determined that the function change is subsequent to the function change that has been completed (step S2d; Yes), the function ID is added to the function transition history 47 in the data management unit 40 via the monitoring data storage unit 33. The function transition history 47 is updated (step S2e).

  On the other hand, when it is determined that the function change does not follow the history of the function change but is a new function after the transition (Step S2d; No), whether the transitioned function matches the function transition history condition 50 or not. Is determined (step S2f). When it is determined that they match (step S2f; Yes), data is transmitted via the monitoring data storage unit 33 by the depth (number) specified by the function transition history condition 50 among the series of functions stored in the temporary buffer. The function is stored in the function transition history 47 in the management unit 40 (step S2g).

For example, it is assumed that a history of functions “... F7, F4, F2, F3” is stored in the primary buffer. According to the function transition history condition 52 shown in FIG. 5A, the function F3 matches the function specified by the function history condition 50. Furthermore, the designated depth (front) is “3”. In this case, as shown in FIG. 6A, IDs of “F3” as a function matching the condition and “F7, F4, F2” as functions specified by the depth (forward) are stored in the function transition history 47. The After that, when the function to be executed is changed, it is determined in step S2e that the function change is subsequent to the function change that has been completed (step S2d; Yes), and data management is performed via the monitoring data storage unit 33. The function ID is added to the function transition history 47 in the unit 40 (step S2e).
Further, for example, it is assumed that a history of a series of functions “... F12, F1, F2, F9, F4, F5” is stored in the primary buffer. According to the function transition history condition 52 shown in FIG. 5A, the change from the function F4 to F5 matches the function specified by the function history condition 50. Further, the designated depth (front) is “4”. In this case, as shown in FIG. 6A, IDs of “F4, F5” as functions that meet the conditions and “F12, F1, F2, F9” as functions specified by the depth (forward) are function transition history. 47.

  On the other hand, if it is determined in step S2f that the function history condition is not met (step S2f; No), the current process is terminated.

  By repeating the above operation, it is possible to save the function transition history history of the function specified as the function transition history condition and the function executed before and after the function.

On the other hand, if it is determined in step S2a that the address on the address bus 11 is the address value of the area storing the variable (step S2a; variable address), the variable data analysis unit 32 performs processing. Is done.
The variable data analysis unit 32 first holds the date and time when the variable was accessed (step S2l).

  Next, the control signal classification notified from the bus data monitoring unit 20 is discriminated, and it is judged whether it is a writing process or a reading process (step S2m). If it is a writing process, the variable value after writing is held. Then, it is stored in the variable current value 46 in the data management unit 40 via the monitoring data storage unit 33 (step S2n).

On the other hand, when it is determined that it is not a write process, that is, a read access (step S2m; No), step S2n is skipped.
After step S2n is executed or when it is determined No in step S2m, it is determined whether the accessed variable matches the variable transition history condition 51 (step S2o).
When it is determined that they match (step S2o; Yes), the history corresponding to the depth (number) specified by the variable transition history condition 51 among the history held in the execution function analysis unit 31, that is, the variable, the variable value, The access date and time and the function of the access source are stored in the variable transition history 48 in the data management unit 40 via the monitoring data storage unit 33 (step S2p), and the process ends.

For example, a history of a series of variables and access source functions “..., (variable G, value 3, access date / time 2011/10/24 14:15:50, access source function F11),. (Variable G, value 6, access date and time 2011/10/24 14:16:59, F12), ..., (variable G, value -1, access date and time 2011/10/24 14:17:11, access source Function F13), ..., (variable G, value +1, access date and time 2011/10/24 14:23:33, access source function F14) "is stored.
According to the variable transition history condition 51 shown in FIG. 6B, the update of the variable G from the negative value (−1) to the positive value (+1) by the function F14 matches the variable transition history condition 51. In this case, information on variables that match the variable transition history condition 51 (variable G, value + 1, access date / time 2011/10/24 14:23:33, access source function F14) ”and the stored history Among them, the history of the variable G of interest, and two pieces of forward information specified by the variable forward depth (variable G, value 6, access date / time 2011/10/24 14:16:59, access source function F12), (Variable G, value-1, access date and time 2011/10/24 14:17:11, access source function F13) is recorded as the variable transition history 48.
Similarly, for example, if the value of the variable D changes to 2, the update matches the variable transition history condition 51. In this case, information on variables that match the variable transition history condition 51, for example, (variable D, value +2, access date and time 2011/10/24 18:19:47, access source function F5) is stored. Among the histories, the history of the variable D of interest and one piece of information specified by the variable forward depth (variable D, value 3, access date / time 2011/10/24 18:19:36, access source function F3 ) Is recorded as the variable transition history 48.
With these records, it is possible to record information on changes in the variable of interest and which function has rewritten the variable.

  On the other hand, if it is determined that the condition does not match the variable transition history condition (step S2m; N), the process ends.

  By repeating the above operation, it is possible to save the transition of the access source function at the time of accessing the variable designated as the variable transition condition and the value before and after the change of the variable including the access date and time.

  Also, by updating the current value every time the value of the variable changes, it is possible to always keep the latest variable value.

  On the other hand, the scheduled data processing unit 34 executes the processing shown in FIG. 12 while the main power is turned on, and has reached the time interval specified by the scheduled history condition 52 stored in the control data 43? Whether or not it is a history time, the variable current value 46 of the designated variable value is read (step S3b) and stored in the function transition history 47 in the data management unit 40 via the monitoring data storage unit 33. (Step S3c).

  By repeating the above operation, it is possible to save data at a constant interval of the variable designated as the scheduled history condition.

  Thus, when a noticeable execution function that has been set in advance is changed, the data management unit 40 records a history of function changes before and after the change. When a change occurs, a history of changes in the variables leading to it is recorded and accumulated. Furthermore, a periodic history is accumulated.

On the other hand, the dynamic analysis tool 7 is appropriately operated by an operator, and reads and analyzes the history data accumulated in the data management unit 40.
That is, when the operator makes a request for reading various data from the input device 82 of the dynamic analysis tool 7, the control unit 83 sends a data transmission request to the dynamic analysis device via the communication control unit 84 and the communication interface 86. 6 to send.
In the dynamic analysis device 6, the communication control unit 60 receives a request from the dynamic analysis tool via the communication interface 70, and the monitoring data reading unit 62 reads various data stored in the monitoring data 42 of the data management unit 40. And respond to the dynamic analysis tool 7 via the communication interface 70.
When the dynamic analysis tool 7 receives the response via the communication interface 86, the communication control unit 84 stores the received data in the data management unit 85, and the control unit 83 acquires the data and displays it on the display device 81. .

  The control data 43 and the address map 42 in which various history conditions are stored are transmitted from the dynamic analysis tool 7 to the dynamic analysis device 6 and stored in the data management unit 40 by the communication control unit 60.

  Note that the control data 43 and the address map 42 may be shipped in a pre-written state instead of being transmitted by the dynamic analysis tool.

  As described in detail above, according to the dynamic analysis device and the dynamic analysis system according to the first embodiment, the processing of the CPU 3 is performed by maintaining a list of memory address values in which functions and variables are stored. A history of contents can be recorded, whereby it is possible to analyze the processing contents, for example, which processing function has changed which variable.

  Further, according to the dynamic analysis device and the dynamic analysis system according to the first embodiment, the data from the dynamic analysis device 6 to the address bus 11, the data bus 12, and the control signal line 13 used for the processing of the CPU 3 Is not output. For this reason, dynamic analysis can be performed without interfering with the processing of the CPU 3 at all.

  Further, according to the dynamic analysis apparatus and the dynamic analysis system according to the first embodiment, there is no need for a program change for performing dynamic analysis or a special connector for ICE connection. It is possible to perform failure analysis using the local control equipment as it is.

  In addition, according to the dynamic analysis device 6 and the dynamic analysis system 1 according to the first embodiment, it is not necessary to analyze a failure condition occurring in the field and construct a failure reproduction environment in a test room. It is possible to reduce the time required for solving the problem.

  Further, according to the dynamic analysis device and the dynamic analysis system according to the first embodiment, function transitions and variable transitions can be analyzed using a memory map automatically generated at the time of program compilation. There is no need to manually create an association file with values.

  In this embodiment, the read sequence corresponding to the memory to be used is implemented. However, the device code is read from the memory and automatically matched to the memory so that the memory can be changed. A bus determination process may be implemented.

  In this embodiment, the ROM 4 and RAM 5 are connected to the same address bus 11 and data bus 12, but this configuration is not necessarily required, and the RAM connected to the CPU 3 using a dedicated bus. May be used. In this case, the dynamic analysis device 6 is configured to monitor both the ROM bus and the RAM bus.

Embodiment 2. FIG.
In the above embodiment, the processing content to be monitored is a function, a variable, and its data. However, any processing content generated in the process can be monitored.
Hereinafter, as an example, a second embodiment for further managing tasks as processing contents will be described.

FIG. 13 shows the configuration of the dynamic analysis apparatus 6 according to Embodiment 2 of the present invention.
As shown in FIG. 13, the dynamic analysis device 6 according to this embodiment includes a task analysis unit 35 and a task transition history 53 in addition to the dynamic analysis device 6 of the first embodiment.

  Next, processing for analyzing an execution task in the task analysis unit 35 will be described with reference to FIGS. 14 and 15.

  FIG. 14 shows a task switching state. Even when a task with a low priority is being executed, if a task with a high priority is activated, the task with a low priority is stopped and a task with a high priority is executed. The dynamic analysis device 6 of the present embodiment can acquire a characteristic task switching history.

  FIG. 15 is a flowchart showing the processing of the task analysis unit 35. The task analysis unit 35 holds the activated task based on the bus data monitored by the bus data monitoring unit 20 while the power is on. (Step S4a).

  It is determined whether or not task switching has occurred (step S4b). If switching has occurred (step S4b; Yes), the task after switching is stored in the task transition history 53 together with the date and time (step S4c). If it is determined that task switching has not occurred (step S4b; No), the process returns to step S4b and the process is repeated.

  The task transition history 53 saved here can be read out by the dynamic analysis tool 7 as in the first embodiment, and the task switching timing as shown in FIG. 16 can be displayed.

Note that the task switching may be performed by detecting that the OS (operation system) task switching function has been executed, or by determining the switching when the function registered in the task is executed. Also good.
Alternatively, a task transition history condition may be set, and a task transition history may be taken only when a task transition that matches the condition occurs.

  As described above in detail, according to the dynamic analysis device and the dynamic analysis system according to the second embodiment, the task occupancy rate and execution timing can be easily maintained by maintaining the history of task switching transitions. Analysis becomes possible.

Embodiment 3 FIG.
As described above, the processing content to be analyzed is arbitrary. For example, the bus occupancy rate can be included in the processing content. A third embodiment in which the bus occupancy is one of the processing contents to be analyzed will be described below.

FIG. 17 shows the configuration of a dynamic analysis apparatus 6 according to Embodiment 3 of the present invention.
As shown in FIG. 17, the dynamic analysis apparatus 6 according to this embodiment includes a bus occupancy rate analysis unit 36 and a bus occupancy history 54 in addition to the dynamic analysis apparatus 6 of the first embodiment. .

  Next, processing when the bus occupancy analysis unit 36 analyzes the bus occupancy will be described with reference to FIGS. 18 and 19.

  FIG. 18 is a diagram showing the occupied state of the bus. When the CPU 3 starts accessing the memory (ROM 3, RAM 4), it outputs an address on the address bus 11, outputs a control signal (chip enable signal), and then outputs data on the data bus 12. When the access is completed, the control signal is released. The time from the output of the chip enable signal to the reset is the bus occupation time.

  FIG. 19 is a flowchart showing the processing of the bus occupancy rate analysis unit 36. While the power is on, the bus occupancy analysis unit 36 monitors the state of the control signal line and determines the start of access (step S5a).

  When the use of the bus is started, counting of the occupied time is started (step S5b). When the end of bus access is detected (step S5c), the counting of the bus occupied time is ended (step S5d), and the bus occupied history 54 is saved. (Step S5e).

  The task transition history 54 saved here can be read out by the dynamic analysis tool 7 and the bus occupancy rate per unit time can be displayed as in the first embodiment.

  As described above in detail, according to the dynamic analysis device and the dynamic analysis system according to the third embodiment, the bus occupancy rate per fixed time can be easily analyzed by maintaining the bus occupancy time. It becomes.

In addition, this invention is not limited by the said embodiment and drawing. It goes without saying that the embodiments and the drawings can be modified without changing the gist of the present invention.
For example, the processing contents to be monitored / analyzed are not limited to function changes, variable changes, task changes, and bus occupancy rates, and any device parameters can be monitored. Further, data collected together with these is not limited to the above example, and can be set as appropriate.
Also, what information is included in the function history and variable history can be appropriately applied and changed. For example, the execution time may be recorded in the function history, or information such as a memory area (address) accessed by the function, such as a variable processed by the function, may be added. Further, a rear depth may be set in the variable history, and it may be possible to analyze what variable has been processed after updating the variable that matches the variable history condition 51.
In the above embodiment, the dynamic analysis tool 7 is connected to the dynamic analysis device 6 to display data. For example, the dynamic analysis tool device 7 uses the data from the dynamic analysis device 6 to display data. May be received and analyzed.
The dynamic analysis device need not always be connected to the device to be monitored, and may be set as necessary. In this case, for example, connectors for connecting to these signal lines are connected in advance to the address bus 11, the data bus 12, and the control signal line 13, and when necessary, this connector and the receiving circuit 162 of the dynamic analyzer 6. The input side connector may be connected.
Although it is desirable to monitor all of the address bus 11, the data bus 12, and the control signal line 13, it is not always necessary to monitor all of them. Some buses or control signal lines may be monitored. The monitoring target is appropriately set according to the purpose of monitoring.
Although the example which monitors the operation | movement of the processor for control of the equipment 100 was shown, the equipment 100 is arbitrary. For example, the present invention can be widely applied to devices controlled by a computer and software, such as an air conditioner, a power control device, a thermal device, an elevator, a computer, a household electrical appliance, an automobile and a vehicle.
The above-described hardware configuration, flowchart, table configuration, and the like are examples, and can be arbitrarily changed.
In addition, a program for operating a computer capable of accessing the bus and control signal line of another device as the above-described dynamic analysis device is recorded and distributed on a medium or the like, and installed to operate the computer. It is also possible to function as a dynamic analysis device.

1 dynamic analysis system 2 equipment control device 3 CPU
4 ROM
5 RAM
6 Dynamic Analysis Device 11 Address Bus 12 Data Bus 13 Control Signal Line 14 Communication Line 20 Bus Data Monitoring Unit 21 Address Bus Monitoring Unit 22 Data Bus Monitoring Unit 23 Control Signal Monitoring Unit 30 Bus Data Analysis Unit 31 Execution Function Analysis Unit 32 Variables Data analysis unit 33 Monitoring data storage unit 34 Scheduled data processing unit 35 Task analysis unit 36 Bus occupancy rate analysis unit 40 Data management unit 41 Address map 42 Monitoring data 43 Control data 44 Function address range 45 Variable address value 46 Variable current value 47 Function Transition history 48 Variable transition history 49 Variable scheduled history 50 Function transition history condition 51 Variable transition history condition 52 Scheduled history condition 53 Task transition history 54 Bus occupancy history 60 Communication control unit 61 Address map storage unit 62 Monitoring data read unit 63 Control data storage Part 70 Communication interface 161 Processor 162 Reception circuit 163 Storage unit 164 Communication control device

Claims (12)

A bus data analysis unit that identifies the processing contents from the address value on the address bus and identifies the processing data from the data on the data bus;
A storage unit for storing history information including at least a part of a history of processing data and processing data analyzed by the bus data analysis unit;
In response to an external access, history information providing means for providing history information stored in the storage unit;
A dynamic analysis apparatus comprising: The bus data analysis unit specifies which variable is accessed from an address value output on an address bus for memory access, specifies a read access or a write access from a control signal on a control signal line, and Identify variable values from data values on the data bus,
The dynamic analysis apparatus according to claim 1. The bus data analysis unit specifies which function is executed from the address value output on the address bus.
The dynamic analysis apparatus according to claim 1. Receive signals on the address bus and data bus, do not output to these buses,
The dynamic analysis apparatus according to any one of claims 1 to 3, wherein: The bus data analysis unit
An execution function analyzer that analyzes the functions being executed in the program;
A function transition history storage unit that holds the transition of the executed function and stores a transition history of a certain number of functions including the function when a function that satisfies a predetermined function transition history condition is executed;
In response to access from an external device, the communication device further includes a communication unit that provides the external device with the transition history stored in the function transition history storage unit.
The dynamic analysis apparatus according to any one of claims 1 to 4, wherein The bus data analysis unit
A variable data analyzer that monitors variables used in the program;
A variable transition history storage unit that stores a variable transition history including the variable and the predetermined information when a variable that matches the predetermined variable transition history condition is accessed;
In response to access from the external device, the communication device further includes a communication unit that provides the external device with the variable transition history stored in the variable transition history storage unit.
The dynamic analysis apparatus according to any one of claims 1 to 5, wherein The bus data analysis unit
A scheduled data processing unit that reads the current values of variables used in the program,
A scheduled variable history storage unit that stores a history of variable values read by the scheduled data processing unit,
In response to access from the external device, the communication device further includes a communication unit that provides the external device with the history stored in the fixed variable history storage unit.
The dynamic analysis apparatus according to any one of claims 1 to 6, wherein: The bus data analysis unit
A task analysis unit that detects switching of tasks used in the program;
A task history storage unit that stores a task transition history based on switching of tasks detected by the task analysis unit;
In response to access from an external device, further comprising means for providing the history stored in the task history storage unit to the external device;
The dynamic analysis apparatus according to claim 1, wherein The bus data analysis unit
A bus occupancy analyzer for analyzing the occupancy of the bus;
A bus occupancy storage unit that stores a history of the bus occupancy analyzed by the bus occupancy analysis unit,
In response to an access from an external device, further comprising means for providing the external device with a history stored in the bus occupancy storage unit;
The dynamic analysis apparatus according to any one of claims 1 to 8, wherein A dynamic analysis device according to any one of claims 1 to 9,
An analysis tool for reading and processing the history held in the dynamic analysis device;
A dynamic analysis system comprising: Analyzing the address transmitted on the address bus to identify the processing contents,
Analyzing data transmitted on the data bus to identify processing data,
Find history information that includes at least part of the history of the identified process details and process data,
Provide the requested history information,
A dynamic analysis method characterized by that. On the computer,
Analyzing the address transmitted on the address bus to identify the processing contents,
Analyzing data transmitted on the data bus to identify processing data,
Find history information that includes at least part of the history of the identified process details and process data,
Provide the requested history information,
A program that performs an action.

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