JP2013074173A - Manufacturing method of semiconductor device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of obtaining a wiring having excellent conductivity by embedding a conductive material in a fine groove without any gaps, and a semiconductor device.SOLUTION: A liner layer 14 is formed so as to cover a barrier layer (barrier metal) 13. The liner layer 14 is made of Ni (nickel). The liner layer 14 improves wettability to a conductor 15 made of Cu (copper) formed inside the liner layer 14, and also improves smoothness inside a groove 12.

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device, and more particularly to a technique for forming fine wiring with high accuracy.

  Conventionally, aluminum or an aluminum alloy has been used as a fine wiring material such as a semiconductor element formed on a substrate. However, since aluminum has a low melting point and poor migration resistance, it has been difficult to cope with high integration and high speed of semiconductor elements.

  For this reason, in recent years, copper has been used as a wiring material. Copper has a higher melting point than aluminum and has a low electrical resistivity, so it is a promising LSI wiring material. However, when copper is used as a wiring material, there has been a problem that fine processing is difficult. For example, in Patent Document 1, a groove is formed in an insulating layer, copper is embedded in the groove, and then, excess copper protruding from the groove is removed, thereby forming a copper wiring in a fine groove. A method has been proposed.

Japanese Examined Patent Publication No. 6-103681

However, the invention described in Patent Document 1 has a problem that it is difficult to embed copper without a gap in the groove.
That is, when copper is laminated inside the groove by sputtering, copper is not deposited up to the inside of the fine groove, and copper is deposited only in the vicinity of the opening end of the groove while the inside of the groove is hollow.
In addition, when the inside of the groove is filled with molten copper by the reflow method, the barrier metal layer formed in advance on the inner wall surface of the groove is poor in wettability with the molten copper, resulting in a cavity inside the groove. There was a problem that copper solidified in the state.
Thus, when a cavity arises in the copper wiring formed in the inside of a groove | channel, the resistance value of a copper wiring will become high and there exists a possibility of a disconnection.

  SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a semiconductor device manufacturing method and a semiconductor device capable of obtaining a wiring having excellent conductivity by embedding a conductive material in a fine groove without gaps. provide.

In order to solve the above problems, the present invention provides the following method for manufacturing a semiconductor device and semiconductor device.
That is, the semiconductor device manufacturing method of the present invention includes a groove forming step for forming a groove in a substrate, a barrier layer forming step for forming a barrier layer covering at least the inner wall surface of the groove, and a liner layer covering the barrier layer. A liner layer forming step to be formed; and an embedding step of embedding a conductive material in an inner region of the liner layer,
The liner layer is made of Ni, and the conductive material is made of Cu.

The embedding step is a step of forming a seed layer made of the conductive material covering the liner layer and melting the seed layer by a reflow method.
The embedding step is a step of laminating the conductive material by a sputtering method so as to cover the liner layer.

The barrier layer is made of a material containing at least one of Ta, Ti, W, Ru, V, Co, and Nb.
Further, the substrate is characterized by comprising a semiconductor substrate and an insulating layer formed on one surface of the semiconductor substrate.

A semiconductor device of the present invention includes a groove formed in a base, a barrier layer that covers an inner wall surface of the groove, a liner layer that covers the barrier layer, and a conductor embedded in an inner region of the liner layer. At least,
The liner layer is made of Ni and the conductor is made of Cu.

According to the method for manufacturing a semiconductor device and the semiconductor device of the present invention, in the step of embedding the conductive material, the liner layer that covers the barrier layer is formed in advance, so that the conductive material and the liner layer in which the seed layer is melted are formed. The wettability is improved at the contact surface.
That is, a barrier layer mainly composed of a metal compound such as oxide or nitride is likely to have fine irregularities on the surface and has poor surface smoothness. And Cu which is a conductive material is poor in wettability and fluidity with respect to a barrier layer mainly composed of a compound.

  For this reason, by forming the liner layer made of Ni so as to cover the barrier layer as in the present invention, wettability and fluidity with respect to molten Cu are greatly improved. The Ni film is also excellent in surface smoothness. For this reason, even if the groove portion has a high aspect ratio, the molten Cu spreads uniformly to the corners of the groove portion without generating cavities therein, and a highly accurate conductor without a local disconnection portion can be obtained. .

It is a principal part expanded sectional view which shows an example of the semiconductor device of this invention. It is the principal part expanded sectional view which showed the manufacturing method of the semiconductor device of this invention in steps. It is the principal part expanded sectional view which showed the manufacturing method of the semiconductor device of this invention in steps. It is sectional drawing which shows the motor (vacuum motor) in 2nd embodiment of this invention. It is a principal part expanded sectional view which shows another example of the semiconductor device of this invention.

    A semiconductor device manufacturing method and a semiconductor device according to the present invention will be described below with reference to the drawings. Note that this embodiment is described by way of example in order to better understand the gist of the invention, and does not limit the present invention unless otherwise specified. In addition, in the drawings used in the following description, in order to make the features of the present invention easier to understand, there is a case where a main part is shown in an enlarged manner for convenience, and the dimensional ratio of each component is the same as the actual one. Not necessarily.

(Semiconductor device)
FIG. 1 is an enlarged sectional view of an essential part showing an example of a semiconductor device of the present invention.
The semiconductor device 10 includes a base body 11. The base 11 is composed of an insulating substrate such as a glass substrate or a resin substrate. For example, a semiconductor element or the like may be formed on a part of the base body 11.

  A groove portion (trench) 12 is formed on one surface 11 a of the base 11. The groove portion 12 is formed of, for example, a fine groove having a narrow width and a deep depth dug in the thickness direction of the base body 11 from the one surface 11a of the base body 11. The width W of the bottom of the groove 12 is formed to be, for example, about 20 nm to 50 nm. Further, the depth D of the groove 12 is formed to be, for example, about 80 nm to 200 nm. For example, a conductor constituting the circuit wiring of the semiconductor element is formed in the inner region of the groove 12.

In the groove portion 12, a barrier layer (barrier metal) 13 is formed so as to cover the inner wall surface 12a. The barrier layer 13 includes, for example, Ta (tantalum) nitride, Ta silicide, Ta carbide, Ti (titanium) nitride, Ti silicide, Ti carbide, W (tungsten) nitride, W silicide, W carbide, Ru (Ruthenium), Ru oxide, V (vanadium) oxide, Co (cobalt) oxide, Nb (niobium) oxide, and the like.
The barrier layer (barrier metal) 13 is formed so that the thickness t1 is, for example, about 1 nm to 3 nm.

Further, a liner layer 14 is formed so as to cover the barrier layer (barrier metal) 13. The liner layer 14 is made of Ni (nickel). The liner layer 14 improves the wettability with respect to the conductor 15 made of Cu (copper) formed inside the liner layer 14 and improves the smoothness inside the groove 12.
The liner layer 14 is formed so that the thickness t2 is, for example, about 0.5 nm to 3 nm.

  A conductor 15 made of a conductive material is formed in an inner region of the liner layer 14 in the groove 12. The conductor 15 is made of Cu (copper). The conductor 15 forms the seed layer 16 inside the liner layer 14 and melts (reflows) the seed layer 16 to form the conductor 15 filling the groove 12. Alternatively, the conductor 15 is formed by directly depositing a conductive material on the inner region of the liner layer 14 by a sputtering method. The conductor 15 is, for example, a circuit wiring of a semiconductor element formed on the base 11.

  According to the semiconductor device 10 having such a configuration, the liner layer 14 made of Ni is formed between the barrier layer (barrier metal) 13 and the conductor 15 made of Cu. The conductive material is embedded inside the groove 12 without a gap. Therefore, it is possible to realize the semiconductor device 10 including the conductor (circuit wiring) 15 made of Cu having uniform electric resistance and no fear of disconnection.

(Method for manufacturing semiconductor device)
FIG. 2 and FIG. 3 are enlarged cross-sectional views of the relevant part showing the manufacturing method of the semiconductor device of the present invention step by step.
When manufacturing the semiconductor device of the present invention, first, the base 11 is prepared (see FIG. 2A). As the base 11, an insulating substrate or a semiconductor substrate is used. Examples of the insulating substrate include a glass substrate and a resin substrate. Moreover, as a semiconductor substrate, a silicon wafer, a SiC wafer, etc. are mentioned, for example. For example, a semiconductor element (not shown) is formed on the base 11 in advance.

    Next, a groove portion 12 having a predetermined depth is formed on one surface 11a of the base 11 (see FIG. 2B: groove portion forming step). The groove portion 12 is formed, for example, so as to have a pattern that represents a circuit wiring of a semiconductor element. As a method for forming the groove 12 on the one surface 11a of the base 11, for example, etching by photolithography or processing by laser light can be used.

    Next, a barrier layer (barrier metal) 13 having a predetermined thickness is formed on one surface 11a of the substrate 11 including the inner wall surface 12a of the groove 12 (see FIG. 2C: barrier layer forming step). The barrier layer (barrier metal) 13 is formed using a material containing at least one of Ta, Ti, W, Ru, V, Co, and Nb, for example. For example, the barrier layer 13 is preferably formed by sputtering. The barrier layer (barrier metal) 13 is formed so that the thickness t1 is about 1 nm to 3 nm, for example.

FIG. 5 shows an example of a sputtering apparatus (film forming apparatus) used for forming the barrier layer.
A sputtering apparatus (film forming apparatus) 1 includes a vacuum chamber 2, and a substrate holder 7 and a target 5 that are respectively disposed inside the vacuum chamber 2.

A vacuum evacuation system 9 and a gas supply system 4 are connected to the vacuum chamber 2, and the inside of the vacuum chamber 2 is evacuated and sputtered from the gas supply system 4 while evacuating, and nitrogen or oxygen in the chemical structure. (For example, when the reaction gas is oxygen, the flow rate is 0.1 sccm or more and 5 sccm or less), and a film-forming atmosphere lower than atmospheric pressure (for example, the total pressure is 10 ⁻⁴ Pa or more and 10 or more) in the vacuum chamber 2. ⁻¹ Pa or less).

  Then, the substrate 11 is held by the substrate 11 in a state where the one surface 11 a side in which the groove portion 12 is formed on the base 11 is directed to the target 5. A sputtering power source 8 and a bias power source 6 are disposed outside the vacuum chamber 2, and the target 5 is connected to the sputtering power source 8 and the substrate holder 7 is connected to the bias power source 6.

The magnetic field forming means 3 is disposed outside the vacuum chamber 2, and when the negative voltage is applied to the target 5 while the vacuum chamber 2 is placed at the ground potential and the film forming atmosphere inside the vacuum chamber 2 is maintained, the target 5 is magnetron. Sputtered. The target 5 is mainly composed of the material for forming the barrier layer (barrier metal) 13 described above.
When the target 5 is magnetron sputtered, the material for forming the barrier layer 13 is released as sputtered particles.

  The released sputtered particles and the reactive gas are incident on one surface 11a where the groove portion 12 is formed on the substrate 11, and the barrier layer 13 is formed so as to cover the one surface 11a including the inner wall surface 12a of the groove portion 12.

  Next, the liner layer 14 is formed so as to cover the barrier layer 13 (see FIG. 3A: liner layer forming step). The liner layer 14 is made of Ni. The liner layer 14 is formed by a sputtering method or a CVD method in the same manner as the barrier layer 13 described above.

  For example, using the sputtering apparatus (film formation apparatus) 1 shown in FIG. 5, the liner 5 made of Ni is formed so as to cover the barrier layer 13 in the same manner as the formation of the barrier layer 13 described above, with the target 5 as Ni. Film. The liner layer 14 is formed so that the thickness t2 is, for example, about 0.5 nm to 3 nm.

  Next, the seed layer 16 is formed so as to cover the liner layer 14 (see FIG. 3B). The seed layer 16 is reflowed in the next step and becomes a conductive material embedded in the groove 12. The seed layer 16 is made of Cu. The seed layer 16 is formed to have a thickness of about 20 nm to 50 nm, for example.

  Next, the substrate 11 on which the seed layer 16 is formed is heated to a temperature equal to or higher than the melting temperature of the seed layer 16 to perform reflow (see FIG. 3C: embedding step). As a result, the seed layer 16 is melted and the inside of the groove 12, that is, the inner region of the liner layer 14 is filled with the conductive material M made of Cu.

  In the conductive material embedding step, by forming the liner layer 14 covering the barrier layer 13 in advance, the wettability is improved at the contact surface between the conductive material obtained by melting the seed layer 16 and the liner layer 14. That is, the barrier layer 13 mainly made of a metal compound such as oxide or nitride is likely to have fine irregularities on the surface and has poor surface smoothness. And Cu which is a conductive material is poor in wettability and fluidity with respect to the barrier layer 13 mainly composed of a compound.

  For this reason, even if Cu is directly melted so as to be in contact with the barrier layer 13, the melted Cu does not spread smoothly inside the groove, and a cavity is formed inside, or the Cu does not spread locally (disconnection portion). There was a risk of occurrence. In particular, in the case of a high aspect ratio groove having a depth D that is significantly larger than the width W, the low wettability and smoothness of the barrier layer 13 with respect to molten Cu forms a conductive portion having a uniform thickness and no voids. It becomes an obstacle when doing.

  On the other hand, by forming the liner layer 14 made of Ni so as to cover the barrier layer 13 as in the present invention, the wettability and fluidity with respect to the molten Cu are greatly improved. The Ni film is also excellent in surface smoothness. For this reason, even if it is the groove part 12 of a high aspect ratio, molten Cu spreads uniformly without producing a cavity inside every part of the groove part 12, and obtains a highly accurate conductor without a local disconnection part. Can do.

  In addition, the surface roughness (average roughness) of the liner layer 14 is about Ra = 0.5 to 1.5. By making such a surface roughness, it is possible to maintain good wettability and fluidity between the liner layer 14 made of Ni and the conductive material (Cu) in which the seed layer 16 is melted.

  Thereafter, the barrier layer 13, the liner layer 14 and the conductive material M laminated on the one surface 11a of the base 11 excluding the groove 12 are removed (see FIG. 3D). As a result, a conductor 15 that fills the groove 12, that is, a circuit wiring is formed for each groove 12.

The embedding process of embedding a conductive material inside the groove 12 is not limited to forming the seed layer 16 and melting the seed layer 16 by the reflow method as described above. Material can also be embedded.
When embedding a conductive material by sputtering, the target 5 is set to Cu using the sputtering apparatus (film forming apparatus) shown in FIG. 5, and a conductive material made of Cu is formed on the one surface 11 a side of the substrate 11 including the inner region of the liner layer 14. Deposit.

  Even when the conductive material is embedded by such a sputtering method, the adhesion and fluidity between the deposited Cu and the liner layer 14 are enhanced by the formation of the liner layer 14 made of Ni. Cu can be uniformly deposited without generating cavities.

FIG. 4 is an enlarged cross-sectional view of a main part showing another embodiment of the semiconductor device of the present invention.
The semiconductor device 20 includes a base 21 including, for example, a semiconductor substrate 22 on which semiconductor elements are formed, and a first insulating layer 23 and a second insulating layer 24 that are sequentially stacked on one surface 22 a of the semiconductor substrate 22. The first insulating layer 23 is made of, for example, SiO ₂ , and the second insulating layer 24 is made of, for example, SiN. A groove portion (trench) 25 extending from the second insulating layer 24 to the first insulating layer 23 of the base 24 is formed.

  A barrier layer (barrier metal) 26 is formed in the groove portion 25 so as to cover the inner wall surface 25a. The barrier layer 26 is made of, for example, a material containing at least one of Ta, Ti, W, Ru, V, Co, and Nb.

  Further, a liner layer 27 is formed so as to cover the barrier layer (barrier metal) 26. The liner layer 27 is made of Ni (nickel). The liner layer 27 enhances the wettability with respect to the conductor 28 made of Cu (copper) formed inside the liner layer 27 and enhances the smoothness inside the groove 25.

  A conductor 28 made of a conductive material is formed in an inner region of the liner layer 27 in the groove 25. The conductor 28 is made of Cu (copper). The conductor 28 forms a seed layer 29 inside the liner layer 27, and melts (reflows) the seed layer 29, thereby forming the conductor 28 filling the groove 25. Alternatively, the conductor 28 is formed by depositing a conductive material on the inner region of the liner layer 27 by sputtering.

  According to the semiconductor device 20 having such a configuration, the liner layer 27 made of Ni is formed between the barrier layer (barrier metal) 26 and the conductor 28 made of Cu. The conductive material is embedded inside the groove 25 without a gap. Therefore, it is possible to realize the semiconductor device 20 including the conductor (circuit wiring) 28 made of Cu having uniform electric resistance and no fear of disconnection.

DESCRIPTION OF SYMBOLS 10 Semiconductor device, 11 base | substrate, 12 groove part (trench), 13 barrier layer (barrier metal), 14 liner layer, 16 conductor (circuit wiring).

Claims (6)

A groove forming step of forming a groove in the substrate;
A barrier layer forming step of forming a barrier layer covering at least the inner wall surface of the groove;
A liner layer forming step of forming a liner layer covering the barrier layer;
Embedding a conductive material in the inner region of the liner layer,
The method for manufacturing a semiconductor device, wherein the liner layer is made of Ni and the conductive material is made of Cu.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the embedding step is a step of forming a seed layer made of the conductive material covering the liner layer and melting the seed layer by a reflow method.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the embedding step is a step of laminating the conductive material by a sputtering method so as to cover the liner layer.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the barrier layer is made of a material containing at least one of Ta, Ti, W, Ru, V, Co, and Nb. .   The method of manufacturing a semiconductor device according to claim 1, wherein the base includes a semiconductor substrate and an insulating layer formed on one surface of the semiconductor substrate. A groove formed in the substrate, a barrier layer covering the inner wall surface of the groove, a liner layer covering the barrier layer, and a conductor embedded in an inner region of the liner layer,
2. The semiconductor device according to claim 1, wherein the liner layer is made of Ni and the conductor is made of Cu.

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