JP2013069723A - Semiconductor laser element and optical transmitter module and optical transceiver incorporating the same - Google Patents

Semiconductor laser element and optical transmitter module and optical transceiver incorporating the same Download PDF

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JP2013069723A
JP2013069723A JP2011205171A JP2011205171A JP2013069723A JP 2013069723 A JP2013069723 A JP 2013069723A JP 2011205171 A JP2011205171 A JP 2011205171A JP 2011205171 A JP2011205171 A JP 2011205171A JP 2013069723 A JP2013069723 A JP 2013069723A
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semiconductor laser
laser device
ridge portion
electrode film
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JP5913878B2 (en
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Yuki Wakayama
雄貴 若山
Koji Nakahara
宏治 中原
Hiroaki Hayashi
宏暁 林
Masaru Mukaikubo
優 向久保
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Lumentum Japan Inc
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Oclaro Japan Inc
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Abstract

PROBLEM TO BE SOLVED: To provide a ridge waveguide type semiconductor laser element, including an InGaAlAs quantum well layer in its active layer, which improves reliability and restricts the appearance of saturable absorption characteristics at the same time.SOLUTION: The semiconductor laser element comprises: a semiconductor multilayer including an active layer which contains the InGaAlAs quantum well layer, an etching stop layer, and an upper mesa part disposed on the upper side of the etching stop layer; an insulation film formed on the upper surface of the semiconductor multilayer; and an electrode film which is formed so as to cover the semiconductor multilayer and the insulation film, as well as formed in contact with the top face of the upper mesa part. Two side faces of a ridge part each include an exposed region which has no electrode films formed therein and remains exposed. The exposed region on each of the two side faces of the ridge part goes from an end face on one side of the ridge part as far as to reach the inside from the tip at which the electrode film extends over the top face of the ridge part to the end face on the one side.

Description

本発明は、半導体レーザ素子に関し、特に、素子端面での活性層に生じる歪の抑制による素子の信頼性向上に関する。   The present invention relates to a semiconductor laser device, and more particularly to improvement in device reliability by suppressing strain generated in an active layer at an end surface of the device.

例えば、通信用の光送信モジュールに、光源としてInGaAsP量子井戸層を活性層に含む半導体レーザ素子が搭載されている。しかし、近年、かかる半導体レーザ素子に変わり、InGaAlAs量子井戸層を活性層に含む半導体レーザ素子の開発が進んでいる(非特許文献1)。InGaAlAs量子井戸層を活性層に含む半導体レーザ素子は、従来の半導体レーザ素子と比較し高温領域での特性に優れるため、半導体レーザ素子の温度を一定に保つための電子冷却素子を必要とせず、モジュールの小型化、低価格化、低消費電力化が実現できるためである。   For example, a semiconductor laser element including an InGaAsP quantum well layer as an active layer as a light source is mounted on a communication optical transmission module. However, in recent years, in place of such a semiconductor laser element, development of a semiconductor laser element including an InGaAlAs quantum well layer as an active layer has been advanced (Non-Patent Document 1). A semiconductor laser element including an InGaAlAs quantum well layer as an active layer is superior in characteristics in a high temperature region as compared with a conventional semiconductor laser element, and thus does not require an electronic cooling element for keeping the temperature of the semiconductor laser element constant. This is because the module can be reduced in size, price, and power consumption.

InGaAlAs量子井戸層を活性層に含む半導体レーザ素子は優れたレーザ特性を有するとともに推定寿命が10万時間を超える高い信頼性をも有することが、既に特許文献1などで報告されている。   It has already been reported in Patent Document 1 and the like that a semiconductor laser element including an InGaAlAs quantum well layer as an active layer has excellent laser characteristics and high reliability exceeding an estimated lifetime of 100,000 hours.

特開2003−258370号公報JP 2003-258370 A 特開2007−180522号公報JP 2007-180522 A 特開2010−129887号公報JP 2010-1229887 A 特開2010−114430号公報JP 2010-114430 A

IEEE Journal of Quantum Electronics,Vol.30,No.2,p511,(1994)IEEE Journal of Quantum Electronics, Vol. 30, no. 2, p511, (1994) Journal of Applied Physics,Vol.107,p083109,(2010)Journal of Applied Physics, Vol. 107, p083109, (2010)

高精細映像コンテンツの利用拡大などに伴いインターネットトラフィックが著しく増加している。このトラフィック増大に対応するための設備投資や運用コストを抑制するため、通信ネットワーク機器の小型化、低価格化、低消費電力化が強く要求されている。また同時に通信ネットワーク機器のさらなる高速化、大容量化も併せて要求されている。これらの要求を満たすために、半導体レーザ素子を従来の10Gbpsから2.5倍高速な25Gbpsで直接変調することが要求されている。将来はさらに高速な40Gbps以上で変調することも期待されている。より高速に半導体レーザを駆動させるためには、レーザ共振器内部の電流密度を増大させる必要性があるが、一般に、動作電流密度が高いほど半導体レーザの劣化速度が速い。動作電流密度を増大させても、劣化速度が抑制されるよう、素子に高い信頼性が確保されるのが望ましい。InGaAlAs量子井戸層を活性層に含む半導体レーザ素子に特有の劣化メカニズムを解明し、その劣化メカニズムに応じた対策を講じることにより、さらに高い信頼性を有する半導体レーザ素子が実現されることが望まれる。   Internet traffic has increased remarkably with the expansion of the use of high-definition video content. There is a strong demand for downsizing, lowering the price, and reducing power consumption of communication network devices in order to reduce capital investment and operation costs for dealing with this increase in traffic. At the same time, communication network devices are required to be further increased in speed and capacity. In order to satisfy these requirements, it is required to directly modulate the semiconductor laser device at 25 Gbps, which is 2.5 times faster than the conventional 10 Gbps. In the future, it is also expected to perform modulation at a higher speed of 40 Gbps or more. In order to drive the semiconductor laser at higher speed, it is necessary to increase the current density inside the laser resonator, but generally, the higher the operating current density, the faster the degradation rate of the semiconductor laser. Even if the operating current density is increased, it is desirable to ensure high reliability of the element so that the deterioration rate is suppressed. It is desired that a semiconductor laser device having higher reliability can be realized by elucidating a degradation mechanism peculiar to a semiconductor laser device including an InGaAlAs quantum well layer as an active layer and taking measures according to the degradation mechanism. .

例えば、非特許文献2に、InGaAlAs量子井戸層を活性層に含む半導体レーザ素子では反射端面付近にて劣化が起こることや、その劣化には端面保護膜の内部応力が関係していることが記載されている。また、特許文献1に、電極の内部応力が劣化に関係していることが記載されている。   For example, Non-Patent Document 2 describes that in a semiconductor laser element including an InGaAlAs quantum well layer as an active layer, deterioration occurs near the reflection end face, and the deterioration is related to internal stress of the end face protective film. Has been. Patent Document 1 describes that the internal stress of an electrode is related to deterioration.

活性層にInGaAlAs量子井戸層を含むリッジ導波路型半導体レーザ素子について考察する。最初に、素子がその上部にリッジ部を有しており、上面電極がリッジ部の上面と両側面全体を覆って広がる場合を考える。ここで、かかる上面電極は、光の出射側と反対側の劈開端面にまでそれぞれ及んでいる。この場合、上面電極の内部応力に起因して、端面近傍での活性層に歪がかかることとなり、素子の信頼性を低下させてしまう。   Consider a ridge waveguide type semiconductor laser device including an InGaAlAs quantum well layer in an active layer. First, consider a case where the element has a ridge portion on the top thereof, and the upper surface electrode extends over the entire upper surface and both side surfaces of the ridge portion. Here, the upper surface electrode extends to the cleaved end surface opposite to the light emitting side. In this case, due to the internal stress of the upper surface electrode, the active layer in the vicinity of the end surface is distorted, and the reliability of the element is lowered.

次に、かかる上面電極のうち劈開端面に隣接する領域が除去される場合を考える。この場合、端面近傍に電極が形成されないので、端面近傍に上面電極の内部応力は発生せず、端面近傍での活性層にかかる歪量を減少させることが出来、素子の信頼性を向上させることが可能となる。しかし、端面付近に電極が形成されないことにより、端面近傍の活性層には電流が注入されず、半導体レーザ素子の電流・光出力特性に、可飽和吸収特性が発現するという問題が生じ得る。これは、劈開工程における位置ずれにより、電極が形成されない領域が長くなるとより顕著に問題となる。すなわち、素子の信頼性向上と、可飽和吸収特性発現の抑制とは、相反してしまう。   Next, consider a case where a region adjacent to the cleavage end surface is removed from the upper surface electrode. In this case, since no electrode is formed in the vicinity of the end face, internal stress of the upper surface electrode does not occur in the vicinity of the end face, the amount of strain applied to the active layer in the vicinity of the end face can be reduced, and the reliability of the element is improved. Is possible. However, since no electrode is formed in the vicinity of the end face, no current is injected into the active layer near the end face, which may cause a problem that a saturable absorption characteristic appears in the current / light output characteristics of the semiconductor laser element. This becomes a more significant problem when the region where the electrode is not formed becomes long due to the positional shift in the cleavage step. That is, there is a contradiction between improving the reliability of the element and suppressing the saturable absorption characteristic.

特許文献1に、上面電極を2層構造とし、上層電極の端を端面より内側に設けることで、端面近傍での電極の内部応力に起因する端面近傍での活性層の歪量を抑制する半導体レーザ素子が記載されている。しかし、かかる素子においても、上面電極の端面近傍でのシート抵抗が非常に高くなってしまい、劈開工程における位置ずれにより、端面付近に電極が形成されない場合と同様に、均一な電流注入が阻害され、可飽和吸収特性が発現するという問題が生じ得る。さらに、上面電極の端面近傍でのシート抵抗上昇に伴い、端面近傍での発熱量が大きい、レーザ駆動電圧が上昇する、周波数応答特性が劣化する、といった問題も併せて生じ得る。   Patent Document 1 discloses a semiconductor in which the upper electrode has a two-layer structure, and the end of the upper layer electrode is provided on the inner side of the end surface, thereby suppressing the strain of the active layer near the end surface due to the internal stress of the electrode near the end surface. A laser element is described. However, even in such an element, the sheet resistance in the vicinity of the end face of the upper surface electrode becomes very high, and the displacement in the cleavage process hinders uniform current injection as in the case where the electrode is not formed in the vicinity of the end face. The problem that the saturable absorption characteristic is developed may arise. Further, along with an increase in sheet resistance near the end face of the upper surface electrode, there may be problems such as a large amount of heat generation near the end face, an increase in laser driving voltage, and a deterioration in frequency response characteristics.

発明者らは、上面電極の内部応力に起因して生じる、端面付近での活性層の歪量について調べ、リッジ上面に形成される電極部分より、リッジ側面に形成される電極部分の方が、活性層に発生する歪に影響を与えることを発見した。   The inventors investigated the amount of strain of the active layer near the end face caused by the internal stress of the upper surface electrode, and the electrode portion formed on the ridge side surface is more than the electrode portion formed on the ridge upper surface. It was found to affect the strain generated in the active layer.

本発明はこのような事情に鑑みてなされたものであり、本発明の目的は、信頼性向上と、可飽和吸収特性発現の抑制とをともに実現する、InGaAlAs量子井戸層を活性層に含むリッジ導波路型半導体レーザ素子、それを備える光送信モジュール及び光トランシーバを提供することにある。   The present invention has been made in view of such circumstances, and an object of the present invention is to provide a ridge that includes an InGaAlAs quantum well layer in an active layer, which achieves both improved reliability and suppression of saturable absorption characteristics. An object of the present invention is to provide a waveguide type semiconductor laser device, an optical transmission module including the same, and an optical transceiver.

なお、特許文献2、3及び4に、第1電極層と第2電極層からなる電極を備える半導体レーザ素子が開示されている。ここで、第1電極層はストライプ状のリッジ部上面に端面まで延びて形成されており、第2電極層は、端面から所定の間隔を隔てて、上記第1電極層上、リッジ部側面、及びリッジ部周辺平坦部上に形成されている。しかし、これら特許文献に記載の半導体レーザ素子は、いずれも、活性層に窒化物系半導体を含むものに限定されたものであり、かかる構成も、劈開時の電極のだれや電極のはがれなどを防止するためのものである。すなわち、これら特許文献に、電極の内部応力に関する記載はない。   Patent Documents 2, 3 and 4 disclose a semiconductor laser element including an electrode composed of a first electrode layer and a second electrode layer. Here, the first electrode layer is formed to extend to the end surface on the upper surface of the striped ridge portion, and the second electrode layer is formed on the first electrode layer, on the side surface of the ridge portion, with a predetermined distance from the end surface. And on the flat portion around the ridge portion. However, all of the semiconductor laser elements described in these patent documents are limited to those in which the active layer contains a nitride-based semiconductor, and this configuration also prevents electrode breakage or electrode peeling during cleavage. It is for preventing. That is, these patent documents do not describe the internal stress of the electrode.

(1)上記課題を解決するために、本発明に係る半導体レーザ素子は、InGaAlAs系材料からなる量子井戸層を含む活性層と、エッチング停止層と、前記活性層の光導波路領域に沿って延伸するとともに前記エッチング停止層の上側に配置される上部メサ部と、を備える半導体多層と、前記半導体多層の上表面に形成される絶縁膜と、前記半導体多層及び前記絶縁膜を覆うとともに前記上部メサ部の上面に接して形成される電極膜と、を備えるとともに、前記上部メサ部と、前記絶縁膜のうち前記上部メサ部に接して形成される部分とで、リッジ部となる、半導体レーザ素子であって、前記リッジ部の両側面それぞれは、前記電極膜が形成されずに露出している露出領域を有し、前記リッジ部の両側面それぞれの前記露出領域は、前記リッジ部の一方の端面から、前記電極膜が前記リッジ部上面を前記一方の端面へ延伸する先端より内側へ、及んでいる、ことを特徴とする。   (1) In order to solve the above problems, a semiconductor laser device according to the present invention extends along an active layer including a quantum well layer made of an InGaAlAs-based material, an etching stop layer, and an optical waveguide region of the active layer. And an upper mesa portion disposed above the etching stop layer, an insulating film formed on an upper surface of the semiconductor multilayer, and covering the semiconductor multilayer and the insulating film and the upper mesa And an electrode film formed in contact with the upper surface of the portion, and the upper mesa portion and a portion of the insulating film formed in contact with the upper mesa portion that forms a ridge portion Each side surface of the ridge portion has an exposed region that is exposed without forming the electrode film, and the exposed region on each side surface of the ridge portion is the From one end face of the Tsu di portion, the electrode film to the inside from the tip of stretching the top face of the ridge to the one end surface of which extends, it is characterized.

(2)上記(1)に記載の半導体レーザ素子であって、前記両側面それぞれの前記露出領域は、該側面下端から該側面上端に及ぶ部分を含んでいてもよい。   (2) In the semiconductor laser device according to (1), each of the exposed regions on both side surfaces may include a portion extending from the lower end of the side surface to the upper end of the side surface.

(3)上記(2)に記載の半導体レーザ素子であって、前記両側面それぞれの前記露出領域において、該側面下端から該側面上端に及ぶ部分は、前記一方の端面から5μm以上20μm以下の距離まで亘っていてもよい。   (3) In the semiconductor laser device according to (2), a portion extending from the lower end of the side surface to the upper end of the side surface is a distance of 5 μm or more and 20 μm or less from the one end surface in each exposed region of the both side surfaces. May be extended.

(4)上記(1)に記載の半導体レーザ素子であって、前記両側面それぞれの前記露出領域は、該側面下端から前記リッジ部高さの2/3以上まで及ぶ部分を含んでいてもよい。   (4) In the semiconductor laser device according to (1), each of the exposed regions on both side surfaces may include a portion extending from the lower end of the side surface to 2/3 or more of the height of the ridge portion. .

(5)上記(4)に記載の半導体レーザ素子であって、前記両側面それぞれの前記露出領域において、該側面下端から前記リッジ部高さの2/3以上まで及ぶ部分は、前記一方の端面から5μm以上20μm以下の距離に亘っていてもよい。   (5) In the semiconductor laser device according to (4), a portion extending from the lower end of the side surface to 2/3 or more of the height of the ridge portion in the exposed region of each of the both side surfaces is the one end surface. From 5 μm to 20 μm.

(6)上記(1)乃至(5)のいずれかに記載の半導体レーザ素子であって、前記電極膜は、前記リッジ部の前記上面から前記両側面それぞれに広がるとともに前記両側面それぞれを前記一方の端面へ延伸し、前記露出領域に及んでいてもよい。   (6) In the semiconductor laser device according to any one of (1) to (5), the electrode film extends from the upper surface of the ridge portion to each of the both side surfaces, and each of the both side surfaces is the one side. It may be extended to the end face and may extend to the exposed area.

(7)上記(6)に記載の半導体レーザ素子であって、前記電極膜は引張応力を有していてもよい。   (7) In the semiconductor laser element according to (6), the electrode film may have a tensile stress.

(8)上記(1)乃至(5)のいずれかに記載の半導体レーザ素子であって、前記リッジ部の両側面が少なくとも前記露出領域を除いて有機絶縁層によって埋め込まれ、前記有機絶縁層は前記露出領域に及んでいてもよい。   (8) In the semiconductor laser device according to any one of (1) to (5), both side surfaces of the ridge portion are embedded with an organic insulating layer except at least the exposed region, and the organic insulating layer is It may extend to the exposed area.

(9)上記(8)に記載の半導体レーザ素子であって、前記有機絶縁層は引張応力を有していてもよい。   (9) In the semiconductor laser element according to (8), the organic insulating layer may have a tensile stress.

(10)上記(6)又は(7)に記載の半導体レーザ素子であって、前記リッジ部の両側面が少なくとも前記露出領域を除いて有機絶縁層によって埋め込まれ、前記電極膜は前記有機絶縁層を覆って広がっていてもよい。   (10) In the semiconductor laser device according to (6) or (7), both side surfaces of the ridge portion are filled with an organic insulating layer except at least the exposed region, and the electrode film is the organic insulating layer You may spread over.

(11)上記(1)乃至(10)のいずれかに記載の半導体レーザ素子であって、前記電極膜が前記リッジ部上面を前記一方の端面へ延伸する先端の両側それぞれに、前記リッジ部上面は、前記電極膜が形成されずに露出している上面露出領域を有し、前記先端の両側の前記上面露出領域は、前記リッジ部の両側面の前記露出領域に、それぞれ及んでおり、前記先端の両側の前記上面露出領域それぞれは、前記一方の端面へ進むのに伴い幅が広がる部分を有してもよい。   (11) The semiconductor laser device according to any one of (1) to (10), wherein the electrode film has an upper surface on the ridge portion on each side of a tip end of the upper surface of the ridge portion extending to the one end surface. Has an upper surface exposed region that is exposed without forming the electrode film, and the upper surface exposed region on both sides of the tip extends to the exposed region on both side surfaces of the ridge portion, respectively. Each of the upper surface exposed regions on both sides of the front end may have a portion that increases in width as it proceeds to the one end surface.

(12)上記(1)乃至(11)のいずれかに記載の半導体レーザ素子であって、前記電極膜の前記リッジ部上面を前記一方の端面へ延伸する先端は前記一方の端面まで及んでいてもよい。   (12) In the semiconductor laser device according to any one of (1) to (11), a tip of the electrode film that extends the top surface of the ridge portion to the one end surface extends to the one end surface. Also good.

(13)上記(1)乃至(12)のいずれかに記載の半導体レーザ素子であって、前記リッジ部は、前記一方の端面へ延伸して幅が徐々に広くなる部分を有していてもよい。   (13) In the semiconductor laser device according to any one of (1) to (12), the ridge portion may have a portion that extends toward the one end surface and gradually increases in width. Good.

(14)上記(1)乃至(13)のいずれかに記載の半導体レーザ素子であって、前記リッジ部の両側面それぞれは、前記電極膜が形成されずに露出している他の露出領域をさらに有し、前記リッジ部の両側面それぞれの前記他の露出領域は、前記リッジ部の両端のうち他方の端面から、前記電極膜が前記リッジ部上面を前記他方の端面へ延伸する先端より内側へ、及んでいてもよい。   (14) In the semiconductor laser device according to any one of (1) to (13), each of both side surfaces of the ridge portion may have other exposed regions that are exposed without forming the electrode film. Further, the other exposed regions on both side surfaces of the ridge portion are located on the inner side from the other end surface of the both ends of the ridge portion from the tip where the electrode film extends from the upper surface of the ridge portion to the other end surface. You may extend.

(15)本発明に係る光送信モジュールは、上記(1)乃至(14)のいずれかに記載の半導体レーザ素子を備えていてもよい。   (15) An optical transmission module according to the present invention may include the semiconductor laser device according to any one of (1) to (14).

(16)本発明に係る光トランシーバは、上記(15)に記載の光送信モジュールを備えていてもよい。   (16) An optical transceiver according to the present invention may include the optical transmission module according to (15).

本発明により、信頼性向上と、可飽和吸収特性発現の抑制とをともに実現する、InGaAlAs量子井戸層を活性層に含むリッジ導波路型半導体レーザ素子、それを備える光送信モジュール及び光トランシーバが提供される。   The present invention provides a ridge waveguide type semiconductor laser device including an InGaAlAs quantum well layer as an active layer, and an optical transmission module and an optical transceiver including the same, which realize both improvement in reliability and suppression of saturable absorption characteristics. Is done.

本発明の第1の実施形態に係る半導体レーザ素子の模式的外観斜視図である。1 is a schematic external perspective view of a semiconductor laser device according to a first embodiment of the present invention. 本発明の第1の実施形態に係る半導体レーザ素子の他の例を示す平面図である。It is a top view which shows the other example of the semiconductor laser element concerning the 1st Embodiment of this invention. 本発明の第1の実施形態に係る半導体レーザ素子の他の例を示す模式的外観斜視図である。It is a typical external appearance perspective view which shows the other example of the semiconductor laser element concerning the 1st Embodiment of this invention. 本発明の第1の実施形態に係る半導体レーザ素子の実装法を示す模式的外観斜視図である。It is a typical external appearance perspective view which shows the mounting method of the semiconductor laser element which concerns on the 1st Embodiment of this invention. 本発明の第1の実施形態に係る半導体レーザ素子の活性層に発生する歪分布の計算結果を示す図である。It is a figure which shows the calculation result of the strain distribution which generate | occur | produces in the active layer of the semiconductor laser element concerning the 1st Embodiment of this invention. 本発明の第1の実施形態に係る半導体レーザ素子の他の例を示す模式的外観斜視図である。It is a typical external appearance perspective view which shows the other example of the semiconductor laser element concerning the 1st Embodiment of this invention. 本発明の第2の実施形態に係る半導体レーザ素子の模式的外観斜視図である。It is a typical external appearance perspective view of the semiconductor laser element concerning the 2nd Embodiment of this invention. 本発明の第3の実施形態に係る半導体レーザ素子の模式的外観斜視図である。It is a typical external appearance perspective view of the semiconductor laser element concerning the 3rd Embodiment of this invention. 本発明の第4の実施形態に係る半導体レーザ素子の模式的外観斜視図である。It is a typical external appearance perspective view of the semiconductor laser element concerning the 4th Embodiment of this invention.

本発明の実施形態に係る半導体レーザ素子について、以下に、詳細な説明をする。ここで、実施形態に係る半導体レーザ素子はファブリペローレーザとするが、これに限定されることはなく、DFBレーザ(Distributed-Feedback Laser)やDBRレーザ(Distributed Bragg Reflector Laser)などであってもよい。なお、以下に示す図は、あくまで、各実施形態の実施例を説明するものであって、図の大きさと本実施例記載の縮尺は必ずしも一致するものではない。また、同一の構成要素には同一の符号を付け、それらの説明については繰り返さない。   The semiconductor laser device according to the embodiment of the present invention will be described in detail below. Here, the semiconductor laser device according to the embodiment is a Fabry-Perot laser, but is not limited thereto, and may be a DFB laser (Distributed-Feedback Laser), a DBR laser (Distributed Bragg Reflector Laser), or the like. . In addition, the figure shown below demonstrates the Example of each embodiment to the last, Comprising: The magnitude | size of a figure and the reduced scale as described in a present Example do not necessarily correspond. Moreover, the same code | symbol is attached | subjected to the same component and those description is not repeated.

[第1の実施形態]
図1は、本発明の第1の実施形態に係る半導体レーザ素子17の模式的外観斜視図である。当該実施形態に係る半導体レーザ素子17は、InGaAlAs系材料からなる量子井戸層を活性層3に含むリッジ導波路型のファブリペローレーザであり、1.3μm帯又は1.5μm帯の光を出射する。
[First Embodiment]
FIG. 1 is a schematic external perspective view of the semiconductor laser device 17 according to the first embodiment of the present invention. The semiconductor laser device 17 according to this embodiment is a ridge waveguide Fabry-Perot laser including a quantum well layer made of an InGaAlAs-based material in an active layer 3 and emits light in the 1.3 μm band or 1.5 μm band. .

図1に示す通り、n型InP基板1上に、n型InGaAlAs光ガイド層2、活性層3、p型InGaAlAs光ガイド層4、p型InAlAs第1クラッド層5、p型InGaAlAsエッチング停止層6、p型InP第2クラッド層7、及びp型InGaAsコンタクト層8からなる半導体多層が形成されている。p型InGaAlAsエッチング停止層6の上側に配置されるp型InP第2クラッド層7とp型InGaAsコンタクト層8は、活性層3の光導波路領域の上方となる領域の両側が除去されており、上部メサ部となっている。すなわち、上部メサ部は、活性層3の光導波路領域に沿って延伸しており、図1に示す通り、上部メサ部の延伸方向(長手方向)は、図中の手前から奥へ延伸する方向である。   As shown in FIG. 1, an n-type InGaAlAs light guide layer 2, an active layer 3, a p-type InGaAlAs light guide layer 4, a p-type InAlAs first cladding layer 5, and a p-type InGaAlAs etching stop layer 6 on an n-type InP substrate 1. A semiconductor multilayer composed of the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 is formed. The p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 disposed on the upper side of the p-type InGaAlAs etching stop layer 6 have both sides of the region above the optical waveguide region of the active layer 3 removed. It is the upper mesa part. That is, the upper mesa portion extends along the optical waveguide region of the active layer 3, and as shown in FIG. 1, the extending direction (longitudinal direction) of the upper mesa portion is a direction extending from the front to the back in the drawing. It is.

半導体多層の上表面の所定の領域に絶縁膜10が形成される。ここで、所定の領域とは、上部メサ部の両側面にある領域と、p型InGaAlAsエッチング停止層6の上面のうち上部メサ部が形成されていない領域である。すなわち、絶縁膜10は、上部メサ部の上面の領域を除いて、半導体多層の上表面全体に形成されている。さらに、理想的に言えば、上部メサ部の最上層に位置するp型InGaAsコンタクト層8の表面(上面と側面)の領域を除いて、半導体多層の上表面全体に形成されている。しかし、これに限定されることはなく、上部メサ部の両側にそれぞれ広がる絶縁膜10が上部メサ部の上面(p型InGaAsコンタクト層8の上面)の一部に及んでいてもよいし、逆に、絶縁膜10が上部メサ部の両側面の上端(上面との境界)にまで及ばず、両側面の上端を含む両側面の一部の領域に絶縁膜10が形成されていなくてもよい。この場合であっても、絶縁膜10は、上部メサ部の両側面において少なくとも上部メサ部高さの2/3の高さまでは及んでいるのが望ましい。なお、半導体多層の上部メサ部と、絶縁膜10のうち上部メサ部に接して形成される部分とを併せて、半導体レーザ素子17のリッジ部9となる。   An insulating film 10 is formed in a predetermined region on the upper surface of the semiconductor multilayer. Here, the predetermined region is a region on both sides of the upper mesa portion and a region where the upper mesa portion is not formed on the upper surface of the p-type InGaAlAs etching stop layer 6. That is, the insulating film 10 is formed on the entire upper surface of the semiconductor multilayer except for the region on the upper surface of the upper mesa portion. Furthermore, ideally speaking, it is formed on the entire upper surface of the semiconductor multilayer except for the region of the surface (upper surface and side surface) of the p-type InGaAs contact layer 8 located at the uppermost layer of the upper mesa portion. However, the present invention is not limited to this, and the insulating film 10 that spreads on both sides of the upper mesa portion may reach a part of the upper surface of the upper mesa portion (the upper surface of the p-type InGaAs contact layer 8). In addition, the insulating film 10 does not reach the upper ends (boundaries with the upper surface) of both side surfaces of the upper mesa portion, and the insulating film 10 may not be formed in a partial region of both side surfaces including the upper ends of both side surfaces. . Even in this case, it is desirable that the insulating film 10 reaches at least 2/3 of the height of the upper mesa portion on both side surfaces of the upper mesa portion. The semiconductor upper multilayer mesa portion and the portion of the insulating film 10 formed in contact with the upper mesa portion are combined to form the ridge portion 9 of the semiconductor laser element 17.

基板の上面にp型電極膜11(上面電極:p側電極)が、基板の下面にn型電極膜12(下面電極:n側電極)が、それぞれ形成されている。p型電極膜11は、半導体多層及び絶縁膜10を覆っており、さらに、上部メサ部の上面に接して形成されている。すなわち、上部メサ部のうち絶縁膜10が形成されていない領域(上記所定の領域以外の領域)で、p型電極膜11と上部メサ部は接しており、電気的に接続されている。   A p-type electrode film 11 (upper surface electrode: p-side electrode) is formed on the upper surface of the substrate, and an n-type electrode film 12 (lower surface electrode: n-side electrode) is formed on the lower surface of the substrate. The p-type electrode film 11 covers the semiconductor multilayer and the insulating film 10 and is formed in contact with the upper surface of the upper mesa portion. That is, the p-type electrode film 11 and the upper mesa portion are in contact with each other and electrically connected in a region where the insulating film 10 is not formed in the upper mesa portion (region other than the predetermined region).

リッジ部9(上部メサ部)の長手方向の両端に、1対の端面が設けられる。ここで、1対の端面とは反射端面13,14であり、劈開工程によって形成される劈開面である。反射端面13は高反射率膜(図示せず)により、反射端面14は低反射率膜(図示せず)により、それぞれ被覆されている。すなわち、半導体レーザ素子17の光の出射側の端面は反射端面14である。   A pair of end faces are provided at both ends of the ridge portion 9 (upper mesa portion) in the longitudinal direction. Here, the pair of end surfaces are the reflection end surfaces 13 and 14, which are cleavage surfaces formed by a cleavage process. The reflective end face 13 is covered with a high reflectance film (not shown), and the reflective end face 14 is covered with a low reflectance film (not shown). That is, the end face on the light emission side of the semiconductor laser element 17 is the reflection end face 14.

当該実施形態の主な特徴は、p型電極膜11の形状にある。p型電極膜11(上面電極)のうち、リッジ部9の上面に形成される部分をリッジ上面部、リッジ部9の側面に形成される部分をリッジ側面部、リッジ部9の両側からさらに広がる部分を他表面部とする。   The main feature of this embodiment is the shape of the p-type electrode film 11. Of the p-type electrode film 11 (upper surface electrode), a portion formed on the upper surface of the ridge portion 9 is a ridge upper surface portion, a portion formed on the side surface of the ridge portion 9 is further spread from both sides of the ridge portion 9. Let the part be the other surface part.

図1に示す通り、p型電極膜11のリッジ上面部は、反射端面13(一方の端面)に及んでいる。すなわち、リッジ部9の上面全体には、p型電極膜11のリッジ上面部が形成されている。これに対して、リッジ部9の両側面にはそれぞれ、反射端面13から所定の長さにはp型電極膜11が形成されず絶縁膜10が露出している露出領域がある。すなわち、p型電極膜11のリッジ側面部は、反射端面14(他方の端面)から、反射端面13から内側へ所定の長さとなる位置(露出領域の外縁)まで及んで形成されている。また、p型電極膜11の他表面部は、リッジ側面部と同様に、反射端面14から、反射端面13から内側へ所定の長さとなる位置まで及んで形成されている。すなわち、p型電極膜11は、リッジ部9の両側面の下端からさらに外側に広がっている。   As shown in FIG. 1, the ridge upper surface portion of the p-type electrode film 11 extends to the reflection end surface 13 (one end surface). That is, the ridge upper surface portion of the p-type electrode film 11 is formed on the entire upper surface of the ridge portion 9. On the other hand, on both side surfaces of the ridge portion 9, there are exposed regions where the p-type electrode film 11 is not formed and the insulating film 10 is exposed at a predetermined length from the reflection end surface 13. That is, the ridge side surface portion of the p-type electrode film 11 is formed to extend from the reflection end surface 14 (the other end surface) to a position having a predetermined length inward from the reflection end surface 13 (outer edge of the exposed region). Further, the other surface portion of the p-type electrode film 11 is formed from the reflective end surface 14 to the position having a predetermined length inward from the reflective end surface 13, similarly to the ridge side surface portion. That is, the p-type electrode film 11 extends further outward from the lower ends of both side surfaces of the ridge portion 9.

ここで、リッジ部9の両側面の露出領域は、反射端面13から上記所定の長さに至るすべてにおいて、側面の下端より側面の上面に及んでいるのが好ましいが、露出領域が側面の下端から側面の上端に及んでいる部分を含んでいてもよい。少なくとも側面の下端からリッジ部9高さの2/3以上まで及ぶ部分を含んでいればよい。   Here, it is preferable that the exposed regions on both side surfaces of the ridge portion 9 extend from the lower end of the side surface to the upper surface of the side surface in all of the predetermined length from the reflection end surface 13, but the exposed region is the lower end of the side surface. It may include a portion extending from to the upper end of the side surface. It suffices to include at least a portion extending from the lower end of the side surface to 2/3 or more of the height of the ridge portion 9.

露出領域の上記所定の長さを長くすると、端面付近での活性層に生じる歪が低減されるが、上面電極の端面付近の部分の抵抗値が上昇してしまうので、上記所定の長さはこの両者のトレードオフを考慮して適宜決定すればよい。具体的には、露出領域において、側面の下端からリッジ部9高さの2/3以上の高さまで及ぶ部分が、端面から、5μm以上20μm以下の長さに亘っていることが好ましい。   Increasing the predetermined length of the exposed region reduces the strain generated in the active layer near the end face, but the resistance value of the portion near the end face of the top electrode increases, so the predetermined length is What is necessary is just to determine suitably considering the trade-off of both. Specifically, in the exposed region, it is preferable that a portion extending from the lower end of the side surface to a height of 2/3 or more of the height of the ridge portion 9 extends from the end surface to a length of 5 μm or more and 20 μm or less.

当該実施形態に係る半導体レーザ素子17は、反射端面13近傍の上面電極の内部応力に起因して反射端面13付近の活性層3に生じる歪が抑制され、素子の信頼性が向上している。また、上面電極(p型電極膜11)のリッジ上面部が反射端面13まで及んでいるので、反射端面13付近の活性層3へも安定的に電流が注入されるために、可飽和吸収特性発現が抑制されており、実質的には可飽和吸収が起こらない。   In the semiconductor laser device 17 according to this embodiment, distortion generated in the active layer 3 near the reflection end surface 13 due to internal stress of the upper surface electrode near the reflection end surface 13 is suppressed, and the reliability of the device is improved. Further, since the upper surface of the ridge of the upper surface electrode (p-type electrode film 11) extends to the reflection end surface 13, current is stably injected into the active layer 3 in the vicinity of the reflection end surface 13, so that the saturable absorption characteristic. Expression is suppressed, and substantially no saturable absorption occurs.

なお、上面電極(p型電極膜11)のリッジ上面部の先端が反射端面13まで及んでいるのが好ましいが、作製プロセスにおける誤差などにより、リッジ上面部の先端が反射端面13まで及んでいない場合もあり得る。その場合であっても、リッジ部9の露出領域が、上面電極のリッジ上面部の先端より内側まで及んでいれば、本発明の効果を得ることが出来る。   It is preferable that the tip of the ridge upper surface portion of the upper surface electrode (p-type electrode film 11) extends to the reflective end surface 13, but the tip of the ridge upper surface portion does not reach the reflective end surface 13 due to an error in the manufacturing process. There may be cases. Even in this case, the effect of the present invention can be obtained if the exposed region of the ridge portion 9 extends from the tip of the ridge upper surface portion of the upper surface electrode to the inside.

当該実施形態に係る半導体レーザ素子は、素子の信頼性の向上と、可飽和吸収特性発現の抑制とが、ともに実現出来ており、光通信用高速直接変調レーザに好適である。   The semiconductor laser device according to the embodiment can achieve both improvement of device reliability and suppression of saturable absorption characteristics, and is suitable for a high-speed direct modulation laser for optical communication.

次に、当該実施形態に係る半導体レーザ素子17の製造方法を、以下に説明する。n型InP基板1上に、有機金属気相成長法などを用いて、n型InGaAlAs光ガイド層2、InGaAlAs量子井戸層を含む活性層3、p型InGaAlAs光ガイド層4、p型InAlAs第1クラッド層5、p型InGaAlAsエッチング停止層6、p型InP第2クラッド層7、p型InGaAsコンタクト層8を順に積層し、半導体多層を形成する(半導体多層形成工程)。例えば、これら半導体層の厚さはそれぞれ、100nm、100nm、20nm、50nm、20nm、1500nm、200nm程度である。また、活性層3を所望の波長の光を放出させることが可能なものとする。   Next, a method for manufacturing the semiconductor laser device 17 according to this embodiment will be described below. An n-type InGaAlAs light guide layer 2, an active layer 3 including an InGaAlAs quantum well layer, a p-type InGaAlAs light guide layer 4, a p-type InAlAs first film are formed on the n-type InP substrate 1 using metal organic vapor phase epitaxy or the like. The clad layer 5, the p-type InGaAlAs etching stop layer 6, the p-type InP second clad layer 7, and the p-type InGaAs contact layer 8 are laminated in this order to form a semiconductor multilayer (semiconductor multilayer formation step). For example, the thicknesses of these semiconductor layers are about 100 nm, 100 nm, 20 nm, 50 nm, 20 nm, 1500 nm, and 200 nm, respectively. The active layer 3 can emit light having a desired wavelength.

なお、上述の通り、半導体レーザ素子はDFBレーザなどであってもよい。この場合、InGaAsP回折格子層を、例えば、p型InGaAlAsエッチング停止層6とp型InP第2クラッド層7の間に挿入する。p型InGaAsP回折格子層をp型InGaAlAsエッチング停止層6上部に積層した後、p型InGaAsP回折格子層上にレジストを塗布し、リソグラフィー法により回折格子パターンを形成し、エッチング法により回折格子パターンを半導体積層体表面上に転写し、次に回折格子が形成された半導体積層体上に、有機金属気相成長法などを用いて、p型InP第2クラッド層7、p型InGaAsコンタクト層8を再成長すればよい。   As described above, the semiconductor laser element may be a DFB laser or the like. In this case, the InGaAsP diffraction grating layer is inserted, for example, between the p-type InGaAlAs etching stop layer 6 and the p-type InP second cladding layer 7. After the p-type InGaAsP diffraction grating layer is laminated on the p-type InGaAlAs etching stop layer 6, a resist is applied on the p-type InGaAsP diffraction grating layer, a diffraction grating pattern is formed by the lithography method, and the diffraction grating pattern is formed by the etching method. The p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are transferred onto the surface of the semiconductor multilayer body, and then, using a metal organic vapor phase epitaxy method or the like, on the semiconductor multilayer body on which the diffraction grating is formed. Re-grow up.

次に、p型InP第2クラッド層7、p型InGaAsコンタクト層8がストライプ状の上部メサ部となるようにフォトリソグラフィー法とエッチング法により加工する(上部メサ形成工程)。上部メサ部の幅は1.0μmから1.5μm程度とする。   Next, the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are processed by a photolithography method and an etching method so as to form a striped upper mesa portion (upper mesa forming step). The width of the upper mesa portion is about 1.0 μm to 1.5 μm.

上部メサ部を形成した後、熱CVD(Chemical Vapor Deposition)法などによって、半導体多層の上表面全体に、厚さ500nm程度の絶縁膜10を形成する。次に、フォトリソグラフィー法とエッチング法などによってp型InGaAsコンタクト層8の表面に形成される絶縁膜を除去することにより、半導体多層の上表面の所定の領域に絶縁膜10が形成される(絶縁膜形成工程)。なお、図1に示す通り、p型InGaAsコンタクト層8の表面に形成される絶縁膜をすべて除去することが好ましいが、p型InGaAsコンタクト層8の表面上に形成された少なくとも一部の絶縁膜を除去すればよい。その場合であっても、活性層3の光導波路領域への一様な電流注入を確保するために、p型InGaAsコンタクト層8の表面のうち絶縁膜が形成されない領域(コンタクト領域)は、反射端面13から反射端面14へ亘っているのが望ましい。また、上部メサ部の両側面のうちp型InP第2クラッド層7の表面(側面)はすべて絶縁膜で覆われていることが好ましいが、少なくとも上部メサ部の側面の下端から上部メサ部高さの2/3の高さに至る領域が絶縁膜で覆われていればよい。絶縁膜10は、SiO(酸化シリコン)膜、SiN(窒化シリコン)膜、Al(酸化アルミニウム)膜などによって形成されればよい。 After forming the upper mesa portion, the insulating film 10 having a thickness of about 500 nm is formed on the entire upper surface of the semiconductor multilayer by a thermal CVD (Chemical Vapor Deposition) method or the like. Next, by removing the insulating film formed on the surface of the p-type InGaAs contact layer 8 by photolithography and etching, an insulating film 10 is formed in a predetermined region on the upper surface of the semiconductor multilayer (insulating). Film formation step). As shown in FIG. 1, it is preferable to remove all of the insulating film formed on the surface of the p-type InGaAs contact layer 8, but at least a part of the insulating film formed on the surface of the p-type InGaAs contact layer 8. Can be removed. Even in that case, in order to ensure uniform current injection into the optical waveguide region of the active layer 3, a region (contact region) where no insulating film is formed on the surface of the p-type InGaAs contact layer 8 is reflected. It is desirable to extend from the end face 13 to the reflective end face 14. Further, it is preferable that the surface (side surface) of the p-type InP second clad layer 7 among both side surfaces of the upper mesa portion is covered with an insulating film, but at least from the lower end of the side surface of the upper mesa portion to the upper mesa portion height It is only necessary that the region reaching the height of 2/3 is covered with the insulating film. The insulating film 10 may be formed of a SiO 2 (silicon oxide) film, a SiN (silicon nitride) film, an Al 2 O 3 (aluminum oxide) film, or the like.

絶縁膜形成工程の後、基板表面全体にレジストを塗布し、さらにリソグラフィー法を用いて、塗布されたレジストの一部を除去し、基板表面の所定の領域にレジスト膜を残存させる(レジスト形成工程)。ここで、所定の領域とは、図1に示す半導体レーザ素子17において、絶縁膜10の表面が露出している領域であり、具体的には、リッジ部9の両側面と、該側面の外側にそれぞれ広がる平坦面とに、反射端面13から所定の長さに及ぶ領域である。すなわち、リソグラフィー法を用いてレジストを除去する領域とは、素子表面全体の反射端面13の内側へ所定の長さとなる位置から反射端面14に及ぶ領域と、リッジ部9の上面で反射端面13から所定の長さに及ぶ領域と、を合わせた領域である。ここで、所定の長さとは、5μm以上20μm以下とするのが好ましい。そして、上記レジスト膜がパターニングされた基板表面上に、p型電極膜11を蒸着法などによって形成する(金属膜蒸着工程)。p型電極膜11は、Ti(チタン)、Pt(白金)、Au(金)が順に積層される積層膜や、Ti(チタン)、Mo(モリブデン)、Ti(チタン)、Au(金)が順に積層される積層膜などであればよい。積層膜の各膜の厚さは、例えば、前者の場合、それぞれ、25nm、25nm、500nm程度、後者の場合、それぞれ、25nm、80nm、40nm、300nm程度が望ましい。p型電極膜11の蒸着の後、アセトンなどの有機溶剤を用いて、レジスト膜、及びレジスト膜上に形成された電極膜を除去する(上面電極形成工程)。   After the insulating film forming step, a resist is applied to the entire surface of the substrate, and further, a part of the applied resist is removed using a lithography method to leave the resist film in a predetermined region on the substrate surface (resist forming step). ). Here, the predetermined region is a region where the surface of the insulating film 10 is exposed in the semiconductor laser device 17 shown in FIG. 1. Specifically, both the side surfaces of the ridge portion 9 and the outer sides of the side surfaces are exposed. These are regions extending from the reflection end surface 13 to a predetermined length on a flat surface extending respectively. That is, the region where the resist is removed using the lithography method is a region extending from the position having a predetermined length to the inside of the reflection end surface 13 on the entire element surface to the reflection end surface 14, and the upper surface of the ridge portion 9 from the reflection end surface 13. It is a region obtained by combining a region extending over a predetermined length. Here, the predetermined length is preferably 5 μm or more and 20 μm or less. Then, the p-type electrode film 11 is formed on the substrate surface patterned with the resist film by a vapor deposition method or the like (metal film vapor deposition step). The p-type electrode film 11 includes a laminated film in which Ti (titanium), Pt (platinum), and Au (gold) are sequentially laminated, and Ti (titanium), Mo (molybdenum), Ti (titanium), and Au (gold). What is necessary is just a laminated film etc. laminated | stacked in order. The thicknesses of the laminated films are preferably about 25 nm, 25 nm, and 500 nm, respectively, in the former case, and about 25 nm, 80 nm, 40 nm, and 300 nm, respectively, in the latter case. After the deposition of the p-type electrode film 11, the resist film and the electrode film formed on the resist film are removed using an organic solvent such as acetone (upper surface electrode forming step).

次に、n型InP基板1の下面を研磨して100μmから150μm程度まで薄くした後、n型電極膜12を蒸着法、及び熱処理などによって形成する(下面電極形成工程)。これによってウエハ工程が完了する。n型電極膜12は、Au(金)−Ge(ゲルマニウム)、Ni(ニッケル)、Ti(チタン)、Pt(白金)、Au(金)が順に積層される積層膜などであればよい。積層膜の各膜の厚さは、例えば、それぞれ、60nm、10nm、100nm、100nm、300nm程度が望ましい。   Next, after the lower surface of the n-type InP substrate 1 is polished and thinned to about 100 μm to 150 μm, the n-type electrode film 12 is formed by vapor deposition or heat treatment (lower surface electrode forming step). This completes the wafer process. The n-type electrode film 12 may be a laminated film in which Au (gold) -Ge (germanium), Ni (nickel), Ti (titanium), Pt (platinum), and Au (gold) are sequentially laminated. The thickness of each film of the laminated film is preferably about 60 nm, 10 nm, 100 nm, 100 nm, and 300 nm, for example.

半導体基板(ウエハ)を劈開により、1対の端面(反射端面13,14)を形成する。反射端面13、14との間の距離は100μmから200μm程度が望ましい。劈開により形成された反射端面13,14を端面保護と反射率の調整用に被膜する。反射端面13に反射率が80%以上の高反射率膜を、反射端面14に反射率が1%以下の低反射率膜を形成する。これら膜は、Al(酸化アルミニウム)膜、SiO(酸化シリコン)膜、a−Si(アモルファスシリコン)膜などである。なお、これら膜は多層膜であってもよい。さらに、各素子に劈開して、半導体レーザ素子17が作製される。以上、半導体レーザ素子の製造方法について説明した。 A pair of end surfaces (reflection end surfaces 13 and 14) are formed by cleaving the semiconductor substrate (wafer). The distance between the reflection end faces 13 and 14 is preferably about 100 μm to 200 μm. The reflective end faces 13, 14 formed by cleavage are coated for end face protection and reflectance adjustment. A high reflectance film having a reflectance of 80% or more is formed on the reflection end face 13, and a low reflectance film having a reflectance of 1% or less is formed on the reflection end face 14. These films are Al 2 O 3 (aluminum oxide) film, SiO 2 (silicon oxide) film, a-Si (amorphous silicon) film, and the like. These films may be multilayer films. Further, the semiconductor laser device 17 is produced by cleaving each device. The method for manufacturing the semiconductor laser element has been described above.

当該実施形態に係る製造方法では、1度のレジスト形成工程及び1度の金属膜蒸着工程という簡便なプロセスで、p型電極膜11が形成出来ている。さらに、1度の金属膜蒸着工程でp型電極膜11が形成されていることにより、p型電極膜11のリッジ上面部の電気抵抗の上昇を抑制することが出来ている。   In the manufacturing method according to the embodiment, the p-type electrode film 11 can be formed by a simple process of one resist forming step and one metal film deposition step. Furthermore, since the p-type electrode film 11 is formed in one metal film deposition step, an increase in electrical resistance of the ridge upper surface portion of the p-type electrode film 11 can be suppressed.

図2は、当該実施形態に係る半導体レーザ素子の他の例を示す平面図である。図1に示す半導体レーザ素子17では、p型電極膜11(上面電極)のリッジ上面部は、リッジ部9の上面全体に亘って形成されており、p型電極膜11のリッジ上面部の短手方向の幅は、長手方向に対して一定である。これに対して、図2に示す半導体レーザ素子では、p型電極膜11のリッジ上面部は、リッジ部9の両端面中央から反射端面13へ長手方向に等しい幅で延伸し、さらに、長手方向に延伸するのに伴ってリッジ上面部の短手方向の幅が狭くなり、先端に至っている。言い換えると、リッジ部9の両側面のみならず、リッジ部9上面は、p型電極膜11のリッジ上面部の両側にそれぞれ、p型電極膜11が形成されずに露出している上面露出領域を有しており、リッジ部9上面の上面露出領域は、リッジ部9側面の露出領域に及んでいる。そして、上面露出領域は、p型電極膜11のリッジ上面部が短手方向の幅が狭くなっているのに伴い、内側から反射端面13へ進むのに伴い幅が広くなっている。リッジ部9上面の一方の端面側において、幅が広くなる部分を少なくとも有していればよい。なお、上面露出領域は、電極膜が形成されていないので、絶縁膜10で覆われているのが望ましい。   FIG. 2 is a plan view showing another example of the semiconductor laser device according to the embodiment. In the semiconductor laser device 17 shown in FIG. 1, the ridge upper surface portion of the p-type electrode film 11 (upper surface electrode) is formed over the entire upper surface of the ridge portion 9, and is shorter than the ridge upper surface portion of the p-type electrode film 11. The width in the hand direction is constant with respect to the longitudinal direction. On the other hand, in the semiconductor laser device shown in FIG. 2, the ridge upper surface portion of the p-type electrode film 11 extends from the center of both end surfaces of the ridge portion 9 to the reflection end surface 13 with the same width in the longitudinal direction. The width in the short direction of the upper surface of the ridge becomes narrower as it extends, and reaches the tip. In other words, not only the both side surfaces of the ridge portion 9 but also the upper surface of the ridge portion 9 is exposed on the both sides of the ridge upper surface portion of the p-type electrode film 11 without the p-type electrode film 11 being formed. The upper surface exposed region on the upper surface of the ridge portion 9 extends to the exposed region on the side surface of the ridge portion 9. The upper surface exposed region becomes wider as the width of the upper surface of the ridge of the p-type electrode film 11 is reduced in the short direction, and the width from the inner side to the reflecting end surface 13 is increased. It is only necessary to have at least a portion with a wide width on one end face side of the upper surface of the ridge portion 9. In addition, since the electrode film is not formed in the upper surface exposed region, it is desirable that the upper surface exposed region is covered with the insulating film 10.

上面電極がかかる形状をしていることにより、反射端面13近傍の上面電極の内部応力に起因して反射端面13付近の活性層3に生じる歪がより抑制され、素子の信頼性がより向上している。さらに、上面電極がリッジ上面を反射端面13付近にまで及んでいることにより、可飽和吸収特性発現が抑制されている。反射端面13におけるp型電極膜11のリッジ上面部の幅は、端面付近での活性層の歪量の低減と、上面電極の端面付近の部分の抵抗値が上昇とのトレードオフを考慮して適宜決定すればよい。具体的には、p型電極膜11のリッジ上面部の先端の幅が1μm以上とすることが好ましい。   Since the upper surface electrode has such a shape, distortion generated in the active layer 3 near the reflective end surface 13 due to internal stress of the upper surface electrode near the reflective end surface 13 is further suppressed, and the reliability of the element is further improved. ing. Furthermore, since the upper surface electrode extends the ridge upper surface to the vicinity of the reflection end surface 13, the expression of the saturable absorption characteristic is suppressed. The width of the top surface of the ridge of the p-type electrode film 11 on the reflective end surface 13 takes into account the trade-off between a reduction in the amount of strain in the active layer near the end surface and an increase in the resistance value near the end surface of the top electrode. What is necessary is just to determine suitably. Specifically, the width of the tip of the ridge upper surface portion of the p-type electrode film 11 is preferably 1 μm or more.

図3は、当該実施形態に係る半導体レーザ素子の他の例を示す模式的外観斜視図である。図1に示す半導体レーザ素子の半導体多層の上表面は、上部メサ部の両側が平面的に広がっているが、本発明の説明を明瞭化するために、リッジ部9の両側の構成については省略している。これに対して、図3は、リッジ部9の両側の構成を示したものであり、図3
に示す通り、半導体レーザ素子の半導体多層の上部メサ部の側面から一定の距離以上隔てた領域のp型InP第2クラッド層7及びp型InGaAsコンタクト層8は除去されずに残存しているのが好ましい。絶縁膜10は、図1に示す半導体レーザ素子と同様に、上部メサ部の上面(理想的にはp型InGaAsコンタクト層8表面)を除いて、半導体多層の上表面全体に形成されている。さらに、p型電極膜11は、リッジ部9の両側からさらに広がって形成されており、p型電極膜11の他表面部は、リッジ部9の両側面の外側へそれぞれ広がり、p型InP第2クラッド層7及びp型InGaAsコンタクト層8が残存しているこの領域の上方にまで及んでいる。さらに、p型電極膜11は、この領域に絶縁膜10を介して配置される配線用のボンディングパッド部15と電極引き出し線路部16とを有している。配線が接続されるボンディングパッド部15と、p型電極膜11のリッジ上面部は、電極引き出し線路部16などを介して電気的に接続される。
FIG. 3 is a schematic external perspective view showing another example of the semiconductor laser device according to the embodiment. Although the upper surface of the semiconductor multilayer of the semiconductor laser device shown in FIG. 1 has two sides of the upper mesa portion extending in a plane, the configurations on both sides of the ridge portion 9 are omitted for clarity of the description of the present invention. doing. On the other hand, FIG. 3 shows the configuration of both sides of the ridge portion 9, and FIG.
As shown in FIG. 2, the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 in a region separated from the side surface of the upper mesa portion of the semiconductor multilayer of the semiconductor laser element by a certain distance or more remain without being removed. Is preferred. The insulating film 10 is formed on the entire upper surface of the semiconductor multilayer except for the upper surface of the upper mesa portion (ideally the surface of the p-type InGaAs contact layer 8), as in the semiconductor laser device shown in FIG. Further, the p-type electrode film 11 is formed so as to further spread from both sides of the ridge portion 9, and the other surface portion of the p-type electrode film 11 extends to the outside of both side surfaces of the ridge portion 9. The two cladding layers 7 and the p-type InGaAs contact layer 8 extend over this remaining region. Further, the p-type electrode film 11 has a bonding pad portion 15 for wiring and an electrode lead-out line portion 16 disposed in this region via the insulating film 10. The bonding pad portion 15 to which the wiring is connected and the ridge upper surface portion of the p-type electrode film 11 are electrically connected via the electrode lead-out line portion 16 and the like.

図4は、当該実施形態に係る半導体レーザ素子17の実装法を示す模式的外観斜視図である。図4には、図1に示す半導体レーザ素子17をサブマウント18にジャンクションアップ法で取り付けている状態が示されている。半導体レーザ素子17とサブマウント18はAu(金)−Sn(スズ)などのハンダ材により接続する。   FIG. 4 is a schematic external perspective view showing a mounting method of the semiconductor laser device 17 according to the embodiment. FIG. 4 shows a state where the semiconductor laser element 17 shown in FIG. 1 is attached to the submount 18 by the junction-up method. The semiconductor laser element 17 and the submount 18 are connected by a solder material such as Au (gold) -Sn (tin).

本発明の実施形態に係る半導体レーザ素子の動作は従来と同様である。すなわち、p側電極に正バイアス、n側電極に負バイアスをそれぞれ加えると、電流が光導波路に集中して流れる。そして活性層の光導波路領域に電子と正孔が注入され、両者の再結合により発光が生じる。さらに、電流を増加していくとある電流値以上でレーザ発振に至る。   The operation of the semiconductor laser device according to the embodiment of the present invention is the same as the conventional one. That is, when a positive bias is applied to the p-side electrode and a negative bias is applied to the n-side electrode, current flows in a concentrated manner in the optical waveguide. Then, electrons and holes are injected into the optical waveguide region of the active layer, and light emission occurs due to recombination of both. Further, when the current is increased, laser oscillation occurs at a certain current value or more.

図5は、当該実施形態に係る半導体レーザ素子の活性層に発生する歪分布の計算結果を示す図である。図5には、リッジ部の側面下端(ネック部とも呼ばれている)の直下に位置する活性層の歪分布を3次元有限要素法により計算した結果が示されている。ここで、当該実施形態に係る半導体レーザ素子として、当該計算に用いる半導体レーザ素子は、端面付近において、p型電極膜(上面電極)のリッジ上面部は端面に及んで形成されているとともに、端面から所定の長さに至るまでリッジ部の両側面及び外側に広がる平坦面にp型電極膜は形成されておらず(側面電極なし)、図1に示す半導体レーザ素子17に対応している。当該実施形態に係る半導体レーザ素子の活性層の歪εの各成分が、「側面電極なし」として太線で示されている。併せて、比較例に係る半導体レーザ素子の計算結果も示されている。ここで、比較例に係る半導体レーザ素子とは、p型電極膜(上面電極)のリッジ側面部が形成されている半導体レーザ素子であり、活性層の歪量εの各成分が、「側面電極あり」として細線で示されている。   FIG. 5 is a diagram showing a calculation result of a strain distribution generated in the active layer of the semiconductor laser device according to the embodiment. FIG. 5 shows the result of calculating the strain distribution of the active layer located immediately below the lower end of the side surface of the ridge portion (also called the neck portion) by the three-dimensional finite element method. Here, as the semiconductor laser element according to the embodiment, the semiconductor laser element used for the calculation has the ridge upper surface portion of the p-type electrode film (upper surface electrode) extending to the end face in the vicinity of the end face, and the end face. The p-type electrode film is not formed on the both sides of the ridge portion and the flat surface extending outward from the ridge portion to a predetermined length (no side electrode), and corresponds to the semiconductor laser device 17 shown in FIG. Each component of the strain ε of the active layer of the semiconductor laser device according to this embodiment is indicated by a thick line as “no side electrode”. In addition, the calculation result of the semiconductor laser device according to the comparative example is also shown. Here, the semiconductor laser device according to the comparative example is a semiconductor laser device in which the ridge side surface portion of the p-type electrode film (upper surface electrode) is formed, and each component of the strain amount ε of the active layer is expressed as “side electrode” It is shown as a thin line as “Yes”.

ここで、解析で用いる材料定数は、n型InP基板1、n型InGaAlAs光ガイド層2、InGaAlAs量子井戸層を含む活性層3、p型InGaAlAs光ガイド層4、p型InAlAs第1クラッド層5、p型InGaAlAsエッチング停止層6、p型InP第2クラッド層7、p型InGaAsコンタクト層8について、InPの材料定数(ヤング率、ポアソン比、線熱膨張係数)の値を用いたが、InPの材料定数を用いたとしても、解析結果の一般性は失われない。また、絶縁膜はSiO膜、上面電極の電極膜はAuとし、絶縁膜と電極膜が引張応力の初期応力を有する場合について解析した。引張応力とした理由は、熱CVD法と蒸着法によってそれぞれ絶縁膜と電極膜を形成した場合、これら膜は引張応力を有しているためである。 Here, the material constants used in the analysis are the n-type InP substrate 1, the n-type InGaAlAs light guide layer 2, the active layer 3 including the InGaAlAs quantum well layer, the p-type InGaAlAs light guide layer 4, and the p-type InAlAs first cladding layer 5. For the p-type InGaAlAs etching stop layer 6, the p-type InP second cladding layer 7, and the p-type InGaAs contact layer 8, the values of InP material constants (Young's modulus, Poisson's ratio, linear thermal expansion coefficient) were used. Even if the material constants are used, the generality of the analysis results is not lost. In addition, the case where the insulating film is an SiO 2 film, the electrode film of the upper electrode is Au, and the insulating film and the electrode film have an initial stress of a tensile stress was analyzed. The reason for the tensile stress is that when an insulating film and an electrode film are formed by thermal CVD and vapor deposition, these films have tensile stress.

図5の横軸は反射端面からの距離L(μm)を、縦軸は歪ε(%)を、それぞれ示している。歪εの3つの歪成分(ε,ε,ε)のうち、εはリッジ部の長手方向への歪成分、εはリッジ部短手方向への歪成分、εは半導体多層膜の成膜方向への歪成分である。ここで、歪が正であることは引張歪であることを示す。 The horizontal axis in FIG. 5 indicates the distance L (μm) from the reflection end surface, and the vertical axis indicates the strain ε (%). Of the three strain components (ε x , ε y , ε z ) of the strain ε, ε x is a strain component in the longitudinal direction of the ridge portion, ε y is a strain component in the short direction of the ridge portion, and ε z is a semiconductor This is a strain component in the film forming direction of the multilayer film. Here, a positive strain indicates a tensile strain.

図5に示す通り、反射端面から3μm以上の距離にある領域において、x,y,zすべての方向に対し、当該実施形態に係る半導体レーザ素子の活性層に生じる歪の方が、比較例に係る半導体レーザ素子の活性層に生じる歪よりも非常に小さい。これは、比較例に係る半導体レーザ素子における反射端面付近での活性層に生じる歪は、主にリッジ部側面に形成された電極膜の内部応力に起因していることを示している。このことは、比較例に係る半導体レーザ素子における歪分布の計算結果を詳しく解析することからも理解できる。比較例に係る半導体レーザ素子においては、反射端面から3μm以上の距離にある領域において、x,z方向へ圧縮歪、y方向へ引張歪が加えられている。リッジ部上面に形成される絶縁膜、及び電極膜は、x,y方向に引張応力を有しているため、作用反作用の関係から活性層中へは、x,y方向に圧縮歪を、z方向に引張歪を誘起し、一方リッジ部の側面に形成された絶縁膜、及び電極膜は、x,z方向に引張応力を有しているため活性層中へ、x,z方向に圧縮歪を、y方向へは引張歪を誘起することを考慮すると、比較例に係る半導体レーザ素子においては活性層中の歪は主にリッジ側に形成された絶縁膜、及び電極膜の内部応力に起因するものであることが分かる。   As shown in FIG. 5, in the region at a distance of 3 μm or more from the reflection end face, the distortion generated in the active layer of the semiconductor laser device according to the present embodiment in all the x, y, and z directions is a comparative example. It is much smaller than the strain generated in the active layer of the semiconductor laser device. This indicates that the strain generated in the active layer in the vicinity of the reflection end face in the semiconductor laser device according to the comparative example is mainly caused by the internal stress of the electrode film formed on the side surface of the ridge portion. This can be understood from a detailed analysis of the calculation result of the strain distribution in the semiconductor laser device according to the comparative example. In the semiconductor laser device according to the comparative example, compressive strain is applied in the x and z directions and tensile strain is applied in the y direction in a region at a distance of 3 μm or more from the reflection end face. Since the insulating film and the electrode film formed on the upper surface of the ridge portion have tensile stress in the x and y directions, the compressive strain is applied in the x and y directions and z in the active layer due to the action and reaction. Tensile strain is induced in the direction, while the insulating film and electrode film formed on the side surface of the ridge portion have tensile stress in the x and z directions, and therefore compressive strain in the x and z directions into the active layer. Considering that tensile strain is induced in the y direction, in the semiconductor laser device according to the comparative example, the strain in the active layer is mainly caused by the internal stress of the insulating film and electrode film formed on the ridge side. You can see that

図5に示す通り、反射端面におけるy方向への歪は、本発明の形態における半導体レーザ素子に対する活性層中の歪の方が、比較例に係る半導体レーザ素子に対する歪よりも大きい。しかし引張方向への歪であって、活性層の中に配置されている量子井戸層のバンドギャップを広げ、反射端面付近における光吸収を減少させ、端面での光学損傷を起こりづらくさせる効果がある歪であるため、当該実施形態に係る半導体レーザ素子の活性層に生じる歪の方が大きいことはむしろ好ましい。   As shown in FIG. 5, the distortion in the y direction on the reflection end face is larger in the active layer than that in the semiconductor laser device according to the comparative example. However, it is a strain in the tensile direction, which has the effect of widening the band gap of the quantum well layer disposed in the active layer, reducing light absorption near the reflective end face, and making optical damage at the end face difficult to occur. Since it is strain, it is rather preferable that the strain generated in the active layer of the semiconductor laser device according to the embodiment is larger.

図5には、当該実施形態に係る半導体レーザ素子に対する歪分布として、リッジ部側面の全ての領域に電極が形成されていない構成に対する歪分布の計算結果を示したが、リッジ部側面において、少なくともリッジ部側面の下端からリッジ部高さの2/3に及ぶ領域に電極膜が形成されていなければ、比較例の半導体レーザ素子における歪よりも歪が十分小さいことを確認した。   FIG. 5 shows the calculation result of the strain distribution for the configuration in which no electrode is formed in all regions on the side surface of the ridge as the strain distribution on the semiconductor laser device according to the embodiment. If no electrode film was formed in the region extending from the lower end of the side surface of the ridge portion to 2/3 of the height of the ridge portion, it was confirmed that the strain was sufficiently smaller than the strain in the semiconductor laser device of the comparative example.

当該実施形態に係る半導体レーザ素子17では、リッジ部9の両側面に形成される露出領域が、一方の端面に設けられている。一方の端面にのみ露出領域を設けるとすれば、図1に示す通り、反射端面13側に設けるのが好ましいが、これに限定されることはなく、光の出射側の端面である反射端面14側に露出領域が設けられていてもよい。さらに、1対の端面の両方に、露出領域が設けられていてもよい。   In the semiconductor laser device 17 according to this embodiment, exposed regions formed on both side surfaces of the ridge portion 9 are provided on one end surface. If the exposed region is provided only on one end face, it is preferably provided on the reflecting end face 13 side as shown in FIG. 1, but the present invention is not limited to this, and the reflecting end face 14 that is the end face on the light exit side is not limited thereto. An exposed region may be provided on the side. Further, an exposed region may be provided on both of the pair of end faces.

図6は、当該実施形態に係る半導体レーザ素子の他の例を示す模式的外観斜視図である。図6に示す半導体レーザ素子のp型電極膜11の反射端面13,14両側の形状がともに、図1に示す半導体レーザ素子のp型電極膜11の反射端面13側の形状となっている。すなわち、一方の端面において、リッジ部の両側面それぞれに形成される露出領域に加えて、他方の端面において、リッジ部の両側面にそれぞれに、電極膜が形成されず露出している他の露出領域が設けられている。他の露出領域も、露出領域と同様に、p型電極膜11のリッジ上面部の他方の端面側の先端より内側へ及んでいるとよい。1対の端面に共に、リッジ部の両側面に露出領域が形成されることにより、1対の端面付近それぞれの活性層3に生じる歪を抑制することが出来、本発明の効果はさらに高まる。なお、図6に示すp型電極膜11のリッジ上面部の先端が反射端面13まで及んでおらず、p型InGaAsコンタクト層8の上面と側面が一部露出している。これは、上述した通り、作製プロセスにおける誤差などにより、上面電極のリッジ上面部の先端が反射端面まで及んでいない場合を示している。以下に示す図7、図8、及び図9においても同様である。   FIG. 6 is a schematic external perspective view showing another example of the semiconductor laser device according to the embodiment. The shapes on both sides of the reflection end faces 13 and 14 of the p-type electrode film 11 of the semiconductor laser element shown in FIG. 6 are the shapes on the reflection end face 13 side of the p-type electrode film 11 of the semiconductor laser element shown in FIG. That is, in addition to the exposed regions formed on both side surfaces of the ridge portion on one end surface, the other exposed surfaces of the other end surface that are exposed without electrode films formed on both side surfaces of the ridge portion. An area is provided. Similarly to the exposed region, the other exposed region may extend inward from the tip on the other end surface side of the ridge upper surface portion of the p-type electrode film 11. Since the exposed regions are formed on both side surfaces of the ridge portion together with the pair of end surfaces, the strain generated in each active layer 3 near the pair of end surfaces can be suppressed, and the effect of the present invention is further enhanced. Note that the tip of the top surface of the ridge of the p-type electrode film 11 shown in FIG. 6 does not reach the reflection end surface 13, and the top surface and side surfaces of the p-type InGaAs contact layer 8 are partially exposed. This indicates a case where the tip of the ridge upper surface portion of the upper surface electrode does not reach the reflection end surface due to an error in the manufacturing process as described above. The same applies to FIGS. 7, 8, and 9 shown below.

[第2の実施形態]
本発明の第2の実施形態に係る半導体レーザ素子20は、上面電極の構造が異なる点を除き、第1の実施形態に係る半導体レーザ素子17と同様の構成をしている。第2の実施形態の説明図において、第1の実施形態の説明図における同一の構成要素には同一の符号を付す。
[Second Embodiment]
The semiconductor laser device 20 according to the second embodiment of the present invention has the same configuration as the semiconductor laser device 17 according to the first embodiment except that the structure of the upper surface electrode is different. In the explanatory diagram of the second embodiment, the same components in the explanatory diagram of the first embodiment are denoted by the same reference numerals.

図7は、本発明の第2の実施形態に係る半導体レーザ素子20の模式的外観斜視図である。当該実施形態に係る半導体レーザ素子20の上面電極は、p型第1電極膜21及びp型第2電極膜22で構成されている。p型第1電極膜21は、反射端面14から反射端面13へ亘って、リッジ部9の上面全体に形成されている。p型第2電極膜22は、リッジ部9の上面、リッジ部9の両側面、さらに、リッジ部9の両側面の外側へさらに広がって形成されているが、反射端面13から所定の長さまでの領域にはp型第2電極膜22は形成されていない。   FIG. 7 is a schematic external perspective view of a semiconductor laser device 20 according to the second embodiment of the present invention. The upper surface electrode of the semiconductor laser device 20 according to this embodiment includes a p-type first electrode film 21 and a p-type second electrode film 22. The p-type first electrode film 21 is formed on the entire upper surface of the ridge portion 9 from the reflection end face 14 to the reflection end face 13. The p-type second electrode film 22 is formed so as to extend further to the upper surface of the ridge portion 9, both side surfaces of the ridge portion 9, and further to the outside of both side surfaces of the ridge portion 9, but from the reflection end surface 13 to a predetermined length. The p-type second electrode film 22 is not formed in this region.

図7に示す通り、p型第1電極膜21は、リッジ部9の上面を長手方向へ延伸し、その先端は反射端面13付近に及んでいる。これに対して、リッジ部9の両側面は、反射端面13から所定の長さには、上面電極(p型第2電極膜22)が形成されず絶縁膜10が露出している露出領域があり、露出領域は、反射端面13からp型第1電極膜21の先端より内側へ及んでいる。これにより、当該実施形態に係る半導体レーザ素子20は、素子の信頼性の向上と可飽和吸収特性発現の抑制とがともに実現されている。   As shown in FIG. 7, the p-type first electrode film 21 extends in the longitudinal direction on the upper surface of the ridge portion 9, and its tip extends to the vicinity of the reflection end face 13. On the other hand, on both side surfaces of the ridge portion 9, there are exposed regions where the upper surface electrode (p-type second electrode film 22) is not formed and the insulating film 10 is exposed at a predetermined length from the reflection end surface 13. The exposed region extends from the reflection end face 13 to the inside of the tip of the p-type first electrode film 21. Thereby, in the semiconductor laser device 20 according to the embodiment, both improvement of device reliability and suppression of saturable absorption characteristics are realized.

第1の実施形態と同様に、リッジ部9の両側面の露出領域は、側面の下端から側面の上面に及んでいるのが望ましいが、少なくとも側面の下端からからリッジ部9高さの2/3以上まで及ぶ部分を含んでいればよい。かかる部分が、端面から5μm以上20μm以下の長さに亘っていることが好ましい。   As in the first embodiment, the exposed regions on both sides of the ridge portion 9 preferably extend from the lower end of the side surface to the upper surface of the side surface, but at least 2/2 of the height of the ridge portion 9 from the lower end of the side surface. It suffices to include a portion extending up to 3 or more. Such a portion preferably extends from the end face to a length of 5 μm or more and 20 μm or less.

次に、当該実施形態に係る半導体レーザ素子の製造方法を説明する。第1の実施形態に係る半導体レーザ素子の製造方法と、上部電極を形成する工程の点を除いて、同じである。第1の実施形態と同じ工程(絶縁膜形成工程までの工程)により、半導体多層の上表面に絶縁膜10が所定の領域に形成される。   Next, a method for manufacturing the semiconductor laser device according to the embodiment will be described. This is the same as the semiconductor laser device manufacturing method according to the first embodiment except for the process of forming the upper electrode. The insulating film 10 is formed in a predetermined region on the upper surface of the semiconductor multilayer by the same process (up to the insulating film forming process) as in the first embodiment.

基板表面全体にレジストを塗布し、さらにリソグラフィー法を用いて、塗布されたレジストのうち、p型InGaAsコンタクト層8に接する領域を除去し、レジスト膜を残存させる(第1レジスト形成工程)。そして、上記レジスト膜がパターニングされた基板表面上に、p型第1電極膜21を蒸着法などによって形成する(第1金属膜蒸着工程)。p型第1電極膜21は、Ti(チタン)、Pt(白金)、Au(金)が順に積層される積層膜や、Ti(チタン)、Mo(モリブデン)、Ti(チタン)、Au(金)が順に積層される積層膜などであればよい。積層膜の各膜の厚さは、例えば、前者の場合、それぞれ、25nm、25nm、500nm程度、後者の場合、それぞれ、25nm、80nm、40nm、300nm程度が望ましい。p型第1電極膜21の蒸着の後、アセトンなどの有機溶剤を用いて、レジスト膜、及びレジスト膜上に形成された電極膜を除去する(第1電極形成工程)。   A resist is applied to the entire surface of the substrate, and a region in contact with the p-type InGaAs contact layer 8 is removed from the applied resist by using a lithography method to leave a resist film (first resist forming step). Then, a p-type first electrode film 21 is formed on the substrate surface on which the resist film is patterned by a vapor deposition method or the like (first metal film vapor deposition step). The p-type first electrode film 21 is a laminated film in which Ti (titanium), Pt (platinum), and Au (gold) are sequentially laminated, or Ti (titanium), Mo (molybdenum), Ti (titanium), and Au (gold). ) May be a laminated film sequentially laminated. The thicknesses of the laminated films are preferably about 25 nm, 25 nm, and 500 nm, respectively, in the former case, and about 25 nm, 80 nm, 40 nm, and 300 nm, respectively, in the latter case. After the deposition of the p-type first electrode film 21, the resist film and the electrode film formed on the resist film are removed using an organic solvent such as acetone (first electrode forming step).

次に、p型第1電極膜21が形成された基板表面全体に再びレジストを塗布し、リソグラフィー法を用いて、塗布されたレジストの一部を除去し、基板表面の所定の領域にレジスト膜を残存させる(第2レジスト形成工程)。ここで、所定の領域とは、図7に示す半導体レーザ素子において、素子表面にp型第2電極膜22が形成されていない領域であり、具体的には、リッジ部9の上面及び両側面と、該側面の外側にそれぞれ広がる平坦面とに、反射端面13から所定の長さに及ぶ領域である。すなわち、リソグラフィー法を用いてレジストを除去する領域とは、素子表面全体の反射端面13の内側へ所定の長さとなる位置から反射端面14に及ぶ領域である。ここで、所定の長さとは、5μm以上20μm以下とするのが好ましい。そして、上記レジスト膜がパターニングされた基板表面上にp型第2電極膜22を蒸着法などによって形成する(第2金属膜蒸着工程)。p型第2電極膜22はTi(チタン)、Pt(白金)、Au(金)の積層膜やTi(チタン)、Mo(モリブデン)、Ti(チタン)、Au(金)などの積層膜とする。それぞれの金属膜の厚さは、例えば前者の場合、25nm、25nm、500nm程度、後者の場合、25nm、80nm、40nm、300nm程度が望ましい。p型第2電極膜22の蒸着の後、アセトンなどの有機溶剤を用いレジスト、及びレジスト上に形成された電極膜を除去する(第2電極形成工程)。   Next, a resist is applied again on the entire substrate surface on which the p-type first electrode film 21 is formed, and a part of the applied resist is removed using a lithography method, and a resist film is applied to a predetermined region on the substrate surface. (Second resist forming step). Here, the predetermined region is a region where the p-type second electrode film 22 is not formed on the device surface in the semiconductor laser device shown in FIG. 7, and specifically, the upper surface and both side surfaces of the ridge portion 9. And a region extending from the reflection end surface 13 to a predetermined length on a flat surface extending outward from the side surface. That is, the region where the resist is removed using the lithography method is a region extending from the position having a predetermined length to the inside of the reflection end surface 13 on the entire element surface to the reflection end surface 14. Here, the predetermined length is preferably 5 μm or more and 20 μm or less. Then, a p-type second electrode film 22 is formed on the surface of the substrate on which the resist film is patterned by a vapor deposition method or the like (second metal film vapor deposition step). The p-type second electrode film 22 is a laminated film of Ti (titanium), Pt (platinum), Au (gold) or a laminated film of Ti (titanium), Mo (molybdenum), Ti (titanium), Au (gold), etc. To do. For example, the thickness of each metal film is preferably about 25 nm, 25 nm, and 500 nm in the former case, and about 25 nm, 80 nm, 40 nm, and 300 nm in the latter case. After the deposition of the p-type second electrode film 22, the resist and the electrode film formed on the resist are removed using an organic solvent such as acetone (second electrode forming step).

これより後の工程(下面電極形成工程以下の工程)は、第1の実施形態と同じの工程により、半導体レーザ素子が作製される。以上、半導体レーザ素子の製造方法について説明した。   Subsequent steps (steps below the lower surface electrode forming step) are the same as those in the first embodiment to manufacture the semiconductor laser device. The method for manufacturing the semiconductor laser element has been described above.

当該実施形態に係る製造方法では、2度のレジスト形成工程及び2度の金属膜蒸着工程によってp型電極膜11を形成することにより、より作製誤差が抑制される形状に上面電極を形成することが出来ている。   In the manufacturing method according to the embodiment, by forming the p-type electrode film 11 by two resist forming steps and two metal film vapor deposition steps, the upper surface electrode is formed in a shape that further suppresses manufacturing errors. Is made.

当該実施形態に係る半導体レーザ素子20は、p型電極膜11のリッジ上面部が反射端面13付近に及んで形成されているとともに、端面から所定の長さに至るまでリッジ部の両側面及び外側に広がる平坦面にp型電極膜11は形成されておらず、図5に示す半導体レーザ素子の計算結果が適用される。すなわち、第1の実施形態に係る半導体レーザ素子17と同様に、当該実施形態に係る半導体レーザ素子20は、図5に示す好ましい歪分布を有している。   In the semiconductor laser device 20 according to this embodiment, the ridge upper surface portion of the p-type electrode film 11 extends to the vicinity of the reflection end surface 13, and both side surfaces and outer sides of the ridge portion extend from the end surface to a predetermined length. The p-type electrode film 11 is not formed on the flat surface extending in FIG. 5, and the calculation result of the semiconductor laser element shown in FIG. 5 is applied. That is, like the semiconductor laser device 17 according to the first embodiment, the semiconductor laser device 20 according to this embodiment has a preferable strain distribution shown in FIG.

[第3の実施形態]
本発明の第3の実施形態に係る半導体レーザ素子30は、リッジ部9の形状と、上面電極の形状とが異なる点を除き、第1の実施形態に係る半導体レーザ素子17と同様の構成をしている。よって、第3の実施形態の説明図において、第1及び第2の実施形態の説明図と同一の構成要素には同一の符号を付す。
[Third Embodiment]
The semiconductor laser device 30 according to the third embodiment of the present invention has the same configuration as that of the semiconductor laser device 17 according to the first embodiment except that the shape of the ridge portion 9 and the shape of the upper surface electrode are different. doing. Therefore, in the explanatory diagram of the third embodiment, the same components as those in the explanatory diagrams of the first and second embodiments are denoted by the same reference numerals.

図8は、本発明の第3の実施形態に係る半導体レーザ素子30の模式的外観斜視図である。図1に示す半導体レーザ素子17では、半導体多層の上部メサ部(リッジ部9)の短手方向の幅は、長手方向に対して一定である。これに対して、当該実施形態に係る半導体レーザ素子30では、半導体多層の上部メサ部(リッジ部9)は、リッジ部9の両端面中央から反射端面13へ長手方向に等しい幅(幅32)で延伸し、さらに、長手方向に延伸するに伴って上部メサ部(リッジ部9)の短手方向の幅が広くなり、さらに、広くなった一定の幅(幅31)で延伸して、反射端面13に至っている。すなわち、リッジ部9において、反射端面13における短手方向の幅31が、リッジ部9の両端面中央における短手方向の幅32よりも広くなっている。   FIG. 8 is a schematic external perspective view of a semiconductor laser device 30 according to the third embodiment of the present invention. In the semiconductor laser device 17 shown in FIG. 1, the width in the short direction of the upper mesa portion (ridge portion 9) of the semiconductor multilayer is constant with respect to the longitudinal direction. On the other hand, in the semiconductor laser device 30 according to this embodiment, the upper mesa portion (ridge portion 9) of the semiconductor multilayer has the same width (width 32) in the longitudinal direction from the center of both end surfaces of the ridge portion 9 to the reflection end surface 13. The width of the upper mesa portion (ridge portion 9) in the short direction becomes wider as it extends in the longitudinal direction. The end surface 13 is reached. That is, in the ridge portion 9, the width 31 in the short direction of the reflection end surface 13 is wider than the width 32 in the short direction at the center of both end surfaces of the ridge portion 9.

ここで、反射端面13におけるリッジ部9の幅31は高出力時においても高次横モードが励起されないようにするために2μm以下とすることが好ましい。また、リッジ部9は反射端面13へ延伸するのに伴って徐々に幅が広くなる部分を有していればよい。劈開位置の誤差を許容する観点からは、反射端面13付近ではリッジ部9の幅が一定である領域が設けられていることが好ましい。さらに、リッジ部9の幅が、両端面中心付近における幅32より広くなっている領域の長手方向の長さは、リッジ部9の幅が両端面間で一定となっている半導体レーザ素子と比較し、レーザ特性がほとんど変化しない程度に短く設定することが好ましい。具体的には15μm以下が望ましい。例えば、反射端面13における幅31を1.7μm程度、両端面中央における幅32を1.5μm程度、反射端面13付近でリッジ部9の幅が幅31と等しくなっている領域の長手方向の長さを5μm程度、長手方向に沿って幅31から幅32へ穏やかに変化する領域の長手方向の長さを10μm程度とする。   Here, the width 31 of the ridge portion 9 on the reflection end face 13 is preferably set to 2 μm or less so that the high-order transverse mode is not excited even at high output. Moreover, the ridge part 9 should just have a part which becomes wide gradually as it extends to the reflective end surface 13. From the viewpoint of allowing an error in the cleavage position, it is preferable that a region where the width of the ridge portion 9 is constant is provided in the vicinity of the reflection end face 13. Furthermore, the length in the longitudinal direction of the region where the width of the ridge portion 9 is wider than the width 32 near the center of both end faces is compared with the semiconductor laser device in which the width of the ridge portion 9 is constant between both end faces. However, it is preferable to set the length so short that the laser characteristics hardly change. Specifically, 15 μm or less is desirable. For example, the width 31 in the reflection end face 13 is about 1.7 μm, the width 32 in the center of both end faces is about 1.5 μm, and the length in the longitudinal direction of the region where the width of the ridge 9 is equal to the width 31 near the reflection end face 13. The length in the longitudinal direction of the region that gently changes from the width 31 to the width 32 along the longitudinal direction is about 10 μm.

当該形態にかかる半導体レーザ素子が、例えは、リッジ部9の幅31が1.7μm、幅32が1.5μmであるとき、素子動作時において、反射端面13付近での光子密度は、両端面中央付近での光子密度の約0.9倍程度に小さい。よって、反射端面付近での光子密度が低減出来ており、素子の信頼性がさらに向上する。   For example, when the width 31 of the ridge portion 9 is 1.7 μm and the width 32 is 1.5 μm in the semiconductor laser device according to this embodiment, the photon density in the vicinity of the reflective end surface 13 is determined at both end surfaces when the device is operating. It is as small as about 0.9 times the photon density near the center. Therefore, the photon density near the reflection end face can be reduced, and the reliability of the element is further improved.

当該実施形態に係る半導体レーザ素子の製造方法は、p型InP第2クラッド層7とp型InGaAsコンタクト層8を加工して上部メサ部とする上部メサ形成工程において、形成する上部メサ部の形状が第1の実施形態と異なっており、上述の形状となっている。さらに、半導体多層に絶縁膜10を形成する絶縁膜形成工程と、上面電極を形成するために基板表面の所定の領域にレジスト膜を形成させるレジスト形成工程とにおいて、それぞれ形成される絶縁膜10とレジスト膜の形状が、上部メサ部の形状が異なることに伴って、第1の実施形態とそれぞれ異なっている。それ以外については、第1の実施形態と同様の工程で、当該実施形態に係る半導体レーザ素子は作製される。   In the method of manufacturing the semiconductor laser device according to this embodiment, the shape of the upper mesa portion to be formed in the upper mesa forming step in which the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are processed to form the upper mesa portion. Is different from the first embodiment, and has the shape described above. Furthermore, the insulating film forming step for forming the insulating film 10 in the semiconductor multilayer, and the resist forming step for forming a resist film in a predetermined region of the substrate surface to form the upper surface electrode, The shape of the resist film is different from that of the first embodiment as the shape of the upper mesa portion is different. Other than that, the semiconductor laser device according to this embodiment is manufactured through the same steps as those of the first embodiment.

なお、当該実施形態に係る半導体レーザ素子の上面電極を、第2の実施形態と同様に、p型第1電極膜及びp型第2電極膜で構成してもよい。かかる半導体レーザ素子の製造方法は、上部メサ形成工程において形成する上部メサ部の形状が第2の実施形態と異なっており、さらに後の工程において、上部メサ部の形状が異なることに伴って、絶縁膜10やレジスト膜の形状が異なる。それ以外については、第2の実施形態と同様の工程で、当該実施形態に係る半導体レーザ素子は作製される。   Note that the top electrode of the semiconductor laser device according to this embodiment may be composed of a p-type first electrode film and a p-type second electrode film, as in the second embodiment. In such a method of manufacturing a semiconductor laser device, the shape of the upper mesa portion formed in the upper mesa forming step is different from that of the second embodiment, and in the subsequent step, the shape of the upper mesa portion is different. The shapes of the insulating film 10 and the resist film are different. Other than that, the semiconductor laser device according to this embodiment is manufactured through the same steps as those of the second embodiment.

[第4の実施形態]
本発明の第4の実施形態に係る半導体レーザ素子40は、リッジ部9の両側が有機絶縁層で埋め込まれるよう、絶縁膜10と上面電極の間に形成されており、それに伴い、上面電極の形状が変化している点を除いて、第1の実施形態に係る半導体レーザ素子と同様の構成をしている。よって、第4の実施形態の説明図において、第1乃至第3の実施形態の説明図における同一の構成要素には同一の符号を付す。
[Fourth Embodiment]
The semiconductor laser device 40 according to the fourth embodiment of the present invention is formed between the insulating film 10 and the upper surface electrode so that both sides of the ridge portion 9 are embedded with the organic insulating layer. The semiconductor laser device has the same configuration as that of the semiconductor laser device according to the first embodiment except that the shape is changed. Therefore, in the explanatory diagram of the fourth embodiment, the same components in the explanatory diagrams of the first to third embodiments are denoted by the same reference numerals.

図9は、本発明の第4の実施形態に係る半導体レーザ素子40の模式的外観斜視図である。図9に示す通り、リッジ部9の両側が有機絶縁層41で埋め込まれているが、反射端面13から所定の長さまでの領域には有機絶縁層41は形成されていない。p型電極膜11のリッジ上面部は、リッジ部9の上面を長手方向に延伸し、その先端は反射端面13付近に及んでいる。また、p型電極膜11は、有機絶縁層41を覆って広がっており、有機絶縁層41の上面に形成されている。   FIG. 9 is a schematic external perspective view of a semiconductor laser device 40 according to the fourth embodiment of the present invention. As shown in FIG. 9, both sides of the ridge portion 9 are embedded with the organic insulating layer 41, but the organic insulating layer 41 is not formed in a region from the reflection end face 13 to a predetermined length. The ridge upper surface portion of the p-type electrode film 11 extends in the longitudinal direction from the upper surface of the ridge portion 9, and its tip extends to the vicinity of the reflection end surface 13. Further, the p-type electrode film 11 extends over the organic insulating layer 41 and is formed on the upper surface of the organic insulating layer 41.

リッジ部9の両側面にはそれぞれ、反射端面13から所定の長さにはp型電極膜11が形成されず絶縁膜10が露出している領域があり、リッジ部9の両側に埋め込まれている有機絶縁層41が露出領域に及んでいる。リッジ部9の両側面が少なくとも露出領域を除いて有機絶縁層41によって埋め込まれていればよい。図1に示す半導体レーザ素子17では、リッジ部9の側面にはp型電極膜11が形成されているが、図9に示す半導体レーザ素子40では、リッジ部9の側面には有機絶縁層41が形成されている。有機絶縁層41は、電極膜と同様に、引張応力を有しているために、もしも有機絶縁層41が反射端面13に及んで形成されている場合、反射端面13付近において、リッジ部9の両側面にp型電極膜11が形成されていなくても、反射端面13付近での活性層に歪が発生する要因となる。当該実施形態に係る半導体レーザ素子40では、上述の通り、有機絶縁層41が反射端面13から所定の長さまでの領域には形成されておらず、リッジ部9の両側面の露出領域は有機絶縁層41に対しても露出している。これにより、当該実施形態に係る半導体レーザ素子40は、反射端面13付近の活性層3に生じる歪が抑制され素子の信頼性が向上するとともに、可飽和吸収特性発現が抑制されている。   On both side surfaces of the ridge portion 9, there are regions where the p-type electrode film 11 is not formed and the insulating film 10 is exposed to a predetermined length from the reflection end surface 13, and are embedded on both sides of the ridge portion 9. The organic insulating layer 41 extending over the exposed region. It is sufficient that both side surfaces of the ridge portion 9 are filled with the organic insulating layer 41 except at least the exposed region. In the semiconductor laser device 17 shown in FIG. 1, the p-type electrode film 11 is formed on the side surface of the ridge portion 9, but in the semiconductor laser device 40 shown in FIG. 9, the organic insulating layer 41 is formed on the side surface of the ridge portion 9. Is formed. Since the organic insulating layer 41 has a tensile stress as in the case of the electrode film, if the organic insulating layer 41 is formed so as to extend to the reflective end face 13, the organic insulating layer 41 is formed near the reflective end face 13 in the vicinity of the ridge portion 9. Even if the p-type electrode film 11 is not formed on both side surfaces, the active layer in the vicinity of the reflection end surface 13 is distorted. In the semiconductor laser device 40 according to this embodiment, as described above, the organic insulating layer 41 is not formed in a region from the reflection end surface 13 to a predetermined length, and the exposed regions on both side surfaces of the ridge portion 9 are organic insulating. The layer 41 is also exposed. Thereby, in the semiconductor laser device 40 according to the embodiment, distortion generated in the active layer 3 in the vicinity of the reflection end face 13 is suppressed, the reliability of the device is improved, and the saturable absorption characteristic is suppressed.

第1乃至第3の実施形態と同様に、リッジ部9の両側面の露出領域は、側面の下端から側面の上面に及んでいるのが望ましいが、少なくとも側面の下端からからリッジ部9高さの2/3以上まで及ぶ部分を含んでいればよい。端面付近での活性層の歪量の低減と、上面電極の端面付近での抵抗値の上昇とのトレードオフを考慮して、かかる部分が端面から5μm以上20μm以下の長さに亘っていることが好ましい。それゆえ、有機絶縁層41の反射端面13側の側面も、反射端面13から5μm以上の距離にあるのが好ましい。   As in the first to third embodiments, it is desirable that the exposed regions on both side surfaces of the ridge portion 9 extend from the lower end of the side surface to the upper surface of the side surface, but at least the height of the ridge portion 9 from the lower end of the side surface. It is only necessary to include a portion extending to 2/3 or more. In consideration of a trade-off between the reduction in the amount of strain of the active layer near the end face and the increase in resistance near the end face of the upper surface electrode, such a portion extends over a length of 5 μm to 20 μm from the end face. Is preferred. Therefore, the side surface on the reflective end face 13 side of the organic insulating layer 41 is preferably at a distance of 5 μm or more from the reflective end face 13.

図9に示す半導体レーザ素子40では、p型電極膜11は、リッジ部9の上面の両側へ広がって、有機絶縁層41の上面に形成されている。そして、有機絶縁層41の反射端面13側の側面にはp型電極膜11は形成されず、有機絶縁層41がリッジ部9の露出領域に及んでいる。有機絶縁層41が形成されていない上記所定の長さをより長くしていくと、それに伴って、リッジ部9の露出領域も長くなり、上面電極の端面付近の部分の抵抗値が上昇してしまう。この場合、反射端面13付近において、リッジ部9の両側にp型電極膜11が露出領域まで及ぶように形成されていればよい。このとき、p型電極膜11のリッジ部9は、両側面にも形成されて、p型電極膜11のリッジ側面部が露出領域に及んでいる。また、リッジ部9の両側においては、p型電極膜11が有機絶縁層41の上面に加え、有機絶縁層41の反射端面13側の側面と、リッジ側面部の両側の平坦面上に広がっている。p型電極膜11の反射端面13付近の形状は、図1に示すp型電極膜11と同様の形状とすればよい。以上、説明した通り、リッジ部9の露出領域を確保しつつ、上面電極の端面付近の部分の抵抗値が所望のものとするよう、有機絶縁層41とp型電極膜11の形状と選択すればよい。   In the semiconductor laser element 40 shown in FIG. 9, the p-type electrode film 11 is formed on the upper surface of the organic insulating layer 41 so as to extend to both sides of the upper surface of the ridge portion 9. The p-type electrode film 11 is not formed on the side surface of the organic insulating layer 41 on the reflective end face 13 side, and the organic insulating layer 41 extends to the exposed region of the ridge portion 9. As the predetermined length in which the organic insulating layer 41 is not formed is made longer, the exposed region of the ridge portion 9 becomes longer accordingly, and the resistance value in the vicinity of the end face of the upper surface electrode increases. End up. In this case, the p-type electrode film 11 only needs to be formed on both sides of the ridge portion 9 so as to reach the exposed region in the vicinity of the reflection end face 13. At this time, the ridge portion 9 of the p-type electrode film 11 is also formed on both side surfaces, and the ridge side surface portion of the p-type electrode film 11 extends to the exposed region. In addition, on both sides of the ridge portion 9, the p-type electrode film 11 spreads on the side surface of the organic insulating layer 41 on the reflective end face 13 side and on the flat surface on both sides of the ridge side portion in addition to the upper surface of the organic insulating layer 41. Yes. The shape of the p-type electrode film 11 in the vicinity of the reflection end face 13 may be the same as that of the p-type electrode film 11 shown in FIG. As described above, the shapes of the organic insulating layer 41 and the p-type electrode film 11 are selected so that the resistance value of the portion near the end face of the upper surface electrode is as desired while ensuring the exposed region of the ridge portion 9. That's fine.

当該実施形態に係る半導体レーザ素子のように、リッジ部の両側を有機絶縁層で埋め込むことにより、p型電極膜の形状をより平坦化することが出来、より安定的に電極膜を形成することが出来る。しかし、リッジ部の両側が有機絶縁層で端面まで及んで埋め込まれているならば、有機絶縁層が引張応力を有しているために、有機絶縁層に起因して端面近傍での活性層に係る歪がかかってしまう。当該実施形態に係る半導体レーザ素子により、有機絶縁層に起因する歪量を減少させ、素子の信頼性を向上させつつ、可飽和吸収特性発現が抑制される。   As in the semiconductor laser device according to the embodiment, by embedding both sides of the ridge portion with an organic insulating layer, the shape of the p-type electrode film can be further flattened, and the electrode film can be formed more stably. I can do it. However, if both sides of the ridge portion are embedded with an organic insulating layer up to the end surface, the organic insulating layer has tensile stress, so that the active layer near the end surface is caused by the organic insulating layer. Such distortion is applied. With the semiconductor laser device according to this embodiment, the amount of strain due to the organic insulating layer is reduced, and the reliability of the device is improved, while the saturable absorption characteristics are suppressed.

次に、当該実施形態に係る半導体レーザ素子40の製造方法を説明する。第1の実施形態に係る半導体レーザ素子17の製造方法と、有機絶縁層41を形成する工程が加わっている点と、それに伴い、上部電極を形成する工程が異なる点とを除いて、同じである。第1の実施形態と同じ工程(絶縁膜形成工程までの工程)により、半導体多層の上表面に絶縁膜10が所定の領域に形成される。   Next, a method for manufacturing the semiconductor laser device 40 according to this embodiment will be described. The same except for the manufacturing method of the semiconductor laser device 17 according to the first embodiment and the step of forming the organic insulating layer 41 and that the step of forming the upper electrode is different accordingly. is there. The insulating film 10 is formed in a predetermined region on the upper surface of the semiconductor multilayer by the same process (up to the insulating film forming process) as in the first embodiment.

上記絶縁膜10が形成された基板表面に、低誘電率高分子材料をスピンコーティングし、ベーキングすることで有機絶縁層41が形成される。低誘電率高分子材料は環状フッ素樹脂、四フッ化エチレン樹脂、フッ化アリールエーテル樹脂、アリールエーテル樹脂、ベンゾシクロブテン(BCB)樹脂、ポリイミド、モノメチルヒドロキシシラン縮合物、及びアモルファスカーボンなどとする。次に、ドライエッチング法などによって、基板上面に形成される有機絶縁層41を表面から徐々にエッチングし、少なくとも一部のp型InGaAsコンタクト層8を露出させる。このとき、リッジ部9の両側を埋め込んでいる有機絶縁層41の高さは、リッジ部9の両側面の絶縁膜10の上端の高さ程度であることが好ましいが、それに限った事ではない。さらに、フォトリソグラフィー法とドライエッチング法などを用いて、反射端面13から所定の長さにある領域に形成されている有機絶縁層41を除去する(有機絶縁層形成工程)。   The organic insulating layer 41 is formed by spin-coating and baking a low dielectric constant polymer material on the surface of the substrate on which the insulating film 10 is formed. The low dielectric constant polymer material is a cyclic fluororesin, tetrafluoroethylene resin, fluorinated aryl ether resin, aryl ether resin, benzocyclobutene (BCB) resin, polyimide, monomethylhydroxysilane condensate, amorphous carbon, or the like. Next, the organic insulating layer 41 formed on the upper surface of the substrate is gradually etched from the surface by a dry etching method or the like to expose at least a part of the p-type InGaAs contact layer 8. At this time, the height of the organic insulating layer 41 embedded on both sides of the ridge portion 9 is preferably about the height of the upper end of the insulating film 10 on both side surfaces of the ridge portion 9, but is not limited thereto. . Further, the organic insulating layer 41 formed in a region having a predetermined length from the reflection end face 13 is removed by using a photolithography method and a dry etching method (organic insulating layer forming step).

有機絶縁層形成工程の後、上記有機絶縁層41が形成された基板表面全体にレジストを塗布し、さらにリソグラフィー法を用いて、塗布されたレジストの一部を除去し、基板表面の所定の領域にレジスト膜を残存させる(レジスト形成工程)。ここで、所定の領域とは、図9に示す半導体レーザ素子40の場合、リッジ部9の両側面と、該側面の外側にそれぞれ広がる平坦面とに、反射端面13から所定の長さに及ぶ領域と、有機絶縁層41の反射端面13側の側面となる領域と、を合わせたものであるが、上述の通り、p型電極膜11の形状により所定の領域を決定すればよい。レジスト形成工程の後、第1の実施形態と同様に、上記レジスト膜がパターニングされた基板表面上にp型電極膜11を蒸着法などによって形成し、アセトンなどの有機溶剤を用いて、レジスト膜、及びレジスト膜上に形成された電極膜を除去する(上面電極形成工程)。   After the organic insulating layer forming step, a resist is applied to the entire surface of the substrate on which the organic insulating layer 41 is formed, and a part of the applied resist is removed using a lithography method to obtain a predetermined region on the substrate surface. The resist film is left on (resist formation step). Here, in the case of the semiconductor laser element 40 shown in FIG. 9, the predetermined region extends from the reflection end surface 13 to a predetermined length on both side surfaces of the ridge portion 9 and flat surfaces extending outward from the side surfaces. The region and the region serving as the side surface on the reflective end face 13 side of the organic insulating layer 41 are combined. As described above, the predetermined region may be determined according to the shape of the p-type electrode film 11. After the resist formation step, as in the first embodiment, a p-type electrode film 11 is formed on the substrate surface on which the resist film is patterned by vapor deposition or the like, and an organic solvent such as acetone is used to form the resist film. And the electrode film formed on the resist film is removed (upper surface electrode forming step).

これより後の工程(下面電極形成工程以下の工程)は、第1の実施形態と同じの工程により、半導体レーザ素子が作製される。以上、半導体レーザ素子の製造方法について説明した。   Subsequent steps (steps below the lower surface electrode forming step) are the same as those in the first embodiment to manufacture the semiconductor laser device. The method for manufacturing the semiconductor laser element has been described above.

なお、当該実施形態に係る半導体レーザ素子の上面電極を、第2の実施形態と同様に、p型第1電極膜及びp型第2電極膜で構成してもよい。また、当該実施形態に係る半導体レーザのリッジ部は、第3の実施形態と同様に、反射端面へ延伸して徐々に広くなる部分を有していても良い。   Note that the top electrode of the semiconductor laser device according to this embodiment may be composed of a p-type first electrode film and a p-type second electrode film, as in the second embodiment. In addition, the ridge portion of the semiconductor laser according to this embodiment may have a portion that extends to the reflection end face and gradually widens, as in the third embodiment.

以上、第1乃至第4の実施形態に係る半導体レーザ素子について、説明をした。第2乃至第4の実施形態においても、図2に示す半導体レーザ素子と同様に、p型電極膜のリッジ上面部の両側それぞれに、上面露出領域があってもよい。上面露出領域によって、端面付近の活性層における歪量をより低減され、かつ、p型電極膜のリッジ上面部の先端が端面付近まで及んでいることにより、可飽和吸収特性発現が抑制される。   The semiconductor laser elements according to the first to fourth embodiments have been described above. Also in the second to fourth embodiments, similarly to the semiconductor laser device shown in FIG. 2, there may be upper exposed regions on both sides of the ridge upper surface of the p-type electrode film. The upper surface exposed region further reduces the amount of strain in the active layer near the end surface, and the tip of the ridge upper surface portion of the p-type electrode film extends to the vicinity of the end surface, thereby suppressing the saturable absorption characteristics.

第2乃至第4の実施形態においても、図3に示す半導体レーザ素子と同様に、半導体レーザ素子の半導体多層の上部メサ部の側面から一定の距離以上隔てた領域のp型InP第2クラッド層7及びp型InGaAsコンタクト層8は除去されずに残存しているのが好ましい。第4の実施形態の場合、上部メサ部の側面から当該一定の距離の空間が有機絶縁層で埋め込まれる。   Also in the second to fourth embodiments, similarly to the semiconductor laser element shown in FIG. 3, the p-type InP second cladding layer in a region separated from the side surface of the upper mesa portion of the semiconductor multilayer of the semiconductor laser element by a certain distance or more. 7 and the p-type InGaAs contact layer 8 are preferably left without being removed. In the case of the fourth embodiment, the space of the certain distance from the side surface of the upper mesa portion is buried with the organic insulating layer.

第2乃至第4の実施形態においても、図4に示す実装法と同様に、半導体レーザ素子がサブマウントにジャンクションアップ法で取り付けられ、半導体レーザ素子の動作は第1の実施形態と同様である。   Also in the second to fourth embodiments, similarly to the mounting method shown in FIG. 4, the semiconductor laser element is attached to the submount by the junction-up method, and the operation of the semiconductor laser element is the same as that of the first embodiment. .

第2乃至第4の実施形態においても、一方の端面においてのみ露出領域が設けられることに限定されることはなく、図6に示す半導体レーザ素子と同様に、両側の端面においてそれぞれ露出領域が設けられてもよいのは言うまでもない。また、両側の端面それぞれの露出領域がともに等しい構造であることに限定されることはなく、必要に応じてそれぞれの構造を選択すればよい。   Also in the second to fourth embodiments, the exposed region is not limited to being provided only on one end face, and similarly to the semiconductor laser device shown in FIG. 6, the exposed areas are provided on both end faces. It goes without saying that it may be done. Moreover, it is not limited that the exposed areas of both end faces are the same, and each structure may be selected as necessary.

[第5の実施形態]
本発明の第5の実施形態に係る光送信モジュール又は光送受信モジュールは、第1乃至第4の実施形態に係る半導体レーザ素子を備える、光送信モジュール又は光送受信モジュールである。さらに、本発明の第5の実施形態に係る光トランシーバは、かかる光送信モジュール又は係る光送受信モジュールを備える、光トランシーバである。
[Fifth Embodiment]
The optical transmission module or optical transmission / reception module according to the fifth embodiment of the present invention is an optical transmission module or optical transmission / reception module including the semiconductor laser element according to the first to fourth embodiments. Furthermore, an optical transceiver according to the fifth embodiment of the present invention is an optical transceiver including such an optical transmission module or such an optical transmission / reception module.

第1乃至第4の実施形態に係る半導体レーザ素子を備えることにより、光送信モジュール、光送受信モジュール、及び、光トランシーバにおいても、信頼性向上と、可飽和吸収特性発現の抑制とがともに実現している。   By including the semiconductor laser element according to the first to fourth embodiments, both the optical transmission module, the optical transmission / reception module, and the optical transceiver can achieve both improved reliability and suppression of saturable absorption characteristics. ing.

以上、当該実施形態に係る半導体レーザ素子、光送信モジュール(光送受信モジュール)、及び光トランシーバについて説明した。本発明は、これらに限定されることはなく、InGaAlAs量子井戸層を活性層に含むリッジ導波路型半導体レーザ素子に広く適用出来ることは言うまでもない。   The semiconductor laser element, the optical transmission module (optical transmission / reception module), and the optical transceiver according to the embodiment have been described above. The present invention is not limited to these, and it goes without saying that the present invention can be widely applied to ridge waveguide type semiconductor laser elements including an InGaAlAs quantum well layer as an active layer.

1 n型InP基板、2 n型InGaAlAs光ガイド層、3 活性層、4 p型InGaAlAs光ガイド層、5 p型InAlAs第1クラッド層、6 p型InGaAlAsエッチング停止層、7 p型InP第2クラッド層、8 p型InGaAsコンタクト層、9 リッジ部、10:絶縁膜、11 p型電極膜、12 n型電極膜、13,14 反射端面、15 ボンディングパッド部、16 電極引き出し線路部、17,20,30,40 半導体レーザ素子、18 サブマウント、21:p型第1電極膜、22:p型第2電極膜、31,32 幅、41 有機絶縁層   1 n-type InP substrate, 2 n-type InGaAlAs light guide layer, 3 active layer, 4 p-type InGaAlAs light guide layer, 5 p-type InAlAs first cladding layer, 6 p-type InGaAlAs etching stop layer, 7 p-type InP second cladding Layer, 8 p-type InGaAs contact layer, 9 ridge portion, 10: insulating film, 11 p-type electrode film, 12 n-type electrode film, 13, 14 reflective end face, 15 bonding pad portion, 16 electrode lead-out line portion, 17, 20 , 30, 40 Semiconductor laser device, 18 submount, 21: p-type first electrode film, 22: p-type second electrode film, 31, 32 width, 41 organic insulating layer

Claims (16)

InGaAlAs系材料からなる量子井戸層を含む活性層と、エッチング停止層と、前記活性層の光導波路領域に沿って延伸するとともに前記エッチング停止層の上側に配置される上部メサ部と、を備える半導体多層と、
前記半導体多層の上表面に形成される絶縁膜と、
前記半導体多層及び前記絶縁膜を覆うとともに前記上部メサ部の上面に接して形成される電極膜と、
を備えるとともに、
前記上部メサ部と、前記絶縁膜のうち前記上部メサ部に接して形成される部分とで、リッジ部となる、半導体レーザ素子であって、
前記リッジ部の両側面それぞれは、前記電極膜が形成されずに露出している露出領域を有し、
前記リッジ部の両側面それぞれの前記露出領域は、前記リッジ部の一方の端面から、前記電極膜が前記リッジ部上面を前記一方の端面へ延伸する先端より内側へ、及んでいる、
ことを特徴とする、半導体レーザ素子。
A semiconductor comprising an active layer including a quantum well layer made of an InGaAlAs-based material, an etching stop layer, and an upper mesa portion extending along the optical waveguide region of the active layer and disposed above the etching stop layer With multiple layers,
An insulating film formed on an upper surface of the semiconductor multilayer;
An electrode film that covers the semiconductor multilayer and the insulating film and is in contact with the upper surface of the upper mesa portion;
With
A semiconductor laser device, wherein the upper mesa portion and a portion of the insulating film formed in contact with the upper mesa portion become a ridge portion,
Each side surface of the ridge portion has an exposed region that is exposed without the electrode film being formed,
The exposed regions on both side surfaces of the ridge portion extend from one end surface of the ridge portion to the inside from the tip where the electrode film extends from the top surface of the ridge portion to the one end surface,
A semiconductor laser device characterized by the above.
前記両側面それぞれの前記露出領域は、該側面下端から該側面上端に及ぶ部分を含んでいる、
ことを特徴とする、請求項1に記載の半導体レーザ素子。
The exposed area of each of the both side surfaces includes a portion extending from the lower end of the side surface to the upper end of the side surface.
The semiconductor laser device according to claim 1, wherein:
前記両側面それぞれの前記露出領域において、該側面下端から該側面上端に及ぶ部分は、前記一方の端面から5μm以上20μm以下の距離まで亘っている、
ことを特徴とする、請求項2に記載の半導体レーザ素子。
In each of the exposed regions on both side surfaces, a portion extending from the lower end of the side surface to the upper end of the side surface extends from the one end surface to a distance of 5 μm or more and 20 μm or less.
The semiconductor laser device according to claim 2, wherein
前記両側面それぞれの前記露出領域は、該側面下端から前記リッジ部高さの2/3以上まで及ぶ部分を含んでいる、
ことを特徴とする、請求項1に記載の半導体レーザ素子。
The exposed regions on the both side surfaces each include a portion extending from the lower end of the side surface to 2/3 or more of the height of the ridge.
The semiconductor laser device according to claim 1, wherein:
前記両側面それぞれの前記露出領域において、該側面下端から前記リッジ部高さの2/3以上まで及ぶ部分は、前記一方の端面から5μm以上20μm以下の距離に亘っている、
ことを特徴とする、請求項4に記載の半導体レーザ素子。
In each of the exposed regions on both side surfaces, a portion extending from the lower end of the side surface to 2/3 or more of the height of the ridge extends over a distance of 5 μm or more and 20 μm or less from the one end surface.
The semiconductor laser device according to claim 4, wherein:
前記電極膜は、前記リッジ部の前記上面から前記両側面それぞれに広がるとともに前記両側面それぞれを前記一方の端面へ延伸し、前記露出領域に及んでいる、
ことを特徴とする、請求項1乃至5のいずれかに記載の半導体レーザ素子。
The electrode film extends from the upper surface of the ridge portion to the both side surfaces and extends to the one end surface, and extends to the exposed region.
6. The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that:
前記電極膜は引張応力を有している、ことを特徴とする、請求項6に記載の半導体レーザ素子。   The semiconductor laser device according to claim 6, wherein the electrode film has a tensile stress. 前記リッジ部の両側面が少なくとも前記露出領域を除いて有機絶縁層によって埋め込まれ、前記有機絶縁層は前記露出領域に及んでいる、
ことを特徴とする、請求項1乃至5のいずれかに記載の半導体レーザ素子。
Both side surfaces of the ridge portion are filled with an organic insulating layer except at least the exposed region, and the organic insulating layer extends to the exposed region.
6. The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that:
前記有機絶縁層は引張応力を有している、ことを特徴とする、請求項8に記載の半導体レーザ素子。   9. The semiconductor laser device according to claim 8, wherein the organic insulating layer has a tensile stress. 前記リッジ部の両側面が少なくとも前記露出領域を除いて有機絶縁層によって埋め込まれ、前記電極膜は前記有機絶縁層を覆って広がる、
ことを特徴とする、請求項6又は7に記載の半導体レーザ素子。
Both side surfaces of the ridge portion are filled with an organic insulating layer except at least the exposed region, and the electrode film extends over the organic insulating layer,
8. The semiconductor laser device according to claim 6, wherein the semiconductor laser device is characterized in that:
前記電極膜が前記リッジ部上面を前記一方の端面へ延伸する先端の両側それぞれに、前記リッジ部上面は、前記電極膜が形成されずに露出している上面露出領域を有し、
前記先端の両側の前記上面露出領域は、前記リッジ部の両側面の前記露出領域に、それぞれ及んでおり、
前記先端の両側の前記上面露出領域それぞれは、前記一方の端面へ進むのに伴い幅が広がる部分を有する。
ことを特徴とする、請求項1乃至10のいずれかに記載の半導体レーザ素子。
The electrode film has an upper surface exposed region that is exposed without forming the electrode film on each of both sides of a tip that extends the ridge portion upper surface to the one end surface;
The upper surface exposed areas on both sides of the tip extend to the exposed areas on both side surfaces of the ridge portion, respectively.
Each of the upper surface exposed regions on both sides of the tip has a portion that increases in width as it advances to the one end surface.
11. The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that:
前記電極膜の前記リッジ部上面を前記一方の端面へ延伸する先端は前記一方の端面まで及んでいる、
ことを特徴とする、請求項1乃至11のいずれかに記載の半導体レーザ素子。
The tip that extends the upper surface of the ridge portion of the electrode film to the one end surface extends to the one end surface,
The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that
前記リッジ部は、前記一方の端面へ延伸して幅が徐々に広くなる部分を有している、
ことを特徴とする、請求項1乃至12のいずれかに記載の半導体レーザ素子。
The ridge portion has a portion that extends to the one end face and gradually increases in width.
The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that:
前記リッジ部の両側面それぞれは、前記電極膜が形成されずに露出している他の露出領域をさらに有し、
前記リッジ部の両側面それぞれの前記他の露出領域は、前記リッジ部の両端のうち他方の端面から、前記電極膜が前記リッジ部上面を前記他方の端面へ延伸する先端より内側へ、及んでいる、
ことを特徴とする、請求項1乃至13のいずれかに記載の半導体レーザ素子。
Each of both side surfaces of the ridge portion further has another exposed region exposed without forming the electrode film,
The other exposed regions on both side surfaces of the ridge portion extend from the other end surface of both ends of the ridge portion to the inside from the tip where the electrode film extends the upper surface of the ridge portion to the other end surface. Yes,
14. The semiconductor laser device according to claim 1, wherein the semiconductor laser device is characterized in that:
請求項1乃至14のいずれかに記載の半導体レーザ素子、を備える、光送信モジュール。   An optical transmission module comprising the semiconductor laser device according to claim 1. 請求項15に記載の光送信モジュール、を備える、光トランシーバ。   An optical transceiver comprising the optical transmission module according to claim 15.
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