JP2013062930A - Control circuit for switching power supply device, and switching power supply device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching power supply device capable of eliminating a need for individual vibration insulation measures depending on a level of an AC input voltage.SOLUTION: An input voltage detector 30 detects whether an AC input voltage is a 100 V system or a 200 V system, and depending on the detection result, a frequency reduction gain setting part 40 switches frequency reduction gain characteristics. The frequency reduction gain setting part 40 receives a feedback signal having a value depending on a load factor, and converts it into a frequency following the switched frequency reduction gain characteristics. A drive circuit 60 drives a switching element by an on/off signal having the frequency. Due to the switching of the frequency reduction gain characteristics depending on a level of the AC input voltage, such a property that reduction of the feedback signal in the 200 V system is facilitated faster than that in the 100 V system is cancelled. Thus, load factors for reaching of a power supply operation frequency to an audible region at frequency reduction can be uniformed, and thereby, a block vibration insulation measure can be achieved.

Description

  BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control circuit and a switching power supply for a flyback type switching power supply, and more particularly to a control circuit for a switching power supply in which the characteristics of the power supply operating frequency with respect to the load factor do not change even when the AC input voltage differs The present invention relates to a switching power supply device.

  The switching power supply device can convert a commercial AC voltage into a DC voltage of an arbitrary voltage and output it, and has a small number of components and can cope with a wide input voltage range. A flyback type is known as a method in which the output voltage is insulated from the commercial power supply. This flyback type switching power supply includes an input circuit that converts an AC input voltage into a DC voltage, a transformer, a switching element, and an output circuit that converts a voltage on the secondary side of the transformer into a DC voltage (output voltage). And a control circuit for controlling on / off of the switching element. This control circuit controls the output voltage to be constant by controlling the ON width of the switching element connected in series to the primary winding of the transformer based on the output voltage of the output circuit.

  The control circuit also detects the load state of the switching power supply device, and controls on / off of the switch element at a fixed high frequency in the case of a high load state. However, in a light load state, control is generally performed to reduce the switching loss by reducing the switching frequency of the switch element (see, for example, Patent Documents 1 and 2).

  The invention described in Patent Document 1 is not a flyback type switching power supply, but detects an output voltage and maintains a high switching frequency when the output voltage decreases in a high load state. On the other hand, when the output voltage becomes higher due to the light load state, the switching frequency is lowered as the output voltage becomes higher, thereby improving the efficiency of the light load.

  Similarly, in the invention described in Patent Document 2, when the voltage fed back by detecting the voltage of the output circuit is equal to or higher than a predetermined value, the capacitor for determining the period of the oscillator is charged with a constant bias current, and the oscillator Oscillates at a constant oscillation frequency. In a region where the fed back voltage is less than or equal to a predetermined value, the bias current value charged in the capacitor decreases, and the charging time until the threshold level is exceeded becomes longer, so the switching frequency decreases.

  Thus, the switching power supply device has a characteristic of reducing the oscillation frequency with respect to the load factor. When such a switching power supply device is made to be compatible with the world-wide specification, 100V and 200V commercial power supplies are connected to the AC input. At this time, the switching power supply device is designed so that the input AC input voltage corresponds to a wide range, and the components and various set values are designed to be the same.

FIG. 10 is a diagram showing the power supply operating frequency reduction characteristic with respect to the load factor when the AC input voltage is different.
In the characteristic diagram shown in FIG. 10, the horizontal axis represents the load factor, the vertical axis represents the power supply operating frequency, and the load when the value of the AC input voltage Vin is 100 V system (AC 115 V) and 200 V system (AC 230 V). The power supply operating frequency (switching frequency) reduction characteristic with respect to rate is shown.

  According to this characteristic diagram, when the value of the AC input voltage Vin is 100V system or 200V system, the power supply operating frequency is constant in a state higher than a certain load factor, and when the load becomes lighter than a certain load factor, The power supply operating frequency is reduced. However, the point at which the power supply operating frequency starts to decrease is a load factor of 47% in the 100V system, while it is 64% in the 200V system. If the conditions for the power supply operating frequency and the load factor are the same, the higher the AC input voltage, the higher the rate of increase of the energy stored in the transformer, and accordingly, feedback is provided to narrow the ON width of the switching element. This is because it is more strongly applied and as a result, the reduction of the power supply operating frequency is accelerated.

  In the switching power supply device, the power supply operating frequency decreases as the load becomes lighter, and eventually the power supply operating frequency enters the audible region. At the switching frequency of the audible region, the transformer core vibrates at the frequency of the audible region, so that a sounding phenomenon that generates abnormal noise from the transformer occurs. Therefore, some anti-vibration measures are required when the power supply operating frequency falls to the audible range.

JP-A-11-155281 Japanese Patent Laying-Open No. 2004-40856 (paragraph [0025], FIG. 11)

  However, when the AC input voltage is a 100V system and a 200V system, the power supply operating frequency reduction characteristics with respect to the load factor are different, and the timing at which the power supply operating frequency enters the audible region at light loads is different. Therefore, the switching power supply has a problem that the device configuration corresponds to the worldwide specifications, but the anti-vibration measures must be individually adjusted for anti-vibration according to the size of the power supply voltage used. There was a point.

  The present invention has been made in view of these points, and an object of the present invention is to provide a control circuit for a switching power supply apparatus and a switching power supply apparatus that do not require a vibration proof measure corresponding to the magnitude of an AC input voltage.

  In order to solve the above-described problems, the present invention provides a control circuit for a flyback type switching power supply device that controls to reduce the switching frequency of the switching element when the load is reduced below a predetermined load factor. . The control circuit includes an input voltage detection unit that receives an AC input voltage and detects whether the AC input voltage is a high voltage system or a low voltage system. The control circuit also includes a frequency reduction gain setting unit configured to switch a switching frequency reduction gain characteristic according to a detection result of the input voltage detection unit.

  In addition, the present invention provides a flyback type switching power supply device including a control circuit that performs control so as to reduce the switching frequency of the switching element when the load is reduced below a predetermined load factor. This control circuit has an input voltage detection unit that receives an AC input voltage and detects whether the AC input voltage is a high voltage system or a low voltage system. The control circuit also switches the switching frequency reduction gain characteristic according to the detection result of the input voltage detection unit so that the switching frequency characteristic with respect to the load factor does not change in both the high voltage system and the low voltage system. A frequency reduction gain setting unit to be controlled is included. The control circuit further includes a variable frequency oscillating unit that determines the switching frequency of the switching element based on the output voltage of the frequency reduction gain setting unit.

  According to such a control circuit for a switching power supply device and a switching power supply device, the frequency reduction gain setting unit has a frequency reduction gain characteristic for a high-voltage system and a frequency reduction gain characteristic for a low-voltage system, which are used as an AC input voltage. Changed according to. As a result, the frequency characteristics with respect to the load factor, which showed different characteristics when operating in the high-pressure system and when operating in the low-pressure system, can be made substantially the same. For this reason, it is possible to share a countermeasure against sound generated when the frequency is reduced to the audible range.

  The switching power supply control circuit and the switching power supply having the above configuration have two types of frequency reduction gain characteristics, and are switched according to the AC input voltage so that the frequency characteristics with respect to the load factor do not change. As a result, sound may occur when the frequency is reduced to the audible range, but there is an advantage that it is not necessary to take measures against the sound for each AC input voltage.

It is a figure which shows the circuit structure of the switching power supply device incorporating the control circuit which concerns on this Embodiment. It is the block diagram of the control circuit which showed the part regarding a power supply operating frequency variable function. It is a circuit diagram which shows the structural example of an input voltage detection part. It is operation | movement explanatory drawing of an input voltage detection part. It is a circuit diagram which shows the structural example of a frequency reduction gain setting part. It is a figure which shows the gain characteristic of a frequency reduction gain setting part. It is a figure which shows the numerical example of the various elements which comprise a frequency reduction gain setting part. It is a circuit diagram which shows the structural example of a variable frequency oscillation part. It is a figure which shows the characteristic of the power supply operating frequency with respect to the load factor of a control circuit. It is a figure which shows the power supply operating frequency reduction characteristic with respect to a load factor when alternating current input voltage differs.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a diagram showing a circuit configuration of a switching power supply device incorporating a control circuit according to the present embodiment.

  The switching power supply device is used by connecting to a commercial AC power supply 1. Each terminal of the AC power supply 1 is connected to one end of the windings 2 a and 2 b constituting the transformer, and the other end of the windings 2 a and 2 b is connected to both terminals of the capacitor 3. The windings 2a and 2b and the capacitor 3 constitute an input filter and have a function of suppressing the passage of a high-frequency current such as a power supply operating frequency.

  Both terminals of the capacitor 3 are connected to the AC input terminal of the diode bridge 4, the positive terminal of the diode bridge 4 is connected to the positive terminal of the capacitor 5, and the negative terminal of the diode bridge 4 is grounded. One terminal of the capacitor 3 is connected to the anode terminal of the diode 6, and the cathode terminal of the diode 6 is connected to the VH terminal of the control circuit 8 via the current limiting resistor 7.

  The control circuit 8 is configured by an integrated circuit, and includes a LAT terminal for overheat latch protection, an FB terminal for feedback control, an IS terminal for current detection, a GND terminal, a VCC terminal for generating an internal power supply, and an OUT for switching signal output. It has terminals.

  The LAT terminal of the control circuit 8 is connected to one end of the thermistor 9, and the other end of the thermistor 9 is grounded. The FB terminal of the control circuit 8 is connected to input a signal corresponding to the output voltage. The IS terminal of the control circuit 8 is connected to a common connection point of the capacitor 10 and the resistor 11, the other end of the capacitor 10 is grounded, and the other end of the resistor 11 is connected to the sense resistor 12. The capacitor 10 and the resistor 11 constitute a noise filter for the signal detected by the sense resistor 12. The VCC terminal of the control circuit 8 is connected to the positive terminal of the capacitor 13 and the cathode terminal of the diode 14, and the negative terminal of the capacitor 13 is grounded. The anode terminal of the diode 14 is connected to one end of the auxiliary winding 15 of the transformer T, and the other end of the auxiliary winding 15 is grounded. The capacitor 13, the diode 14, and the auxiliary winding 15 constitute a circuit that converts an AC voltage generated in the auxiliary winding 15 into a DC voltage, and constitute a power supply circuit of the control circuit 8. The OUT terminal of the control circuit 8 is connected to the control terminal of the switching element 16. In the illustrated example, the switching element 16 uses an N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The gate terminal of the MOSFET is connected to the OUT terminal of the control circuit 8, the source terminal is grounded via the sense resistor 12, and the drain terminal is connected to one end of the primary winding 17 of the transformer T. The other end of the primary winding 17 of the transformer T is connected to the positive terminal of the capacitor 5.

  The transformer T has a secondary winding 18, one end of which is connected to the anode terminal of the diode 19. The cathode terminal of the diode 19 is connected to the positive terminal of the capacitor 20, and the negative terminal of the capacitor 20 is connected to the other end of the secondary winding 18 and grounded. The secondary winding 18, the diode 19 and the capacitor 20 constitute a circuit for converting the AC voltage generated in the secondary winding 18 into a DC voltage, and constitute an output circuit of the switching power supply device.

  The positive terminal of the capacitor 20 is connected to the anode terminal of the light emitting diode 21a of the photocoupler 21, the cathode terminal of the light emitting diode 21a is connected to the cathode terminal of the shunt regulator 22, and the anode terminal of the shunt regulator 22 is grounded. . The shunt regulator 22 is connected to a connection point of resistors 23 and 24 connected in series between the positive electrode terminal and the negative electrode terminal of the capacitor 20, and an output voltage divided by the resistors 23 and 24 (capacitor 20 output voltage). The voltage between both ends is compared with a reference voltage (not shown). The phototransistor 21b of the photocoupler 21 has a collector terminal connected to the FB terminal of the control circuit 8, and an emitter terminal grounded. The positive terminal of the capacitor 20 is also connected to the output terminal 25 of the switching power supply device, and the output terminal 25 is connected to the load 26.

  In the switching power supply having the above configuration, the AC input voltage of the AC power supply 1 is supplied to the diode bridge 4 via the transformers 2a and 2b and the capacitor 3 that constitute the input filter, and is full-wave rectified by the diode bridge 4. Smoothed by the capacitor 5. A DC voltage obtained by rectifying and smoothing the AC input voltage is supplied to the primary winding 17 of the transformer T. The pulsating voltage obtained by half-wave rectifying the AC input voltage with the diode 6 is supplied to the VH terminal of the control circuit 8 via the current limiting resistor 7.

  The control circuit 8 is activated by receiving a pulsating voltage at the VH terminal, and starts on / off control of the switching element 16. When the switching element 16 is turned on, a current flows to the ground via the primary winding 17 of the transformer T, the switching element 16 and the sense resistor 12, and energy is stored in the core of the transformer T. At this time, since the secondary winding 18 of the transformer T has an input / output phase opposite to that of the primary winding 17, the voltage on the secondary side is reverse-biased by the diode 19, and the current on the secondary side is Not flowing.

  When the switching element 16 is turned off, no current flows on the primary side of the transformer T. However, in order to release the energy of the transformer from the secondary side, a current flows in the forward direction of the diode 19, and the current flows to the capacitor 20 and the load 26.

  As described above, the switching element 16 is repeatedly turned on and off, so that the energy of the AC input voltage is stored in the transformer T, and the stored energy is transmitted to the secondary-side capacitor 20 and from the output terminal 25. The load 26 is supplied. Similarly, a part of the energy stored in the transformer T is also taken out from the auxiliary winding 15 of the transformer T and charged to the capacitor 13 via the diode 14. The voltage of the capacitor 13 is the VCC of the control circuit 8. The terminal is supplied as a power supply voltage for the control circuit 8.

  The output voltage of the switching power supply is detected by the shunt regulator 22 and fed back to the FB terminal of the control circuit 8 via the photocoupler 21, and the control circuit 8 performs PWM (Pulse Width Modulation) control so that the output voltage becomes constant. I do.

  The shunt regulator 22 compares the voltage obtained by dividing the output voltage with the resistors 23 and 24 with the internal reference voltage, and controls the current that flows through the light emitting diode 21a of the photocoupler 21 according to the change in the output voltage. When the output voltage decreases with a high load, the current flowing through the light emitting diode 21a of the photocoupler 21 decreases, and the amount of light emission decreases. The on-resistance of the phototransistor 21b of the photocoupler 21 increases as the amount of received light decreases, and the voltage at the FB terminal of the control circuit 8 increases. In response to the voltage at the FB terminal becoming higher, the control circuit 8 controls the switching element 16 to widen the ON width and raise the output voltage. On the contrary, when the output voltage rises due to the light load state, the current flowing through the light emitting diode 21a of the photocoupler 21 increases, and the amount of light emission increases. The on-resistance of the phototransistor 21b of the photocoupler 21 decreases as the amount of received light increases, and the voltage at the FB terminal of the control circuit 8 decreases. In response to the voltage drop at the FB terminal, the control circuit 8 controls the switching element 16 to narrow the ON width and lower the output voltage. In this way, the shunt regulator 22 monitors the output voltage, and the photocoupler 21 feeds it back to the control circuit 8, so that the control circuit 8 performs PWM control so that the output voltage becomes constant.

  Here, as described above, if the conditions of the power supply operating frequency and the load factor are the same, the higher the AC input voltage, the higher the rate of increase of energy stored in the transformer during the ON period of the switching element. Since feedback is applied more strongly so as to narrow the ON width of the switching element, the voltage of the FB terminal is reduced more quickly in the 200 V system than in the 100 V system.

  The control circuit 8 also determines the load factor of the load 26 based on the voltage of the FB terminal fed back by the photocoupler 21 (as described above, the higher the load factor, the higher the voltage of the FB terminal and the load factor becomes The lower the voltage, the lower the voltage at the FB terminal.), And the function of varying the power supply operating frequency according to the load factor. This will be described below.

FIG. 2 is a block diagram of the control circuit showing a part related to the power supply operating frequency variable function.
The control circuit 8 includes an input voltage detection unit 30, a frequency reduction gain setting unit 40, a variable frequency oscillation unit 50, and a drive circuit 60. The input voltage detection unit 30 detects whether the voltage of the AC power supply 1 is a 100V system or a 200V system from the pulsating voltage input to the VH terminal. The frequency reduction gain setting unit 40 switches the frequency reduction gain characteristic according to the detection result by the input voltage detection unit 30, determines the load factor from the voltage input to the FB terminal, and sets the frequency reduction gain. The variable frequency oscillating unit 50 generates a triangular wave of the power supply operating frequency according to the frequency reduction gain characteristic set by the frequency reduction gain setting unit 40. The drive circuit 60 compares the triangular wave of the power supply operating frequency generated by the variable frequency oscillating unit 50 with the voltage input to the FB terminal, generates and amplifies a PWM signal for PWM control of the switching element 16, and 16 is driven.

  Hereinafter, specific configurations and operations of the input voltage detection unit 30, the frequency reduction gain setting unit 40, and the variable frequency oscillation unit 50 of the control circuit 8 will be sequentially described with reference to the drawings.

FIG. 3 is a circuit diagram showing a configuration example of the input voltage detector, and FIG. 4 is an operation explanatory diagram of the input voltage detector.
The input voltage detection unit 30 includes two hysteresis comparators 31 and 32, an inverter 33, and a D-type flip-flop circuit 34. The non-inverting input terminals of the hysteresis comparators 31 and 32 are connected to the VH terminal of the control circuit 8. The output of the hysteresis comparator 31 is connected to the input of the inverter 33, and the output of the inverter 33 is connected to the clock input terminal CLK of the D-type flip-flop circuit 34. The output of the hysteresis comparator 32 is connected to the data input terminal D of the D-type flip-flop circuit 34. Actually, the VH terminal and the non-inverting input terminals of the hysteresis comparators 31 and 32 are not directly connected, but are connected via a voltage dividing circuit (not shown). That is, a voltage obtained by dividing the voltage at the VH terminal to a low voltage is input to the non-inverting input terminals of the hysteresis comparators 31 and 32. In order to make the relationship between the voltages easy to understand, in the following description, it is assumed that the voltage at the VH terminal is directly input. In fact, the voltage is divided as described above, and the value of the related reference voltage also corresponds to the divided voltage.

  The hysteresis comparator 31 and the inverter 33 constitute a clock generation circuit, and the hysteresis comparator 32 constitutes a high input voltage detection circuit. The hysteresis comparators 31 and 32 are connected to reference voltage sources 35 and 36 for setting a threshold value for comparison at their inverting input terminals. The reference voltage sources 35 and 36 are for setting hysteresis characteristics. Each has two values. That is, as shown in FIG. 4, the reference voltage source 35 of the hysteresis comparator 31 has values of thresholds VT1H and VT1L, and the reference voltage source 36 of the hysteresis comparator 32 has values of thresholds VT2H and VT2L. Yes. The thresholds VT1H and VT1L are set to values smaller than the peak value of the 100V half-wave waveform and satisfying VT1H> VT1L. On the other hand, the threshold value VT2H is set to a value larger than the peak value of the 100V system half-wave waveform and smaller than the peak value of the 200V system half-wave waveform, and the threshold value VT2L is set to a value satisfying VT1L> VT2L. ing.

  Here, the operation in the case where a 200 V AC power supply 1 is connected as the power supply and the half-wave rectified voltage waveform is input to the VH terminal (the waveform in the left half of FIG. 4) will be described. First, until the voltage waveform subjected to half-wave rectification is input, the hysteresis comparators 31 and 32 are inverters that receive their low (L) level and L level because their non-inverting input terminals have values close to zero. The output 33 is at a high (H) level. When a 200 V half-wave rectified voltage waveform is input, first, the hysteresis comparator 31 outputs an H level when the half-wave rectified voltage exceeds the threshold value VT1H, and the output of the inverter 33 receives this. Becomes L level. Subsequently, the output of the hysteresis comparator 32 becomes H level when the half-wave rectified voltage becomes equal to or higher than the threshold value VT2H. After that, when the half-wave rectified voltage becomes equal to or lower than the threshold value VT1L, the hysteresis comparator 31 outputs L level, and the output of the inverter 33 receives this and becomes H level. At this time, the D-type flip-flop circuit 34 inputs the data input to the data input terminal D at the rising edge of the clock input terminal CLK, that is, the H level data, holds the value, and outputs from the output terminal Q. Output. The output signal of the output terminal Q is input to the frequency reduction gain setting unit 40 as a switch signal SW. The value of the output signal at the output terminal Q does not change as long as the input voltage detection unit 30 detects a 200 V half-wave rectified voltage waveform.

  On the other hand, when a 100V AC power source 1 is connected as the power source (the waveform on the right half of FIG. 4), the hysteresis comparator 31 has a half-wave rectified voltage equal to or higher than the threshold value VT1H and the output becomes the H level, and the threshold value VT1L In the following, the output becomes L level, and in response to this, the output of the inverter 33 outputs a signal that becomes L level and H level. The hysteresis comparator 32 of the high input voltage detection circuit is not applied with a voltage equal to or higher than the threshold value VT2H at its non-inverting input terminal, so that its output remains at the L level. Accordingly, since the data of the data input terminal D input at the rising edge of the clock input terminal CLK remains at the L level, the D-type flip-flop circuit 34 outputs the value, that is, the L level signal from the output terminal Q. The The value of the output signal at the output terminal Q does not change as long as the input voltage detection unit 30 detects a 100 V half-wave rectified voltage waveform.

  As described above, the input voltage detection unit 30 detects whether the AC power supply 1 voltage is a 100V system or a 200V system, and when it is a 100V system, an L level signal is a 200V system. In this case, an H level signal is output as the switch signal SW.

  FIG. 5 is a circuit diagram showing a configuration example of the frequency reduction gain setting unit, FIG. 6 is a diagram showing gain characteristics of the frequency reduction gain setting unit, and FIG. 7 is a diagram showing numerical examples of various elements constituting the frequency reduction gain setting unit. It is.

  The frequency reduction gain setting unit 40 includes an amplifier (operational amplifier) fbamp, and an FB terminal of the control circuit 8 is connected to an inverting input terminal thereof. Between the ground potential and the power supply voltage VDD, resistors R1 ', R1, R2, R2' connected in series are connected. The connection point between the resistor R1 and the resistor R2 is connected to the non-inverting input terminal of the amplifier fbamp, and further connected to the output terminal fbamp_out of the amplifier fbamp via the resistor R3. In addition, switches 41 and 42 are connected in parallel to the resistor R1 'and the resistor R2', respectively. These switches 41 and 42 are constituted by semiconductor switches, and their control terminals are configured to receive the switch signal SW of the input voltage detector 30. That is, the switches 41 and 42 are closed (conducted) when receiving an H level switch signal SW (SW = ON) from the input voltage detection unit 30, and are opened when receiving an L level switch signal SW (SW = OFF). (Cut off. The power supply voltage VDD is a constant voltage obtained from the voltage input to the VCC terminal of the control circuit 8.

  This frequency reduction gain setting unit 40 has two types of frequency reduction gain characteristics in which the output voltage decreases linearly when the FB terminal voltage falls below the frequency reduction start voltage. Select whether to use the characteristic.

Next, two types of frequency reduction gain characteristics will be described. To simplify the description, the switches 41 and 42 are closed and the resistors R1 ′ and R2 ′ are short-circuited, that is, for the 200V system. The frequency reduction gain characteristics will be described. Here, as shown in FIG. 5, the current flowing through the resistor R1 is i1, the current flowing through the resistor R2 is i2, the current flowing through the resistor R3 is i3, the voltage at the non-inverting input terminal of the amplifier fbamp is Vfb, and the output terminal fbamp_out Is set to Vo. Then, the currents i1, i2, and i3 can be expressed as follows. Note that the voltage at the non-inverting input terminal of the amplifier fbamp is equal to the voltage Vfb at the FB terminal input to the inverting input terminal of the amplifier fbamp due to a virtual short circuit between the two input terminals of the amplifier fbamp.
i1 = i2 + i3 (1)
i1 = Vfb / R1 (2)
i2 = (VDD−Vfb) / R2 (3)
i3 = (Vo−Vfb) / R3 (4)
When the formulas (2) to (4) are substituted into the formula (1) and arranged, Vo is
Vo = (R3 / R1 + R3 / R2 + 1) .Vfb- (R3 / R2) .VDD (5)
It becomes. Since the resistance value and the power supply voltage do not change, if those items are replaced with constants, equation (5) becomes
Vo = k · Vfb−m (6)
Can be expressed as However,
k = R3 / R1 + R3 / R2 + 1
m = (R3 / R2) · VDD
It is.

  Here, the frequency reduction gain characteristic has an inclination characteristic that the FB terminal voltage starts from a certain point and starts passing through a certain point, and this inclination characteristic is expressed by a linear expression of (6), k Determined by the value of. The FB terminal voltage Vfb1 at the point where the frequency starts to be reduced is, for example, when Vo = VDD / 2, and the FB terminal voltage Vfb2 at the lowest frequency at which the frequency is the lowest is when Vo = 0. is there. Since the FB terminal voltage shows a high value when the load factor increases, it can be considered substantially synonymous with the load factor. However, as described above, the correspondence between the load factor and the FB terminal voltage is different between the 100V system and the 200V system.

  As shown in FIG. 6, in the 200V system, this frequency reduction gain characteristic is such that the output voltage Vo changes from (for example) VDD / 2 to 0 when the FB terminal voltage drops below Vfb1 (200V). It has become.

  On the other hand, in the case of the 100V system, the point at which the frequency reduction starts is the FB terminal voltage Vfb1 (100V) higher than the FB terminal voltage Vfb1 (200V) in the 200V system, and the frequency is reduced faster than in the 200V system It has a characteristic that The frequency reduction gain characteristic of the 100V system has a gentler slope than the characteristic of the 200V system, and the FB terminal voltage Vfb2 (100V) at the lowest frequency matches the FB terminal voltage Vfb2 (200V) of the 200V system. Good. These conditions can be achieved by increasing the values of the resistors R1 and R2 in the 100V system. Therefore, in this frequency reduction gain setting unit 40, resistors R1 ′ and R2 ′ are connected in series to the resistors R1 and R2, respectively, and in the case of the 100V system, the switches 41 and 41 connected in parallel to the resistors R1 ′ and R2 ′. 42 is opened to increase the values of the resistors R1 and R2 to R1 + R1 ′ and R2 + R2 ′, respectively.

  Specific numerical examples of various elements at this time are shown in FIG. Here, it is assumed that the power supply voltage VDD is 5 V, the FB terminal voltage Vfb1 at the start of frequency reduction is Vo = VDD / 2, and the FB terminal voltage Vfb2 at the lowest frequency is Vo = 0. According to this numerical example, the FB terminal voltage Vfb (100 V) at the start of frequency reduction when the AC power supply 1 is a 100 V system is set higher than the FB terminal voltage Vfb (200 V) at the start of frequency reduction when the AC power supply 1 is a 200 V system. . Further, the FB terminal voltage Vfb2 at the lowest frequency is almost the same value in both the 200V system and the 100V system.

  FIG. 8 is a circuit diagram showing a configuration example of the variable frequency oscillation unit. In the following, transistors PM1 to PM4 are P-channel MOSFETs, and transistors NM1 to NM3 are N-channel MOSFETs.

  The variable frequency oscillating unit 50 includes an amplifier (operational amplifier) 51. The output terminal fbamp_out of the frequency reduction gain setting unit 40 is connected to the first non-inverting input terminal of the amplifier 51, and the voltage Vo is applied thereto. The second non-inverting input terminal is connected to a reference power source that outputs a reference voltage vf. The output of the amplifier 51 is connected to the base terminal of the npn transistor 52, and the emitter terminal of the transistor 52 is connected to the inverting input terminal of the amplifier 51 and one end of the resistor R4. The other end of the resistor R4 is grounded. The collector terminal of the transistor 52 is connected to the drain terminal and the gate terminal of the transistor PM1, and the source terminal of the transistor PM1 is connected to the power supply VDD.

  The gate terminal of the transistor PM1 is connected to the gate terminal of the transistor PM2, and the source terminal of the transistor PM2 is connected to the power supply VDD. The gate terminal of the transistor PM1 is also connected to the gate terminal of the transistor PM3, and the source terminal of the transistor PM3 is connected to the power supply VDD. Therefore, the transistor PM1 and the transistor PM2 constitute a first current mirror circuit, and the transistor PM1 and the transistor PM3 constitute a second current mirror circuit.

  The drain terminal of the transistor PM3 is connected to the drain terminal and the gate terminal of the transistor NM1, and the source terminal of the transistor NM1 is grounded. The gate terminal of the transistor NM1 is connected to the gate terminal of the transistor NM2, and the source terminal of the transistor NM2 is grounded. Therefore, the transistor NM1 and the transistor NM2 constitute a third current mirror circuit.

  The drain terminal of the transistor PM2 is connected to the source terminal of the transistor PM4, and the back gate terminal of the transistor PM4 is connected to the power supply VDD. The drain terminal of the transistor PM4 is connected to the drain terminal of the transistor NM3, and the gate terminal of the transistor PM4 is connected to the gate terminal of the transistor NM3. The source terminal of the transistor NM3 is connected to the drain terminal of the transistor NM2, and the back gate terminal of the transistor NM3 is grounded. Here, the transistor PM4 constitutes a switch for turning on / off the current of the first current mirror circuit, and the transistor NM3 constitutes a switch for turning on / off the current of the third current mirror circuit.

  The drain terminals of the transistor PM4 and the transistor NM3 are connected to one end of the capacitor Ct, and the other end of the capacitor Ct is grounded. One end of the capacitor Ct is connected to the non-inverting input terminal of the comparator 53 and the inverting input terminal of the comparator 54. The inverting input terminal of the comparator 53 is connected to a reference voltage source that outputs a reference voltage VthH, and the non-inverting input terminal of the comparator 54 is connected to a reference voltage source that outputs a reference voltage VthL. The reference voltage VthH and the reference voltage VthL have a relationship of VthH> VthL. Thereby, the reference voltage VthH sets an upper limit threshold voltage when the capacitor Ct is charged, and the reference voltage VthL sets a lower limit threshold voltage when the capacitor Ct is discharged.

  The output terminal of the comparator 53 is connected to the reset input terminal R of the RS flip-flop 55, and the output terminal of the comparator 54 is connected to the set input terminal S of the RS flip-flop 55. The inverted output terminal QB of the RS flip-flop 55 is connected to the gate terminals of the transistor PM4 and the transistor NM3. One end of the capacitor Ct is connected to the output terminal of the variable frequency oscillating unit 50. The output terminal of the variable frequency oscillating unit 50 is connected to the input terminal of the drive circuit 60 at the next stage.

  The variable frequency oscillating unit 50 receives the voltage Vo that changes according to the load factor from the frequency reduction gain setting unit 40, converts the voltage Vo into a current, and outputs a pulse signal with a period according to the magnitude of the current. Have.

  The amplifier 51 amplifies the difference between the voltage Vo and the reference voltage vf input to the first and second non-inverting input terminals and the voltage input to the inverting input terminal. The inverting input terminal is virtually short-circuited with the non-inverting input terminal having the smaller input voltage. As a result, a constant current having a value obtained by dividing the voltage of the smaller inverting input terminal by the resistance value of the resistor R4 is passed through the resistor R4. This constant current is turned back by the first current mirror circuit composed of the transistor PM1 and the transistor PM2, and becomes a charging current ic charged in the capacitor Ct via the transistor PM4 forming a switch. The constant current generated by the transistor 52 is also folded by the second current mirror circuit composed of the transistors PM1 and PM3 and transmitted to the third current mirror circuit composed of the transistors NM1 and NM2. The constant current turned back by the third current mirror circuit becomes a discharge current id discharged from the capacitor Ct through the transistor NM3 that forms a switch.

  The voltage of the capacitor Ct is compared with the reference voltages VthH and VthL by the comparators 53 and 54. When the voltage becomes higher than the reference voltage VthH, the RS flip-flop 55 is reset, and when the voltage becomes lower than the reference voltage VthL, the RS flip-flop 55 is set. . The RS flip-flop 55 controls on / off of the transistor PM4 and the transistor NM3 by a pulse signal output from the inverted output terminal QB, repeatedly charges and discharges the capacitor Ct, and outputs a triangular wave from one end of the capacitor Ct.

  Here, when the switching power supply device is operating in a high load factor state, the voltage Vo supplied from the frequency reduction gain setting unit 40 is higher than the reference voltage vf. When the voltage Vo is higher than the reference voltage vf, the amplifier 51 generates a constant current corresponding to the reference voltage vf. The constant current becomes the charging current ic or the discharging current id when the transistor PM4 and the transistor NM3 are exclusively controlled to turn on and off, and the capacitor Ct is charged and discharged with the constant current, and the terminal voltage thereof is a triangular wave. Voltage. The triangular wave voltage is compared with the reference voltages VthH and VthL by the comparators 53 and 54 to become a binary signal, and the RS flip-flop 55 is set and reset. At this time, the period of the triangular wave is the shortest, and the variable frequency oscillating unit 50 oscillates at the highest frequency. This oscillation frequency is a fixed frequency that is much higher than the frequency in the audible region, for example, 65 kHz.

  Next, when the load factor decreases and the voltage Vo becomes lower than the reference voltage vf, the amplifier 51 generates a constant current corresponding to the voltage Vo. Since this constant current is smaller than the constant current corresponding to the reference voltage vf, the period for charging and discharging the capacitor Ct becomes longer, and the oscillation frequency is reduced accordingly.

  Next, the operation of the control circuit 8 when the two types of frequency reduction gain characteristics are switched depending on whether the AC power supply 1 input to the switching power supply device is a 200V system or a 100V system will be described.

FIG. 9 is a graph showing the characteristics of the power supply operating frequency with respect to the load factor of the control circuit.
According to this control circuit 8, in the frequency reduction gain setting unit 40, the gain characteristic is such that the voltage Vfb at the FB terminal that starts frequency reduction in the frequency reduction gain characteristic of the 100V system moves to a higher voltage side than in the 200V system. The slope and minimum frequency were adjusted. As a result, when the voltage Vfb decreases, the power supply operating frequency starts to be reduced earlier than in the case of the 200V system. As a result, the 200 V system cancels the above-described characteristic that the FB terminal voltage Vfb is reduced more quickly than the 100 V system, and the characteristic of the power supply operating frequency with respect to the load factor is the switching power supply as shown in FIG. Even if a 200V AC power source 1 is used in the apparatus or a 100V AC power source 1 is used, substantially the same characteristics are obtained. Therefore, when the switching power supply device is operated at a light load factor, the timing at which the power supply operating frequency decreases to the audible range can be made the same regardless of the difference in AC input voltage. This means that there is no need to individually adjust for vibration isolation according to the magnitude of the power supply voltage used.

  In the above embodiment, as a method of varying the frequency reduction gain, one of the two resistors connected in series is short-circuited or opened, but one of the two resistors connected in parallel is connected by a switch. Or you may make it the structure open | released.

  In the above embodiment, the frequency reduction gain on the low-voltage system side is adjusted so that the low-voltage characteristic matches the high-voltage characteristic with respect to the power supply operating frequency characteristic with respect to the load factor. The frequency reduction gain on the high voltage system side may be adjusted to match the system characteristics.

DESCRIPTION OF SYMBOLS 1 AC power supply 2a, 2b Winding 3 Capacitor 4 Diode bridge 5 Capacitor 6 Diode 7 Current limiting resistance 8 Control circuit 9 Thermistor 10 Capacitor 11 Resistance 12 Sense resistance 13 Capacitor 14 Diode 15 Auxiliary winding 16 Switching element 17 Primary winding 18 2 Next winding 19 Diode 20 Capacitor 21 Photocoupler 21a Light emitting diode 21b Phototransistor 22 Shunt regulator 23, 24 Resistor 25 Output terminal 26 Load 30 Input voltage detector 31, 32 Hysteresis comparator 33 Inverter 34 D-type flip-flop circuit 35, 36 Reference Voltage source 40 Frequency reduction gain setting unit 41, 42 Switch 50 Variable frequency oscillating unit 51 Amplifier 52 Transistor 53, 54 Comparator 55 RS type F Flop 60 drive circuit

Claims (6)

A DC voltage obtained by rectifying an AC input voltage is connected to a transformer by turning on the switching element, energy is stored in the transformer, and a predetermined DC voltage is output to the load by releasing the energy by turning off the switching element. In the flyback type switching power supply device, the control circuit for the switching power supply device that controls to reduce the switching frequency of the switching element when the load is reduced below a predetermined load factor,
An input voltage detector that detects whether the AC input voltage is input and the AC input voltage is a high-voltage or low-voltage system;
A frequency reduction gain setting unit configured to switch a reduction gain characteristic of the switching frequency according to a detection result by the input voltage detection unit;
A control circuit for a switching power supply device, comprising:   The frequency reduction gain setting unit sets a reduction start point of the reduction gain characteristic that is switched in the low pressure system to a higher load factor side than a reduction start point in the high pressure system, and 2. The control of a switching power supply device according to claim 1, wherein characteristics of the switching frequency are made substantially the same when operating in the high voltage system and when operating in the low voltage system. circuit.   The frequency reduction gain setting unit includes: an amplifier that inputs a feedback signal corresponding to a voltage output to the load to a first input terminal; a first resistor connected in series between a ground potential and a power supply voltage; The second resistor, the third resistor, and the fourth resistor, one end of which is connected to the output of the amplifier, and the other end is connected to the second input terminal of the amplifier, the second resistor, and the third resistor. And a first switch and a second switch connected in parallel to the first resistor and the fourth resistor, and a second input terminal of the amplifier includes the first resistor and a second switch. A connection point between the second resistor and the third resistor is connected, and when the input voltage detection unit detects the low voltage system, the first and second switches are opened and the high voltage system is detected. When the first and second switches are closed The control circuit of the switching power supply device according to claim 1, wherein a.   4. The control circuit for a switching power supply device according to claim 3, further comprising a variable frequency oscillating unit that determines the switching frequency based on an output voltage of the amplifier.   The input voltage detection unit has a threshold value between the peak of the low-voltage system voltage and the peak of the high-voltage system voltage, and compares the threshold value with the AC input voltage; and the AC A circuit that holds a signal indicating whether or not the comparator detects that the AC input voltage is higher than the threshold value in a half cycle of the input voltage, and reduces the held signal in the frequency reduction gain setting unit 2. The control circuit for a switching power supply device according to claim 1, wherein the control circuit is used for switching a gain characteristic. A DC voltage obtained by rectifying an AC input voltage is connected to a transformer by turning on the switching element, energy is stored in the transformer, and a predetermined DC voltage is output to the load by releasing the energy by turning off the switching element. In the flyback type switching power supply, the switching power supply comprising a control circuit that controls to reduce the switching frequency of the switching element when the load is reduced below a predetermined load factor.
The control circuit includes:
An input voltage detector that detects whether the AC input voltage is input and the AC input voltage is a high-voltage or low-voltage system;
The switching frequency reduction gain characteristic is switched according to the detection result by the input voltage detection unit, and the switching frequency characteristic with respect to the load factor is operated in the high voltage system and in the low voltage system And a frequency reduction gain setting unit that controls to be substantially the same, and
A variable frequency oscillating unit that determines the switching frequency according to an output voltage of the frequency reduction gain setting unit;
A switching power supply device comprising:

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