JP2013048321A - Balance filter, chip-type balance filter, and power-line communication apparatus having them - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a balance filter that allows downsizing.SOLUTION: A balance filter includes: a balanced input terminal 1 including first and second input ports P1 and P2; a balanced output terminal 2 including first and second output ports P3 and P4; a first resonant circuit 31 connected between the first input port P1 and the first output port P3 and including a first coil element L21; and a second resonant circuit 41 connected between the second input port P2 and the second output port P4 and including a second coil element L22. The first coil element L21 and the second coil element L22 are disposed so that magnetic fluxes generated from respective coils form a closed magnetic path, and are coupled to each other by a mutual inductance M1.

Description

  The present invention relates to a balance filter and a chip-type balance filter in which at least two resonance circuits are connected between a balanced input terminal and a balanced output terminal, and a power line communication apparatus including these.

  Power line communication (PLC) is a technology that uses a power line as a communication circuit. In power line communication, for example, an existing power line stretched in an area such as a home or office is used for communication. According to the power line communication technology, it is not necessary to install a new communication cable, and a communication network can be easily constructed in the area. Hereinafter, what was described in patent document 1 as an example of the conventional power line communication apparatus is demonstrated.

  A conventional power line communication device is called a PLC modem in Patent Document 1, and is connected to a power line via an RF circuit, a coupler, or the like. More specifically, the RF circuit has a balance filter for removing noise superimposed on the reception signal from the power line on the reception path.

  As shown in FIG. 12, a conventional balance filter includes a pair of lines 601 and 602 that transmit a positive phase signal and a negative phase signal that are in a balanced relationship with each other, and an LC parallel resonance circuit disposed on the lines 601 and 602. 251a3 and 251a4.

JP 2009-232257 A

  However, if the balance filter is to be reduced in size or stacked, depending on the arrangement of the coil elements included in the LC parallel resonance circuits 251a3 and 251a4 (see FIG. 12), magnetic fields generated from the coil elements may be coupled. . When magnetic fields are combined in this way, the inductance of each coil element changes and the Q value of each coil element may deteriorate. As a result, a large loss occurs due to the insertion of the balance filter, or the pass characteristic of the balance filter is lost. Therefore, the conventional balance filter has a problem that it is difficult to reduce the size. In particular, in the case of a multistage balance filter, a change in inductance greatly affects the filter characteristics, which causes performance degradation.

  In view of the above problems, an object of the present invention is to provide a balance filter that can be reduced in size, a chip-type balance filter, and a power line communication device including these.

  In order to achieve the above object, a balanced filter according to a first aspect of the present invention includes a balanced input terminal including first and second input ports, a balanced output terminal including first and second output ports, A first resonance circuit including a first coil element connected between one input port and the first output port; and a second resonance element connected between the second input port and the second output port. And a second resonance circuit. Here, the first and second coil elements are arranged such that magnetic fluxes generated from the first and second coil elements form a closed magnetic circuit, and are coupled to each other by mutual inductance.

  In the chip-type balance filter according to the second aspect of the present invention, the first and second resonance circuits are formed in a magnetic layer formed by laminating a plurality of magnetic sheets.

  A power line communication device according to the third aspect of the present invention includes the balance filter or the chip-type balance filter.

  According to each aspect of the present invention, it is possible to reduce the size of a balance filter, a chip-type balance filter, and a power line communication device including these.

It is a circuit diagram which shows the structure of the balance filter which concerns on 1st Embodiment. It is a schematic diagram which shows each closed magnetic circuit formed in the balance filter of FIG. It is a figure which shows an example of the coupling coefficient between the element value and coil of the balance filter of FIG. It is a graph which shows an example of the interruption | blocking characteristic and insertion loss characteristic of this balance filter. It is a longitudinal cross-sectional view of the chip-type balance filter which concerns on 2nd Embodiment. (A) is a top view of the nonmagnetic sheet on the upper layer side of the fourth nonmagnetic layer of the chip-type balance filter, and (B) is the upper surface of the nonmagnetic sheet on the lower layer side of the nonmagnetic layer. FIG. (A)-(E) are top views which show each magnetic body sheet member which comprises a 3rd magnetic body layer. (A) is a top view of a nonmagnetic material sheet constituting the third nonmagnetic material layer, and (B) to (F) are top view of each magnetic material sheet layer constituting the second magnetic material layer. is there. (A) is a top view of the nonmagnetic material sheet constituting the second nonmagnetic material layer, and (B) to (F) are top views of the magnetic material sheets constituting the first magnetic material layer. . (A) is a figure which shows the upper surface side of the sheet-like member of the 1st nonmagnetic material layer which comprises a chip | tip balance filter, (B) is a figure which shows the lower surface side of the same sheet-like member. It is a block diagram which shows the structure of the power line communication apparatus which concerns on 3rd Embodiment. It is a circuit diagram which shows the structure of the conventional balance filter.

  Hereinafter, the balance filter according to the first embodiment will be described in detail with reference to FIGS. In FIG. 1, the balance filter includes a balanced input terminal 1 having first and second input ports P1 and P2, and a balanced output terminal 2 having first and second output ports P3 and P4. In this balanced filter, the first signal path 3 is formed between the first input port P1 and the first output port P3, and the second signal path 4 is formed between the second input port P2 and the second output port P4. Is done. These first and second signal paths 3 and 4 constitute a balanced transmission line (differential transmission line) through which a differential signal is transmitted. The differential signal includes a normal phase signal and a negative phase signal having a phase difference of 180 degrees with respect to the normal phase signal.

  A first resonance circuit 31 is provided in the first signal path 3. A first coil element L21 and a first capacitor element CP11 are connected in parallel to the first resonance circuit 31. A second resonance circuit 41 is provided in the second signal path 4. A second coil element L22 and a second capacitor element CP12 are connected in parallel to the second resonance circuit 41. Each resonance circuit 31, 41 functions as, for example, a low-pass filter.

  Further, as shown in FIG. 1, the first and second coil elements L21 and L22 are connected via a mutual inductance M1. Further, when a differential signal is given to the balanced input terminal 1, magnetic flux is generated from the coil elements L21 and L22. As shown in FIG. 2, the first and second coil elements L21 and L22 are arranged so that this magnetic flux forms a closed magnetic circuit. That is, the coil elements L21 and L22 are magnetically coupled in opposite phases. Both coil elements L21 and L22 are preferably close to each other.

  As described above, the magnetic fluxes from the coil elements L21 and L22 constitute a closed magnetic circuit, and the coil elements L21 and L22 are magnetically coupled to each other. According to this configuration, the inductance values of both coil elements L21 and L22 appear to be larger than when the two coils are not magnetically coupled. As a result, both the coil elements L21 and L22 can be reduced in size, and further, the deterioration of the Q value of both the coil elements can be suppressed. In this way, by suppressing the deterioration of the Q value, it is possible to provide a small balance filter having a low insertion loss and a steep cutoff characteristic.

  Further, in the present balanced filter, as shown in FIG. 1, the third resonance circuit 32 is connected in series between the first resonance circuit 31 and the first output port P3 on the first signal path 3. A third coil element L31 and a third capacitor element CP21 are connected to the third resonance circuit 32 in parallel. Further, the fourth resonance circuit 42 is connected in series between the second resonance circuit 41 and the second output port P4 on the second signal path 4. A fourth coil element L32 and a fourth capacitor element CP22 are connected to the fourth resonance circuit 42 in parallel.

  Here, both the coil elements L31 and L32 are magnetically coupled in opposite phases to each other, as in the case of both the coil elements L21 and L22. The mutual inductance between the coil elements L31 and L32 is M2.

  In this balance filter, a secondary low-pass filter is configured by connecting the resonance circuits 32 and 42 in series in the subsequent stage of the resonance circuits 31 and 41. As a result, it is possible to realize a low-pass filter having a cutoff characteristic steeper than that of the first-order filter. Although the second-order low-pass filter is exemplified in the present embodiment, the present invention is not limited thereto, and the balance filter may include a third-order or higher-order low-pass filter.

  In the present balanced filter, the fifth resonance circuit 33 is connected in series between the first resonance circuit 31 and the first input port P1 on the first signal path 3. The fifth resonance circuit 33 is a series resonance circuit including a fifth capacitor element CH11 and a fifth coil element L11. A sixth resonance circuit 43 is connected in series between the second resonance circuit 41 and the second input port P2 on the second signal path 4. The sixth resonance circuit 43 is a series resonance circuit including a sixth capacitor element CH12 and a sixth coil element L12.

  Here, the two coil elements L11 and L12 are magnetically coupled in opposite phases to each other, as in the case of the two coil elements L21 and L22. The mutual inductance between the coil elements L11 and L12 is M3.

  The resonance circuits 33 and 43 block low frequency band signals in the pass band of the low pass filter. Thereby, this balance filter functions as a band pass filter.

  In the balance filter having the above configuration, a normal phase signal and a negative phase signal are input to the first and second input ports P1 and P2. Only the signal component included in the predetermined pass band is extracted from the input positive-phase signal by the band-pass filter including the resonance circuits 31 to 33, and the positive-phase signal whose frequency is selected is output from the first output port P3. Also, the input anti-phase signal is extracted by the band-pass filter composed of the resonance circuits 41 to 43, only the signal component included in the pass band substantially the same as described above, and the frequency-selected anti-phase signal is output from the second output port P4. Is done.

  In the present embodiment, the balance filter is configured so that the coil elements L21, L31, L11 on the first signal path 3 are not substantially coupled to each other. Similarly, the coil elements L22, L32, L12 on the second signal path 4 are not coupled to each other. If coils on the same signal path are coupled, the balance filter does not have frequency selectivity. For example, when the coupling degree of the coil elements L21 and L31 in FIG. 1 is extremely high (for example, when the coupling coefficient k is 1), the filter including the resonance circuits 31 and 32 becomes an all-pass filter. Therefore, the coil elements on the same signal path are not coupled to each other. When the degree of coupling is low, the balance filter has frequency selectivity, but there is a tendency that the attenuation amount in the frequency band to be attenuated becomes small.

  The first signal path 3 and the second signal path 4 are capacitively coupled by a plurality of capacitor elements. In the example of FIG. 1, the input terminals of the resonance circuits 31 and 41 are connected by a seventh capacitor element C1. The output terminals of the resonance circuits 31 and 41 are connected to each other by the eighth capacitor element C2, and the output terminals of the resonance circuits 32 and 42 are connected to each other by the ninth capacitor element C3. The element values of the resonance circuits 31 and 41 are substantially the same. The element values of the resonance circuits 32 and 42 are substantially the same, and the element values of the resonance circuits 33 and 43 are also substantially the same. Therefore, the potential midpoint (virtual ground a in FIG. 1) of the positive phase signal and the negative phase signal comes at the capacitor elements C1 to C3. Thus, each circuit on the first signal path 3 and each circuit on the second signal path 4 have sufficient symmetry. The first signal path 3 and the second signal path 4 are not limited to capacitive coupling, and may be coupled via a coil element.

  Here, as shown in FIG. 3, the inductance values of the coil elements L21 and L22 are 330 nH, the coil elements L31 and L32 are 450 nH, and the coil elements L11 and L12 are 550 nH. The capacitance values of the capacitor elements CP11 and CP12 are 62 pF, the capacitor elements CP21 and CP22 are 39 pF, and the capacitor elements CH11 and CH12 are 980 pF. The capacitance values of the capacitor elements C1, C2, and C3 are 33 pF, 18 pF, and 12 pF. In addition, the coupling coefficient k between two coils having a symmetrical relationship is 0.1.

  In the example of the element value described above, the present balance filter (band pass filter) has a cutoff characteristic as shown in FIG. In FIG. 4, the cut-off frequency on the high frequency side is approximately 30.0 MHz at a gain drop point (−3.5 dB compression point) of approximately 3.5 dB, as indicated by m1. The balance filter attenuates a frequency component of approximately 34.5 MHz by about 44.0 dB (see m3). The cut-off frequency on the low frequency side is approximately 2.0 MHz at a gain reduction point of approximately 3.7 dB, as indicated by m2. In addition, the balance filter attenuates a frequency component in the vicinity of 160.0 kHz by approximately 15.7 dB (see m4). In addition, with respect to the insertion loss of the balance filter, a low loss is realized over a wide frequency band of 0 to 50 MHz.

  In this balance filter, by adjusting the element value of the second-order low-pass filter, two attenuation poles are created at different frequency positions on the high frequency side as shown in the cutoff characteristic curve of FIG. ing.

  As described above, in the balance filter, first, the first and second coil elements L21 and L22 constitute a closed magnetic circuit. The same applies to the third and fourth coil elements L31 and L32, and the fifth and sixth coil elements L11 and L12. Thereby, for example, the number of turns of each coil element can be relatively reduced. Furthermore, the first and second coil elements L21 and L22 are magnetically coupled. The same applies to the third and fourth coil elements L31 and L32, and the fifth and sixth coil elements L11 and L12. The apparent inductance of each coil element can be increased by magnetic coupling as compared with the case where these coil elements are not magnetically coupled. With the above two technical features, each coil element can be made smaller than before, and further, the deterioration of the Q value can be suppressed. Furthermore, it has a sharp insertion characteristic with a low insertion loss, and a small balance filter can be provided.

  In the balance filter, the coil elements on the first signal path 3 are not substantially coupled to each other, and the coil elements on the second signal path 4 are not substantially coupled. Thereby, for example, the positive phase signal component does not exceed the seventh capacitor element C1 and is not input to the second coil element L22 of the second resonance circuit 41, so that the phase change does not occur in the negative phase signal. The phase difference of 180 degrees of the reverse phase signal can be reliably maintained.

(Second Embodiment)
Next, the chip type balance filter according to the second embodiment will be described in detail with reference to FIGS. This chip type balance filter is obtained by using the balance filter of the first embodiment as a surface mount type component. Therefore, in the chip-type balance filter of FIGS. 5 to 10, the description corresponding to the configuration of the balance filter shown in FIGS. 1 to 4 is omitted.

  As shown in FIG. 5, the chip-type balance filter includes a laminated chip 50 having a substantially rectangular parallelepiped shape. In the multilayer chip 50, the first non-magnetic layer 51, the first magnetic layer 52, the second non-magnetic layer 53, the second magnetic layer 54, and the third non-magnetic body from the lower surface side toward the upper surface side. The layer 55, the third magnetic layer 56, and the fourth nonmagnetic layer 57 are stacked in this order. Each of the nonmagnetic layers 51, 53, 55, 57 is made of a sheet-like member made of ferrite or the like having a relatively low magnetic permeability (for example, μ = 1). On the other hand, each of the magnetic layers 52, 54, 56 is formed by laminating a plurality of sheet-like members made of ferrite or the like having a permeability (for example, μ = 100) higher than the permeability of each of the nonmagnetic layers. The By sandwiching the magnetic layers 52, 54, and 56 between the nonmagnetic layers 51, 53, 55, and 57, coil elements formed in each magnetic layer are coil elements formed in other magnetic layers. Magnetic field coupling is less likely to occur between This is because the magnetic path generated by the coil element formed in the magnetic layer becomes a closed magnetic path in the magnetic layer. In the following description, the sheet-like member constituting each nonmagnetic material layer is referred to as a nonmagnetic material sheet, and the sheet-like member constituting each magnetic material layer is referred to as a magnetic material sheet. FIG. 5 also shows cross sections of each magnetic layer and each non-magnetic layer, but these are not hatched for the sake of illustration.

  First, as shown in FIGS. 5 and 10, the first nonmagnetic layer 51 as the lowermost layer has a nonmagnetic sheet 51 a. Here, FIG. 10A shows the upper surface of the nonmagnetic material sheet 51a, and FIG. 10B shows the lower surface of the nonmagnetic material sheet 51a. On this lower surface (that is, the back surface of the multilayer chip 50), input ports P1 and P2 and output ports P3 and P4 made of metal conductors are formed so that they can be mounted on a printed wiring board or the like (FIG. 10B )). Furthermore, as shown in FIGS. 10A and 10B, a plurality of vias are formed in the nonmagnetic sheet 51a. Specifically, one via is formed to conduct the first input port P1, and similarly, one via is formed to conduct the second input port P2, the first and second output ports P3, P4. Is formed. For example, in FIG. 10A, one via is denoted by reference numeral 51b.

  Next, the uppermost fourth nonmagnetic layer 57 will be described. As shown in FIGS. 6A and 6B, the fourth nonmagnetic layer 57 has two nonmagnetic sheets 57a and 57b. The nonmagnetic material sheet 57a is laminated on the upper side, and the nonmagnetic material sheet 57b is laminated on the lower side. On the upper surface of the nonmagnetic sheet 57a, a metal conductive land is formed as shown by a hatched portion in FIG. In each land, the capacitor element described in the first embodiment (each shown by a dotted line) is mounted. Furthermore, vias that are electrically connected to the lands are formed in the nonmagnetic sheet 57a. Further, as shown in FIG. 6B, the nonmagnetic material sheet 57b is formed with a metal conductive pattern wiring and a plurality of vias. For example, in FIG. 6A, one land has a reference numeral 57c, and in FIG. 6B, one pattern wiring has a reference numeral 57d and one via has a reference numeral 57c. Reference numeral 57e is attached.

  As shown in FIG. 5, vias and lands are appropriately formed in each of the layers 51 to 57 so that the input terminal electrodes of the capacitor elements CH11 and CH12 are electrically connected to the input ports P1 and P2.

  Next, the third non-magnetic layer 55 and the second magnetic layer 54 (see FIG. 5), which are the third and fourth layers, will be described. First, as shown in FIG. 8A, the third nonmagnetic layer 55 has a nonmagnetic sheet 55a in which a plurality of vias are formed. The nonmagnetic sheet 55a functions as a magnetic shield layer of the magnetic layers 54 and 56 so as to suppress magnetic field coupling between the coil elements L11 and L12 and the coil elements L31 and L32. In FIG. 8A, for convenience, reference numeral 55b is attached to one via.

  As shown in FIGS. 8B to 8F, the second magnetic layer 54 includes magnetic sheets 54a to 54e on which the coil elements L11 and L12 are formed. The coil elements L11 and L12 have internal electrodes L11a to L11e and L12a to L12e. The internal electrodes L11a to L11e and L12a to L12e are formed on the lower surfaces of the magnetic sheets 54a to 54e. The internal electrodes L11a to L11e are electrically connected by vias so as to form a coil element L11 having a counterclockwise spiral shape. Further, the internal electrodes L12a to L12e are electrically connected by vias so that the coil element L12 has a clockwise spiral shape.

  The coil element L11 is connected to the output terminal electrode OUT (see FIG. 6A) of the capacitor element CH11 through the input terminal electrode IN on the magnetic material sheet 54e side. The coil element L12 is connected to the output terminal electrode OUT (see FIG. 6A) of the capacitor element CH12 at the input terminal electrode IN on the magnetic material sheet 54a side.

  Next, the second non-magnetic layer 53 and the first magnetic layer 52 (see FIG. 5), which are the fifth and sixth layers, will be described. First, as shown in FIG. 9A, the second nonmagnetic layer 53 includes a nonmagnetic sheet 53a in which a plurality of vias are formed. The nonmagnetic sheet 53a functions as a magnetic shield layer of the magnetic layers 52 and 54 so as to suppress magnetic field coupling between the coil elements L11 and L12 and the coil elements L21 and L22. In FIG. 9A, reference numeral 53b is given to one via.

  As shown in FIGS. 9B to 9F, the first magnetic layer 52 has magnetic sheets 52a to 52e on which the coil elements L21 and L22 are formed. Internal electrodes L21a to L21e constituting the coil element L21 and internal electrodes L22a to L22e constituting the coil element L22 are formed on the lower surfaces of the magnetic sheets 52a to 52e. The internal electrodes L21a to L21e are connected so that the coil element L21 having a counterclockwise spiral shape is formed. Further, the internal electrodes L22a to L22e are connected so that the coil element L22 having a clockwise spiral shape is formed.

  The coil element L21 has an input terminal electrode IN on the magnetic sheet 52e side, an output terminal electrode OUT of the coil element L11 (see FIG. 8B), and output terminal electrodes OUT of the capacitor elements C1 and CP11 (see FIG. 8). 6 (A)). The coil element L22 includes an output terminal electrode OUT of the coil element L12 (see FIG. 8F) and an output terminal electrode OUT of the capacitor elements C1 and CP12 (see FIG. 6A). ))).

  Next, the second magnetic layer 56 (see FIG. 5) that is the second layer from the top will be described. As shown in FIGS. 7A to 7E, the third magnetic layer 56 includes magnetic sheets 56a to 56e. Internal electrodes L31a to L31e constituting the coil element L31 and internal electrodes L32a to L32e constituting the coil element L32 are formed on the lower surfaces of the magnetic sheets 56a to 56e. The internal electrodes L31a to L31e are connected so that the coil element L31 having a counterclockwise spiral shape is formed. Further, the internal electrodes L32a to L32e are connected so that the coil element L32 having a clockwise spiral shape is formed.

  The coil element L31 includes an output terminal electrode OUT of the coil element L21 (see FIG. 9B) and an output terminal electrode OUT of the capacitor element CP11 (see FIG. 6A) at the input terminal electrode IN on the magnetic sheet 56e side. ), The input terminal electrode IN of the capacitor element CP21 and one terminal electrode of the capacitor element C2. The coil element L31 includes an output terminal electrode OUT (see FIG. 6A) of the capacitor element CP21, the other terminal electrode of the capacitor element C2, and a first output port at the output electrode OUT on the magnetic sheet 56a side. Connected to P3.

  The coil element L32 includes an output terminal electrode OUT of the coil element L22 (see FIG. 9B) and an output terminal electrode OUT of the capacitor element CP12 (see FIG. 6A) at the input terminal electrode IN on the magnetic sheet 56e side. ), Connected to the input terminal electrode IN of the capacitor element CP22 and one terminal electrode of the capacitor element C2. The coil element L32 includes an output terminal electrode OUT (see FIG. 6A) of the capacitor element CP22, the other terminal electrode of the capacitor element C2, and a second output port at the output electrode OUT on the magnetic sheet 56e side. Connected to P4.

  The coil elements L11 and L12 are arranged in the second magnetic layer 54 so that the openings are adjacent to each other when the coil elements L11 and L12 described above are viewed in plan from the direction of each winding axis. As a result, the magnetic flux passing through the coil elements L11 and L12 forms a closed magnetic path. Here, as with the coil elements L11 and L12, the coil elements L21 and L22 are formed in the first magnetic layer 52 so that the openings of the coil elements L21 and L22 are adjacent to each other. The coil elements L31 and L32 are also formed in the third magnetic layer 56 by the same method. Therefore, the magnetic flux that passes through the coil elements L31 and L32 and the magnetic flux that passes through the coil elements L31 and L32 form a closed magnetic path.

  Each magnetic layer is formed between two non-magnetic layers arranged one above the other. For example, the first magnetic layer 52 is formed between the first nonmagnetic layer 51 and the second magnetic layer 53. Further, as is apparent from FIG. 5, when the laminated chip 50 is viewed from above, the coil element L11 is formed in a region different from the coil element L21. In other words, the coil elements L11 and L21 are formed on the magnetic layers 54 and 52 so as not to overlap each other in plan view. As described above, in addition to sandwiching each magnetic layer between non-magnetic layers or forming a circuit configuration that forms a closed magnetic circuit, the coil elements at each stage should not overlap each other when viewed in plan. By forming, the magnetic coupling between the coil elements of each stage in different magnetic layers can be further reduced. The coil elements L21 and L22 are formed in the same manner as the coil elements L11 and L21. The coil elements L21 and L22 are formed on the magnetic layers 52 and 56 so as not to overlap each other in a region different from the coil elements L31 and L32 in plan view. As described above, the chip type balance filter is configured such that the coil elements L11, L21, and L31 and the coil elements L12, L22, and L32 are not substantially coupled to each other.

(Third embodiment)
Next, a power line communication apparatus according to the third embodiment will be described in detail with reference to FIG. In FIG. 11, the power line communication apparatus generally includes a PLC communication block 60, a coupler (transformer) 70, and a power supply circuit 80.

  The PLC communication block 60 includes a signal processing circuit 61 and an RF circuit 62. The signal processing circuit 61 includes a baseband IC (hereinafter referred to as BBIC) that modulates and demodulates a transmission signal, and SDRAM and FROM as memory circuits. The RF circuit 62 includes an analog front-end IC (hereinafter referred to as AFE), an attenuator (hereinafter referred to as ATT), a band-pass filter (hereinafter referred to as BPF) 63, a power amplifier, which have a DA conversion circuit, an AD conversion circuit, and a variable amplification circuit (not shown). (Hereinafter referred to as PA), a low-pass filter (hereinafter referred to as LPF), and a DC / DC converter (hereinafter referred to as DC / DC).

  Coupler 70 and power supply circuit 80 are connected to power line 90 through an outlet. The power supply circuit 80 includes a switching power supply and supplies power to necessary circuits such as AFE and BBIC via DC / DC.

  The coupler 70 connects the power line 90 and the RF circuit 62, and includes a coil transformer and a coupling capacitor.

  The power line communication apparatus having the above configuration operates as follows, for example. Data input via the Ethernet (registered trademark) is sent to the BBIC, and digital transmission data is generated by performing digital signal processing. The generated digital transmission data is converted into an analog signal by AFE and output to the power line 90 via the LPF, PA, and coupler 70.

  On the other hand, the received signal from the power line 90 is processed by the BPF via the coupler 70 and ATT and then input to the AFE. In the AFE, for example, gain adjustment or conversion to a digital signal is performed on the input signal, and the digital signal thus obtained is sent to the BBIC. In the BBIC, digital signal processing is performed on an input digital signal to reproduce digital data. The digital data thus obtained is output via Ethernet (registered trademark).

  Here, the RF circuit 62 includes a band-pass filter 63. The band pass filter 63 is configured by the balance filter described in the first embodiment or the chip-type balance filter described in the second embodiment.

  As described above, the balance filter described in the first embodiment or the chip-type balance filter described in the second embodiment may constitute a low-pass filter. A balance filter or a chip-type balance filter that functions as such a low-pass filter may be used as a low-pass filter provided in the data communication transmission system of the RF circuit 62.

  The present invention is typically suitable for a balance filter that can be reduced in size, a chip-type balance filter, and a power line communication device including these. In addition, the present invention can also be applied to an interface using a balanced transmission line (differential transmission line) such as USB (Universal Serial Bus) or HDMI (High-Definition Multimedia Interface).

1 balanced input terminal P1 first input port P2 second input port 2 balanced output terminal P3 first output port P4 second output port 31 first resonance circuit L21 first coil element CP11 first capacitor element 41 second resonance circuit L22 second 2-coil element CP12 Second capacitor element

Claims (10)

A balanced input terminal including first and second input ports;
A balanced output terminal including first and second output ports;
A first resonant circuit connected between the first input port and the first output port and including a first coil element;
A second resonance circuit connected between the second input port and the second output port and including a second coil element;
The first coil element and the second coil element are arranged such that magnetic fluxes generated from the first coil element and the second coil element constitute a closed magnetic path, and are coupled to each other by mutual inductance.
Balance filter. The first resonance circuit is a parallel resonance circuit including the first coil element and a first capacitor element connected in parallel to the first coil element.
The second resonance circuit is a parallel resonance circuit including the second coil element and a second capacitor element connected in parallel to the second coil element.
The balance filter according to claim 1. The balance filter further includes:
A third resonance circuit comprising the third coil element and a third capacitor element connected in parallel to the third coil element;
A fourth resonance circuit comprising the fourth coil element and a fourth capacitor element connected in parallel to the fourth coil element;
The third resonance circuit is connected in series to the subsequent stage of the first resonance circuit, and the fourth resonance circuit is connected in series to the subsequent stage of the second resonance circuit.
The balance filter according to claim 1 or 2. The balance filter further includes:
A fifth resonance circuit comprising the fifth coil element and a fifth capacitor element connected in series to the fifth coil element;
A sixth resonance circuit comprising the sixth coil element and a sixth capacitor element connected in parallel to the sixth coil element;
The balance filter according to claim 1. A balanced input terminal including first and second input ports;
A balanced output terminal including first and second output ports;
A first resonant circuit connected between the first input port and the first output port and including a first coil element;
A second resonant circuit connected between the second input port and the second output port and including a second coil element;
A plurality of magnetic sheets, and a first magnetic layer on which the first resonance circuit and the second resonance circuit are formed, and
The first coil element and the second coil element are arranged such that magnetic fluxes generated from the first coil element and the second coil element constitute a closed magnetic path, and are coupled to each other by mutual inductance.
Chip type balance filter. When viewed in plan from the winding axis direction of the first and second coil elements, the first and second coil elements are the first and second coil elements so that the openings of the first and second coil elements are adjacent to each other. Formed in one magnetic layer,
The chip type balance filter according to claim 5. The chip-type balance filter further includes:
A third resonance circuit including the third coil element and connected in series to a subsequent stage of the first resonance circuit;
A fourth resonance circuit including the fourth coil element and connected in series to a subsequent stage of the second resonance circuit;
A second magnetic layer formed by laminating a plurality of magnetic sheets, and forming the third resonance circuit and the fourth resonance circuit;
A non-magnetic layer formed between the first magnetic layer and the second magnetic layer,
The chip type balance filter according to claim 5 or 6. When viewed in plan from the winding axis direction of the third and fourth coil elements, the third and fourth coil elements are arranged so that the openings of the third and fourth coil elements are adjacent to each other. Formed in two magnetic layers,
The chip type balance filter according to claim 7. When viewed in plan from the respective winding axis directions of the first to fourth coil elements, the first and third coil elements are formed in different regions, and the second and fourth coil elements are in different regions. It is formed,
The chip type balance filter according to claim 7 or 8. The balance filter according to any one of claims 1 to 4, or the chip-type balance filter according to any one of claims 5 to 9,
Power line communication device.

Images