JP2013044986A - Electro-optical device, driving method of electro-optical device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize display with a high contrast ratio in an electro-optical device.SOLUTION: During an initialization period, an anode of an OLED 140 is set to a low-side potential of a power source line 116 while a holding voltage between a gate node g and a source node s of a transistor 131 is cleared with the power source line 116 as the low-side potential and a cathode ray 118 as a high-side potential. During a set period, the power source line 116 becomes a first high-side potential and a threshold voltage is set between a gate and a source of the transistor 131. After the set period is completed, the cathode ray 118 becomes the low-side potential. During a writing period, a potential corresponding to a gradation level is supplied to the gate node g of the transistor.

Description

  The present invention relates to an electro-optical device, a driving method of an electro-optical device, and an electronic apparatus in which deterioration of display quality is suppressed.

  In recent years, various electro-optical devices using light emitting elements such as organic light emitting diode (hereinafter referred to as “OLED”) elements have been proposed. In this electro-optical device, a pixel circuit is provided corresponding to a pixel of an image to be displayed. The pixel circuit generally has a circuit configuration including a transistor that supplies current to the light emitting element in addition to the light emitting element. In such a circuit configuration, if the characteristics such as the threshold voltage and mobility of the transistors are different for each pixel circuit, display unevenness that impairs the uniformity of the display screen occurs. For this reason, a technique for compensating characteristics such as a threshold voltage and mobility of a transistor has been proposed (see, for example, Patent Document 1).

JP 2008-32863 A

By the way, with this technique, when trying to improve the gradation expression on the low luminance side, the gradation expression on the high luminance side deteriorates. On the contrary, when trying to improve the gradation expression on the high luminance side, There was a problem that gradation expression deteriorated.
The present invention has been made in view of the above-described circumstances, and one of its purposes is to provide a technique capable of improving both the low-brightness side gradation expression and the high-brightness side gradation expression. There is.

In order to achieve the above object, an electro-optical device according to the present invention includes a first transistor that supplies a current corresponding to a voltage between a gate and a source, and a luminance that corresponds to the current supplied by the first transistor. An electro-optical device having a pixel circuit in which the first transistor and the light emitting element are connected in series between a first power source and a second power source, wherein In addition, the first power source is a second potential among the first potential on the higher side or the second potential on the lower side, and the second power source is the third potential on the higher side or the fourth potential on the lower side. At the third potential, the gate-source of the first transistor is cleared to a predetermined voltage, and the terminal on the connection side of the light emitting element with the first transistor is set to the second potential. First In the second period that follows, the first power supply becomes the first potential, the second power supply is maintained at the third potential, and the gate and source of the first transistor are set to a threshold voltage, After the end of the second period, the second power supply becomes the fourth potential, and a potential corresponding to a gray level is supplied to the gate of the first transistor in a third period after the second period. It is characterized by that.
According to the present invention, in the first period and the second period, the second power supply is at a higher potential, and the light emitting element can be brought into a non-light emitting state. When the first transistor supplies current to the light emitting element, the voltages of the first power source and the second power source are increased, so that the luminance can be increased.

  In the present invention, an initialization potential for turning on the first transistor in the first period and the second period is supplied to the gate of the first transistor, and the predetermined voltage is set to the initialization potential and the second potential. The structure which becomes the difference of these is preferable. In this configuration, the pixel circuit includes a second transistor electrically connected between the gate of the first transistor and the data line, and the second transistor includes the first period and the second period. In the third period, the data line is turned on, and the data line is supplied with the initialization potential in the first period and the second period, and becomes a potential corresponding to the gradation level in the third period. It is good also as the aspect which is. In this aspect, the semiconductor device further includes a third transistor electrically connected between the data line and a power supply line to which the initialization potential is supplied, and the third transistor includes the first period and the second period. In FIG.

In the present invention, it is preferable that the second potential is equal to or higher than a minimum potential corresponding to the gradation. According to this configuration, in the first period, it is possible to initialize the terminals on the non-connection side of the second power source among the light emitting elements more uniformly across the pixels.
In the present invention, if the light emitting element is reverse-biased during the first period, no current flows through the light emitting element, so that the light emitting element enters a non-light emitting state.
In addition to the electro-optical device, the present invention can be conceptualized as a driving method of the electro-optical device or an electronic apparatus having the electro-optical device. The electronic device is typically a display device, and examples of the electronic device include a personal computer and a mobile phone. However, the use of the electro-optical device according to the invention is not limited to the display device. For example, the present invention can also be applied to an exposure apparatus (optical head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light.

1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment. It is a figure which shows the pixel circuit in an electro-optical apparatus. It is a figure which shows the operation | movement in an electro-optical apparatus. It is a figure for demonstrating operation | movement of a pixel circuit. It is a figure for demonstrating operation | movement of a pixel circuit. It is a figure for demonstrating operation | movement of a pixel circuit. It is a figure for demonstrating operation | movement of a pixel circuit. It is a figure for demonstrating operation | movement of a pixel circuit. FIG. 3 is a diagram illustrating an electronic apparatus (part 1) using the electro-optical device according to the embodiment. It is a figure which shows the electronic device (the 2) using the electro-optical apparatus which concerns on embodiment. FIG. 6 is a diagram illustrating an electronic apparatus (part 3) using the electro-optical device according to the embodiment.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention. As shown in this figure, the electro-optical device 10 has a configuration in which a scanning line driving circuit 160, a power supply line driving circuit 170, and a data line driving circuit 180 are arranged around the display unit 100.

In the display unit 100, pixel circuits 110 corresponding to pixels of an image to be displayed are arranged in a matrix. Specifically, in the display unit 100, m rows of scanning lines 112 are provided so as to extend in the horizontal direction in the drawing, and n columns of data lines 114 extend in the vertical direction in the drawing, and each scanning is performed. The wires 112 are provided so as to be electrically insulated from each other. The pixel circuits 110 are provided corresponding to the intersections of the m rows of scanning lines 112 and the n columns of data lines 114, respectively. Therefore, the matrix arrangement of the pixel circuit 110 is m rows × n columns.
Here, m and n are both natural numbers. In order to distinguish the row (row) of the matrix of the scanning line 112 and the pixel circuit 110, they may be referred to as 1, 2, 3,... (M−1), m rows in order from the top in the drawing. Similarly, in order to distinguish the columns of the data lines 114 and the matrix of the pixel circuit 110, they may be referred to as 1, 2, 3,..., (N−1), n columns in order from the left in the drawing.
Further, the display unit 100 is provided with individual power supply lines 116 (first power supply) and cathode lines 118 (second power supply) for each row, and both are shared over the pixel circuits 110 for one row.

The scanning line driving circuit 160 generates a scanning signal for sequentially scanning the scanning lines 112 for each row over a frame period. Here, the scanning signals supplied to the scanning lines 112 of 1, 2, 3,..., (M−1) and the m-th row are Gwr (1), Gwr (2), Gwr (3),. It is written as Gwr (m-1) and Gwr (m). The term “frame period” refers to a period required for the electro-optical device 10 to display an image for one cut (frame). If the vertical scanning frequency is 60 Hz, 16.67 milliseconds for one cycle. Is the period.
Further, the scanning line driving circuit 160 supplies the control signal Gini to the signal line 122. The control signal Gini is a signal that becomes H level during an initialization period and a set period, which will be described later, and becomes L level during other periods in the scanning period of each row.

The power supply line driving circuit 170 synchronizes the potentials of the power supply line 116 and the cathode line 118 of the mth row with 1, 2, 3,. , To switch each. Specifically, the power supply line driving circuit 170 switches and supplies the power supply line 116 to either the high potential Vel_H as the first potential or the low potential Vel_L as the second potential. In FIG. 1, Vel (1), Vel (2) are respectively used in order to distinguish the power supply potentials supplied to the power supply lines 116 of 1, 2, 3,. ), Vel (3),..., Vel (m−1), Vel (m).
The power supply line driving circuit 170 supplies the cathode line 118 by switching to either the high potential Vct_H as the third potential or the low potential Vct_L as the fourth potential. , Vm (1), Vct (2), Vct (3),..., Vct (m− 1) It is written as Vct (m).

The data line driver circuit 180 outputs a data signal having a potential corresponding to the gray level of the pixel located in the scanned scanning line 112 in the writing period in the scanning period of the scanning line 112 for one row. Are output to the data line 114. Here, the data signals supplied to the data lines 114 in the first, second,..., N-th columns are denoted as Vd (1), Vd (2), Vd (3),. Yes.
When the potential of the data signals Vd (1) to Vd (n) is Vdata, the maximum value Vdata (max) of the potential corresponds to the white level of the maximum luminance, and the minimum value Vdata (min) is the minimum luminance. Corresponds to the black level.

  The n-channel transistor 120 is provided for each data line 114 as a third transistor. In the transistor 120, the gate node is connected to the signal line 122, one of the source or drain node is connected to the power supply line 124 that supplies the potential Vini as the initial potential, and the other of the source or drain node is the data line. 114.

  In this embodiment, the scanning line driving circuit 160, the power supply line driving circuit 170, and the data line driving circuit 180 are divided for convenience, but these are collectively referred to as a driving circuit for driving the pixel circuit 110. It is also possible to do.

The pixel circuit 110 will be described with reference to FIG. In this figure, the scanning line 112 of the (i + 1) th row adjacent to the i-th row and the i-th row on the lower side is adjacent to the j-th column and the j-th column on the right side (j + 1). A pixel circuit 110 for a total of 4 pixels of 2 × 2 corresponding to the intersection with the data line 114 in the column is shown.
Here, i and (i + 1) are symbols for generally indicating the rows of the matrix, and are integers of 1 to m. Similarly, j and (j + 1) are symbols for generally indicating matrix columns, and are integers of 1 to n.

  As shown in FIG. 2, each pixel circuit 110 includes N-channel transistors 131 and 132, capacitive elements 135 and 136, and an OLED 140. Since each pixel circuit 110 has the same configuration when viewed electrically, the pixel circuit 110 will be described as being representatively located at i rows and j columns.

  In the pixel circuit of i row and j column, the gate node of the transistor 132 is connected to the i-th scanning line 112. In the transistor 132, one of the drain node and the source node is connected to the data line 114, and the other of the drain node and the source node is connected to one end of the capacitor 135 and the gate node g of the transistor 131.

The other end of the capacitive element 135 is connected to the source node s of the transistor 131, one end of the capacitive element 136, and the anode of the OLED 140. The drain node d of the transistor 131 is connected to the i-th power line 116. The other end of the capacitive element 136 is grounded in common across the pixel circuits 110. In the present embodiment, the ground level is a potential corresponding to the L level of the scanning signal, for example.
Here, the transistor 131 becomes a first transistor, and the transistor 132 becomes a second transistor.

  The cathode of the OLED 140 is a cathode line 118 formed individually and in a strip shape for each row, and is common to one row of the pixel circuit 110 in the i-th row. On the other hand, the anode of the OLED 140 is a pixel electrode provided individually for each pixel circuit 110. The OLED 140 is an element in which a light emitting layer made of an organic EL material is sandwiched between an anode facing each other and a cathode having transparency, for example, on a glass substrate. In the OLED 140, when a current flows in the forward direction from the anode toward the cathode in a state where the light emission threshold voltage is exceeded, light is generated at a luminance corresponding to the current and passes through the cathode on the side opposite to the substrate. It is configured to be visually recognized by the observer side.

  In FIG. 2, Gwr (i) and Gwr (i + 1) are scanning signals supplied to the scanning lines 112 in the i and (i + 1) th rows, respectively. Vel (i) and Vel (i + 1) are power supply potentials supplied to the i and (i + 1) th power lines 116, respectively, and Vct (i) and Vct (i + 1) are i, This is the power supply potential supplied to the cathode line 118 in the (i + 1) th row.

  The display unit 100 is generally formed on a transparent insulating substrate such as a glass substrate. For this reason, the transistors 131 and 132 in the pixel circuit 110 of the display unit 100 are, for example, thin film transistors, and are formed of amorphous silicon or low-temperature polysilicon. In the case of using low-temperature polysilicon, the active elements constituting the scanning line driver circuit 160, the power supply line driver circuit 170, and the data line driver circuit 180, and the transistor 120 may be formed on the insulating substrate together with the pixel circuit 110. it can.

The operation of the electro-optical device 10 will be described with reference to FIG. FIG. 3 is a diagram for explaining the operation of each part in the electro-optical device 10, but the vertical scale indicating the voltage amplitude may be different between waveforms for convenience of explanation.
As shown in this figure, the scanning line driving circuit 160 switches the potentials of the scanning signals Gwr (1) to Gwr (m), so that the scanning lines 112 in the 1st to mth rows perform one horizontal scanning in the period of one frame. Scanning is performed in order for each period (H).
The operation in one horizontal scanning period (H) is common to the pixel circuits 110 in each row. Therefore, in the scanning period in which the i-th scanning line 112 is mainly scanned horizontally, the i-th row and j-th column pixels corresponding to the intersection with the j-th data line 114 in the i-th row are mainly described below. The circuit 110 will be described by paying attention.

  In the present embodiment, the i-th scanning period is roughly divided into a cycle of initialization period → set period → standby period → writing period in order of time. Then, from the end of the writing period (after satisfying the conditions described later) to the start of the initialization period of the next frame is the light emission period, and these cycles are repeated. Note that the set period is a period in which the threshold voltage Vth of the transistor 131 is set to the capacitor 135, and the writing period includes a compensation period for the mobility μ of the transistor 131.

<Light emission period>
For convenience of explanation, a presumed light emission period will be described before the i-th scanning period. As shown in FIG. 3, in the light emission period, the scanning signal Gwr (i) is at the L level. Therefore, in the pixel circuit 110 in the i row and j column, the transistor 132 is off and the gate node g is electrically disconnected from the data line 114.
On the other hand, the potential Vel (i) is the higher potential Vel_H, and conversely, the potential Vct (i) is the lower potential Vct_L. In the capacitor 135, that is, between the gate and the source of the transistor 131, a voltage compensated so as to cancel out the characteristics of the transistor 131 with respect to a potential corresponding to the gradation level as described later is set. Therefore, since the current Ids corresponding to the gate-source voltage Vgs is supplied to the OLED 140 as shown in FIG. 4, the OLED 140 exhibits the characteristics of the transistor 131 with the luminance corresponding to the gradation level. The light is emitted in the offset state. At this time, the source node s (one end of the capacitor 136) is held at a potential according to the current Ids in the light emission period.

<Initialization period>
Next, the scanning period of the i-th row is reached. The beginning of the scanning period is the initializing period of the first period. As shown in FIG. 3, in the initialization period of the i-th row, the control signal Gini and the scanning signal Gwr (i) are each at the H level. For this reason, as shown in FIG. 5, the transistor 120 in each column is turned on, and the transistor 132 in the i row and j column is turned on. Therefore, since the gate node g is electrically connected to the power supply line 124 via the transistor 132, the data line 114, and the transistor 120, the gate node g is set to the potential Vini (see FIG. 3).

  On the other hand, the potential Vel (i) in the power supply line 116 is switched to the lower potential Vel_L by the power supply line driving circuit 170. Here, the voltage difference between the potential Vel_L and the potential Vini is set to be sufficiently higher than the threshold voltage Vth of the transistor 131. Therefore, since the transistor 131 is turned on, the source node s becomes the potential Vel_L of the power supply line 116 as illustrated in FIG. 3 or FIG.

Accordingly, the gate-source voltage Vgs of the transistor 131 (the holding voltage of the capacitor 135) is initialized to (Vini−Vel_L), and the holding voltage of the capacitor 136 is reset.
When this reset operation is viewed in the pixel circuits 110 of the 1st to n columns in the i-th row, in each pixel circuit 110, the capacitor element 135 holds the voltage Vgs corresponding to the current Ids in the light emission period, and the capacitor element 136 Although the voltage corresponding to the potential of the source node s is held, the voltage holding state of the capacitor elements 135 and 136 is changed over the pixel circuit 110 in the i-th row by this initialization period regardless of the current state of the light emission period. Each is initialized equally.
Here, the potential Vel_L is set to coincide with the lowest value of the data signal, that is, the potential Vdata (min) corresponding to the black level. With this setting, the potential of the source node s always decreases regardless of the luminance state in the light emission period when the light emission period starts from the initialization period. Initialization in the circuit 110 can be more evenly aligned.

  In the initialization period, the anode (source node s) of the OLED 140 is switched to the lower potential Vel_L, and the cathode is switched to the higher potential Vct_H. In this embodiment, it is set so that Vel_L <Vct_H. Accordingly, the OLED 140 that was in the on state during the light emission period is reverse-biased during the initialization period, and thus changes to the off state (non-light emission state).

<Set period>
Following the initialization period, the second period set period is reached. As shown in FIG. 3, in the set period, the potential Vel (i) in the power line 116 in the i-th row is switched to the higher potential Vel_H in the set period.
As a result, as shown in FIG. 6, since a current flows from the power supply line 116 between the drain and source of the transistor 131 in the on state, the source node s starts to rise from the potential Vel_L (see FIG. 3). However, in the present embodiment, the scanning signal Gwr (i) and the control signal Gini are continuously at the H level in the set period, and the gate node g is fixed to the potential Vini. For this reason, the potential of the source node s is saturated at a potential (Vini−Vth) lower than the threshold voltage Vth.

In other words, the voltage Vgs between the gate node g and the source node s gradually decreases with time, and eventually converges to the threshold voltage Vth of the transistor 131. In this way, the threshold voltage Vth of the transistor 131 itself is set between the gate and source of the transistor 131 until the end of the set period.
On the other hand, in the set period, the cathode of the OLED 140 is at the potential Vct_H. In the present embodiment, the difference voltage between the saturation potential (Vini−Vth) of the source node s that is the anode of the OLED 140 and the potential Vct_H is set to be lower than the light emission threshold voltage of the OLED 140. For this reason, OLED140 maintains an OFF state also in a set period.

<Waiting period>
Next, when the waiting period for the i-th row is reached, as shown in FIG. 3, the scanning signal Gwr (i) and the control signal Gini become L level, respectively, as compared with the set period, and the cathode line 118 for the i-th row. The potential Vct (i) at is switched to the lower potential Vct_L. For this reason, in the pixel circuit 110 in the i row and j column, as shown in FIG. 7, the transistor 132 is turned off, so that the gate node g of the transistor 131 is electrically connected to the data line 114 in the j column. It becomes a disconnected state, that is, a high impedance state.
In addition, since the transistors 120 in each column are also turned off, each data line 114 is electrically disconnected from the power supply line 124. For this reason, each data line 114 is also in a high impedance state, but is maintained at the immediately preceding potential Vini by the parasitic capacitance.

  Since the OLED 140 has a structure in which the light emitting layer is sandwiched between the anode and the cathode as described above, a capacitance is parasitic between the anode and the cathode in parallel (not shown). For this reason, when the potential Vct (i) in the cathode line 118 is switched to the lower potential Vct_L, the potential of the source node s, which is the connection point between the capacitive element 136 and the parasitic capacitance of the OLED 140, varies with the potential Vct (i). (Vct_H−Vct_L) is reduced by the amount divided according to the capacitance ratio between the capacitive element 136 and the parasitic capacitance. However, since the gate node g is in a high impedance state, the potential of the gate node g decreases while maintaining the threshold voltage Vth in conjunction with the potential change of the source node s, as shown in FIG. Will do.

  Note that in the standby period, the potential of the anode (source node s) of the OLED 140 decreases and the cathode also decreases to the potential Vct_L. The capacitance of the capacitive element 136 and the potential drop of the cathode line 118 (Vct_H−Vct_L) are appropriately set so that the difference voltage at this time is lower than the light emission threshold voltage of the OLED 140. For this reason, the OLED 140 maintains the off state even during the standby period.

<Writing period>
Subsequently, the writing period as the third period is reached. In the writing period of the i-th row, as shown in FIG. 3, the scanning signal Gwr (i) again changes to the H level, while the j-th data line 114 has the i-th row and j-th column levels. A data signal of the potential Vdata corresponding to the key is supplied by the data line driving circuit 180. Therefore, as shown in FIG. 8, since the transistor 132 is turned on, the gate node g is designated as the potential Vdata of the data signal Vd (j) supplied to the data line 114, that is, the pixel in i row and j column. A potential corresponding to the gradation level is written.
Further, the potential of the gate node g when it decreases in conjunction with the source node s during the standby period is set to be equal to or lower than the potential Vdata (min) corresponding to the lowest black level among the potentials that the data signal can take. Is set. For this reason, when the potential Vdata is supplied in the writing period, the gate node g always rises except for the black level (see FIG. 3).
On the other hand, since the other end of the capacitor 136 is grounded and the potential is fixed, the potential of the source node s, which is a connection point of the capacitors 135 and 136, is the increase in the potential of the gate node g. The voltage rises by the amount divided by the capacity ratio of 135.
For this reason, as shown in FIG. 8, a current flows from the drain node d of the transistor 131 toward the source node s.

By the current flowing at this time, the gate-source voltage Vgs of the transistor 131 is negative feedback controlled (mobility compensation) as follows.
That is, if the mobility μ of the transistor 131 is small, the current flowing from the drain node d to the node s decreases. For this reason, the potential increase amount ΔV of the source node s is reduced (see FIG. 3), and the change amount (negative feedback amount) of the voltage Vgs is increased accordingly, so that the transistor 131 having the small mobility μ is used. The control works in the direction in which a large amount of current flows.
Conversely, if the mobility μ of the transistor 131 is large, the current flowing from the drain node d to the source node s increases. For this reason, the potential increase amount ΔV of the source node s increases, and the change amount (negative feedback amount) of the voltage Vgs decreases accordingly, so that a small amount of current flows through the transistor 131 having a high mobility μ. Control works in the direction.
Thus, eventually, as shown in FIG. 3, the voltage Vgs between the gate and the source of the transistor 131 has the potential Vdata, the threshold voltage Vth, and the movement in accordance with the gradation level before the writing period ends. The degree μ converges to the reflected voltage (Vdata + Vth−ΔV).

<Light emission period>
When the writing period ends, as shown in FIG. 3, the potential Gwr (i) of the scanning signal becomes L level again. Therefore, as shown in FIG. 4, the transistor 132 is turned off, and the gate node g is in a high impedance state. At this time, the gate-source voltage Vgs (the voltage across the capacitor 135) in the transistor 131 is maintained at the voltage (Vdata + Vth−ΔV) at the end of the writing period. The current Ids flows and the capacitive element 136 is charged.
As a result, as shown in FIG. 3, the potential of the source node s, which is one end of the capacitor 136, rises again with time. Since the gate node g is in a high impedance state, the potential of the gate node g rises in conjunction with the potential rise of the source node s. That is, the gate node g and the source node s rise while maintaining the voltage Vgs at the end of the writing period.
In the process of increasing the potential of the source node s, when the voltage across the OLED 140 exceeds the light emission threshold voltage, a part of the current Ids begins to flow to the OLED 140 and light emission starts. When the charging of the capacitive element 136 is completed soon, all the current Ids flows to the OLED 140, so that the OLED 140 continues to emit light with a luminance corresponding to the current Ids.

  Since the gate-source voltage Vgs is (Vdata + Vth−ΔV), the current Ids supplied to the OLED 140 by the transistor 131 is first affected by the threshold voltage Vth when the transistor 131 operates in the saturation region. Is offset. In addition, since the voltage Vgs is negative feedback controlled according to the mobility μ of the transistor 131, even if the mobility μ of the transistor 131 is different for each pixel circuit 110, the influence due to the variation in the current Ids can be suppressed.

Such an operation is executed in parallel in terms of time other than the pixel circuit 110 in the focused j-th column in the i-th scanning period. Further, such an operation is executed in the order of 1, 2, 3,..., (M−1), m-th row in the period of one frame and is repeated for each frame.
In this operation, the OLED 140 in each pixel circuit 110 is supplied with a current compensated for variations in the threshold voltage Vth and mobility μ of the transistor 131. Therefore, according to the present embodiment, even if the characteristics of the transistor 131 vary for each pixel circuit 110, luminance unevenness due to the variation is suppressed, so that high-quality display is possible.

Incidentally, in order to increase the luminance, simply, the potential difference between the power supply line 116 and the cathode line 118, that is, the power supply voltage of the pixel circuit 110 may be increased. However, when the power supply voltage is increased, the following problem occurs in the conventional configuration in which the cathode of the OLED 140 is continuously formed and constant at the common potential over all the pixel circuits 110.
Specifically, in the set period, the potential of the source node s is lower than the potential Vini that turns on the transistor 131 by the threshold voltage Vth. For this reason, when the power supply voltage is increased, the potential difference between the anode (source node s) and the cathode exceeds the light emission threshold voltage of the OLED 140, and the OLED 140 emits light, thereby hindering the expression on the low luminance side. In order to avoid this, the potential of the common cathode may be increased, but a high power supply voltage cannot be secured and the OLED 140 cannot emit light with high luminance.
For this reason, in the conventional configuration in which the power supply potential on the cathode side of the OLED 140 is constant, there is a problem that gradation expression on the low luminance side and gradation expression on the high luminance side are not compatible.

On the other hand, in the present embodiment, the power supply potential Vct (i) of the cathode line 118 becomes the higher potential Vct_H in the initialization period and the set period of the i-th row. As a result, the power supply voltage of the pixel circuit 110, that is, the power supply voltage between the drain node d of the transistor 131 and the cathode of the OLED 140 becomes relatively low, so that the OLED 140 can be turned off during the initialization period and the set period. It becomes easy. In other words, since it is avoided that the OLED 140 is turned on and emits light during the initialization period and the set period, the gradation expression on the low luminance side is improved.
On the other hand, in the writing period and the light emission period of the i-th row, the power supply potential Vel (i) and the power supply potential Vct (i) are separated from each other, that is, the power supply potential Vel (i) is set to the higher potential Vel_H. Since the power supply potential Vct (i) is switched to the lower potential Vct_L, the power supply voltage of the pixel circuit 110 becomes relatively high. For this reason, since the electric current supplied to OLED140 increases, it becomes possible to raise a brightness | luminance.
Therefore, in this embodiment, since both the low luminance side and the high luminance side are improved, it is possible to display an image with a high contrast ratio.

The present invention is not limited to the above-described embodiments, and various modifications and applications are possible.
For example, in the embodiment described above, either the potential Vel_H or the potential Vel_L is supplied to the power supply line 116 for each row in synchronization with the scanning of the scanning line 112. A power supply line and a lower power supply line for supplying the potential Vel_L may be provided, and a switch for selecting one of the power supply lines may be provided in the pixel circuit 110 and supplied to the drain node d of the transistor 131.
Similarly, although either the potential Vct_H or the potential Vct_L is supplied to the cathode line 118 for each row, a high-side power supply line that supplies the potential Vct_H and a low-side power supply line that supplies the potential Vct_L are provided. A switch for selecting any one of the power supply lines may be provided in the pixel circuit 110 and supplied to the cathode of the OLED 140.

  In the embodiment, the data line driving circuit 180 supplies data signals to the data lines 114 in each column. However, the data lines 114 are grouped into a plurality of data lines, and a plurality of data lines 114 belong to one group. The data lines 114 may be configured to select and supply data signals in order during the standby period. According to this configuration, the data signal supplied during the standby period is held by the capacitance parasitic on the data line 114 and is written into the gate node g during the writing period. In any case, it is sufficient that the data line 114 has a potential corresponding to the gradation level at least in the writing period.

On the other hand, each of the transistors 131 and 132 is an N-channel type, but either one or both may be a P-channel type.
In the embodiment, the OLED 140 is exemplified as the light emitting element. However, an element that emits light with luminance according to current, such as an inorganic EL element or an LED (Light Emitting Diode) element, can be applied.

<Electronic equipment>
Next, some electronic apparatuses to which the electro-optical device according to the invention is applied will be described.
FIG. 9 is a diagram illustrating an appearance of a personal computer as an electronic apparatus (part 1) that employs the electro-optical device 10 according to the above-described embodiment as a display device. The personal computer 2000 includes an electro-optical device 10 as a display device and a main body 2010. The main body 2010 is provided with a power switch 2001 and a keyboard 2002. In the electro-optical device 10, when the OLED 140 is used as a light emitting element, a screen display with a wide viewing angle and easy viewing is possible.

  FIG. 10 is a diagram illustrating an appearance of a mobile phone that is an electronic apparatus (part 2) that employs the electro-optical device 10 according to the embodiment as a display device. The cellular phone 3000 includes the electro-optical device 10 described above together with the earpiece 3003 and the mouthpiece 3004 in addition to the plurality of operation buttons 3001 and the direction key 3002. By operating the direction key 3002, the screen displayed on the electro-optical device 10 is scrolled.

  FIG. 11 is a diagram illustrating an appearance of a personal digital assistant (PDA) as an electronic apparatus (part 3) that employs the electro-optical device 10 according to the embodiment as a display device. The portable information terminal 4000 includes the above-described electro-optical device 10 in addition to a plurality of operation buttons 4001 and direction keys 4002. In the portable information terminal 4000, various kinds of information such as an address book and a schedule book are displayed on the electro-optical device 10 by a predetermined operation, and the displayed information is scrolled according to the operation of the direction key 4002.

  The electronic apparatus to which the electro-optical device according to the invention is applied includes, in addition to the examples shown in FIGS. 9 to 11, a television, a car navigation device, a pager, an electronic notebook, electronic paper, a calculator, a word processor, a work Stations, videophones, POS terminals, printers, scanners, copiers, video players, devices equipped with a touch panel, and the like.

DESCRIPTION OF SYMBOLS 10 ... Electro-optical device, 110 ... Pixel circuit, 112 ... Scan line, 114 ... Data line, 116 ... Power supply line, 118 ... Cathode line, 120 ... Transistor, 131 ... Transistor, 132 ... Transistor, 135 ... Capacitor element, 136 ... Capacitor Elements 140, light-emitting elements, 160, scanning line driving circuit, 170, power line driving circuit, 180, data line driving circuit, 2000, personal computer, 3000, mobile phone, 4000, portable information terminal.

Claims (8)

A first transistor for supplying a current according to a voltage between the gate and the source;
A light emitting element that emits light at a luminance corresponding to the current supplied by the first transistor;
Including
An electro-optical device having a pixel circuit in which the first transistor and the light emitting element are connected in series between a first power source and a second power source,
In the first period, the first power source becomes the second potential of the first potential on the higher side or the second potential on the lower side, and the second power source has the third potential on the higher side or the fourth potential on the lower side. Of the first transistor is cleared to a predetermined voltage, and the terminal on the connection side of the light emitting element with the first transistor is set to the second potential. And
In a second period following the first period, the first power supply becomes the first potential, the second power supply is maintained at the third potential, and the gate-source between the first transistors has a threshold voltage. Set,
After the end of the second period, the second power supply becomes the fourth potential,
In a third period after the second period, a potential corresponding to a gray level is supplied to the gate of the first transistor. The gate of the first transistor is
An initialization potential for turning on the first transistor is supplied in the first period and the second period,
The electro-optical device according to claim 1, wherein the predetermined voltage is a difference between the initialization potential and the second potential. The pixel circuit includes:
A second transistor electrically connected between the gate of the first transistor and the data line;
The second transistor becomes conductive in the first period, the second period, and the third period,
The data line includes
The electro-optical device according to claim 2, wherein the initialization potential is supplied in the first period and the second period, and is a potential corresponding to a gradation level in the third period. A third transistor electrically connected between the data line and a power supply line to which the initialization potential is supplied;
The electro-optical device according to claim 3, wherein the third transistor is in a conductive state in the first period and the second period. The second potential is
The electro-optical device according to claim 1, wherein the electro-optical device is equal to or higher than a minimum potential corresponding to the gradation. The electro-optical device according to claim 1, wherein the light emitting element is reverse-biased in the first period. A first transistor for supplying a current according to a voltage between the gate and the source;
A light emitting element that emits light at a luminance corresponding to the current supplied by the first transistor;
Including
A driving method of an electro-optical device having a pixel circuit in which the first transistor and the light emitting element are connected in series between a first power source and a second power source,
In the first period, the first power source is set to the second potential of the first potential on the higher side or the second potential on the lower side, and the second power source is set to the third potential on the higher side or the fourth potential on the lower side. Among the potentials, the third potential is cleared to a predetermined voltage between the gate and the source of the first transistor, and the terminal on the connection side of the light emitting element with the first transistor is set to the second potential.
In a second period following the first period, the first power supply is set to the first potential, the second power supply is maintained to the third potential, and a threshold voltage is set between the gate and the source of the first transistor. And
After the end of the second period, the second power supply is set to the fourth potential,
A method for driving an electro-optical device, wherein a potential corresponding to a gray level is supplied to a gate of the first transistor in a third period after the second period. An electronic apparatus comprising the electro-optical device according to claim 1.

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