JP2013036744A - Power supply voltage detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply voltage detection circuit avoiding malfunction during low power supply voltage, regarding the power supply voltage detection circuit detecting a low voltage state, performing a notification to a system or stopping the system.SOLUTION: A pull-up circuit 250 is provided for an output of a circuit 200 for generating reference voltage Vref, and the circuit 200 for generating the reference voltage Vref is pulled up to power supply voltage VE(100). A switch S1(347) is provided in series with a detection resistance comprising R1(341) and R2(342), and the switch S1(347) is turned on/off by the circuit 200 for generating the reference voltage Vref. In the configuration, the reference voltage Vref(225) is pulled up to the power supply voltage VE(100) by the pull-up circuit 250 during low power supply voltage, the switch S1(347) is turned off and a partial voltage value VI(345) is forcibly lowered to hold a state of Vref>VI and avoid an output of an erroneous signal from a comparator 330.

Description

  The present invention relates to a power supply voltage detection circuit, and more particularly to a power supply voltage detection circuit that avoids a malfunction at a low power supply voltage.

  In the electronic circuit field, in order to avoid malfunction when the power supply voltage is insufficient, a power supply voltage detection circuit is provided, and when the power supply voltage drops below a predetermined value, the power supply voltage detection circuit detects a low voltage state, Notification to the system, system shutdown, etc. are performed.

  FIG. 7 is a diagram illustrating an example of a power supply voltage detection circuit having a conventional configuration. In FIG. 7, a power supply voltage detection circuit having a conventional configuration includes a first detection resistor R1 (41), a second detection resistor R2 (42), a circuit 20 for generating a reference voltage Vref, and the first and second resistors. The comparator 30 is configured to compare the divided value VI (45) of the power supply voltage VE (10) by the detection resistors R1 and R2 with the reference voltage Vref (25).

  FIG. 8 is a diagram for explaining the occurrence of malfunction in the power supply voltage detection circuit of the conventional configuration shown in FIG. When the power supply voltage VE (10) shown in FIG. 7 increases, the divided value VI () of the power supply voltage VE (10) divided by the first detection resistor R1 (41) and the second detection resistor R2 (42). 45) also increases in proportion to the power supply voltage VE (10) as shown in FIG. Then, when the power supply voltage VE (10) becomes equal to or higher than the power supply voltage VE2 where VI = Vref, the output VO of the comparator 30 shown in FIG. 7 is inverted, and the power supply voltage VE (10) exceeds the desired value. This is notified by the output VO of the comparator 30. FIG. 8 shows an example in which the output VO of the comparator 30 is detected to change from the L level to the H level. However, the configuration in which the logic is inverted to detect the change from the H level to the L level is shown. It is also good.

  As shown in FIGS. 7 and 8, when the power supply voltage VE (10) decreases and the power supply voltage of the circuit 20 that generates the reference voltage Vref becomes insufficient, the reference voltage Vref (25) decreases. As shown in the upper part of FIG. 8, when VE <VE1, the magnitude relationship between the divided voltage value VI (45) and the reference voltage Vref (25) is reversed, the output VO of the comparator 30 is reversed, and the lower part of FIG. As shown in the left part, an error signal is output.

  In Patent Document 1 below, in order to cope with the problem that the low power supply voltage cannot be detected when the reference voltage starts up more slowly than when the power supply voltage starts up sharply at the time of starting up the power supply voltage, Insert a switch between the power supply voltage detection point and the comparator input, connect a capacitor between the comparator input and the ground, and connect the output voltage of the reference voltage to the other input of the comparator. A power supply detection circuit is disclosed that is configured to be connected to the control terminal of the switch via a threshold element so that a power supply non-detection signal can be reliably detected even when the power supply voltage suddenly rises. .

  Patent Document 2 below discloses a power supply voltage detection circuit that maintains a comparator output at a high level without applying a voltage to the inverting input terminal of the comparator when the power supply voltage is low and the reference voltage is not sufficiently output. Is disclosed.

JP 2004-317414 A JP 2005-278056 A

  According to the method disclosed in Patent Document 1, if the power supply voltage is restarted after the power supply voltage is stopped and before the capacitor connected to the input terminal of the comparator is discharged, the comparator may output an error signal. There's a problem.

  In the method of Patent Document 2, when the power supply voltage is low and the reference voltage is not sufficiently output, no voltage is applied to the inverting input terminal of the comparator, and the comparator output is maintained at a high level. However, since the non-inverting input terminal of the comparator input cannot be maintained at a higher potential than the inverting input terminal, there is a problem that an erroneous signal may be output from the comparator.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a power supply voltage detection circuit that detects a low voltage state and avoids a malfunction at the time of a low power supply voltage in a power supply voltage detection circuit that notifies a system, stops the system, and the like.

  In order to solve the above problems, one embodiment of the present invention is a power supply voltage detection circuit including a circuit that generates a reference voltage with a low power supply potential side as a reference, a power supply voltage detection voltage dividing resistor, and a comparator. A pull-up circuit that pulls up the output of the circuit that generates the voltage to the high-potential power supply voltage, and a switch in series on the high-potential side of the voltage dividing resistor, pulls up the reference voltage with the pull-up circuit when the power supply voltage is low Then, the switch is turned off by a reference voltage potential, and the divided value by the voltage dividing resistor is pulled down to the low power supply potential side.

  In the above configuration, the pull-up circuit has a configuration in which a drain and a source of an N-channel MOS transistor are connected in series to an output stage of a circuit for generating a reference voltage, and a gate is connected to a high power supply potential, and the switch is a P-channel MOS transistor The gate is connected to the output of the circuit that generates the reference voltage.

  In order to solve the above problem, another aspect of the present invention provides a circuit for generating a reference voltage with a high power supply potential side as a reference, a power supply voltage detecting voltage dividing resistor, and a comparator. A pull-down circuit that pulls down the output of a circuit that generates a reference voltage to a low-potential power supply voltage, and a switch in series on the low-potential side of the voltage dividing resistor. When the power supply voltage is low, the pull-down circuit pulls down the reference voltage. The switch is turned off according to the voltage potential, and the divided value by the voltage dividing resistor is pulled up to the high power supply potential side.

  In the above, the pull-down circuit has a configuration in which a drain and a source of a P-channel MOS transistor are connected in series to an output stage of a circuit that generates a reference voltage, and a gate is connected to a low power supply potential, and the switch is an N-channel MOS transistor. And a gate is connected to an output of a circuit for generating a reference voltage.

  According to the present invention, in the power supply voltage detection circuit that detects a low voltage state and performs notification to the system, stop of the system, etc., it is possible to avoid malfunction when the reference voltage at the time of the low power supply voltage is reduced, It is possible to suppress malfunction at low power supply voltage.

It is a figure which shows the basic composition of the power supply voltage detection circuit which concerns on embodiment of this invention. It is a figure which shows the specific example of the power supply voltage detection circuit which concerns on embodiment of this invention. It is a figure explaining the operation | movement outline | summary of the specific example of the power supply voltage detection circuit which concerns on embodiment of this invention shown in FIG. FIG. 4 is a diagram showing an operation comparison example when the pull-up circuit in FIG. 1 is not used in the operation graph shown in FIG. 3. FIG. 3 is a diagram showing an outline of operation when a threshold voltage Vt1 of a MOS transistor M1 in FIG. 2 is low. FIG. 6 is a diagram showing an operation comparison example when the pull-up circuit in FIG. 1 is not used in the operation graph shown in FIG. 5. It is a figure which shows an example of the power supply voltage detection circuit of a conventional structure. FIG. 8 is a diagram for explaining the occurrence of malfunction in the power supply voltage detection circuit of the conventional configuration shown in FIG. 7.

Hereinafter, embodiments of the present invention will be described in detail.
FIG. 1 is a diagram showing a basic configuration of a power supply voltage detection circuit according to an embodiment of the present invention. In FIG. 1, the power supply voltage detection circuit according to the embodiment of the present invention includes a pull-up circuit 250 at the output of the circuit 200 that generates the reference voltage Vref, and pulls up the reference voltage Vref to the power supply voltage VE (100). In addition, a switch S1 (347) is provided in series with the detection resistor consisting of R1 (341) and R2 (342) to detect the divided voltage value VI (345) of the power supply voltage VE (100) to generate the reference voltage Vref. The switch S1 (347) is turned on / off according to the output of the circuit 200. Then, when the power supply voltage is low, the pull-up circuit 250 generates the reference voltage Vref and the output Vref (225) of the circuit 200 is pulled up to the power supply voltage VE (100), and the switch S1 (347) is turned on. By turning off and forcibly reducing the divided voltage value VI (345) to zero level, the state of Vref (225)> VI (345) is maintained, and an erroneous signal output from the comparator 330 is avoided.

  FIG. 2 is a diagram showing a specific example of the power supply voltage detection circuit according to the embodiment of the present invention. Although FIG. 2 shows an example in which a general bandgap reference voltage generation circuit 200 is used as the circuit 200 for generating the reference voltage Vref, a reference voltage generation circuit having another configuration may be used. Further, an example in which a P-channel MOS transistor M1 (347) is used in the low voltage detection circuit 300 as the switch S1 (347) in FIG. Further, as the pull-up circuit 250 in FIG. 1, an N-channel MOS transistor M2 (250) is provided between one end of the resistor R4 (208) and the emitter of the bipolar PNP transistor Q3 (209) in the output stage of the bandgap reference voltage generation circuit 200. ). In that case, one end of the resistor R4 (208) is connected to the drain of the N-channel MOS transistor M2 (250), and the source of the N-channel MOS transistor M2 (250) is connected to the emitter of the bipolar PNP transistor Q3 (209). . The base of bipolar PNP transistor Q3 (209) is connected to ground. The gate of N channel MOS transistor M2 (250) is connected to power supply voltage VE (100). In the output stage of the bandgap reference voltage generation circuit 200, a P-channel MOS transistor M7 (207) is connected in series between the other end of the resistor R4 (208) and the power supply voltage VE (100). The P channel MOS transistor M7 (207) is connected in common to the gates of the P channel MOS transistor M5 (205) and the P channel MOS transistor M6 (206) in the band gap reference voltage generation circuit 200. At this time, a mirror circuit is configured by connecting the gate of the P-channel MOS transistor M6 (206) to the drain thereof.

  The gates of the N-channel MOS transistor M3 (203) and the N-channel MOS transistor M4 (204) in the band gap reference voltage generation circuit 200 are connected in common, and the N-channel MOS transistor M3 (203) and the N-channel MOS transistor M4 (204) Are connected to the drains of the P-channel MOS transistor M5 (205) and the P-channel MOS transistor M6 (206), respectively. Then, a mirror circuit is configured such that the gate of the N-channel MOS transistor M3 (203) is connected to its drain. The source of N channel MOS transistor M3 (203) is connected to the emitter of bipolar PNP transistor Q1 (201), and the collector of bipolar PNP transistor Q1 (201) is connected to ground. The source of the N-channel MOS transistor M4 (204) is connected to one end of the resistor R3 (210), and the other end of the resistor R3 (210) is connected to the emitter of the bipolar PNP transistor Q2 (202), and the bipolar PNP transistor Q2 The collector of (202) is connected to ground. The bases of bipolar PNP transistor Q1 (201) and bipolar PNP transistor Q2 (202) are connected to ground. As the band gap in the band gap reference voltage generation circuit 200, the base-emitter voltages of the PNP transistors Q1 (201), Q2 (202), and Q3 (209) are used as is well known to those skilled in the art. Is done.

  FIG. 3 is a diagram for explaining an outline of the operation of a specific example of the power supply voltage detection circuit according to the embodiment of the present invention shown in FIG. Vgsm1 and Vgsm2 in FIG. 3 indicate changes in the gate-source voltages of the MOS transistors M1 (347) and M2 (250), respectively. Vt1 and Vt2 are the threshold voltages of the MOS transistors M1 (347) and M2 (250), respectively. As shown in FIG. 3, as the power supply voltage VE increases, the gate-source voltages Vgsm1, Vgsm2 show an increasing tendency. When the power supply voltage VE is VE <VE3, since Vgsm2 <Vt2, the MOS transistor M2 (250) is turned off. For this reason, the reference voltage Vref (225) is pulled up to the power supply voltage VE (100). Further, the gate-source voltage Vgsm1 = VE−Vref = 0V, and the MOS transistor M1 (347) is also turned off. Therefore, the partial pressure value VI (345) is pulled down to zero. Thereby, an erroneous signal output from the comparator 330 is avoided.

  As shown in FIG. 3, when the power supply voltage VE is VE> VE3, Vgsm2> Vt2, the MOS transistor M2 (250) is turned on and the reference voltage Vref (225) is increased. Further, the gate-source voltage Vgsm1 also rises, but since Vgsm1 <Vt1, the MOS transistor M1 (347) is maintained in the off state, and the divided voltage value VI (345) is pulled down to zero. When the power supply voltage VE is VE> VE4, Vgsm1> Vt1, so that the MOS transistor M1 (347) is turned on, and the divided voltage VI (345) increases in proportion to the power supply voltage VE (100). When the power supply voltage VE becomes VE> VE2, VI (345)> Vref (225) is established, and the output VO of the comparator 330 is inverted to notify that the power supply voltage VE has increased.

  4 is a diagram showing an operation comparison example when the pull-up circuit 250 in FIG. 1 (M2 in FIG. 2) is not used in the operation graph shown in FIG. When there is no pull-up circuit 250, when VE <VE5 in FIG. 4, both the reference voltage Vref and the divided voltage VI are 0V, so that the comparator 330 may output an error signal as shown in FIG. is there. In order to suppress this, this malfunction is avoided by providing a pull-up circuit 250 as shown in FIG.

  FIG. 5 shows a specific example of the power supply voltage detection circuit according to the embodiment of the present invention shown in FIG. 2, in which the threshold voltage Vt1 of the MOS transistor M1 in FIG. 2 is low (Vt1 <VE3−Vref (at VE = It is a figure which shows the operation | movement outline | summary in the case of VE3)). As shown in FIG. 5, the gate-source voltages Vgsm1 and Vgsm2 show an increasing tendency as the power supply voltage VE increases. When the power supply voltage VE is VE <VE3, since Vgsm2 <Vt2, the MOS transistor M2 (250) is turned off. For this reason, the reference voltage Vref (225) is pulled up to the power supply voltage VE (100). Further, the gate-source voltage Vgsm1 = VE−Vref = 0V, and the MOS transistor M1 (347) is also turned off. Therefore, the partial pressure value VI (345) is pulled down to zero. Thereby, an erroneous signal output from the comparator 330 is avoided.

  As shown in FIG. 5, when the power supply voltage VE is VE> VE3, Vgsm2> Vt2, the MOS transistor M2 (250) is turned on and the reference voltage Vref (225) is increased. Further, the gate-source voltage Vgsm1 also rises and Vgsm1> Vt1, so that the MOS transistor M1 (347) is turned on, and the divided value VI (345) increases in proportion to the power supply voltage VE (100). When the power supply voltage VE becomes VE> VE2, VI (345)> Vref (225) is established, and the output VO of the comparator 330 is inverted to notify that the power supply voltage VE has increased. In this case, the value of the reference voltage Vref (225), the values of the first and second detection resistors R1 (341) and R2 (342) so that VI (345) <Vref (225) at VE = VE3, and The threshold value of the pull-up circuit 250 or the switch S1 (347) is adjusted. In that case, the threshold value of the pull-up circuit 250 can be adjusted by dividing the power supply voltage VE (100) with a resistor, a current source, etc., and using that voltage as the gate voltage of the MOS transistor M2 (250). . The threshold value of the switch S1 (347) can be adjusted by dividing the reference voltage Vref (225) with a resistor, a current source, or the like, and using that voltage as the gate voltage of the MOS transistor M1 (347). Alternatively, R4 (208) may be configured by connecting a plurality of resistors in series, and the voltage at the connection point of the resistors may be used as the gate voltage of the MOS transistor M1 (347).

  6 is a diagram showing an operation comparison example when the pull-up circuit 250 in FIG. 1 (M2 in FIG. 2) is not used in the operation graph shown in FIG. Without the pull-up circuit 250, the magnitude relationship between the divided voltage VI (345) and the reference voltage Vref (225) is reversed between VE = VE6 and VE1 in FIG. Is inverted and an error signal is output. Further, when the power supply voltage VE is VE <VE6, both the reference voltage Vref (225) and the divided voltage value VI (345) are 0 V, so that the comparator 330 may output an error signal as shown in FIG. In order to suppress this, this malfunction is avoided by providing a pull-up circuit 250 as shown in FIG.

  The above describes the case where the configuration circuit operates based on the low power supply potential. However, even when the configuration circuit operates based on the high power supply potential, the polarity of VE is reversed and the N-channel MOS transistor and the P-channel MOS transistor are exchanged. This can also be explained in the same manner by exchanging the PNP transistor and the NPN transistor configured by bipolar.

  In the above, reversal of the polarity of VE and replacement of a semiconductor device to be used can be realized by an engineer in the technical field without exhibiting exceptional creativity.

100 Power supply voltage VE
200 Circuit that generates reference voltage Vref
250 Pull-up circuit (Switch (M2))
300 Low voltage detection circuit
330 Comparator
341 Sense resistor (R1)
342 Sense resistor (R2)
347 switch (M1)
M1, M5, M6, M7 P-channel MOS transistors
M2, M3, M4 N channel MOS transistor
Q1-Q3 Bipolar transistor
VE supply voltage
VI partial pressure value
VO comparator output
Vref reference voltage

Claims (4)

  In a power supply voltage detection circuit composed of a circuit for generating a reference voltage with the low power supply potential side as a reference, a voltage dividing resistor for power supply voltage detection, and a comparator, the output of the circuit for generating the reference voltage is pulled to the high potential power supply voltage. A pull-up circuit to be connected to the high-potential side of the voltage-dividing resistor, a switch is provided in series, the reference voltage is pulled up by the pull-up circuit when the power supply voltage is low, and the switch is turned off by the reference voltage potential. A power supply voltage detection circuit characterized by pulling down a voltage-divided value by a voltage resistor to a low power supply potential side.   The pull-up circuit has a configuration in which a drain and a source of an N-channel MOS transistor are connected in series to an output stage of a circuit that generates a reference voltage, and a gate is connected to a high power supply potential, and the switch is a P-channel MOS transistor 2. The power supply voltage detection circuit according to claim 1, wherein the gate is connected to an output of a circuit for generating a reference voltage.   In a power supply voltage detection circuit composed of a circuit for generating a reference voltage with the high power supply potential side as a reference, a voltage dividing resistor for power supply voltage detection, and a comparator, the output of the circuit for generating the reference voltage is pulled down to the low potential power supply voltage A pull-down circuit, and a switch in series on the low potential side of the voltage dividing resistor, pulling down the reference voltage with the pull-down circuit when the power supply voltage is low, turning off the switch with the reference voltage potential, and dividing by the voltage dividing resistor A power supply voltage detection circuit which pulls up a pressure value to a high power supply potential side.   The pull-down circuit has a configuration in which a drain and a source of a P-channel MOS transistor are connected in series to an output stage of a circuit that generates a reference voltage, and a gate is connected to a low power supply potential, and the switch is an N-channel MOS transistor, 4. The power supply voltage detection circuit according to claim 3, wherein the gate is connected to the output of the circuit that generates the reference voltage.

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