JP2013003655A - Control device for writing data in flash memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology for recording data in a flash memory, capable of further reducing the possibility of losing the stored data.SOLUTION: When data in a block 1 is erased, a block ID of a block 2 where the latest value of the data is stored is written in a management block, and then the data in the block 1 is erased. After a control device is recovered from reset, if there are two blocks having a block status that the block is in use, among the two blocks, data of the block (block 1) which is different from the block (block 2) having the block ID written in the management block is erased.

Description

  The present invention relates to a control device that writes data to a flash memory.

  2. Description of the Related Art Conventionally, there has been known a control device that reads and writes data by a write-once method with respect to a flash memory having a plurality of blocks as a minimum unit for data erasure.

  In flash memory, the size of the minimum unit of data erasure (block) is larger (for example, several kilobytes) than the size of the minimum unit of data writing (for example, several bytes). The entire block needs to be erased. Therefore, when using a flash memory, the data storage area is not fixed and the data is often managed by a write-once method. In the write-once method, when updating the value of a certain data, the latest value of the data is added to the free area of the block. Each block has an area for recording block status information of the block to be erased, and data is written to a block having block status information indicating that the block is in use among a plurality of blocks. (For example, refer to Patent Document 1).

Japanese Patent Laid-Open No. 9-281791

  By using a flash memory by a method as described in Patent Document 1, data can be read and written in the same manner as an existing EEPROM. However, in the method as described in Patent Document 1, when the power supply is cut off, the stored data may be lost as in the case of the EEPROM.

  Moreover, since the flash memory has a larger capacity than the EEPROM, more data can be stored. Therefore, it is assumed that data that has not been saved until now, for example, data that has a large influence on the entire function provided by the control device when data is lost, is assumed. In that case, it is necessary to reduce the possibility of data loss as compared with the prior art.

  The present invention has been made in view of the above points, and it is an object of the present invention to further reduce the possibility of losing stored data in a technique for recording data in a flash memory.

In order to achieve the above object, the invention according to claim 1 holds block status information indicating that it is in use among a plurality of blocks which are individually erased units in the flash memory (5). A control device that writes data to a block in a write-once manner, wherein the data for distinction that can identify the first block to be erased when erasing data of the first block among the plurality of blocks, or Pre-erase processing means (110) for writing, in the non-volatile storage medium (5a), distinction data that can identify the second block in which the latest data value is stored among the plurality of blocks, and the pre-erase processing After the distinction data is recorded by the means (110), the erasing means (120) for erasing the data in the first block, and the control device reset the data. After returning from the above, based on the fact that there are two blocks in the plurality of blocks that hold block status information indicating that they are in use, the distinguishing data in the nonvolatile storage medium (5a) Reference means (230) for referring to
Of the two blocks holding block status information indicating that they are in use, according to the distinguishing data referred to by the reference means (240), the first block to be erased Erasing means (240) for erasing data or erasing data of blocks other than the second block in which the latest value of the data is stored according to the distinguishing data referred to by the reference means (240) ).

  According to a second aspect of the present invention, a block indicating that a plurality of blocks are provided for each area in the flash memory (5) and are used in each area among a plurality of blocks each serving as a data erasing unit. A control device that writes data to a block having status information by a write-once method, and can identify the first block to be erased when erasing the first block among a plurality of blocks Non-volatile storage medium for distinguishing data or distinguishing data capable of identifying a second block in which the latest data value is stored among other blocks belonging to the same first area as the first block After the erasure preprocessing means (110) to be written into (5a) and the erasure preprocessing means (110) have recorded the distinguishing data, the first block is erased. Based on the fact that there are two blocks in the first area that hold the block status information indicating that it is in use after the leaving means (120) and the control device return from reset, Reference means (230) for referring to the distinguishing data in the nonvolatile storage medium (5a), and the two blocks in the first area holding block status information indicating that the data is being used. Of these, the data for the first block to be erased is erased according to the distinguishing data referenced by the reference means (240), or the distinguishing data referenced by the reference means (240) According to the data, the controller includes an erasing unit (240) for erasing data of blocks other than the second block in which the latest value of the data is stored.

  As in the first and second aspects, at the time of data erasure of the first block, the above-mentioned distinction data is written in the nonvolatile storage medium (5a) as preprocessing, and thereafter data erasure is performed. Then, after the control device returns from the reset, based on the fact that there are two blocks that hold the block status information indicating that the control device is in use, this distinction data is referred to, so that Since the first block or the second block in which the latest value of the data is stored can be specified, the data of the block to be erased is distinguished or distinguished from the above two blocks according to the distinguishing data. According to the business data, the data of the block that is not the block in which the latest value of the data is stored is erased. As a result, the erasure of the block to be erased before the reset is completed, so that the block holding the block status information indicating that it is in use is one second block in which the latest value of the data is stored. It becomes possible to know in which block the latest value of the data is stored. Therefore, in the technique of recording data in the flash memory, the possibility that the stored data is lost can be further reduced.

  According to a third aspect of the present invention, in the control device according to the first or second aspect, the non-volatile storage medium (5a) is a management block that is a unit of data erasure in a flash memory. After the discrimination data is recorded by the processing means (110), when there is no more free area to write the discrimination data in the management block, a predetermined management block is being erased in one of the plurality of blocks Management block erasing preprocessing means (150) for writing data, and management block erasing means for erasing data of the management block after the management block erasing data is written by the management block erasing preprocessing means (150). 160, 260), and after the management block erasing means erases the data of the management block, The management block erasing data invalidating means (170, 270) for invalidating the management block erasing data and the management block erasing means (160) are arranged in the one block after the control device returns from reset. The management block data is erased based on the fact that the management block erasing data is recorded. In this way, even when a reset occurs when erasing data in the management block, the data can be erased after returning from the reset.

  In addition, the code | symbol in the bracket | parenthesis in the said and the claim shows the correspondence of the term described in the claim, and the concrete thing etc. which illustrate the said term described in embodiment mentioned later. .

1 is a configuration diagram of a microcontroller 1 according to a first embodiment of the present invention. 2 is a conceptual diagram of a hierarchical configuration of application software, flash driver software, flash controller 6, and flash memory 5. FIG. It is a figure which shows the content of the blocks 1 and 2 before a data deletion, and a management block. It is a flowchart which shows the process at the time of the data erasure | elimination of a block. It is a figure which shows the content of the blocks 1 and 2 after management data recording, and the management block. It is a figure which shows the content of the blocks 1 and 2 after a discrimination data invalidation, and a management block. It is a figure which shows the content of the block 1, 2 when a data deletion of the block 1 is interrupted, and a management block. It is a flowchart of the process performed after returning from reset. It is a figure which shows the content of the block 1, 2 when a management block erasing data is recorded on the block 2, and a management block. It is a figure which shows the content of the blocks 1 and 2 when a management block erasing data is invalidated, and a management block. It is a figure which shows the contents of the blocks 1 and 2 when the data erasure of the management block is interrupted.

  Hereinafter, an embodiment of the present invention will be described. FIG. 1 shows a configuration of a microcontroller 1 (corresponding to an example of a control device of the present invention) according to the present embodiment. The microcontroller 1 is mounted on a vehicle and includes an I / O 2, a ROM 3, a RAM 4, a flash memory 5, a flash controller 6, a CPU 7, and the like.

  The I / O 2 is an interface device for exchanging signals with a device external to the microcontroller 1. The ROM 3 is a non-volatile storage medium in which various programs to be executed by the CPU 7 are stored in advance. The RAM 4 is a working memory area for the CPU 7.

  The flash memory 5 has a plurality of blocks which are the minimum unit of data erasure. The size of each block is several kilobytes (for example, 4 kilobytes), and in order to erase some data in one block, the data of the entire block is erased (that is, the bit of the entire block is set to 1). )There is a need. However, when a specific bit in one block is rewritten from 1 to 0, data can be rewritten in units smaller than that (for example, in units of 2 bytes or 4 bytes).

  Each of the plurality of blocks belongs to one of a plurality (M) of areas. For example, in the example of FIG. 1, blocks 1 and 2 belong to area 1 and blocks 3 and 4 belong to area 2. The number of blocks belonging to one area may be 2 or 3 or more. Information about which block belongs to which area is recorded in the ROM 3 in advance.

  The area is an area provided for sorting the recording destinations of records to be written in the flash memory 5 according to the type of data included in the records. For example, data of a type with a high value change frequency (that is, update frequency) such as the number of times of opening and closing the door and the number of times of opening and closing the engine is recorded in the area 2 and the frequency of the value change such as the software version The type of data with a low is classified such as being recorded in area 1. Information on which type of data is recorded in which area is recorded in the ROM 3 as an area correspondence table indicating the correspondence between the data ID and the area.

  In each area, a plurality of blocks belonging to the same area are used by the CPU 7 and the flash controller 6 so that the first block is used, and when the use of the first block is finished, the second block is used next. In turn, they are used for writing.

  In each of the plurality of blocks, a part of the area is used as a block status area, and the other area has a data area. Block status information is recorded in each block status area, and the block status information determines whether the block is a used block, a used block, or an unused block. can do. When each block starts to use the block by the CPU 7 and the flash controller 6, block status information indicating that the block is in use is written in the block status area. Further, records are sequentially recorded in order from the head address in the data area of the block in use (the block having block status information indicating that it is in use). Then, when the block is in a full state where there is no empty area to which further records are to be written, block status information indicating that the block has been used is written to the block status area. Further, by erasing the data of the block, the block status information of the block becomes block status information indicating that the block is unused.

  Note that the data size of the record may be fixed or variable, but is fixed in the present embodiment. The data size of the record is typically about several tens of bytes. Therefore, typically, several tens to several hundreds of records can be recorded in one block.

  Further, the flash memory 5 has one management block 5a as a block that does not belong to any area. This management block, like the other blocks, is the minimum unit for data erasure, and records can be recorded. In this management block 5a, as will be described later, immediately before data erasure of a block in each area, information of a block in which the latest data value is recorded in that area is written.

  The flash controller 6 is a known device that reads and writes data from and to each block in the flash memory 5 under the control of the CPU 7. Specifically, when the CPU 7 receives a command to read data at a specific address in a specific block, the content of the data recorded at the address is read from the flash memory 5 and the read content is output to the CPU 7.

  Further, when a write command is received from the CPU 7 to write specific data to a specific address of a specific block, the specific data is written to the address position of the block of the flash memory 5. When a block erase command is received from the CPU 7, all data in the block of the flash memory 5 is erased.

  The CPU 7 implements various processes by executing the programs recorded in the ROM 3, and in that process, exchanges signals with the outside using the I / O 2 as necessary, reads data from the ROM 3, The RAM 4 is used as a work area, and various commands as described above are output to the flash controller 6 to read and write data to the flash memory 5.

  Hereinafter, for the sake of simplicity, the CPU 7 outputs a read command to the flash controller 6, and the flash controller 6 reads data from the block of the flash memory 5 in accordance with the read command and outputs it to the CPU 7. It is described that data is read from the block 5. For simplicity, the CPU 7 outputs a write command to the flash controller 6 and the flash controller 6 writes data to the block of the flash memory 5 in accordance with the write command. To write.

  As shown in FIG. 1, the ROM 3 stores flash driver software and a plurality of application software as programs executed by the CPU 7. FIG. 2 conceptually shows the hierarchical structure of application software, flash driver software, flash controller 6 and flash memory 5.

  By executing these application software, for example, the CPU 7 receives a signal from a door opening / closing sensor via the I / O 2 to detect opening / closing of the vehicle door, and receives a signal from a sensor that detects the start of the vehicle engine. Then, the start of the engine ECU is detected.

  There is a case where it is necessary to record data in the flash memory 5 by processing when such an application is executed. For example, the number of times the engine is started needs to be recorded in the flash memory 5 every time the number of times changes, and the number of times the door is opened and closed needs to be recorded in the flash memory 5 every time the number of times changes. To do.

  As described above, when the CPU 7 needs to write the write data when executing the application software, the write request for the write data is output (written) to the RAM 4 or the register of the CPU 7. This write request is data including a data ID indicating the type of write data (for example, whether the engine has been started or the number of times the door has been opened and closed) and the value of the write data.

  Then, the CPU 7 starts execution of the flash driver software based on the output of the write request, and determines the write destination area based on the data ID in the write request in the execution process. Among them, a block in which block status information indicating that it is in use is specified, and a command necessary for the flash controller 6 is output to record the value of write data in the specified block. As a result, the write data is recorded as a record by the flash controller 6 in the data area of the block by the write-once method.

  Here, the additional recording method will be described. In the write-once method, the data value of a certain data ID is already recorded in a certain area of the block, and when a new value of the data is updated, the new value is not overwritten and recorded in the area. The latest value of the data is additionally recorded in the free area of the block.

  In the following, for the sake of simplicity, the process in which the CPU 7 outputs a write command for writing data to a specific address to the flash controller 6 is simply described as the CPU 7 writing data to a specific address of the block. Similarly, the CPU 7 outputs a read command for reading data from a specific address to the flash controller 6, and the CPU 7 simply reads the data from the specific address in the process of acquiring the data from the flash controller 6. It describes.

  Hereinafter, a specific operation example of the microcontroller 1 having the above configuration will be described. In this example, the operation of writing the data value of a certain data ID in the area 1 having only the block 1 and the block 2 will be described, but the same operation is performed when writing the data value in another area.

  First, when the CPU 7 writes a value of certain data in the area 1, the CPU 7 refers to the block status information stored in the blocks 1 and 2 in the area 1 and has block status information indicating that the data is being used. A record having a data value and a data ID is written to the block by a write-once method. Normally, there is only one block having block status information indicating that it is in use, and block status information of other blocks in the same area is unused or used.

  In this example, it is assumed that the block 2 belonging to area 1 has block status information indicating that it is in use. In this case, the latest value is sequentially added to the block 2 every time the data value is updated. Then, when the block 2 is full so that no more records can be recorded (see FIG. 3), the CPU 7 erases the data in the block 1 (corresponding to an example of the first block). As a part, the process shown in FIG. 4 is executed.

  First, in step 110, as a pre-erase process, a set of a block ID of block 2 (corresponding to an example of a second block) in which the latest data value is recorded and an area ID of area 1 to which the block 2 belongs is set. Are written in the free area of the management block as the data for discrimination. The block ID is an identifier assigned to each block in order to uniquely distinguish the block in the flash memory 5, and the area ID is assigned to each area in order to uniquely distinguish the area in the flash memory 5. It is an identifier. At this time, the data for discrimination includes data indicating that the data for discrimination is valid (see FIG. 5).

  Subsequently, in step 120, data erasure of the block 1 to be erased is executed. Specifically, the block 1 erase command is output to the flash controller 6. As a result, the flash controller 6 erases the data in the block 1, and when the data erase is completed, notifies the CPU 7 to that effect.

  After receiving the data erasure completion notification from the flash controller 6, the CPU 7 proceeds to step 130 and invalidates the discrimination data written in the management block in the immediately preceding step 110 (see FIG. 6). Specifically, in the data for discrimination, data indicating that the data for discrimination is valid is rewritten to data indicating that it is invalid. Note that even if a value is once written in a certain area of the block, 1 → 0 type rewriting in which a part of the bit string constituting the value is rewritten from 1 to 0 is possible, which is effective as described above. The rewriting from the data indicating that the data is invalid to the data indicating that the data is invalid is such a 1 → 0 type rewriting.

  Subsequently, in step 140, it is determined whether or not the management block is full, that is, whether or not there is a free area in the management block in which new discrimination data is written. In this example, as shown in FIG. 6, since there is still an empty area in the management block, it is determined that the management block is not full, and the processing in FIG. 4 is terminated.

  By such processing of FIG. 4, data erasure of block 1 is realized. Thereafter, the CPU 7 copies the latest values of various data recorded in the block 2 to the block 1 and rewrites the block status information in the block status area of the block 2 to the block status information indicating that it has been used (this is also 1 In addition, the block status information indicating that the block is in use is written in the block status area of block 1. As a result, the latest value of the data for area 1 is sequentially recorded in block 1 thereafter.

  Here, the case where the microcontroller 1 is reset during the data erasure of the block 1 in step 120 of FIG. 4 will be described. The cause of the reset is various, such as a runaway of the microcontroller 1, a reset request from the outside of the microcontroller 1, a software reset request by a program executed by the CPU 7, and an instantaneous interruption of power supply to the microcontroller 1.

  When the microcontroller 1 is reset, the data erasure of the block 1 is interrupted, so that the storage area of the block 1 is not completely erased (a state where all bits are 1) but halfway. It has been erased.

  When the data erasure of a block is finished halfway, the data structure in the block is determined according to the data structure before erasure, the timing of interruption, the data erasing procedure by the flash controller 6 (for example, The flash controller 6 may be such that each bit of the block is set to 1 in a random order). Accordingly, in some cases, as shown in FIG. 7, the block status information in the block status area of the block 1 in which data erasure is interrupted may happen to change to block status information indicating that it is in use.

  If a flash memory is used in this manner, performance equivalent to that of an existing EEPROM can be provided, and data may be lost as in the case of an EEPROM. Since the flash memory can store more data than the EEPROM, it is assumed that data that has not been stored so far and should not be lost is stored. In that case, it is desirable to reduce the possibility of data loss compared to the prior art.

  In the present embodiment, in order to solve this problem, the CPU 7 executes the processing shown in FIG. 8 when the microcontroller 1 returns from reset.

  In the process of FIG. 8, the CPU 7 first searches for a block having block status information indicating that it is in use in all areas in step 210. Subsequently, in step 210, it is determined whether there is an area in which there are two or more blocks having block status information indicating that the block is being used in accordance with the search result. If it is determined that it does not exist, the process bypasses steps 230 and 240 and proceeds to step 250.

  In the case of the example in FIG. 7, it is determined that the area 1 has two blocks (block 1 and block 2) having block status information indicating that the area 1 is in use, and the process proceeds to step 230. In step 230, the discrimination data recorded in the management block is referred to.

  When a plurality of pieces of distinguishing data are recorded in the management block, the last recorded distinguishing data may be referred to and valid (that is, not invalidated). Reference data may be referred to. Since two or more blocks are hardly erased at the same time, in most cases, the management block has only one effective discrimination data. In the example of FIG. 7, reference is made to the distinguishing data having the block ID of block 2 and the area ID of area 1.

  Subsequently, in step 240, a block to be erased is specified based on the referenced discrimination data. A method for specifying a block to be erased based on the referenced discrimination data is as follows. As described in the description of step 110 in FIG. 4, the block ID of the block 2 in which the latest value of the data is recorded at the time of erasing the data of the block 1 is recorded in the discrimination data. Further, as shown in FIG. 7, the block status information indicating that the block is being used is the block 2 and the block 1 in which data erasure has been interrupted.

  Therefore, the CPU 7 is one of the two blocks 1 and 2 having the block status information indicating that the block ID is being used in the area 1 and is not the block 2 having the block ID included in the referenced discrimination data. Block 1 is specified as a block to be erased.

  Further, in step 240, an erase command for the identified block 1 to be erased is output to the flash controller 6. Thereby, the flash controller 6 erases the data of the block 1 to be erased, and notifies the CPU 7 when the data erase is completed. In step 240, the discrimination data referred to in step 230 is invalidated by the same method as in step 130 of FIG. As a result, the data structure of the block 1 returns from the halfway erased state as shown in FIG. 7 to the completely erased state as shown in FIG.

  In this way, at the time of data erasure of block 1, the above-mentioned distinction data is written in the management block 5a as preprocessing, and thereafter data erasure is performed. Then, after the control device returns from reset, based on the fact that there are two blocks that hold block status information indicating that the controller is in use, the latest value of the data can be obtained by referring to this distinguishing data. Therefore, the block 2 in which the latest value of the data is not stored is deleted from the two blocks according to the distinguishing data. This completes the erasure of the block that was to be erased before the reset, so that the block holding the block status information indicating that it is in use becomes one of the blocks 2 in which the latest data values are stored. Thus, it can be seen in which block the latest value of the data is stored. When the data value is required, the latest value of the data can be read from the block 2.

  The CPU 7 that has received notification from the flash controller 6 that data erasure of the block 1 has been completed, then proceeds to step 250, where the block being used in a predetermined area (referred to as area 1 in this example) is determined. It is determined whether or not the management block erasing data is included in (the block having block status information indicating that it is in use). In the example of FIG. 6, the management block erasing data is not included in the block 2, so the processing of FIG. The management block erasing data will be described later.

  If the block data is erased in step 240, the latest values of various data recorded in block 2 are copied to block 1 after the process of FIG. Further, the block status information of the copy source block 2 is rewritten to the block status information indicating that it has been used, and the block status information indicating that it is being used is written to the block status area of the copy destination block 1 Include. As a result, the latest value of the data for area 1 is sequentially recorded in block 1 thereafter.

  Next, a case where the management block becomes full as a result of the processing of step 110 in FIG. 4 will be described. In this case, after completion of erasure of any block (other than the management block) in step 130, it is determined in step 140 in FIG. 4 that the management block is full, and the process proceeds to step 150.

  In step 150, as pre-processing for management block erasure, as shown in FIG. 9, among the blocks 1 and 2 in a predetermined area (referred to as area 1 in this example), a block in use (in use) The management block erasing data is recorded in the empty area of the block 2, which is a block having block status information to the effect. The management block erasing data includes valid data indicating that the management block erasing data is valid.

  In step 160, the management block data is erased. Specifically, a management block erase command is output to the flash controller 6. Thereby, the flash controller 6 erases the data in the management block, and when the data erase is completed, notifies the CPU 7 to that effect.

  After receiving the data erasure completion notification from the flash controller 6, the CPU 7 proceeds to step 170 and invalidates the management block erasing data written in the management block in the immediately preceding step 150 (see FIG. 10). Specifically, in the data for discrimination, data indicating that the data for discrimination is valid is rewritten to data indicating that it is invalid (this is also a 1 → 0 type rewrite). After step 170, the process of FIG. 4 ends.

  Here, a case where the microcontroller 1 is reset while the management block data is being erased in step 160 of FIG. 4 will be described.

  When the microcontroller 1 is reset, as illustrated in FIG. 11, the data erasure of the management block is interrupted halfway, so the storage area of the management block is erased halfway rather than completely erased. It is in the state that was done.

  In order to eliminate such a halfway erased state, in the process of FIG. 8 executed by the CPU 7 after returning from the reset, in step 250, the block 2 in use in the predetermined area 1 is managed. It is determined that block erasing data is included, and then the process proceeds to step 260.

  In step 260, the management block data is erased. Specifically, a management block erase command is output to the flash controller 6. Thereby, the flash controller 6 erases the data in the management block, and when the data erase is completed, notifies the CPU 7 to that effect.

  After receiving the notification of the completion of data erasure from the flash controller 6, the CPU 7 proceeds to step 270 and invalidates the management block erasing data in the same manner as in step 170 of FIG. Thereby, the data structure of the management block returns to the state shown in FIG. After step 270, the process of FIG. 8 ends.

  In this way, after the discrimination data is recorded, if there is no more free area to write the discrimination data in the management block, the predetermined management block erasing data is written to the block 2 in use in the predetermined area, Thereafter, the management block data is erased, and then the management block erasing data is invalidated. After the microcontroller 1 returns from the reset, the management block data is erased based on the fact that the management block erase data is recorded in the block 2, and then the management block erase data is invalidated. . In this way, even when a reset occurs when erasing data in the management block, the data can be erased after returning from the reset.

  In the above embodiment, the CPU 7 of the microcontroller 1 functions as an example of the pre-erase processing unit by executing step 110, and functions as an example of the erasing unit by executing step 120. Execution functions as an example of a reference unit, execution of step 240 functions as an example of an erasure unit, execution of step 150 functions as an example of a management block erasure preprocessing unit, and steps 160 and 260 Is executed as an example of the management block erasing unit, and the steps 170 and 270 are executed as an example of the management block erasing data invalidating unit.

(Other embodiments)
As mentioned above, although embodiment of this invention was described, the scope of the present invention is not limited only to the said embodiment, The various form which can implement | achieve the function of each invention specific matter of this invention is included. It is. For example, the following forms are also acceptable.

  (1) In the above embodiment, the blocks in the flash memory 5 are allocated to any of a plurality of areas, but the flash memory 5 does not necessarily have to be divided into a plurality of areas in this way. .

  (2) In the above embodiment, the management block of the flash memory 5 is employed as the storage medium for recording the discrimination data. However, the storage medium for recording the discrimination data may be an EEPROM, A flash memory other than the flash memory 5 may be used. In other words, the storage medium for recording the discrimination data may be any nonvolatile storage medium. In the case of adopting an EEPROM, in order to invalidate the discrimination data, the discrimination data may be simply deleted.

  (3) In the above embodiment, the distinguishing data written to the management block in step 110 includes the block ID of the block 2 in which the latest value of the data is stored in the area 1. At the time of return, of the two blocks 1 and 2 having block status information indicating that they are in use in the area 1, the block 1 that is not the block 2 with the block ID in the discrimination data is deleted. It has become.

  However, the present invention is not limited to this, and in the present invention, it is only necessary to know which of the two blocks 1 and 2 having block status information is erasing and which is storing the latest data value.

  Therefore, the distinguishing data written to the management block in step 110 includes the block ID of the block 1 to be erased in the area 1, and the CPU 7 is in use in the area 1 when returning from reset. Among the two blocks 1 and 2 having the block status information, the result is the same even if the block 1 with the block ID in the discrimination data is erased.

  (4) In the above embodiment, the CPU 7 and the flash controller 6 erase the data in the block 1 when the block 2 is full. However, the timing for erasing the data in the block 1 is not necessarily like this. Not limited to anything. For example, the CPU 7 and the flash controller 6 may perform data erasure of the block 1 based on the application outputting the erase request of the block 1. Even in the case of such data erasure, the processing shown in FIG. 3 is performed, but data copying is not performed when the processing in FIGS. 3 and 8 is completed.

  (5) In the above embodiment, each function realized by the CPU 7 executing the program is performed using hardware having these functions (for example, an FPGA capable of programming a circuit configuration). It may be realized.

1 Microcontroller 2 I / O
3 ROM
4 RAM
5 Flash memory 5a Management block 6 Flash controller 7 CPU

Claims (3)

A control device that writes data in a write-once mode to a block that holds block status information indicating that it is in use among a plurality of blocks that are individually erased in the flash memory (5). There,
The distinction data that can identify the first block to be erased when the data of the first block of the plurality of blocks is erased, or the second block in which the latest value of the data among the plurality of blocks is stored Erasure preprocessing means (110) for writing the distinguishing data capable of specifying the data into the nonvolatile storage medium (5a),
An erasing unit (120) for erasing data of the first block after the data for discrimination is recorded by the pre-erase processing unit (110);
In the nonvolatile storage medium (5a) based on the fact that there are two blocks in the plurality of blocks that hold the block status information indicating that the controller is in use after returning from reset. Reference means (230) for referring to the distinguishing data of
Of the two blocks holding block status information indicating that they are in use, according to the distinguishing data referred to by the reference means (240), the first block to be erased Erasing means (240) for erasing data or erasing data of blocks other than the second block in which the latest value of the data is stored according to the distinguishing data referred to by the reference means (240) And a control device. Among a plurality of blocks provided for each area in the flash memory (5) and individually serving as a data erasing unit, a block holding block status information indicating that the area is in use A control device for writing data by a write-once method,
Discrimination data that can identify the first block to be erased when erasing the first block among a plurality of blocks, or data among other blocks belonging to the same first area as the first block Pre-erase processing means (110) for writing, in the nonvolatile storage medium (5a), the distinguishing data that can identify the second block in which the latest value of
An erasing unit (120) for erasing the first block after the identification data is recorded by the erasing preprocessing unit (110);
After the controller returns from reset, the nonvolatile storage medium (5a) is based on the fact that there are two blocks in the first area that hold block status information indicating that they are in use. Reference means (230) for referring to the distinguishing data therein,
Of the two blocks in the first area holding the block status information indicating that they are in use, the distinction data referred to by the reference means (240) is to be erased. The data of the block other than the second block in which the latest value of the data is stored according to the data for discrimination referred to by the reference means (240) is deleted. An erasing means (240) for erasing. The nonvolatile storage medium (5a) is a management block that is a unit of data erasure in the flash memory,
After the discrimination data is recorded by the pre-erase processing means (110), if there is no more free space to write the discrimination data in the management block, one block among the plurality of blocks has a predetermined management Management block erasure preprocessing means (150) for writing data during block erasure;
Management block erasing means (160, 260) for erasing data of the management block after the management block erasing data is written by the management block erasing preprocessing means (150);
Management block erasing data invalidating means (170, 270) for invalidating the management block erasing data after the management block erasing means erases the data of the management block;
The management block erasing means (160) performs data erasure of the management block based on the fact that the management block erasing data is recorded in the one block after the control device returns from reset. The control device according to claim 1, wherein:

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