JP2012256641A - Multilayered capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayered capacitor in which short circuit failure between an external electrode and a terminal conductor can be prevented.SOLUTION: In the multilayered capacitor 1, external electrodes 3A and 3B for connection with the internal electrode of an ESR control part comprises only a plating layer. When compared with a case where all external electrodes 3A and 3B and terminal conductors 4A and 4B comprise a baked layer, short circuit failure between the external electrodes 3A and 3B and the terminal conductors 4A and 4B can be prevented. In the multilayered capacitor 1, the terminal conductors 4A and 4B for connection with the internal electrode of a capacitance part comprises a baked layer. Consequently, infiltration of the plating liquid into the internal electrode of a capacitance part can be suppressed, and occurrence of poor insulation resistance can be reduced.

Description

  The present invention relates to a multilayer capacitor.

  As a conventional multilayer capacitor, for example, there is a multilayer capacitor described in Patent Document 1. This conventional multilayer capacitor includes a multilayer body in which an insulator layer and a plurality of first and second internal electrodes are stacked, and the first and second external electrodes and the first external electrode are formed on the outer surface of the multilayer body. And a second terminal conductor. In the stacking direction, the first internal electrode and the second internal electrode have overlapping portions, the first internal electrodes are connected to each other via the first terminal conductor, and the second internal electrodes are Two terminal conductors are connected to each other. Further, some of the first and second internal electrodes are led out to the side surface of the multilayer body by the lead conductor and connected to the first and second external electrodes.

JP 2006-286930 A

  In recent years, this type of multilayer capacitor has been further reduced in size. For this reason, especially in the multilayer capacitor provided with the terminal conductor as described above, the distance between the external electrode and the terminal conductor on the surface of the multilayer body must be very narrow. Therefore, when all the external electrodes and terminal conductors are formed by the baking layer formed by baking the conductive paste as in the prior art, there is a possibility that the external electrodes and the terminal conductors are short-circuited.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a multilayer capacitor capable of preventing a short circuit failure between an external electrode and a terminal conductor.

  In order to solve the above problems, a multilayer capacitor according to the present invention includes a multilayer body in which a plurality of internal electrodes are stacked with a dielectric layer interposed therebetween, an external electrode and a terminal conductor formed on the outer surface of the multilayer body, And the laminated body includes a capacitance part in which a first internal electrode and a second internal electrode are arranged with at least one dielectric layer sandwiched therebetween, a third internal electrode, and a fourth internal electrode And an ESR control unit arranged with at least one dielectric layer interposed therebetween. In the capacitance unit, the first internal electrode is disposed on the surface of the multilayer body via the first lead conductor. It is connected only to the first terminal conductor composed of the seizure layer, and the second internal electrode is connected only to the second terminal conductor composed of the seizure layer on the surface of the laminate through the second lead conductor. In the ESR control unit, the third internal electrode is connected to the first internal via the third lead conductor. It is connected to the child conductor and connected to the first external electrode composed of a plating layer on the surface of the multilayer body via the fourth lead conductor, and the fourth internal electrode is connected to the fifth lead conductor. And a second terminal conductor, and a sixth lead conductor, and is connected to a second external electrode formed of a plating layer on the surface of the multilayer body.

  In this multilayer capacitor, the external electrode connected to the internal electrode of the ESR control unit is composed of a plating layer. Therefore, it is possible to prevent a short circuit failure between the external electrode and the terminal conductor, as compared with the case where all the external electrodes and the terminal conductor are formed of the baking layer. Moreover, in this multilayer capacitor, the terminal conductor connected to the internal electrode of the electrostatic capacity portion is composed of a seizure layer. Therefore, the infiltration of the plating solution into the internal electrode of the electrostatic capacity portion can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  The multilayer capacitor according to the present invention includes a multilayer body in which a plurality of internal electrodes are stacked with a dielectric layer interposed therebetween, and an external electrode and a terminal conductor formed on the outer surface of the multilayer body. Has at least one electrostatic capacitance portion in which the first internal electrode and the second internal electrode are alternately arranged with at least one dielectric layer interposed therebetween, and the third internal electrode and the fourth internal electrode are at least ESR control units arranged alternately with one dielectric layer interposed therebetween, and in the capacitance unit, the first internal electrode is plated on the surface of the multilayer body via the first lead conductor The second internal electrode is connected only to the second terminal conductor composed of the plating layer on the surface of the multilayer body via the second lead conductor. In the ESR control unit, the third internal electrode is connected to the first internal via the third lead conductor. It is connected to the child conductor, and is connected to the first external electrode composed of the seizure layer on the surface of the multilayer body through the fourth lead conductor, and the fourth internal electrode is connected to the fifth lead conductor. And connected to a second terminal conductor, and connected to a second external electrode composed of a baking layer on the surface of the multilayer body via a sixth lead conductor.

  In this multilayer capacitor, the terminal conductor connected to the internal electrode of the capacitance part is formed of a plating layer. Therefore, it is possible to prevent a short circuit failure between the external electrode and the terminal conductor, as compared with the case where all the external electrodes and the terminal conductor are formed of the baking layer. Further, in this multilayer capacitor, the external electrode connected to the internal electrode of the ESR control unit is composed of a baking layer. Therefore, the penetration of the plating solution into the internal electrode of the ESR control unit can be suppressed, and the occurrence of insulation resistance failure can be reduced. Furthermore, since the adhesion strength between the external electrode and the laminate is improved because the external electrode includes a baking layer, the external electrode is peeled off from the laminate even when stress is applied to the external electrode during mounting on the circuit electrode. Can be prevented.

  Moreover, it is preferable that the plating layer which consists of the same component as the plating layer formed in the surface of the laminated body is further formed in the surface of the baking layer formed in the surface of the laminated body. Such a plating layer can be formed simultaneously with the plating layer formed on the surface of the laminate.

  Further, it is preferable that the internal electrode closest to the ESR control unit in the electrostatic capacitance unit and the internal electrode closest to the electrostatic capacitance unit in the ESR control unit have the same polarity. In this case, even if the plating solution enters the internal electrode, the occurrence of defective insulation resistance can be reduced.

  Moreover, it is preferable that the lead conductor connected with a plating layer has the width of the connection part wider than the width | variety of another part. In this case, sufficient adhesion strength of the plating layer can be secured.

  Moreover, it is preferable that the laminated body further has a dummy electrode connected only to the plating layer. In this case, sufficient adhesion strength of the plating layer can be secured.

  Moreover, it is preferable that the one surface side of a laminated body is a mounting surface to a board | substrate, and an internal electrode is arrange | positioned so that it may cross substantially orthogonally with respect to a mounting surface. With such a configuration, even when the number of stacked internal electrodes is increased, the ESL can be reduced.

  Moreover, it is preferable that a terminal conductor is formed in the both end surfaces of the longitudinal direction in a laminated body, and an external electrode is formed in the side surface which cross | intersects both end surfaces. In this case, since the space between the external electrode and the terminal conductor can be secured, it is possible to prevent the short circuit failure more reliably.

  Moreover, it is preferable that the external electrode and the terminal conductor are formed on the same side surface in the multilayer body. In this way, the ESL can be further reduced.

  According to the present invention, it is possible to prevent a short circuit failure between the external electrode and the terminal conductor.

1 is a perspective view showing a multilayer capacitor according to a first embodiment of the present invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of the formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 2nd Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. FIG. 7 is a diagram showing how external electrodes and terminal conductors are formed in the multilayer capacitor shown in FIG. 6. It is a perspective view which shows the multilayer capacitor which concerns on 3rd Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 4th Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 5th Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 6th Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 7th Embodiment of this invention. FIG. 32 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. 31. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. FIG. 32 is a diagram showing an electrode pattern constituting an ESR control unit of the multilayer capacitor shown in FIG. 31. It is a figure which shows the mode of the formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 8th Embodiment of this invention. FIG. 37 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. 36. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 9th Embodiment of this invention. It is a figure which shows the layer structure of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG. It is a perspective view which shows the multilayer capacitor which concerns on 10th Embodiment of this invention. 47 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. 46. FIG. It is a figure which shows the electrode pattern which comprises the electrostatic capacitance part of the multilayer capacitor shown in FIG. It is a figure which shows the electrode pattern which comprises the ESR control part of the multilayer capacitor shown in FIG. It is a figure which shows the mode of formation of the external electrode and terminal conductor in the multilayer capacitor shown in FIG.

Hereinafter, preferred embodiments of the multilayer capacitor according to the present invention will be described in detail with reference to the drawings. In this description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.
[First Embodiment]

  FIG. 1 is a perspective view showing the multilayer capacitor in accordance with the first embodiment of the present invention. FIG. 2 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in the figure, the multilayer capacitor 1 includes a substantially rectangular parallelepiped multilayer body 2, external electrodes (first external electrodes) 3A and external electrodes (second electrodes) formed on both end surfaces of the multilayer body 2 in the longitudinal direction. 3B, and a terminal conductor (first terminal conductor) 4A and a terminal conductor (second terminal conductor) 4B formed on both side surfaces of the laminate 2 in the width direction (depth direction in FIG. 1). I have.

  As shown in FIG. 2, a plurality of internal electrodes 6 having different electrode patterns are stacked inside the stacked body 2 with a dielectric layer 5 interposed therebetween. The dielectric layer 5 is made of a sintered body of a ceramic green sheet containing a dielectric ceramic, and the internal electrode 6 is made of a sintered body of a conductive paste. The actual multilayer capacitor 1 is integrated so that the boundary between the dielectric layers 5 and 5 is not visible. In the multilayer body 2, the end surface in the stacking direction of the internal electrode 6 is a mounting surface when stacked on the mounting substrate.

  As shown in FIG. 2, the multilayer body 2 includes a capacitance portion 11 that mainly contributes to the capacitance of the multilayer capacitor 1 and an ESR control portion 12 that controls the ESR of the multilayer capacitor 1. As shown in FIG. 3, the capacitance part 11 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 6A and internal electrodes (second internal electrodes) 6B having different patterns. Yes.

  As shown in FIG. 3A, the internal electrode 6A includes a rectangular main electrode portion 13A formed in the central portion, and a strip-shaped lead conductor (leaded from one side of the main electrode portion 13A toward the terminal conductor 4A). A first lead conductor) 14A. An end portion of the lead conductor 14A is exposed on one side surface in the width direction of the multilayer body 2 and connected to the terminal conductor 4A.

  Dummy electrodes 15A, 15B, and 15C are formed in the same layer as the internal electrode 6A. The dummy electrode 15A extends along the edge on the one end face side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3A. The dummy electrode 15B extends along the edge on the other end surface side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3B. The dummy electrode 15C is located on the opposite side of the lead conductor 14A and is connected to the terminal conductor 4B.

  As shown in FIG. 3B, the internal electrode 6B includes a rectangular main electrode portion 13B formed in the central portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 13B toward the terminal conductor 4B). Second lead conductor) 14B. An end portion of the lead conductor 14B is exposed on the other side surface in the width direction of the multilayer body 2 and is connected to the terminal conductor 4B.

  Dummy electrodes 15D, 15E, and 15F are formed in the same layer as the internal electrode 6B. The dummy electrode 15D extends along the edge on the one end face side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3A. The dummy electrode 15E extends along the edge on the other end surface side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3B. The dummy electrode 15F is located on the opposite side of the lead conductor 14B and is connected to the terminal conductor 4B.

  In such a capacitance portion 11, a capacitance formation region is formed by a portion where the main electrode portion 13A of the internal electrode 6A and the main electrode portion 13B of the internal electrode 6B overlap each other when viewed from the stacking direction. In the present embodiment, the entire surface of the main electrode portion 13A overlaps the entire surface of the main electrode portion 13B, so that a sufficient capacity forming region is secured.

  On the other hand, the ESR control unit 12 is arranged above and below so as to sandwich the capacitance unit 11 when viewed from the stacking direction. As shown in FIG. 4, the ESR controller 12 is formed by stacking two types of internal electrodes (third internal electrodes) 6C and internal electrodes (fourth internal electrodes) 6D having different patterns.

  As shown in FIG. 4A, the internal electrode 6C includes a rectangular main electrode portion 13C formed in the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 13C toward the terminal conductor 4A. 14C) and a lead conductor (fourth lead conductor) 14D drawn from the main electrode portion 13C toward the external electrode 3A. An end portion of the lead conductor 14C is exposed on one side surface in the width direction of the multilayer body 2 and connected to the terminal conductor 4A. Further, the end portion of the lead conductor 14D is expanded to be substantially equal to the width of the multilayer body 2, and is exposed to one end surface in the longitudinal direction of the multilayer body 2 and connected to the external electrode 3A.

  Dummy electrodes 15G and 15H are formed in the same layer as the internal electrode 6C. The dummy electrode 15G extends along the edge on the other end surface side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3B. The dummy electrode 15H is located on the opposite side of the lead conductor 14C and is connected to the terminal conductor 4B.

  As shown in FIG. 4B, the internal electrode 6D includes a rectangular main electrode portion 13D formed in the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 13D toward the terminal conductor 4B. 14E and a lead conductor (fourth lead conductor) 14F drawn from the main electrode portion 13D toward the external electrode 3B. An end portion of the lead conductor 14E is exposed to the other side surface in the width direction of the multilayer body 2 and connected to the terminal conductor 4B. Further, the end portion of the lead conductor 14F is expanded to be substantially equal to the width of the multilayer body 2 and is exposed to the other end surface in the longitudinal direction of the multilayer body 2 and connected to the external electrode 3B.

  Dummy electrodes 15I and 15J are formed in the same layer as the internal electrode 6D. The dummy electrode 15I extends along the edge on the one end face side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3A. The dummy electrode 15J is located on the opposite side of the lead conductor 14E and is connected to the terminal conductor 4A.

  As shown in FIG. 2, the internal electrode 6 closest to the ESR control unit 12 in the capacitance unit 11 and the internal electrode 6 closest to the capacitance unit 11 in the ESR control unit 12 are the same. It is connected to an external electrode and both have the same polarity.

  Further, a protective layer 16 is appropriately laminated on the outer layer side of the ESR control unit 12 as shown in FIG. Dummy electrodes 15K, 15L, 15M, and 15N are formed on the protective layer 16. The dummy electrode 15K extends along the edge on the one end face side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3A. The dummy electrode 15L extends along the edge on the other end surface side in the longitudinal direction of the multilayer body 2, and is connected to the external electrode 3B. The dummy electrode 15 </ b> M is connected to the terminal conductor 4 </ b> A at the center portion in the longitudinal direction of the multilayer body 2. The dummy electrode 15N is connected to the terminal conductor 4B on the opposite side of the dummy electrode 15M.

  The external electrodes 3A and 3B are electrodes connected to a predetermined polarity when the multilayer capacitor 1 is mounted on a mounting board. The terminal conductors 4A and 4B are conductors that connect the internal electrodes 6 belonging to the capacitance portion 11 of the multilayer body 2 in parallel, and are conductors that are not directly connected to the mounting substrate.

  The external electrodes 3A and 3B are composed of, for example, a single layer or a plurality of plating layers made of a material having resistance to soldering such as Ni or a material having solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 4A and 4B are composed of a plurality of layers having a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer and a plating layer similar to the outer electrodes 3A and 3B as an outer layer. It is configured.

  FIG. 5 is a diagram showing how the external electrode 3 and the terminal conductor 4 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminate 2 is obtained through a pressing process, a cutting process, a firing process, and the like, as shown in FIG.

  Next, as shown in FIG. 5B, an immersion method or a screen printing method is performed so as to cover the lead conductors 14A, 14C and the dummy electrodes 15F, 15J, 15M exposed from one side surface in the width direction of the multilayer body 2, respectively. The conductive paste is applied using Similarly, a conductive paste is applied using an immersion method or a screen printing method so as to cover the lead conductors 14B and 14E and the dummy electrodes 15C, 15H, and 15N exposed from the other side surfaces. Then, the baking layer 17 is formed by baking at a predetermined temperature.

  Finally, as shown in FIG. 5C, the lead conductor 14D and the dummy electrodes 15A, 15D, 15I, and 15K exposed from one end face in the longitudinal direction of the multilayer body 2, and the lead conductor 14F and the dummy exposed from the other end face. A plating layer 18 is formed using a barrel plating method or the like so as to cover the electrodes 15B, 15E, 15G, 15L and the baking layer 17, respectively. Thereby, the external electrodes 3A and 3B and the terminal conductors 4A and 4B are formed, and the multilayer capacitor 1 is obtained.

  When forming the plating layer 18, the external electrodes 3 </ b> A and 3 </ b> B are connected to each other by causing the end portions of the lead conductors and the end portions of the dummy electrodes exposed on the surface of the multilayer body 2 to grow by plating elongation. Will be linked. Therefore, the external electrodes 3A and 3B are not formed on the side surface in the height direction (vertical direction in FIG. 1) of the multilayer body 2, but the edge of the side surface in the width direction connected to the end surface from the longitudinal end surface of the multilayer body 2 Formed over the part. The terminal conductors 4A and 4B are formed from the side surface in the width direction of the multilayer body 2 to the edge of the side surface in the height direction connected to the side surface.

  In the multilayer capacitor 1 as described above, the external electrodes 3 </ b> A and 3 </ b> B connected to the internal electrode 6 of the ESR control unit 12 are configured only by the plating layer 18. Accordingly, it is possible to prevent a short circuit failure between the external electrodes 3A and 3B and the terminal conductors 4A and 4B, as compared with a case where all the external electrodes 3A and 3B and the terminal conductors 4A and 4B are configured by a burned layer. Further, in the multilayer capacitor 1, the terminal conductors 4 </ b> A and 4 </ b> B connected to the internal electrode 6 of the capacitance part 11 are configured including the baking layer 17. Therefore, infiltration of the plating solution into the internal electrode 6 of the electrostatic capacitance part 11 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 1, the number of stacked capacitance units 11 is larger than the number of stacked layers of the ESR control unit 12. In the conventional configuration, the internal electrode 6 facing the opposite polarity in the capacitance unit 11 from the terminal conductors 4 A and 4 B side. Since the plating solution easily enters, it is particularly effective to cover the terminal conductors 4A and 4B with the baking layer 17. On the other hand, since the number of layers of the ESR control unit 12 is small, the number of connection portions with the external electrodes 3A and 3B is small, and even if the external electrodes 3A and 3B are formed of the plating layer 18, the infiltration of the plating solution can be suppressed. Further, since the internal electrode 6 of the ESR control unit 12 connected to the external electrodes 3A and 3B has an elongated strip shape, the penetration of the plating solution can be suppressed and the area facing the internal electrode 6 having a different polarity can be suppressed. It is done. Therefore, the occurrence of insulation resistance failure can be further reliably reduced.

  In the multilayer capacitor 1, the internal electrode 6 closest to the ESR control unit 12 in the capacitance unit 11 and the internal electrode 6 closest to the capacitance unit 11 in the ESR control unit 12 have the same polarity. Yes. Since these internal electrodes 6 and 6 do not contribute to the capacitance, even if the plating solution enters the internal electrodes 6 and 6, it is possible to prevent a decrease in reliability such as variations in capacitance.

Furthermore, in the multilayer capacitor 1, the end portions of the lead conductor 14D and the lead conductor 14F that are directly connected to the plated layer 18 are expanded to be substantially equal to the width of the multilayer body 2, and the layers where the lead conductor 14D and the lead conductor 14F do not exist. Are provided with dummy electrodes 15A, 15B, 15D, 15E, 15G, 15I, 15K, and 15L, respectively. Thereby, sufficient adhesion strength of the plating layer 18 to the laminate 2 can be secured.
[Second Embodiment]

  FIG. 6 is a perspective view showing the multilayer capacitor in accordance with the first embodiment of the present invention. FIG. 7 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in FIGS. 6 and 7, the multilayer capacitor 21 is different from the first embodiment in the configuration of the external electrodes 23A and 23B and the terminal conductors 24A and 24B, and the electrode pattern of the internal electrode 26 in the multilayer body 22. Yes.

  In the multilayer capacitor 21, external electrodes (first external electrodes) 23A and external electrodes (second external electrodes) 23B are formed on both side surfaces of the multilayer body 22 in the width direction (depth direction in FIG. 6). In addition, a terminal conductor (first terminal conductor) 24A and a terminal conductor (second terminal conductor) 24B are formed on both end surfaces of the multilayer body 22 in the longitudinal direction.

  As shown in FIG. 7, the multilayer body 22 includes a capacitance portion 31 that mainly contributes to the capacitance of the multilayer capacitor 21 and an ESR control portion 32 that controls the ESR of the multilayer capacitor 21. As shown in FIG. 8, the capacitance part 31 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 26A and internal electrodes (second internal electrodes) 26B having different patterns. Yes.

  As shown in FIG. 8A, the internal electrode 26A includes a rectangular main electrode portion 33A formed in the center portion, and a strip-shaped lead conductor (extracted from one side of the main electrode portion 33A toward the terminal conductor 24A ( First lead conductor) 34A. An end portion of the lead conductor 34A is exposed at one end surface in the longitudinal direction of the multilayer body 22 and connected to the terminal conductor 24A.

  Dummy electrodes 35A and 35B are formed in the same layer as the internal electrode 26A. The dummy electrode 35A extends along an edge on one side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23A. The dummy electrode 35B extends along the edge on the other side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23B.

  As shown in FIG. 8B, the internal electrode 26B includes a rectangular main electrode portion 33B formed in the central portion, and a strip-shaped lead conductor (first electrode) drawn from one side of the main electrode 33B toward the terminal conductor 24B. 2 lead conductors) 34B. An end portion of the lead conductor 34B is exposed at the other end surface in the longitudinal direction of the multilayer body 2 and is connected to the terminal conductor 24B.

  Dummy electrodes 35C and 35D are formed in the same layer as the internal electrode 26B. The dummy electrode 35 </ b> C extends along an edge on one side surface in the width direction of the multilayer body 22 and is connected to the external electrode 23 </ b> A. The dummy electrode 35D extends along the edge on the other side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23B.

  In such a capacitance portion 31, a capacitance forming region is formed by a portion where the main electrode portion 33A of the internal electrode 26A and the main electrode portion 33B of the internal electrode 26B overlap each other when viewed from the stacking direction. In the present embodiment, the entire surface of the main electrode portion 33A overlaps the entire surface of the main electrode portion 33B, so that a sufficient capacity forming region is secured.

  On the other hand, the ESR control unit 32 is arranged above and below so as to sandwich the capacitance unit 31 when viewed from the stacking direction. As shown in FIG. 9, the ESR controller 32 is formed by stacking two types of internal electrodes (third internal electrodes) 26C and internal electrodes (fourth internal electrodes) 26D having different patterns.

  As shown in FIG. 9A, the internal electrode 26C includes a rectangular main electrode portion 33C formed at the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 33C toward the terminal conductor 24A. 34C) and a lead conductor (fourth lead conductor) 34D drawn from the main electrode portion 33C toward the external electrode 23A. An end portion of the lead conductor 34C is exposed at one end surface in the longitudinal direction of the multilayer body 22 and connected to the terminal conductor 24A. In addition, the end portion of the lead conductor 34D is extended to be approximately equal to the length of the multilayer body 22, and is exposed on one side surface of the multilayer body 22 in the width direction and connected to the external electrode 23A.

  A dummy electrode 35E is formed in the same layer as the internal electrode 26C. The dummy electrode 35E extends along the edge on the other end surface side in the width direction of the multilayer body 22, and is connected to the external electrode 23B.

  As shown in FIG. 9B, the internal electrode 26D includes a rectangular main electrode portion 33D formed at the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 33D toward the terminal conductor 24B. ) And an extraction conductor (fourth extraction conductor) 34F drawn from the main electrode portion 33D toward the external electrode 23B. An end portion of the lead conductor 34E is exposed to the other end surface in the longitudinal direction of the multilayer body 2 and connected to the terminal conductor 24B. Further, the end portion of the lead conductor 34F is extended to be approximately equal to the length of the multilayer body 22 and is exposed to the other side surface in the width direction of the multilayer body 22 and connected to the external electrode 23B.

  A dummy electrode 35F is formed in the same layer as the internal electrode 6D. The dummy electrode 35F extends along an edge on one side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23A.

  As shown in FIG. 7, the internal electrode 26 closest to the ESR control unit 32 in the capacitance unit 31 and the internal electrode 26 closest to the capacitance unit 31 in the ESR control unit 32 are the same. It is connected to an external electrode and both have the same polarity.

  Further, a protective layer 36 is appropriately laminated on the outer layer side of the ESR control unit 32 as shown in FIG. Dummy electrodes 35G and 35H are formed on the protective layer 36. The dummy electrode 35G extends along the edge on one side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23A. The dummy electrode 35H extends along the edge on the other side surface in the width direction of the multilayer body 22, and is connected to the external electrode 23B.

  The external electrodes 23A and 23B are constituted by only a single layer or a plurality of plating layers made of a material having a resistance to soldering such as Ni or a material having a solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 24A and 24B are composed of a plurality of layers having a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer and a plating layer similar to the outer electrodes 23A and 23B as an outer layer. It is configured.

  FIG. 10 is a diagram showing how the external electrode 23 and the terminal conductor 24 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminate 22 is obtained through a pressing process, a cutting process, a firing process, and the like, as shown in FIG.

  Next, as shown in FIG. 10B, the dipping method is performed so as to cover the lead conductors 34A and 34C exposed from one end face in the longitudinal direction of the multilayer body 2 and the lead conductors 34B and 34E exposed from the other end face. Alternatively, a conductive paste is applied using a screen printing method and baked at a predetermined temperature to form the baked layer 37.

  Finally, as shown in FIG. 10C, the lead conductor 34D and the dummy electrodes 35A, 35C, 35F, and 35G exposed from one side surface in the width direction of the multilayer body 22, and the lead conductor 34F and the dummy exposed from the other side surface. A plating layer 38 is formed using a barrel plating method or the like so as to cover the electrodes 35B, 35D, 35E, 35H and the baking layer 37, respectively. Thereby, the external electrodes 23A and 23B and the terminal conductors 24A and 24B are formed, and the multilayer capacitor 21 is obtained.

  When the plating layer 38 is formed, the external electrodes 23A and 23B are formed so that the end portions of the lead conductors exposed on the surface of the multilayer body 22 and the end portions of the dummy electrodes are grown by plating elongation. Will be linked. Therefore, the external electrodes 23A and 23B are not formed on the side surface in the height direction (vertical direction in FIG. 1) of the multilayer body 22, but the edge of the longitudinal end surface connected to the side surface from the side surface in the width direction of the multilayer body 22 Formed over the part. Further, the terminal conductors 24A, 24B are formed from the longitudinal end face of the multilayer body 22 to the edge of the side face in the height direction connected to the end face.

  In the multilayer capacitor 21 as described above, the external electrodes 23 </ b> A and 23 </ b> B connected to the internal electrode 26 of the ESR control unit 32 are configured only by the plating layer 38. Therefore, a short circuit failure between the external electrodes 23A and 23B and the terminal conductors 24A and 24B can be prevented as compared with a case where all the external electrodes 23A and 23B and the terminal conductors 24A and 24B are formed of a burned layer. In the multilayer capacitor 21, the terminal conductors 24 </ b> A and 24 </ b> B connected to the internal electrode 26 of the electrostatic capacity portion 31 are configured to include the baking layer 37. Therefore, the infiltration of the plating solution into the internal electrode 26 of the capacitance part 31 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 21, the number of stacked capacitance units 31 is larger than the number of stacked layers of the ESR control unit 32. Since the plating solution easily enters, it is particularly effective to cover the terminal conductors 24A and 24B with the baking layer 37. On the other hand, since the number of stacked ESR control units 32 is small, the number of connection points with the external electrodes 23A and 23B is small. Further, since the internal electrode 26 of the ESR control unit 32 connected to the external electrodes 23A and 23B has a long and narrow band shape, the penetration of the plating solution is suppressed and the area facing the internal electrode 26 having a different polarity is suppressed. It is done. Therefore, the occurrence of insulation resistance failure can be further reliably reduced.

  In the multilayer capacitor 21, the internal electrode 26 that is closest to the ESR control unit 32 in the capacitance unit 31 and the internal electrode 26 that is closest to the capacitance unit 31 in the ESR control unit 32 have the same polarity. Yes. Since these internal electrodes 26 and 26 do not contribute to the capacitance, even if the plating solution enters the internal electrodes 26 and 26, it is possible to prevent a decrease in reliability such as variation in capacitance.

Furthermore, in the multilayer capacitor 21, the end portions of the lead conductor 34D and the lead conductor 34F that are directly connected to the plated layer 38 are expanded to have approximately the same width as the length of the multilayer body 22, and the layers where the lead conductor 34D and the lead conductor 34F do not exist. For, there are dummy electrodes 35A to 35H, respectively. Thereby, sufficient adhesion strength of the plating layer 38 to the laminate 2 can be secured.
[Third Embodiment]

  FIG. 11 is a perspective view showing the multilayer capacitor in accordance with the first embodiment of the present invention. FIG. 12 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in FIGS. 11 and 12, the multilayer capacitor 41 is mainly different from the first embodiment in the configuration of the external electrodes 43A and 43B and the terminal conductors 44A and 44B.

  In the multilayer capacitor 41, as in the first embodiment, external electrodes (first external electrodes) 43A and external electrodes (second external electrodes) 43B are formed on both end surfaces of the multilayer body 42 in the longitudinal direction. In addition, a terminal conductor (first terminal conductor) 44A and a terminal conductor (second terminal conductor) 44B are formed on both side surfaces in the width direction (depth direction in FIG. 11) of the multilayer body 42.

  As illustrated in FIG. 12, the multilayer body 42 includes a capacitance unit 51 that mainly contributes to the capacitance of the multilayer capacitor 41, and an ESR control unit 52 that controls the ESR of the multilayer capacitor 41. As shown in FIG. 13, the capacitance section 51 is formed by stacking two types of internal electrodes (first internal electrodes) 46 </ b> A and internal electrodes (second internal electrodes) 46 </ b> B having different patterns.

  The internal electrode 46A and the internal electrode 46B have the same pattern as the internal electrodes 6A and 6B of the first embodiment, and the widths of the dummy electrodes 55A, 55B, 55D, and 55E are substantially equal to the main electrode portions 53A and 53B. This is different from the first embodiment in that it has a width.

  On the other hand, as shown in FIG. 14, the ESR controller 52 is formed by stacking two types of internal electrodes (third internal electrodes) 46C and internal electrodes (fourth internal electrodes) 46D having different patterns. . The internal electrode 46C and the internal electrode 46D have the same pattern as the internal electrodes 6C and 6D of the first embodiment, and the width of the end portions of the lead conductors 54D and 54F and the width of the dummy electrodes 55G and 55I are the main electrodes. The second embodiment is different from the first embodiment in that it is substantially equal in width to the portions 53A and 53B. Also in the protective layer 56, the widths of the dummy electrodes 55K and 55L are substantially equal to the main electrode portions 53A and 53B.

  The external electrodes 43A and 43B have, for example, a baked layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer. It is composed of a plurality of layers having a single layer or a plurality of plating layers made of a material having solder wettability such as Ag as an outer layer. On the other hand, the terminal conductors 44A and 44B are constituted only by the plating layer.

  FIG. 15 is a diagram showing how the external electrode 43 and the terminal conductor 44 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 42 is obtained through a pressing process, a cutting process, a baking process, and the like, as shown in FIG.

  Next, as shown in FIG. 15B, the lead conductor 54D and the dummy electrodes 55A, 55D, 55I, and 55K exposed from one end surface in the longitudinal direction of the multilayer body 42 are respectively covered and exposed from the other end surface. A conductive paste is applied using an immersion method or a screen printing method so as to cover the lead conductor 54F and the dummy electrodes 55B, 55E, 55G, and 55L, and is baked at a predetermined temperature to form a baking layer 57.

  Finally, as shown in FIG. 15C, the lead conductors 54A and 54C and the dummy electrodes 55F, 55J, and 55M exposed from one side surface of the multilayer body 42 and the lead conductors 54B and 54E exposed from the other side surface. And the plating layer 58 is formed using barrel plating or the like so as to cover the dummy electrodes 55C, 55H, 55N and the baking layer 57, respectively. Thereby, the external electrodes 43A and 43B and the terminal conductors 44A and 44B are formed, and the multilayer capacitor 41 is obtained.

  When the plating layer 58 is formed, the end portions of the terminal conductors 44A and 44B are exposed by growing the end portions of the lead conductors and the dummy electrodes exposed on the surface of the multilayer body 42 by plating elongation. Will be linked. Therefore, the terminal conductors 43A and 43B are not formed on the side surface in the height direction of the multilayer body 42, but are formed only on the side surface in the width direction of the multilayer body 42. The external electrodes 43A and 43B are formed across the end face in the longitudinal direction of the multilayer body 42 and the edge portions of the side faces in the width direction and the height direction connected to the end face.

  In the multilayer capacitor 41 as described above, the terminal conductors 44 </ b> A and 44 </ b> B connected to the internal electrode 46 of the capacitance portion 51 are configured only by the plating layer 58. Therefore, it is possible to prevent a short circuit failure between the external electrodes 43A and 43B and the terminal conductors 44A and 44B as compared with a case where all the external electrodes 43A and 43B and the terminal conductors 44A and 44B are configured by a baking layer. In the multilayer capacitor 41, the external electrodes 43 </ b> A and 43 </ b> B connected to the internal electrode 46 of the ESR control unit 52 are configured to include the baking layer 57. Therefore, the penetration of the plating solution into the internal electrode 46 of the ESR controller 52 can be suppressed, and the occurrence of insulation resistance failure can be reduced. Further, since the external electrodes 43A and 43B include the baking layer 57, the adhesion strength between the external electrodes 43A and 43B and the laminate 42 is improved, so that stress is applied to the external electrodes 43A and 43B when mounted on the circuit electrodes. Even in this case, it is possible to prevent the external electrodes 43A and 43B from being peeled off from the laminate 42.

  Also in the multilayer capacitor 41, the internal electrode 46 that is closest to the ESR control unit 52 in the capacitance unit 51 and the internal electrode 46 that is closest to the capacitance unit 51 in the ESR control unit 52 have the same polarity. ing. Thereby, even if the plating solution enters the internal electrode 46, the occurrence of defective insulation resistance can be reduced.

Furthermore, in the multilayer capacitor 41, dummy electrodes 55C, 55F, 55H, 55M, and 55N exist for the layers where the lead conductors 54A, 54B, 54C, and 54E directly connected to the plated layer 58 do not exist. Thereby, sufficient adhesion strength of the plating layer 58 to the laminate 42 can be secured.
[Fourth Embodiment]

  FIG. 16 is a perspective view showing the multilayer capacitor in accordance with the fourth embodiment of the present invention. FIG. 17 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in FIGS. 16 and 17, the multilayer capacitor 61 is mainly different from the second embodiment in the configuration of the external electrodes 63A and 63B and the terminal conductors 64A and 64B.

  In the multilayer capacitor 61, as in the sixth embodiment, external electrodes (first external electrodes) 63A and external electrodes (second external electrodes) are formed on both side surfaces of the multilayer body 62 in the width direction (depth direction in FIG. 16). 63B is formed. In addition, a terminal conductor (first terminal conductor) 64A and a terminal conductor (second terminal conductor) 64B are formed on both end faces of the multilayer body 62 in the longitudinal direction.

  As illustrated in FIG. 17, the multilayer body 62 includes a capacitance unit 71 that mainly contributes to the capacitance of the multilayer capacitor 61 and an ESR control unit 72 that controls the ESR of the multilayer capacitor 61. As shown in FIG. 18, the capacitance portion 71 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 66A and internal electrodes (second internal electrodes) 66B having different patterns. Yes.

  The internal electrode 66A and the internal electrode 66B have the same pattern as the internal electrodes 26A and 26B of the second embodiment. A dummy electrode 75A having substantially the same width as the lead conductor 74A is formed in the same layer as the internal electrode 66A, and is connected to the terminal conductor 64B. In the same layer as the internal electrode 66B, a dummy electrode 75B having substantially the same width as the lead conductor 74B is formed and connected to the terminal conductor 64A.

  On the other hand, as shown in FIG. 19, the ESR controller 72 is formed by laminating two types of internal electrodes (third internal electrodes) 66C and internal electrodes (fourth internal electrodes) 66D having different patterns. . The internal electrode 66C and the internal electrode 66D have the same pattern as the internal electrodes 46C and 46D of the second embodiment, and the width of the end portions of the lead conductors 74D and 74F and the width of the dummy electrodes 75D and 75F are laminated bodies. This is different from the second embodiment in that it is slightly shorter than the length of 2. A dummy electrode 75C having substantially the same width as the lead conductor 74C is formed in the same layer as the internal electrode 66C, and is connected to the terminal conductor 64B. A dummy electrode 75E having substantially the same width as the lead conductor 74E is formed in the same layer as the internal electrode 66D, and is connected to the terminal conductor 64A.

  The external electrodes 63A and 63B have, as an inner layer, a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit, for example, a material having resistance to soldering such as Ni, Sn, Sn alloy, It is composed of a plurality of layers having a single layer or a plurality of plating layers made of a material having solder wettability such as Ag as an outer layer. On the other hand, the terminal conductors 64A and 64B are constituted only by the plating layer.

  FIG. 20 is a diagram illustrating how the external electrode 63 and the terminal conductor 64 are formed. First, the green sheets on which the electrode patterns are formed are laminated by screen printing or the like, and a laminated body 62 is obtained as shown in FIG. 20A through a pressing process, a cutting process, a baking process, and the like.

  Next, as shown in FIG. 20B, the lead conductor 74 </ b> F and the dummy electrode 75 </ b> F exposed from one side surface of the multilayer body 62 so as to cover the lead conductor 74 </ b> D and the dummy electrode 75 </ b> F exposed from the other side surface, respectively. A conductive paste is applied using a dipping method or a screen printing method so as to cover 75D, and baked at a predetermined temperature to form a baked layer 77.

  Finally, as shown in FIG. 20C, the lead conductors 74A and 74C and the dummy electrodes 75B, 75E, and 75G exposed from one end face in the longitudinal direction of the multilayer body 62, and the lead conductors 74B and 74E exposed from the other end face. And the plating layer 78 is formed using a barrel plating method etc. so that the dummy electrodes 75A, 75C, and 75H and the baking layer 77 may be covered. Thereby, the external electrodes 63A and 63B and the terminal conductors 64A and 64B are formed, and the multilayer capacitor 61 is obtained.

  When the plating layer 78 is formed, the end portions of the terminal conductors 64A and 64B that are exposed on the surface of the multilayer body 62 and the end portions of the dummy electrodes are grown by plating elongation. Will be linked. Accordingly, the terminal conductors 64 </ b> A and 64 </ b> B are not formed on the side surface in the height direction (the vertical direction in FIG. 1) of the multilayer body 62, but are formed only on the end surface in the longitudinal direction of the multilayer body 62. The external electrodes 63A and 63B are formed across the side surface in the width direction of the multilayer body 62, the end face in the longitudinal direction connected to the side surface, and the edge of the side surface in the height direction.

In the multilayer capacitor 61 as described above, the terminal conductors 64 </ b> A and 64 </ b> B connected to the internal electrode 66 of the capacitance portion 71 are configured only by the plating layer 78. Therefore, a short circuit failure between the external electrodes 63A and 63B and the terminal conductors 64A and 64B can be prevented as compared with the case where all the external electrodes 63A and 63B and the terminal conductors 64A and 64B are formed of a burned layer. In the multilayer capacitor 61, the external electrodes 63 </ b> A and 63 </ b> B connected to the internal electrode 66 of the ESR control unit 72 are configured to include the baking layer 77. Therefore, the penetration of the plating solution into the internal electrode 66 of the ESR controller 72 can be suppressed, and the occurrence of defective insulation resistance can be reduced. Furthermore, since the external electrodes 63A and 63B include the baking layer 77, the adhesion strength between the external electrodes 63A and 63B and the laminate 62 is improved, so that stress is applied to the external electrodes 63A and 63B when mounted on the circuit electrodes. Even in this case, it is possible to prevent the external electrodes 63A and 63B from being peeled off from the stacked body 62.

  Also in the multilayer capacitor 61, the internal electrode 66 closest to the ESR control unit 72 in the capacitance unit 71 and the internal electrode 66 closest to the capacitance unit 71 in the ESR control unit 72 have the same polarity. ing. Thereby, even if the plating solution enters the internal electrode 66, the occurrence of defective insulation resistance can be reduced.

Furthermore, in the multilayer capacitor 61, dummy electrodes 75A, 75B, 75C, 75E, 75G, and 75H are present for the layers where the lead conductors 74A, 74B, 74C, and 74E that are directly connected to the plated layer 78 do not exist. . Thereby, sufficient adhesion strength of the plating layer 78 to the laminate 62 can be secured.
[Fifth Embodiment]

  FIG. 21 is a perspective view showing the multilayer capacitor in accordance with the fifth embodiment of the present invention. FIG. 22 is a diagram showing a layer structure of the multilayer capacitor shown in FIG. As shown in FIGS. 21 and 22, the multilayer capacitor 81 is different from the above-described embodiment in that the internal electrode 86 in the multilayer body 82 is disposed so as to be substantially orthogonal to the mounting surface. Yes. That is, in the multilayer capacitor 81, the stacking direction of the internal electrodes 86 in the stacked body 82 matches the depth direction in FIG.

  In this multilayer capacitor 81, external electrodes (first external electrodes) 83A, external electrodes (second external electrodes) 83B, terminal conductors (first external electrodes) are provided on both end surfaces in the height direction (vertical direction in FIG. 1 terminal conductor) 84A and a terminal conductor (second terminal conductor) 84B are formed. More specifically, the terminal conductor 84A is located at the center on one end face (mounting face) in the height direction of the multilayer body 82, and the external electrodes 83A and 83B are located on both sides thereof. Further, the terminal conductor 84B is located at the center on the other end surface in the height direction of the multilayer body 82, and the external electrodes 83A and 83B are located on both sides thereof in the opposite order to the one end surface.

  As illustrated in FIG. 22, the multilayer body 82 includes a capacitance portion 91 that mainly contributes to the capacitance of the multilayer capacitor 81 and an ESR control portion 92 that controls the ESR of the multilayer capacitor 81. As shown in FIG. 23, the capacitance portion 91 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 86A and internal electrodes (second internal electrodes) 86B having different patterns. Yes.

  As shown in FIG. 23A, the internal electrode 86A includes a rectangular main electrode portion 93A formed in the central portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 93A toward the terminal conductor 84A). First lead conductor) 94A. An end portion of the lead conductor 94A is exposed at one end surface in the height direction of the multilayer body 82 and connected to the terminal conductor 84A.

  Dummy electrodes 95A and 95B are formed in the same layer as the internal electrode 86A. The dummy electrodes 95A and 95B extend to one end surface side and the other end surface side in the height direction of the multilayer body 82, and are connected to the external electrodes 83A and 83B, respectively.

  As shown in FIG. 23B, the internal electrode 86B includes a rectangular main electrode portion 93B formed in the center portion, and a strip-shaped lead conductor (extracted from one side of the main electrode portion 93B toward the terminal conductor 84B). Second lead conductor) 94B. An end portion of the lead conductor 94B is exposed at the other end surface in the height direction of the multilayer body 82 and is connected to the terminal conductor 84B.

  Dummy electrodes 95C and 95D are formed in the same layer as the internal electrode 86B. Like the dummy electrodes 95A and 95B, the dummy electrodes 95C and 95D extend to one end surface side and the other end surface side in the height direction of the multilayer body 82, and are connected to the external electrodes 83A and 83B, respectively.

  The ESR control units 92 are respectively disposed so as to sandwich the capacitance unit 91 when viewed from the stacking direction. As shown in FIG. 24, the ESR control unit 92 is formed by stacking two types of internal electrodes (third internal electrodes) 86C and internal electrodes (fourth internal electrodes) 86D having different patterns.

  As shown in FIG. 24A, the internal electrode 86C includes a rectangular main electrode portion 93C formed in the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 93C toward the terminal conductor 84A. 94C) and a lead conductor (fourth lead conductor) 94D drawn from the main electrode portion 93C toward the external electrode 83A. An end portion of the lead conductor 94C is exposed at one end surface in the height direction of the multilayer body 82 and connected to the terminal conductor 84A. In addition, the end portion of the lead conductor 94D is extended to be approximately equal in width to the external electrode 83A, and is exposed to both end surfaces in the height direction of the multilayer body 82 and connected to the external electrode 83A.

  A dummy electrode 95E is formed in the same layer as the internal electrode 86C. Like the dummy electrodes 95A and 95B, the dummy electrode 95E extends to one end surface side and the other end surface side in the height direction of the multilayer body 82, and is connected to the external electrode 83B.

  As shown in FIG. 24B, the internal electrode 86D includes a rectangular main electrode portion 93D formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 93D toward the terminal conductor 84B. A lead conductor) 94E and a lead conductor (fourth lead conductor) 94F drawn from the main electrode portion 93D toward the external electrode 93B. An end portion of the lead conductor 94E is exposed to the other end surface in the height direction of the multilayer body 82 and connected to the terminal conductor 84B. In addition, the end portion of the lead conductor 94F is extended to have approximately the same width as the external electrode 83B, and is exposed to both end surfaces in the height direction of the multilayer body 82 and connected to the external electrode 83B.

A dummy electrode 95F is formed in the same layer as the internal electrode 86D. Dummy electrodes 95E, 9
Similarly to the dummy electrodes 95A and 95B, 5F extends to one end surface side and the other end surface side in the height direction of the multilayer body 82, and is connected to the external electrode 83A.

  As shown in FIG. 22, the internal electrode 86 closest to the ESR control unit 92 in the capacitance unit 91 and the internal electrode 86 closest to the capacitance unit 91 in the ESR control unit 92 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 22, protective layers 96A and 96B are appropriately stacked on the outer layer side of the ESR control unit 92. Dummy electrodes 95G and 95H are formed on the protective layer 96A. The dummy electrodes 95G and 95H are substantially equal in width to the external electrodes 83A and 83B, extend to one end surface side and the other end surface side in the height direction of the multilayer body 82, and are connected to the external electrodes 83A and 83B, respectively. Further, no dummy electrode is formed on the protective layer 96B, and only the dielectric layer 5 is formed.

  The external electrodes 83A and 83B are constituted by only a single layer or a plurality of plating layers made of a material having resistance to soldering such as Ni, or a material having solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 84A and 84B are composed of a plurality of layers having a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer and a plating layer similar to the outer electrodes 83A and 83B as an outer layer. It is configured.

  FIG. 25 is a diagram showing how the external electrode 83 and the terminal conductor 84 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 82 is obtained through a pressing process, a cutting process, a baking process, and the like, as shown in FIG.

  Next, as shown in FIG. 25B, a dipping method or a screen printing method is performed so as to cover the lead conductors 94A and 94C and the lead conductors 94B and 94E exposed from both end surfaces in the height direction of the multilayer body 82, respectively. An electrically conductive paste is applied using, and baked at a predetermined temperature to form a baked layer 97.

  Finally, as shown in FIG. 25C, the lead conductor 94D and the dummy electrodes 95A, 95C, 95F, and 95G exposed from the both end surfaces in the height direction of the multilayer body 82, and the lead conductor 94F and the dummy electrodes 95B and 95D are exposed. , 95E, 95H, and the baking layer 97, the plating layer 98 is formed using a barrel plating method or the like. Thereby, the external electrodes 83A and 83B and the terminal conductors 84A and 84B are formed, and the multilayer capacitor 81 is obtained.

  In the multilayer capacitor 81 as described above, the external electrodes 83 </ b> A and 83 </ b> B connected to the internal electrode 86 of the ESR control unit 92 are configured only by the plating layer 98. Accordingly, it is possible to prevent a short circuit failure between the external electrodes 83A and 83B and the terminal conductors 84A and 84B, as compared with a case where all the external electrodes 83A and 83B and the terminal conductors 84A and 84B are configured by a baking layer. In the multilayer capacitor 81, the terminal conductors 84 </ b> A and 84 </ b> B connected to the internal electrode 86 of the capacitance portion 91 are configured to include the baking layer 97. Therefore, the infiltration of the plating solution into the internal electrode 86 of the electrostatic capacity portion 91 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 81, the internal electrode 86 that is closest to the ESR control unit 92 in the capacitance unit 91 and the internal electrode 86 that is closest to the capacitance unit 91 in the ESR control unit 92 have the same polarity. Yes. Thereby, even if the plating solution enters the internal electrode 86, the occurrence of defective insulation resistance can be reduced.

  Furthermore, in the multilayer capacitor 81, the end portions of the lead conductor 94D and the lead conductor 94F that are directly connected to the plated layer 98 are expanded to be approximately equal to the width of the external electrodes 83A and 83B, and the lead conductor 14D and the lead conductor 14F are present. Dummy electrodes 95 </ b> A to 95 </ b> H exist for the layers that do not. Thereby, sufficient adhesion strength of the plating layer 98 to the laminate 82 can be secured.

In the multilayer capacitor 81, the internal electrode 86 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 86 is increased, the ESL can be reduced. Furthermore, since the external electrode 83 and the terminal conductor 84 are formed on the same side surface of the multilayer body 82, the ESL can be further reduced. Further, since the external electrodes 83A and 83B are respectively formed on two opposing end faces (here, end faces in the height direction) of the stacked body 82, any of these two end faces can be used as a mounting surface. .
[Sixth Embodiment]

  FIG. 26 is a perspective view showing the multilayer capacitor in accordance with the sixth embodiment of the present invention. FIG. 27 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in FIGS. 26 and 27, the multilayer capacitor 101 is arranged so that the internal electrode 106 in the multilayer body 102 is substantially orthogonal to the mounting surface, as in the fifth embodiment.

  In the multilayer capacitor 101, external electrodes (first external electrodes) 103A and external electrodes (second external electrodes) 103B are formed on both end surfaces of the multilayer body 102 in the longitudinal direction. In addition, a terminal conductor (first terminal conductor) 104A and a terminal conductor (second terminal conductor) 104B are formed on both end faces in the height direction (vertical direction in FIG. 26) of the multilayer body 102.

  As shown in FIG. 27, the multilayer body 102 includes a capacitance unit 111 that mainly contributes to the capacitance of the multilayer capacitor 101, and an ESR control unit 112 that controls the ESR of the multilayer capacitor 101. As shown in FIG. 28, the capacitance part 111 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 106A and internal electrodes (second internal electrodes) 106B having different patterns. Yes.

  As shown in FIG. 28A, the internal electrode 106A includes a rectangular main electrode portion 113A formed in the central portion, and a strip-shaped lead conductor (extracted from one side of the main electrode portion 113A toward the terminal conductor 104A ( 114A). An end portion of the lead conductor 114A is exposed at one end surface in the height direction of the multilayer body 102 and connected to the terminal conductor 104A.

  Dummy electrodes 115A and 115B are formed in the same layer as the internal electrode 106A. The dummy electrodes 115A and 115B extend in a U-shaped cross section over both end faces in the longitudinal direction and both end faces in the height direction of the laminate 102, and are connected to the external electrodes 103A and 103B, respectively.

  As shown in FIG. 28B, the internal electrode 106B includes a rectangular main electrode portion 113B formed in the center portion, and a strip-shaped lead conductor (extracted from one side of the main electrode portion 113B toward the terminal conductor 114B). Second lead conductor) 114B. An end portion of the lead conductor 114B is exposed at the other end surface in the height direction of the multilayer body 102 and is connected to the terminal conductor 104B.

  Dummy electrodes 115C and 115D are formed in the same layer as the internal electrode 106B. Like the dummy electrodes 115A and 115B, the dummy electrodes 115C and 115D extend in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 102, and the external electrodes 103A and 103B, respectively. It is connected to the.

  The ESR control unit 112 is disposed so as to sandwich the capacitance unit 111 when viewed from the stacking direction. As shown in FIG. 29, the ESR control unit 112 is formed by stacking two types of internal electrodes (third internal electrodes) 106C and internal electrodes (fourth internal electrodes) 106D having different patterns.

  As shown in FIG. 29 (a), the internal electrode 106C includes a rectangular main electrode portion 113C formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 113C toward the terminal conductor 104A. 114C) and a lead conductor (fourth lead conductor) 114D drawn from the main electrode portion 113C toward the external electrode 103A. An end portion of the lead conductor 114C is exposed at one end surface in the height direction of the multilayer body 102 and connected to the terminal conductor 104A. In addition, the end portion of the lead conductor 114D branches in the height direction of the multilayer body 102, is widened to have the same cross-sectional shape as the dummy electrode 115A, and is connected to the external electrode 103A.

  A dummy electrode 115E is formed in the same layer as the internal electrode 106C. Like the dummy electrodes 115B and 115D, the dummy electrode 115E extends in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 102, and is connected to the external electrode 103B. .

  As shown in FIG. 29B, the internal electrode 106D includes a rectangular main electrode portion 113D formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 113D toward the terminal conductor 104B. ) 114E, and a lead conductor (fourth lead conductor) 114F drawn from the main electrode portion 113D toward the external electrode 103B. An end portion of the lead conductor 114E is exposed to the other end surface in the height direction of the multilayer body 102 and connected to the terminal conductor 104B. Further, the end portion of the lead conductor 114F branches in the height direction of the multilayer body 102, is widened to have the same cross-sectional shape as the dummy electrode 115B, and is connected to the external electrode 103B.

  A dummy electrode 115F is formed in the same layer as the internal electrode 106D. Like the dummy electrodes 95A and 95C, the dummy electrode 115F extends in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 102, and is connected to the external electrode 103A. .

  As shown in FIG. 27, the internal electrode 106 closest to the ESR control unit 112 in the capacitance unit 111 and the internal electrode 106 closest to the capacitance unit 111 in the ESR control unit 112 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 27, protective layers 116A and 116B are appropriately stacked on the outer layer side of the ESR control unit 112. Dummy electrodes 115G and 115H are formed on the protective layer 116A. The dummy electrodes 115G and 115H extend in a U-shaped cross section across both longitudinal end faces and height end faces of the laminate 102, and are connected to the external electrodes 103A and 103B, respectively. Further, no dummy electrode is formed on the protective layer 106B, and the protective layer 106B is composed of only the dielectric layer 5.

  The external electrodes 103A and 103B are composed of only a single layer or a plurality of plating layers made of a material having resistance to soldering such as Ni, or a material having solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 104A and 104B are composed of a plurality of layers in which a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit is used as an inner layer and a plating layer similar to the outer electrodes 103A and 103B is used as an outer layer. It is configured.

  FIG. 30 is a diagram illustrating how the external electrode 103 and the terminal conductor 104 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 102 is obtained through a pressing process, a cutting process, a baking process, and the like, as shown in FIG.

  Next, as shown in FIG. 30B, a dipping method or a screen printing method is performed so as to cover the lead conductors 114A and 114C and the lead conductors 114B and 114E exposed from both end surfaces in the height direction of the multilayer body 102, respectively. An electrically conductive paste is applied using, and baked at a predetermined temperature to form a baked layer 117.

  Finally, as shown in FIG. 30C, the lead conductor 114D and the dummy electrodes 115A, 115C, 115F, and 115G exposed from the both end faces in the height direction and the both end faces in the longitudinal direction of the multilayer body 102, and the lead conductor 114F In addition, a plating layer 118 is formed using a barrel plating method or the like so as to cover the dummy electrodes 115B, 115D, 115E, and 115H and the baking layer 117, respectively. Thus, the external electrodes 103A and 103B and the terminal conductors 104A and 104B are formed, and the multilayer capacitor 101 is obtained.

  In the multilayer capacitor 101 as described above, the external electrodes 103A and 103B connected to the internal electrode 106 of the ESR control unit 112 are configured only by the plating layer 108. Therefore, it is possible to prevent a short circuit failure between the external electrodes 103A and 103B and the terminal conductors 104A and 104B as compared with a case where all the external electrodes 103A and 103B and the terminal conductors 104A and 104B are formed of a baking layer. In the multilayer capacitor 101, the terminal conductors 104 </ b> A and 104 </ b> B connected to the internal electrode 106 of the electrostatic capacitance unit 111 are configured to include the baking layer 117. Therefore, the infiltration of the plating solution into the internal electrode 106 of the electrostatic capacitance portion 111 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 101, the internal electrode 106 that is closest to the ESR control unit 112 in the capacitance unit 111 and the internal electrode 106 that is closest to the capacitance unit 111 in the ESR control unit 112 have the same polarity. Yes. Thereby, even if the plating solution enters the internal electrode 106, the occurrence of defective insulation resistance can be reduced.

  Further, in the multilayer capacitor 101, the end portions of the lead conductor 114D and the lead conductor 114F that are directly connected to the plated layer 108 are expanded so as to have substantially the same cross-sectional shape as the external electrodes 103A and 103B. For the layers where 114F does not exist, dummy electrodes 115A to 115H exist, respectively. Thereby, sufficient adhesion strength of the plating layer 108 to the laminate 102 can be secured.

In the multilayer capacitor 101, the internal electrode 106 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 106 is increased, the ESL can be reduced. Furthermore, since the external electrode 103 and the terminal conductor 104 are formed on the same side surface of the multilayer body 102, the ESL can be further reduced. Further, since the external electrodes 103A and 103B are respectively formed on two opposing end faces (here, end faces in the height direction) of the multilayer body 102, any of these two end faces can be used as a mounting surface. .
[Seventh Embodiment]

  FIG. 31 is a perspective view showing the multilayer capacitor in accordance with the seventh embodiment of the present invention. FIG. 32 is a diagram showing a layer configuration of the multilayer capacitor shown in FIG. As shown in FIGS. 31 and 32, the multilayer capacitor 121 is arranged so that the internal electrode 126 in the multilayer body 122 is substantially orthogonal to the mounting surface, as in the fifth embodiment.

  In the multilayer capacitor 121, external electrodes (first external electrodes) 123A and external electrodes (second external electrodes) 123B are formed on both end surfaces in the height direction (vertical direction in FIG. 31) of the multilayer body 122. . In addition, a terminal conductor (first terminal conductor) 124A and a terminal conductor (second terminal conductor) 124B are formed on both end faces of the multilayer body 122 in the longitudinal direction.

  As illustrated in FIG. 32, the multilayer body 122 includes a capacitance portion 131 that mainly contributes to the capacitance of the multilayer capacitor 121 and an ESR control portion 132 that controls the ESR of the multilayer capacitor 121. As shown in FIG. 33, the capacitance part 131 is formed by stacking two types of internal electrodes (first internal electrodes) 126A and internal electrodes (second internal electrodes) 126B having different patterns.

  As shown in FIG. 33A, the internal electrode 126A includes a rectangular main electrode portion 133A formed in the central portion, and a strip-shaped lead conductor (extracted from one side of the main electrode portion 133A toward the terminal conductor 124A ( 134A of the 1st lead conductor). An end portion of the lead conductor 134A is exposed at one end surface in the longitudinal direction of the multilayer body 122 and connected to the terminal conductor 124A.

  Dummy electrodes 135A and 135B are formed in the same layer as the internal electrode 126A. The dummy electrodes 135A and 135B extend to both end surfaces in the height direction of the multilayer body 122, and are connected to the external electrodes 123A and 123B, respectively.

  As shown in FIG. 33B, the internal electrode 126B includes a rectangular main electrode portion 133B formed in the center portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 133B toward the terminal conductor 124B). Second lead conductor) 134B. An end portion of the lead conductor 134B is exposed at the other end surface in the longitudinal direction of the multilayer body 122 and is connected to the terminal conductor 124B.

  Dummy electrodes 135C and 135D are formed in the same layer as the internal electrode 126B. Like the dummy electrodes 135A and 135B, the dummy electrodes 135C and 135D extend to both end surfaces in the height direction of the multilayer body 122 and are connected to the external electrodes 123A and 123B, respectively.

  The ESR control unit 132 is disposed so as to sandwich the capacitance unit 131 when viewed from the stacking direction. As shown in FIG. 34, the ESR controller 132 is formed by stacking an internal electrode (third internal electrode) 126C and an internal electrode (fourth internal electrode) 126D.

  As shown in FIG. 34A, the internal electrode 126C includes a rectangular main electrode portion 133C, and a strip-shaped lead conductor (third lead conductor) 134C drawn from the main electrode portion 133C toward the terminal conductor 124A. And a lead conductor (fourth lead conductor) 134D drawn from the main electrode portion 133C toward the external electrode 123A. An end portion of the lead conductor 134C is exposed at one end surface in the longitudinal direction of the multilayer body 122 and connected to the terminal conductor 124A. In addition, the end portion of the lead conductor 134D branches in the height direction of the multilayer body 122, extends to substantially the same width as the external electrode 123A, and is connected to the external electrode 123A. In the present embodiment, the same electrode pattern as the internal electrode 126D is formed in the same layer as the internal electrode 126C.

  As shown in FIG. 34 (b), the internal electrode 126D includes a rectangular main electrode portion 133D formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 133D toward the terminal conductor 124B. Lead conductor) 134E and a lead conductor (fourth lead conductor) 134F drawn from the main electrode portion 133D toward the external electrode 123B. An end portion of the lead conductor 134E is exposed to the other end surface in the longitudinal direction of the multilayer body 122 and connected to the terminal conductor 124B. In addition, the end portion of the lead conductor 134F branches in the height direction of the multilayer body 122, extends to substantially the same width as the external electrode 123B, and is connected to the external electrode 123B. In the present embodiment, the same electrode pattern as the internal electrode 126C is formed in the same layer as the internal electrode 126D.

  As shown in FIG. 32, the internal electrode 126 closest to the ESR control unit 132 in the capacitance unit 131 and the internal electrode 126 closest to the capacitance unit 131 in the ESR control unit 132 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 32, a protective layer 136 is appropriately stacked on the outer layer side of the ESR control unit 132. Dummy electrodes 135E and 135F are formed on the protective layer 136. The dummy electrodes 135E and 135F extend to both end surfaces in the height direction of the multilayer body 122, and are connected to the external electrodes 123A and 123B, respectively.

  The external electrodes 123A and 123B are composed of only a single layer or a plurality of plating layers made of a material having a resistance to soldering such as Ni or a material having a solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 124A and 124B are composed of a plurality of layers having a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer and a plating layer similar to the outer electrodes 123A and 123B as an outer layer. It is configured.

  FIG. 35 is a diagram showing how the external electrode 123 and the terminal conductor 124 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 122 is obtained through a pressing process, a cutting process, a baking process, and the like, as shown in FIG.

  Next, as shown in FIG. 35 (b), the immersion conductors 134A and 134C exposed from both end faces in the longitudinal direction of the multilayer body 122 and the lead conductors 134B and 134E exposed from the other end faces are respectively covered. A conductive paste is applied using a method or a screen printing method, and baked at a predetermined temperature to form a baking layer 137.

  Finally, as shown in FIG. 35C, the lead conductor 134D and the dummy electrodes 135A, 135C, and 135E exposed from the both end faces in the height direction of the multilayer body 122, and the lead conductor 134F and the dummy electrodes 135B, 135D, and 135F are exposed. Then, a plating layer 138 is formed using a barrel plating method or the like so as to cover the baking layer 137. Thereby, the external electrodes 123A and 123B and the terminal conductors 124A and 124B are formed, and the multilayer capacitor 121 is obtained.

  In the multilayer capacitor 121 as described above, the external electrodes 123A and 123B connected to the internal electrode 126 of the ESR control unit 132 are configured only by the plating layer 138. Therefore, a short circuit failure between the external electrodes 123A and 123B and the terminal conductors 124A and 124B can be prevented as compared with a case in which all the external electrodes 123A and 123B and the terminal conductors 124A and 124B are configured by a baking layer. In the multilayer capacitor 121, the terminal conductors 124 </ b> A and 124 </ b> B connected to the internal electrode 126 of the capacitance part 131 are configured to include the baking layer 137. Therefore, the infiltration of the plating solution into the internal electrode 126 of the electrostatic capacity part 131 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 121, the internal electrode 126 closest to the ESR control unit 132 in the capacitance unit 131 and the internal electrode 126 closest to the capacitance unit 131 in the ESR control unit 132 have the same polarity. Yes. Thereby, even if the plating solution enters the internal electrode 126, the occurrence of defective insulation resistance can be reduced.

  Further, in the multilayer capacitor 121, the end portions of the lead conductor 134D and the lead conductor 134F that are directly connected to the plating layer 138 are expanded to have substantially the same width as the external electrodes 123A and 123B, and the lead conductor 134D and the lead conductor 134F are not present. For, there are dummy electrodes 135A to 135F, respectively. Thereby, sufficient adhesion strength of the plating layer 138 to the laminate 122 can be secured.

In the multilayer capacitor 121, the internal electrode 126 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 126 is increased, the ESL can be reduced. Furthermore, since the external electrodes 123A and 123B are formed on both end surfaces in the height direction of the multilayer body 122 and the terminal conductors 124A and 124B are formed on both end surfaces in the longitudinal direction of the multilayer body 122, the external electrodes 123A and 123B An interval between the terminal conductors 124A and 124B can be secured, and a short circuit failure can be prevented more reliably.
[Eighth Embodiment]

  FIG. 36 is a perspective view showing the multilayer capacitor in accordance with the eighth embodiment of the present invention. FIG. 37 is a diagram showing a layer structure of the multilayer capacitor shown in FIG. As shown in FIGS. 36 and 37, the multilayer capacitor 141 is mainly different from the fifth embodiment in the configuration of the external electrodes 143A and 143B and the terminal conductors 144A and 144B.

  In the multilayer capacitor 141, similarly to the fifth embodiment, external electrodes (first external electrodes) 143A and external electrodes (second external electrodes) are formed on both end surfaces in the height direction (vertical direction in FIG. 36) of the multilayer body 142. ) 143B, a terminal conductor (first terminal conductor) 144A, and a terminal conductor (second terminal conductor) 144B are formed. More specifically, the terminal conductor 144A is located in the center on one end face (mounting face) in the height direction of the multilayer body 142, and the external electrodes 143A and 143B are located on both sides thereof. Further, the terminal conductor 144B is located at the center on the other end surface in the height direction of the multilayer body 142, and the external electrodes 143A and 143B are located on both sides thereof in the opposite order to the one end surface.

  As shown in FIG. 37, the multilayer body 142 includes a capacitance unit 151 that mainly contributes to the capacitance of the multilayer capacitor 141, and an ESR control unit 152 that controls the ESR of the multilayer capacitor 141. As shown in FIG. 38, the capacitance portion 151 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 146A and internal electrodes (second internal electrodes) 146B having different patterns. Yes.

  As shown in FIG. 38A, the internal electrode 146A includes a rectangular main electrode portion 153A formed in the center portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 153A toward the terminal conductor 144A ( 154A of the first lead conductor). The end portion of the lead conductor 154A is exposed at one end surface in the height direction of the multilayer body 142 and connected to the terminal conductor 144A.

  Dummy electrodes 155A, 155B, and 155C are formed in the same layer as the internal electrode 146A. The dummy electrodes 155A and 155B extend to one end surface side and the other end surface side in the height direction of the multilayer body 142, and are connected to the external electrodes 143A and 143B, respectively. The dummy electrode 155C extends to the other end surface in the height direction of the multilayer body 142, and is connected to the terminal conductor 144B.

  As shown in FIG. 38B, the internal electrode 146B includes a rectangular main electrode portion 153B formed in the center portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 153B toward the terminal conductor 144B). Second lead conductor) 154B. An end portion of the lead conductor 154B is exposed at the other end surface in the height direction of the multilayer body 142 and is connected to the terminal conductor 144B.

  Dummy electrodes 155D, 155E, and 155F are formed in the same layer as the internal electrode 146B. Like the dummy electrodes 155A and 155B, the dummy electrodes 155D and 155E extend to one end surface side and the other end surface side in the height direction of the multilayer body 142, and are connected to the external electrodes 143A and 143B, respectively.

  The ESR control unit 152 is disposed so as to sandwich the capacitance unit 151 when viewed from the stacking direction. As shown in FIG. 39, the ESR control unit 152 is formed by stacking two types of internal electrodes (third internal electrodes) 146C and internal electrodes (fourth internal electrodes) 146D having different patterns.

  As shown in FIG. 39A, the internal electrode 146C includes a rectangular main electrode portion 153C formed at the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 153C toward the terminal conductor 144A. 154C) and a lead conductor (fourth lead conductor) 154D drawn from the main electrode portion 153C toward the external electrode 143A. An end portion of the lead conductor 154C is exposed at one end surface in the height direction of the multilayer body 142 and connected to the terminal conductor 144A. In addition, the end portion of the lead conductor 154D is extended to be approximately equal in width to the external electrode 143A, and is exposed to both end surfaces in the height direction of the multilayer body 142 and connected to the external electrode 143A.

  Dummy electrodes 155G and 155H are formed in the same layer as the internal electrode 146C. Like the dummy electrodes 155B and 155E, the dummy electrode 155G extends to one end surface side and the other end surface side in the height direction of the multilayer body 142, and is connected to the external electrode 143B. Like the dummy electrode 155C, the dummy electrode 155H extends to the other end surface in the height direction of the multilayer body 142 and is connected to the terminal electrode 144B.

  As shown in FIG. 39B, the internal electrode 146D includes a rectangular main electrode portion 153D formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 153D toward the terminal conductor 144B. 154E and a lead conductor (fourth lead conductor) 154F drawn from the main electrode portion 153D toward the external electrode 143B. An end portion of the lead conductor 154E is exposed to the other end surface in the height direction of the multilayer body 142 and connected to the terminal conductor 144B. In addition, the end portion of the lead conductor 154F is extended to be approximately equal in width to the external electrode 143B, and is exposed to both end surfaces in the height direction of the multilayer body 142 and connected to the external electrode 143B.

  Dummy electrodes 155I and 155J are formed in the same layer as the internal electrode 146D. Similar to the dummy electrodes 155A and 155D, the dummy electrode 155I extends to one end surface side and the other end surface side in the height direction of the multilayer body 142, and is connected to the external electrode 143A. Like the dummy electrode 155F, the dummy electrode 155J extends to one end surface in the height direction of the multilayer body 142 and is connected to the terminal electrode 144A.

  As shown in FIG. 37, the internal electrode 146 closest to the ESR control unit 152 in the capacitance unit 151 and the internal electrode 146 closest to the capacitance unit 151 in the ESR control unit 152 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 37, a protective layer 156 is appropriately stacked on the outer layer side of the ESR control unit 152. The protective layer 156 is not formed with a dummy electrode, and is composed only of the dielectric layer 5.

  The external electrodes 143A, 143B have, for example, a baked layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer, for example, a material having resistance to soldering such as Ni, Sn, Sn alloy, It is composed of a plurality of layers having a single layer or a plurality of plating layers made of a material having solder wettability such as Ag as an outer layer. On the other hand, the terminal conductors 144A and 144B are constituted only by the plating layer.

  FIG. 40 is a diagram showing how the external electrode 143 and the terminal conductor 144 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 142 is obtained as shown in FIG. 40A through a pressing process, a cutting process, a baking process, and the like.

  Next, as shown in FIG. 40B, the lead conductor 154D and the dummy electrodes 155A, 155D, and 155I exposed from the both end faces in the height direction of the multilayer body 142, and the lead conductor 154F and the dummy electrodes 155B, 155E, and 155G are exposed. A conductive paste is applied by using a dipping method or a screen printing method so as to cover each, and baked at a predetermined temperature to form a baked layer 157.

  Finally, as shown in FIG. 40C, the lead conductors 154A and 154C and the dummy electrodes 155F and 155J exposed from the both end surfaces in the height direction of the multilayer body 142, the lead conductors 154B and 154E, and the dummy electrodes 155C and 155H are exposed. Then, a plating layer 158 is formed using a barrel plating method or the like so as to cover each of the baking layers 157. Thereby, the external electrodes 143A and 143B and the terminal conductors 144A and 144B are formed, and the multilayer capacitor 141 is obtained.

  In the multilayer capacitor 141 as described above, the terminal conductors 144A and 144B connected to the internal electrode 146 of the capacitance portion 151 are configured only by the plating layer 158. Therefore, it is possible to prevent a short circuit failure between the external electrodes 143A and 143B and the terminal conductors 144A and 144B as compared with the case where all the external electrodes 143A and 143B and the terminal conductors 144A and 144B are configured by a baking layer. In the multilayer capacitor 141, the external electrodes 143 A and 143 B connected to the internal electrode 146 of the ESR control unit 152 are configured to include the baking layer 157. Therefore, the penetration of the plating solution into the internal electrode 146 of the ESR control unit 152 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 141, the internal electrode 146 that is closest to the ESR controller 152 in the capacitance unit 151 and the internal electrode 146 that is closest to the capacitance unit 151 in the ESR controller 152 have the same polarity. Yes. Thereby, even if the plating solution enters the internal electrode 146, the occurrence of defective insulation resistance can be reduced.

  Further, in the multilayer capacitor 141, dummy electrodes 155C, 155F, 155H, and 155J are respectively present in layers where the lead conductors 154A, 154B, 154C, and 154E that are directly connected to the plated layer 158 are not present. Thereby, sufficient adhesion strength of the plating layer 158 to the laminated body 142 can be ensured.

In the multilayer capacitor 141, the internal electrode 146 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 146 is increased, low ESL can be achieved. Furthermore, since the external electrode 143 and the terminal conductor 144 are formed on the same side surface of the multilayer body 142, the ESL can be further reduced.
[Ninth Embodiment]

  FIG. 41 is a perspective view showing the multilayer capacitor in accordance with the ninth embodiment of the present invention. FIG. 42 is a diagram showing a layer structure of the multilayer capacitor shown in FIG. As shown in FIGS. 41 and 42, the multilayer capacitor 161 is mainly different from the sixth embodiment in the configuration of the external electrodes 163A and 163B and the terminal conductors 164A and 164B.

  In the multilayer capacitor 161, external electrodes (first external electrodes) 163A and external electrodes (second external electrodes) 163B are formed on both end surfaces of the multilayer body 162 in the longitudinal direction. In addition, a terminal conductor (first terminal conductor) 164A and a terminal conductor (second terminal conductor) 164B are formed on both end faces in the height direction (vertical direction in FIG. 41) of the multilayer body 162.

  As shown in FIG. 42, the multilayer body 162 includes a capacitance unit 171 that mainly contributes to the capacitance of the multilayer capacitor 161, and an ESR control unit 172 that controls the ESR of the multilayer capacitor 161. As shown in FIG. 43, the capacitance portion 161 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 166A and internal electrodes (second internal electrodes) 166B having different patterns. Yes.

  As shown in FIG. 43A, the internal electrode 166A includes a rectangular main electrode portion 173A formed in the center portion, and a strip-shaped lead conductor (from the one side of the main electrode portion 173A to the terminal conductor 164A ( 174 </ b> A. An end portion of the lead conductor 174A is exposed at one end surface in the height direction of the multilayer body 162 and connected to the terminal conductor 164A.

  Dummy electrodes 175A, 175B, and 175C are formed in the same layer as the internal electrode 166A. The dummy electrodes 175A and 175B extend in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 162, and are connected to the external electrodes 163A and 163B, respectively. The dummy electrode 175C is exposed at the other end surface in the height direction of the multilayer body 162 and connected to the terminal conductor 164B.

  As shown in FIG. 43 (b), the internal electrode 166B includes a rectangular main electrode portion 173B formed in the center portion, and a strip-shaped lead conductor (from one side of the main electrode portion 173B toward the terminal conductor 164B). Second lead conductor) 174B. An end portion of the lead conductor 174B is exposed at the other end surface in the height direction of the multilayer body 162, and is connected to the terminal conductor 164B.

  Dummy electrodes 175D, 175E, and 175F are formed in the same layer as the internal electrode 166B. Like the dummy electrodes 175A and 175B, the dummy electrodes 175D and 175E extend in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 162, and the external electrodes 163A and 163B, respectively. It is connected to the. The dummy electrode 175F is exposed at one end surface in the height direction of the multilayer body 162 and connected to the terminal conductor 164A.

  The ESR control unit 172 is disposed so as to sandwich the capacitance unit 171 when viewed from the stacking direction. As shown in FIG. 44, the ESR control unit 172 is formed by stacking two types of internal electrodes (third internal electrodes) 166C and internal electrodes (fourth internal electrodes) 166D having different patterns.

  As shown in FIG. 44A, the internal electrode 166C includes a rectangular main electrode portion 173C formed in the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 173C toward the terminal conductor 164A. 174C and a lead conductor (fourth lead conductor) 174D drawn from the main electrode portion 173C toward the external electrode 163A. An end portion of the lead conductor 174C is exposed at one end surface in the height direction of the multilayer body 162 and connected to the terminal conductor 164A. Further, the end portion of the lead conductor 174D is expanded wider than the other portions and is connected to the external electrode 163A.

  Dummy electrodes 175G, 175H, and 175I are formed in the same layer as the internal electrode 166C. The dummy electrodes 175G extend to both end surfaces in the height direction of the multilayer body 162, and are connected to the external electrodes 163A, respectively. The dummy electrode 175H extends in a U-shaped cross section across the other end surface in the longitudinal direction and both end surfaces in the height direction of the multilayer body 162, and is connected to the external electrode 163B. The dummy electrode 175I extends to the other end surface in the height direction of the multilayer body 162, and is connected to the terminal conductor 164B.

  As shown in FIG. 44B, the internal electrode 166D includes a rectangular main electrode portion 173D formed in the center portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 173D toward the terminal conductor 164B. 174E and a lead conductor (fourth lead conductor) 174F drawn from the main electrode portion 173D toward the external electrode 163B. An end portion of the lead conductor 174E is exposed to the other end surface in the height direction of the multilayer body 162 and connected to the terminal conductor 164B. Further, the end portion of the lead conductor 174F is expanded wider than the other portions and is connected to the external electrode 163B.

  Dummy electrodes 175J, 175K, and 175L are formed in the same layer as the internal electrode 166D. The dummy electrodes 175J extend to both end surfaces in the height direction of the multilayer body 162, and are connected to the external electrodes 163B, respectively. The dummy electrode 175K extends in a U-shaped cross section across the other end surface in the longitudinal direction and both end surfaces in the height direction of the multilayer body 162, and is connected to the external electrode 163A. The dummy electrode 175L extends to one end surface in the height direction of the multilayer body 162 and is connected to the terminal conductor 164A.

  42, the internal electrode 166 closest to the ESR control unit 172 in the capacitance unit 171 and the internal electrode 166 closest to the capacitance unit 171 in the ESR control unit 172 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 42, protective layers 176A and 176B are appropriately stacked on the outer layer side of the ESR control unit 172. Dummy electrodes 175M, 175N, and 175O are formed on the protective layer 176A. The dummy electrodes 175G and 175N extend in a U-shaped cross section across both end faces in the longitudinal direction and both end faces in the height direction of the multilayer body 162, and are connected to the external electrodes 163A and 163B, respectively. Further, no dummy electrode is formed on the protective layer 176B, and only the dielectric layer 5 is formed.

  The external electrodes 163A, 163B have, for example, a baked layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer, for example, a material having resistance to soldering such as Ni, Sn, Sn alloy, It is composed of a plurality of layers having a single layer or a plurality of plating layers made of a material having solder wettability such as Ag as an outer layer. On the other hand, the terminal conductors 164A and 164B are constituted only by the plating layer.

  FIG. 45 is a diagram showing how external electrodes 163 and terminal conductors 164 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 162 is obtained through a pressing process, a cutting process, a firing process, and the like, as shown in FIG.

  Next, as shown in FIG. 45B, the lead conductor 174D and the dummy electrodes 175A, 175D, 175K, and 175M, the lead conductor 174F and the dummy electrodes 174B and 175E, which are exposed from both end surfaces of the multilayer body 162 in the longitudinal direction, A conductive paste is applied using an immersion method or a screen printing method so as to cover 175H and 175N, and baked at a predetermined temperature to form a baked layer 177.

  Finally, as shown in FIG. 45 (c), the lead conductors 174A and 174C and the dummy electrodes 175F, 175L and 175O exposed from the both end faces in the height direction of the multilayer body 162, and the lead conductors 174B and 174E and the dummy electrode 175C are exposed. , 175I, 175O, the baked layer 117, the lead conductors 174D, 174F and the dummy electrodes 175A, 174B, 175D, 175E, 175H, 175K, 175M, 175N that are not covered with the baked layer 117, respectively. A plating layer 178 is formed using a barrel plating method or the like so as to cover. Thereby, the external electrodes 163A and 163B and the terminal conductors 164A and 164B are formed, and the multilayer capacitor 161 is obtained.

  In the multilayer capacitor 161 as described above, the terminal conductors 164A and 164B connected to the internal electrode 166 of the electrostatic capacitance portion 171 are configured only by the plating layer 178. Therefore, a short circuit failure between the external electrodes 163A and 163B and the terminal conductors 164A and 164B can be prevented as compared with the case where all the external electrodes 163A and 163B and the terminal conductors 164A and 164B are formed of a baking layer. In the multilayer capacitor 161, the external electrodes 163 A and 163 B connected to the internal electrode 166 of the ESR control unit 172 are configured to include the baking layer 177. Therefore, the penetration of the plating solution into the internal electrode 166 of the ESR control unit 172 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 161, the internal electrode 166 closest to the ESR control unit 172 in the capacitance unit 171 and the internal electrode 166 closest to the capacitance unit 161 in the ESR control unit 172 have the same polarity. Yes. Thereby, even if the plating solution enters the internal electrode 166, the occurrence of defective insulation resistance can be reduced.

  Further, in the multilayer capacitor 161, dummy electrodes 175C, 175F, 175I, 175L, and 175O exist for the layers where the lead conductors 174A, 174B, 174C, and 174E that are directly connected to the plated layer 178 do not exist. Thereby, sufficient adhesion strength of the plating layer 178 to the laminate 162 can be secured.

In the multilayer capacitor 161, the internal electrode 166 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 166 is increased, the ESL can be reduced. Furthermore, since the external electrode 163 and the terminal conductor 164 are formed on the same side surface of the multilayer body 162, the ESL can be further reduced.
[Tenth embodiment]

  FIG. 46 is a perspective view showing the multilayer capacitor in accordance with the tenth embodiment of the present invention. FIG. 47 is a diagram showing a layer structure of the multilayer capacitor shown in FIG. As shown in FIGS. 46 and 47, the multilayer capacitor 181 is mainly different from the seventh embodiment in the configuration of the external electrodes 183A and 183B and the terminal conductors 184A and 184B.

  In the multilayer capacitor 181, external electrodes (first external electrodes) 183 A and external electrodes (second external electrodes) 183 B are formed on both end surfaces in the height direction of the multilayer body 182. In addition, a terminal conductor (first terminal conductor) 184A and a terminal conductor (second terminal conductor) 184B are formed on both end faces in the longitudinal direction of the multilayer body 182.

  As shown in FIG. 47, the multilayer body 182 includes a capacitance unit 181 that mainly contributes to the capacitance of the multilayer capacitor 181 and an ESR control unit 182 that controls the ESR of the multilayer capacitor 181. As shown in FIG. 48, the capacitance part 131 is formed by alternately stacking two types of internal electrodes (first internal electrodes) 186A and internal electrodes (second internal electrodes) 186B having different patterns. Yes.

  As shown in FIG. 48A, the internal electrode 186A includes a rectangular main electrode portion 193A formed in the center portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 193A toward the terminal conductor 184A). 194 </ b> A. The end portion of the lead conductor 194A is exposed at one end surface in the longitudinal direction of the multilayer body 182 and connected to the terminal conductor 184A.

  Dummy electrodes 195A, 195B, and 195C are formed in the same layer as the internal electrode 186A. The dummy electrodes 195A and 195B extend to both end surfaces in the height direction of the multilayer body 182 and are connected to the external electrodes 183A and 183B, respectively. The dummy electrode 195C is exposed at the other end surface in the longitudinal direction of the multilayer body 182 and is connected to the terminal conductor 184B.

  As shown in FIG. 48B, the internal electrode 186B includes a rectangular main electrode portion 193B formed in the center portion, and a strip-shaped lead conductor (leading from one side of the main electrode portion 193B toward the terminal conductor 184B). Second lead conductor) 194B. An end portion of the lead conductor 194B is exposed at the other end surface in the longitudinal direction of the multilayer body 182 and is connected to the terminal conductor 184B.

  Dummy electrodes 195D, 195E, and 195F are formed in the same layer as the internal electrode 186B. Like the dummy electrodes 195A and 195B, the dummy electrodes 195D and 195E extend to both end surfaces in the height direction of the multilayer body 182, and are connected to the external electrodes 183A and 183B, respectively. The dummy electrode 195F is exposed at one end surface of the multilayer body 182 in the longitudinal direction, and is connected to the terminal conductor 184A.

  The ESR control unit 192 is disposed so as to sandwich the capacitance unit 191 when viewed from the stacking direction. As shown in FIG. 49, the ESR controller 192 is formed by laminating an internal electrode (third internal electrode) 186C and an internal electrode (fourth internal electrode) 186D.

  As shown in FIG. 49A, the internal electrode 186C includes a rectangular main electrode portion 193C, a strip-shaped lead conductor (third lead conductor) 184C drawn from the main electrode portion 193C toward the terminal conductor 184A, And a lead conductor (fourth lead conductor) 194D drawn from the main electrode portion 193C toward the external electrode 183A. The end portion of the lead conductor 194C is widened, exposed at one end surface in the longitudinal direction of the multilayer body 182, and connected to the terminal conductor 184A. In addition, the end portion of the lead conductor 194D branches in the height direction of the multilayer body 182, extends to substantially the same width as the external electrode 183A, and is connected to the external electrode 183A. In the present embodiment, the same electrode pattern as the internal electrode 186D is formed in the same layer as the internal electrode 186C.

  As shown in FIG. 49B, the internal electrode 186D includes a rectangular main electrode portion 193D formed in the central portion, and a strip-shaped lead conductor (third electrode) drawn from the main electrode portion 193D toward the terminal conductor 184B. 194E and a lead conductor (fourth lead conductor) 194F drawn from the main electrode portion 193D toward the external electrode 183B. The end portion of the lead conductor 194E is widened, exposed at the other end surface in the longitudinal direction of the multilayer body 182, and connected to the terminal conductor 184B. In addition, the end portion of the lead conductor 194F branches in the height direction of the multilayer body 182, extends to substantially the same width as the external electrode 183B, and is connected to the external electrode 183B. In the present embodiment, the same electrode pattern as the internal electrode 186C is formed in the same layer as the internal electrode 186D.

  47, the internal electrode 186 that is closest to the ESR control unit 192 in the capacitance unit 191 and the internal electrode 186 that is closest to the capacitance unit 191 in the ESR control unit 192 are the same. It is connected to an external electrode and both have the same polarity.

  Further, as shown in FIG. 47, a protective layer 196 is appropriately laminated on the outer layer side of the ESR control unit 192. In the protective layer 196, no dummy electrode is formed, and only the dielectric layer 5 is formed.

  The external electrodes 183A and 183B are configured by only a single layer or a plurality of plating layers made of a material having resistance to soldering such as Ni or a material having solder wettability such as Sn, Sn alloy, or Ag. . On the other hand, the terminal conductors 184A and 184B are composed of a plurality of layers having a baking layer formed by baking a conductive paste containing conductive metal powder and glass frit as an inner layer and a plating layer similar to the outer electrodes 183A and 183B as an outer layer. It is configured.

  FIG. 45 is a diagram showing how external electrodes 183 and terminal conductors 184 are formed. First, a green sheet on which the electrode pattern is formed is laminated by screen printing or the like, and a laminated body 182 is obtained through a pressing process, a cutting process, a firing process, and the like, as shown in FIG.

  Next, as shown in FIG. 45 (b), the dipping method or the covering is performed so as to cover the lead conductors 194D, 194F and the dummy electrodes 195A, 195B, 195D, 195E exposed from both end faces in the height direction of the multilayer body 182. A conductive paste is applied using a screen printing method and baked at a predetermined temperature to form a baked layer 197.

  Finally, as shown in FIG. 45 (c), the lead conductors 194A, 194C and the dummy electrode 195E exposed from both end faces in the longitudinal direction of the multilayer body 182; the lead conductors 194B, 194E and the dummy electrode 195C; Then, a plating layer 198 is formed by using a barrel plating method or the like. Thereby, the external electrodes 183A and 183B and the terminal conductors 184A and 184B are formed, and the multilayer capacitor 181 is obtained.

  In the multilayer capacitor 121 as described above, the terminal conductors 184A and 184B connected to the internal electrode 186 of the electrostatic capacitance portion 191 are configured only by the plating layer 198. Therefore, a short circuit failure between the external electrodes 183A and 183B and the terminal conductors 184A and 184B can be prevented as compared with the case where all the external electrodes 183A and 183B and the terminal conductors 184A and 184B are formed of a baking layer. In the multilayer capacitor 181, the external electrodes 183 A and 183 B connected to the internal electrode 186 of the ESR control unit 192 are configured to include the baking layer 197. Therefore, the penetration of the plating solution into the internal electrode 186 of the ESR control unit 192 can be suppressed, and the occurrence of defective insulation resistance can be reduced.

  In the multilayer capacitor 181, the internal electrode 186 that is closest to the ESR control unit 192 in the capacitance unit 191 and the internal electrode 186 that is closest to the capacitance unit 191 in the ESR control unit 192 have the same polarity. Yes. As a result, even if the plating solution enters the internal electrode 186, the occurrence of defective insulation resistance can be reduced.

  Furthermore, in the multilayer capacitor 121, dummy electrodes 195 </ b> C and 195 </ b> F are respectively present in layers where the lead conductors 194 </ b> AJPJ to 194 </ b> D and 194 </ b> E that are directly connected to the plated layer 138 are not present. Thereby, sufficient adhesion strength of the plating layer 198 to the laminated body 182 can be secured.

  In the multilayer capacitor 181, the internal electrode 186 is disposed so as to be substantially orthogonal to the mounting surface. With such a configuration, even when the number of stacked internal electrodes 186 is increased, the ESL can be reduced. Furthermore, since the external electrodes 183A and 183B are formed on both end faces in the height direction of the multilayer body 182, and the terminal conductors 184A and 184B are formed on both end faces in the longitudinal direction of the multilayer body 182, the external electrodes 183A and 183B An interval between the terminal conductors 184A and 184B can be secured, and a short circuit failure can be prevented more reliably.

  1, 21, 41, 61, 81, 101, 121, 141, 161, 181 ... multilayer capacitor, 2, 22, 42, 62, 82, 102, 122, 142, 162, 182 ... laminate, 3, 23, 43, 63, 83, 103, 123, 143, 163, 183 ... external electrodes, 4, 24, 44, 64, 84, 104, 124, 144, 164, 184 ... terminal conductors, 5 ... dielectric layers, 6, 26, 46, 66, 86, 106, 126, 146, 166, 186 ... internal electrodes, 11, 31, 51, 71, 91, 111, 131, 151, 171, 191 ... electrostatic capacity parts, 12, 32, 52, 72, 92, 112, 132, 152, 172, 192 ... ESR control unit, 14, 34, 54, 74, 94, 114, 134, 154, 174, 194 ... lead conductors, 15, 35, 5, 75, 95, 115, 135, 155, 175, 195 ... dummy electrodes, 17, 37, 57, 77, 97, 117, 137, 157, 177, 197 ... baked layers, 18, 38, 58, 78, 98, 118, 138, 158, 178, 198 ... plating layer.

Claims (9)

A laminate in which a plurality of internal electrodes are laminated with a dielectric layer interposed therebetween;
An external electrode and a terminal conductor formed on the outer surface of the laminate,
The laminate is
A capacitance portion in which a first internal electrode and a second internal electrode are arranged with at least one layer of the dielectric layer interposed therebetween;
An ESR control unit in which a third internal electrode and a fourth internal electrode are arranged with at least one dielectric layer interposed therebetween,
In the capacitance section,
The first internal electrode is connected only to a first terminal conductor formed of a baking layer on the surface of the multilayer body via a first lead conductor,
The second internal electrode is connected to only the second terminal conductor formed of a seizure layer on the surface of the multilayer body via the second lead conductor,
In the ESR control unit,
The third internal electrode is connected to the first terminal conductor via a third lead conductor, and is formed of a plating layer on the surface of the multilayer body via the fourth lead conductor. Connected to one external electrode,
The fourth internal electrode is connected to the second terminal conductor via a fifth lead conductor and is formed of a plating layer on the surface of the multilayer body via the sixth lead conductor. A multilayer capacitor connected to two external electrodes. A laminate in which a plurality of internal electrodes are laminated with a dielectric layer interposed therebetween;
An external electrode and a terminal conductor formed on the outer surface of the laminate,
The laminate is
A capacitance portion in which a first internal electrode and a second internal electrode are arranged with at least one layer of the dielectric layer interposed therebetween;
An ESR control unit in which a third internal electrode and a fourth internal electrode are arranged with at least one dielectric layer interposed therebetween,
In the capacitance section,
The first internal electrode is connected to only the first terminal conductor formed of a plating layer on the surface of the multilayer body via the first lead conductor,
The second internal electrode is connected only to a second terminal conductor formed of a plating layer on the surface of the multilayer body via a second lead conductor,
In the ESR control unit,
The third internal electrode is connected to the first terminal conductor via a third lead conductor, and is formed of a baking layer on the surface of the multilayer body via the fourth lead conductor. Connected to one external electrode,
The fourth internal electrode is connected to the second terminal conductor via a fifth lead conductor, and is formed of a baking layer on the surface of the multilayer body via the sixth lead conductor. A multilayer capacitor connected to two external electrodes.   The plating layer made of the same component as that of the plating layer formed on the surface of the laminate is further formed on the surface of the baking layer formed on the surface of the laminate. 3. The multilayer capacitor as described in 1 or 2.   2. The internal electrode closest to the ESR control unit in the capacitance unit and the internal electrode closest to the capacitance unit in the ESR control unit have the same polarity. The multilayer capacitor according to claim 1.   5. The multilayer capacitor according to claim 1, wherein the lead conductor connected to the plating layer has a connection portion that is wider than another portion.   The multilayer capacitor according to claim 1, wherein the multilayer body further includes a dummy electrode connected only to the plating layer.   One side of the said laminated body is a mounting surface to a board | substrate, and the said internal electrode is arrange | positioned so that it may cross substantially orthogonally with respect to the said mounting surface. A multilayer capacitor according to claim 1.   The multilayer capacitor according to claim 7, wherein the terminal conductor is formed on both end surfaces in the longitudinal direction of the multilayer body, and the external electrode is formed on a side surface intersecting the both end surfaces.   The multilayer capacitor according to claim 7, wherein the external electrode and the terminal conductor are formed on the same side surface of the multilayer body.

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