JP2012256462A - Plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a plasma display panel capable of achieving high quality and high yield by suppressing generation of erroneous discharge in a display region and a non-display region of a panel end.SOLUTION: The plasma display panel includes a front substrate having a plurality of display electrodes thereon and a rear substrate that is disposed with an address electrode to cross the display electrodes and is disposed with an insulator layer and a phosphor layer on the address electrode. A film thickness of the phosphor layer in a non-display region is larger than that in a display region.

Description

  The present invention relates to a plasma display panel known as a display device.

  In recent years, expectations for large screens and wall-mounted televisions are increasing as interactive information terminals, and there are many display devices such as liquid crystal display panels, field emission displays, and electroluminescence displays. Among these display devices, the plasma display panel (hereinafter referred to as “PDP”) is a self-luminous and beautiful image display, and is easy to enlarge. Development for higher definition and larger screen is underway.

  The PDP has a front plate on which components such as a display electrode, a dielectric layer, and a protective layer made of MgO are formed, and a back plate on which components such as electrodes, partition walls, an insulator layer, and a phosphor layer are formed. -G and B are arranged facing each other so as to form minute discharge cells (hereinafter simply referred to as cells), and the periphery is sealed with a sealing layer. A discharge gas obtained by mixing neon (Ne) and xenon (Xe) or the like is sealed in the cell at a pressure of, for example, about 66500 Pa (about 500 Torr).

  Here, in the prior art, in order to increase the luminance by increasing the surface area of the phosphor layer, there is known a PDP back plate provided with a grid-shaped partition wall composed of a main partition wall and an auxiliary partition wall.

  In order to form the above-described grid-like partition walls, a glass paste containing a low-melting glass powder and an organic component is applied to a substrate provided with address electrodes and a dielectric layer, and patterned by sandblasting or photolithography. Alternatively, a grid-like partition wall pattern is formed by a method such as pattern printing by a mold transfer method or a screen printing method, and then baked to remove organic components to form a grid-like grid mainly composed of low-melting glass. In general, a partition wall is formed.

JP 2006-261106 A

  However, in the case of forming a grid-like partition by baking a partition pattern manufactured using such a glass paste, an organic component is removed and shrinks at the time of firing. There has been a problem that the non-display area, in particular, the intersection of the main partition located at the outermost part and the auxiliary partition is higher than the height of the main partition located in the display area or the like. As described above, when the height of the intersection between the main partition wall and the auxiliary partition wall in the non-display area is higher than the partition wall in the display area, when the voltage is applied and the PDP is caused to emit light, charge is lost at the end of the display area. There is a problem of erroneous discharge, such that a cell that is supposed to emit light is extinguished and an adjacent cell that should not emit light emits light at the edge of the display area.

  The present invention has been made in view of such a current situation. By increasing the thickness of the phosphor in the non-display area, it is possible to suppress erroneous discharge in the display area and the non-display area, and to achieve a high quality and high yield PDP. The purpose is to provide.

  In order to solve the above conventional problems, the PDP of the present invention is characterized in that the phosphor film thickness in the non-display area at the end is thicker than the phosphor film thickness in the display area.

  As described above, according to the present invention, it is possible to provide a high-quality and high-yield PDP by suppressing erroneous discharge in a non-display area.

The perspective view which shows schematic structure of PDP in embodiment of this invention Cross-sectional view of the back substrate of the PDP

  Hereinafter, a PDP according to an embodiment of the present invention will be described with reference to the drawings. First, the structure of the PDP will be described with reference to FIG. As shown in FIG. 1, the PDP is configured by arranging a glass front substrate 1 and a rear substrate 2 so as to face each other so as to form a discharge space therebetween. On the front substrate 1, a plurality of scanning electrodes 3 and sustaining electrodes 4 constituting display electrodes are formed in parallel with each other. A dielectric layer 5 is formed so as to cover the scan electrode 3 and the sustain electrode 4, and a protective layer 6 is formed on the dielectric layer 5.

  A plurality of address electrodes 8 covered with an insulator layer 7 are provided on the back substrate 2, and a grid-like partition wall 9 is provided on the insulator layer 7. A phosphor layer 10 is provided on the surface of the insulator layer 7 and on the side surfaces of the partition walls 9. The front substrate 1 and the rear substrate 2 are arranged to face each other so that the scan electrodes 3 and the sustain electrodes 4 and the address electrodes 8 cross each other. In the discharge space formed therebetween, for example, neon And a mixed gas of xenon. Note that the structure of the PDP is not limited to that described above, and for example, a structure having stripe-shaped partition walls may be used.

  A method for manufacturing the above PDP will be described below. First, a photosensitive paste for electrode formation is formed on the front substrate 1 by a screen printing method or the like. Thereafter, patterning of the display electrode is performed by performing exposure and development. After forming the pattern of the display electrode, the dielectric layer 5 is formed and baked by using a screen printing method or a coating method so as to cover it. Further, a protective layer 6 such as MgO is formed thereon by vapor deposition.

  A photosensitive paste for the address electrode 8 is formed on the back substrate 2 by a screen printing method, and then the pattern of the address electrode 8 is formed by exposure and development. Then, an insulator layer 7 is formed on the address electrode 8 by screen printing or coating, and a photosensitive paste is applied in several steps to form a grid or stripe-shaped partition wall 9 thereon. It is formed by the method and exposed. At this time, it is possible to form a structure having at least two steps depending on the number of times the paste is applied and the exposure pattern. After pattern formation by development, baking is performed. After firing, the RGB phosphor layer 10 is disposed inside the partition wall 9 by a dispenser method or the like, and is dried in a high temperature atmosphere.

  The front substrate 1 and the rear substrate 2 produced by the above method are arranged so that the film surfaces face each other, and sealing is performed. At this time, sealing is performed with a sealing material applied around the front substrate 1 or the back substrate 2.

  Thereafter, the substrate is evacuated while being heated from the exhaust holes arranged on the back substrate 2 side, and after reaching a certain degree of vacuum, a rare gas such as xenon or neon is sealed inside the PDP. After gas filling, the exhaust pipe is sealed to complete the PDP.

  In the PDP, since the shrinkage of the partition wall 9 of the back substrate 2 during firing is localized at the end near the outermost part of the back substrate 2, the height of the partition wall 9 varies. As a result, the gap between the front substrate 1 and the rear substrate 2 in the display area at the end and the non-display area becomes large, which causes erroneous discharge.

  In the prior art, it is difficult to completely control the firing shrinkage of the end portion of the back substrate 2, and there is a problem that erroneous discharge occurs.

In response to this phenomenon, the inventors made the phosphor film thickness d ₁ in the non-display area at the edge of the back substrate 2 larger than the phosphor film thickness d ₀ in the display area, thereby causing erroneous discharge at the edge. It was found that it can be suppressed.

Next, the structure of the back substrate 2 of the PDP in the embodiment of the present invention will be described. FIG. 2 is a cross-sectional view of the PDP in the A direction of FIG. Address phosphor layer 10 on the electrode 8 and the insulator layer 7 is formed, but the thickness of the phosphor layer directly address electrodes 8 was defined as d _0. The film thickness d ₀ of the phosphor layer 10 immediately above the address electrode 8 greatly affects the voltage of the write discharge of the scan electrode 3 and the address electrode 8 on the front plate. When the relationship between the phosphor film thickness d ₀ and the writing voltage was examined, it was found that when the phosphor film thickness was 1 μm thick, the voltage required for writing increased by about 1V.

That is, by making the phosphor film thickness d ₁ in the non-display area at the end of the back substrate 2 larger than the phosphor film thickness d ₀ in the display area, erroneous discharge at the end can be suppressed. I found. In the present invention, the phosphor film thickness in the non-display area is preferably at least 1 μm or more and 5 μm or more with respect to the display area.

  As described above, by using the PDP of the present invention, it is possible to provide a high-quality and high-yield PDP.

  According to the PDP of the present invention, it is possible to provide a high-quality and high-yield PDP by suppressing erroneous discharge in the display area and the non-display area at the edge of the panel.

DESCRIPTION OF SYMBOLS 1 Front substrate 2 Back substrate 7 Insulator layer 8 Address electrode 9 Partition 10 Phosphor layer

Claims (1)

A plasma display panel comprising a front substrate on which a plurality of display electrodes are arranged, and a back substrate on which address electrodes are arranged so as to intersect the display electrodes, and an insulator layer and a phosphor layer are arranged on the address electrodes. A plasma display panel, wherein the thickness of the phosphor layer in the non-display area is larger than the thickness of the phosphor layer in the display area.

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