JP2012249343A - Switching circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching circuit capable of suppressing unevenness of switching time with a simple and low-cost circuit.SOLUTION: The switching circuit includes: an upper arm A1 and a lower arm A2 having switching elements S1, S2 for power, respectively, and an output capacity charging promotion circuit that charges the output capacity of the switching elements S1, S2 for power by operating additional switching elements M2, M1 installed on the arms A2, A1, respectively, on the opposite side to the arms A1, A2 having the switching elements S1, S2 for power according to the switching operations of the switching elements S1, S2 for power.

Description

  The present invention relates to a switching circuit used for an inverter or the like for driving a load such as an electric motor.

In the inverter, the voltage applied to the motor load is switched by a switching element (power semiconductor element), and the rise time and waveform of this voltage are controlled by the gate voltage applied to the gate terminal of the switching element.
However, when the load voltage changes due to turn-off of the switching element, the switching time of the load voltage depends on the charging time of the output capacity of the switching element. That is, for example, in a 180-degree energization type inverter circuit, the switching time during turn-off is affected by the load current value. As a result, the switching time varies depending on the load current value. This variation is quite large. For example, when the load current value is a low current value close to zero, the switching time becomes extremely slow, which may be 10 times or more of the normal switching time. Thus, if the switching time varies, in order to prevent the upper and lower arms from being short-circuited, the dead time must be set longer, and the switching loss increases.
In view of this, there has been known one in which the upper and lower arms are not short-circuited by preventing the switching time from becoming long even at such a low current.

  An inverter having such a switching circuit is described in Patent Document 1. In this inverter, a power semiconductor element is used as a switching element, and a series circuit of a capacitor and a bidirectional switch element is connected in parallel to each of these power semiconductors. The capacitor is charged in synchronization with the turn-off signal of the semiconductor element so that the turn-off time of the power semiconductor element is not prolonged even at a low current.

JP 2002-369551 A

  However, the above conventional inverter has a problem that the circuit configuration becomes complicated and expensive because two upper and lower arms each require two bidirectional switch elements.

  The present invention has been made paying attention to the above problems, and an object of the present invention is to provide a switching circuit in which variation in switching time can be suppressed with a simple and inexpensive circuit.

For this purpose, the switching circuit according to the invention as claimed in claim 1 comprises:
An upper arm and a lower arm each having a power switching element;
Output capacity for charging the output capacity of the power switching element by operating the additional switching element provided on the arm opposite to the arm having the power switching element according to the switching operation of the power switching element A charge acceleration circuit;
It is provided with.

A switching circuit according to the present invention as set forth in claim 2 comprises:
The switching circuit according to claim 1,
The output capacity charging promotion circuit is a series connection circuit in which a capacitor is connected in series to the additional switching element,
This series connection circuit is connected in parallel to the power switching element,
It is characterized by that.

A switching circuit according to the present invention as set forth in claim 3 is:
The switching circuit according to claim 1,
The output capacity charging promotion circuit is a series connection circuit in which a resistor is connected in series to the additional switching element,
This series connection circuit is connected in parallel to the power switching element,
It is characterized by that.

  In the switching circuit according to the first aspect of the present invention, it is possible to obtain a switching circuit that can suppress variations in switching time with a simple and inexpensive circuit.

  In the switching circuit according to the second aspect of the present invention, in addition to the effect of the first aspect, the output capacitance of the power switching element can be quickly charged by using a capacitor.

  In the switching circuit according to the third aspect of the present invention, in addition to the effect of the first aspect, by using a resistor, the switching time can be adjusted with a simple circuit configuration. The required amount of output capacity can be charged.

It is a circuit diagram which shows the structure of the switching circuit of Example 1 which concerns on this invention. FIG. 2 is a diagram for explaining an operating state of a switching element or the like and a current flow when a load current in a positive direction flows in the switching circuit of FIG. 1. FIG. 3 is a time chart showing states of a power switching element, an additional switching element of an arm on the opposite side, and a capacitor in the operation in FIG. 2. FIG. 2 is a diagram for explaining an operating state of a switching element or the like and a current flow when a load current in the negative direction flows in the switching circuit of FIG. 1. FIG. 5 is a time chart showing states of a power switching element, an additional switching element of an arm on the opposite side, and a capacitor in the operation in FIG. 4. It is a figure which shows the structure of the circuit for simulation equivalent to the switching circuit of FIG. It is a figure which shows the simulation result in the simulation circuit of FIG. It is a figure which shows the result of the time change of the load voltage when changing the capacity | capacitance of a capacitor | condenser by simulation. It is a circuit diagram which shows the structure of the switching circuit of Example 2 which concerns on this invention. It is a figure which shows the structure of the circuit for simulation equivalent to the switching circuit of FIG. It is a figure which shows the simulation result in the simulation circuit of FIG. It is a figure which shows the structure of the switching circuit which does not have a switching element for comparing with an Example of this invention by simulation. It is a figure which shows the simulation result in the simulation circuit of FIG.

  Hereinafter, embodiments of the present invention will be described in detail based on examples shown in the drawings. In addition, about the thing of the same structure in each Example, the same number is attached | subjected and those description is abbreviate | omitted.

  The switching circuit of the first embodiment is used, for example, in an inverter circuit of a three-phase AC motor that drives an electric vehicle. FIG. 1 shows a circuit of only a portion connected to one-phase coil of the u-phase, v-phase, and w-phase of a three-phase AC motor, but the other two phases are configured in a similar manner as is well known. Build a bridge circuit.

In the switching circuit of the first embodiment, as shown in FIG. 1, the upper arm A1 includes a power switching element S1, a diode (so-called feedback diode) D1, a capacitor C1 and an additional switching element M1 connected in series (the present invention). Are connected in parallel to each other.
Similarly, the lower arm A2 is configured by connecting a power switching element S2 to a diode (so-called feedback diode) D2 and a series connection circuit of a capacitor C2 and a switching element M2 in parallel.
The emitter of the power switching element S1 of the upper arm A1 and the collector of the power switching element S2 of the lower arm A2 are connected to each other, and their connection point is connected to one of the coils of the electric motor. As the power switching elements S1 and S2, it is desirable to use insulated gate bipolar transistors (IGBTs).

Here, the capacitors C1 and C2 of the upper and lower arms A1 and A2 are set so as to have a capacitance value greater than or equal to the output capacitance of each arm having them.
The additional switching elements M1 and M2 are synchronized with the power switching elements of the opposite arm, that is, the power switching element S2 of the lower arm A2 and the power switching element S1 of the upper arm A1, and It is made to operate as follows.

The operation of the switching circuit will be described with reference to FIGS.
First, when the power switching element S1 of the upper arm A1 is on and the power switching element S2 of the lower arm A2 is off, the load current is in the positive direction, and follows the path indicated by the thick arrow in FIG. Current flows.
That is, as shown in FIG. 2A and the first stage time chart of FIG. 3, when a gate voltage is applied to the gate terminal of the power switching element S1, this element is turned on (in FIG. 3). At time t1), current starts to flow from the collector to the emitter, and current is supplied to the motor coil. At this time, the power switching element S2 and the additional switching elements M1 and M2 of the lower arm A2 are turned off.

  At this time, the electric charge in the output capacitance of the power switching element S1 (shown as a capacitor by a dotted line in FIG. 2) is zero, and the additional switching element M1 is turned off, so that the capacitor connected in series with this C1 also maintains zero charge (see the third and fourth stage time charts in FIG. 3).

  Thereafter, as shown in the time charts of the first and second stages in FIG. 2B and FIG. 3, when the gate signal becomes zero at time t2, the additional switching element of the lower arm A2 is interlocked with this. An ON signal is simultaneously applied to the gate voltage of M2. As a result, the additional switching element M2 is turned on and can be energized.

When the additional switching element M2 of the lower arm A2 is turned on at the time t2, the capacitor C2 of the lower arm A2 is grounded via the additional switching element M2, so that the current flows as shown in FIG. Flows into the capacitor C2, and the current also flows through the output capacitance of the switching element S1. As a result, as shown in the time chart of FIG. 3, the current charges the output capacitance of the capacitor C2 and the switching element S1, and thus the charge rapidly increases.
As the capacitor C2 is charged, the current charging the output capacity of the power switching element S1 of the upper arm A1 increases. Therefore, the output capacity of the power switching element S1 is larger than when the current value is close to zero. Will be charged sooner.

  Thereafter, when the voltage obtained by combining the voltage of the output capacitance of the switching element S1 and the voltage of the capacitor C2 reaches the power supply voltage (time t3), as shown in the third and fourth stage time charts of FIG. The rise in the charge of the capacitor C2 of the lower arm A2 stops. The rise change in this case is determined by the output capacitance value and the additional capacitance value. Details will be described later in the simulation results.

    Thereafter, as shown in FIG. 2C, the output capacitance of the switching element S1 is further charged by a small output current, and the capacitor C2 is discharged.

After time t4, the output current continues to flow through the lower arm diode D2, and as shown in FIG. 3, the output capacitance of the power switching element S1 is kept off and fully charged, and the capacitor C2 The charge remains at zero.
Therefore, the output capacitance of the power switching element S1 of the upper arm A1 is charged faster by the charge of the capacitor C2 of the lower arm A2, and as a result, the switching time at the OFF time is shortened, and the variation in switching time is suppressed. Will be.

Next, in order to flow the load current in the negative direction, as shown in the first stage time chart of FIG. 5, the power switching element S1 of the upper arm A1 is turned off at the time t5, and the lower arm A2 When the power switching element S2 is turned on, a current flows along a path indicated by a thick arrow in FIG.
That is, the current flowing out of the motor coil flows out through the power switching element S2 of the lower arm A2. At this time, as shown in the time charts of the third and fourth stages in FIG. 5, the charge of the output capacitance of the power switching element S2 is zero, and the charge of the capacitor C1 of the upper arm A1 is also zero.

Next, from the above state, at time t6, an off signal is input to the power switching element S2 of the lower arm A2 (the gate voltage is made zero), and at the same time, the additional switching element M1 of the upper arm A2 is turned on.
Then, a current can flow through the additional switching element M1, and the capacitor C1 of the upper arm A1 starts to be charged as shown in the third and fourth stage time charts of FIG. The output capacity of the power switching element S2 of the lower arm A2 starts to be charged by the current.

  In this case, as in the case where the load current is in the positive direction, the additional switching element M1 of the upper arm A1 is kept on while the capacitor C1 is being charged, and the charge of the capacitor C1 increases. Due to this negative load current flow, the current also flows to the output capacity of the power switching element S2 of the lower arm A2, which has not been completely turned off, and the main capacity of the power switching element S2 is charged. Speed up.

Thereafter, when the voltage obtained by adding the voltage of the output capacitance of the switching element S2 and the voltage of the capacitor C1 reaches the power supply voltage (time t7), as shown in the third and fourth stage time charts of FIG. The rise in the charge of the capacitor C1 of the upper arm A1 stops. The rise change in this case is determined by the output capacitance value and the additional capacitance value.

  Thereafter, as shown in FIG. 4C, the output capacity of the switching element S2 is further charged and the capacitor C1 is discharged by a small output current.

After time t8, the output current continues to flow through the lower arm diode D2, and as shown in FIG. 5, the output capacitance of the power switching element S2 is kept in the off state and fully charged, and the capacitor C1 The charge remains at zero.
Therefore, the output capacitance of the power switching element S2 of the lower arm A1 is charged faster by the charge of the capacitor C1 of the upper arm A1, and as a result, the switching time at the OFF time is shortened, and the variation in switching time is suppressed. Will be.

  Next, a simulation result obtained by using a circuit equivalent to the configuration of FIG. 1 described above is a circuit that does not have an output capacity charging acceleration circuit (shown in FIG. 12, in which C3 and C4 are the outputs of the switching elements S1 and S2). This will be described below in comparison with the result of (capacity).

  First, in FIG. 12, the equivalent parts are given the same numbers as in FIG. Here, in the circuit that does not have the output capacity charging promotion circuit, as the power switching elements S1 and S2, a voltage source V1 that can supply a square voltage (corresponding to a gate voltage) instead of a semiconductor element, and a square Although a simulation was performed using a switch that turns on / off according to the magnitude of the power supply V2 that can supply the voltage (corresponding to the gate voltage), there is essentially no change.

  The simulation result is shown in FIG. As shown in the time chart at the top of the figure, when the gate voltage of the lower arm is changed from the on state to the off state, and the gate voltage of the upper arm is changed from the off state to the on state after the dead time, the upper arm and the lower arm As shown in the time chart in the middle of the figure, the output voltage at the connection point to the low voltage level gradually rises from the time when the lower gate voltage becomes 0 (shorter than the dead time). It becomes a constant value of higher level later. In addition, it can be seen that the current flowing through the output capacitor C4 on the lower arm side temporarily increases and the current flowing through the output capacitor C3 on the upper arm temporarily decreases during the rise period of the output voltage between 2 μs. It was. In addition, this increase / decrease shows dispersion | variation by load current value, as shown by each chain line or a solid line.

  FIG. 6 is a simulation circuit equivalent to the circuit of the first embodiment. The power supply V3 and the power supply V4 are gate voltage sources that apply a square voltage to the additional switching element M1 in the upper arm and the additional switching element M2 in the lower arm, respectively.

  FIG. 7 shows a simulation result in the simulation circuit of FIG. The first stage time chart shows the change in the collector current in the power switching element S2, and as shown in the figure showing the result of the fourth stage time change, the lower arm switching element M1 When the gate voltage is turned off, it decreases and increases instantaneously and then returns to the value before the change.

  The figure showing the results of the time change in the second stage of the figure shows the current of the capacitor C2 of the lower arm and the change of the capacitor C1 of the upper arm. It increases and returns to the value before the change, and the upper arm capacitor C1 decreases instantaneously and returns to the value before the change.

  The figure showing the result of the time change in the third stage of the figure shows the rise of the output voltage, but this rise time is 0.1 μs, which is much shorter than 2 μs in the circuit of FIG. It can be seen that the addition of C2 and the additional switching elements M1 and M2 can greatly reduce the switching time, and thus the variation thereof is suppressed.

Note that the rise and fall of the output voltage vary depending on the capacities of the added capacitors C1 and C2 by simulation. FIG. 8 shows the result of temporal change in the waveform of the load voltage when the capacitance is changed.
As can be seen from the figure, the time to settle down to a certain value is the same, but the larger the capacity, the larger the initial instantaneous rise, and at 20 nF, the same as when a large current flows through the power switching elements S1, S2. Stand up instantly to the extent.

It should be noted that the period from the moment when the load voltage rises to a certain value is affected by the minute current of the load. This is because charging and discharging proceed with the load current during this period.
The rise of the charging current portion due to the added capacitors C1 and C2 is determined by the added capacitance and the output capacities of the upper and lower arms.

For example, assuming that the output capacity is 0.5 nF, when the same capacity is added, additional capacity / (additional capacity + output capacity of upper and lower arms) = fast switching rate, so 0.5 nF / (0.5 nF + 1 nF) = 0.33 and it can be seen that the voltage change amount is 33% faster.
As described above, in the embodiment, immediately after the additional switch elements S1 and S2 are turned ON, the voltage changes to a voltage determined by the ratio between the output capacitance × 2 (both upper and lower arms A1 and A2) and the capacitance of the capacitors C1 and C2. It will be.

As can be seen from the above, in the switching circuit of the first embodiment, in the upper and lower arms using the power switching elements S1 and S2, the series circuit of the additional switching circuits M1 and M2 and the capacitors C1 and C2 is used for power. The switching elements S1 and S2 are connected in parallel, and the series circuit is operated to promote the charging of the output capacities of the power switching elements S1 and S2 on the opposite side of the arm. This makes it possible to suppress variations in switching time with a simple and inexpensive circuit configuration.
Further, in the switching circuit of the first embodiment, since the capacitors C1 and C2 are used, charging can be performed in a short time.

  Next, a switching circuit according to a second embodiment of the present invention will be described. The second embodiment is different from the first embodiment in that a resistor is used instead of the capacitors C1 and C2 in the switching circuit of the second embodiment, and the other configuration is the same as that of the first embodiment.

In other words, as shown in FIG. 9, in the switching circuit of the second embodiment, the upper arm A1 includes a power switching element S1 and a diode (so-called feedback diode) D1, a resistor 1 and an additional switching element M1 connected in series. Equivalent to the output capacity charging promotion circuit of the invention) and connected in parallel.
Similarly, the lower arm A2 is configured by connecting a power switching element S2 to a diode (so-called feedback diode) D2 and a series connection circuit of a resistor R2 and an additional switching element M2 in parallel. The collector of the power switching element S2 of the lower arm A2 as the emitter of the power switching element S1 of the upper arm A1 is connected, and these connection points are connected to one of the coils of the electric motor.

  The switching circuit according to the second embodiment operates in the same manner as the switching circuit according to the first embodiment. However, since the capacitors C1 and C2 are replaced by the resistors R1 and R2, the power switching elements S1 and S2 are turned off. Simultaneously with the signal input, by turning on the additional switching elements M2 and M1 of the arm on the opposite side of these, the current switching elements S1 and Facilitates charging to the output capacity of S2. As a result, the switching time of the power switching elements S1 and S2 at a low current can be shortened, and variations in switching time can be suppressed.

As can be seen from the above, in the switching circuit of the second embodiment, in the upper and lower arms using the power switching elements S1 and S2, the series circuit of the additional switching circuits M1 and M2 and the resistors R1 and R2, respectively, The switching circuits S1 and S2 are connected in parallel, and the series circuit is operated to promote charging of the output capacitances of the power switching elements S1 and S2 on the opposite side of the arm. This makes it possible to suppress variations in switching time with a simple and inexpensive circuit configuration.
In addition, since the resistors R1 and R2 are used in the switching circuit according to the second embodiment, the circuit configuration becomes simpler, and charging can be performed as necessary only by adjusting the switching time.

  The present invention has been described based on the above embodiments. However, the present invention is not limited to these embodiments, and is included in the present invention even when there is a design change or the like without departing from the gist of the present invention. .

    For example, various suitable semiconductor switching elements can be used for the power switching elements S1 and S2 and the additional switching elements M1 and M2.

The switching circuit of the present invention is not limited to an electric motor drive circuit of an electric vehicle, and may be used for other load circuits.
Moreover, when using for a motor, it is not restricted to a three-phase alternating current motor.

A1 Upper arm
A2 Lower arm
C1, C2 capacitors
C3, C4 output capacity
D1, D2 diode
M1, M2 additional switching element
S1, S2 Power switching elements

Claims (3)

An upper arm and a lower arm each having a power switching element;
An output capacity for charging the output capacity of the power switching element by operating an additional switching element provided on an arm opposite to the arm having the power switching element according to the switching operation of the power switching element. A charge acceleration circuit;
A switching circuit comprising: The switching circuit according to claim 1,
The output capacity charging promotion circuit is a series connection circuit in which a capacitor is connected in series to the additional switching element,
The series connection circuit is connected in parallel to the power switching element.
A switching circuit characterized by that. The switching circuit according to claim 1,
The output capacity charging promotion circuit is a series connection circuit in which a resistor is connected in series to the additional switching element,
The series connection circuit is connected in parallel to the power switching element.
A switching circuit characterized by that.

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