JP2012235009A - Face-down type mounting structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable the proper visual check of a connecting state of a semiconductor chip and a substrate electrode, in a face-down type mounting structure in which the semiconductor is face-down mounted on a substrate.SOLUTION: A face-down mounting type mounting structure includes a semiconductor chip 10 having a main surface electrode 14 on one main surface 11, and a substrate 20 having a substrate electrode 22 on one surface 21. While the one main surface 11 is opposed to the one surface 21 of the substrate 20, the semiconductor chip 10 is mounted on the one surface 21 of the substrate 20. On a side surface 13 positioned on an outline of the one main surface 11 of the semiconductor chip 10, a conductor portion 15 electrically connected with a main surface electrode 14 and extended from the main surface 11 to the side surface 13 is provided. On the side surface 13 of the semiconductor 10, the conductor portion 15 and the substrate electrode 22 are connected with each other through a conductive joint material 30.

Description

  The present invention relates to a face-down type mounting structure in which a chip made of a semiconductor or the like is mounted on a substrate face-down.

  In general, this type of face-down type mounting structure includes a chip made of a semiconductor having a main surface electrode on one main surface and a substrate having a conductive object such as a substrate electrode on one surface. The chip is mounted on one surface of the substrate with one main surface facing one surface of the substrate, so-called face down, and the main surface electrode and the substrate electrode are bumped between the chip and the substrate. For example, Japanese Patent Application Laid-Open No. H10-260826 has been proposed.

JP 2001-85471 A

  However, in this face-down type mounting structure, the connection between the electrodes of the chip and the substrate is hidden under the chip and cannot be seen when viewed from one side of the substrate, so that the connection state cannot be visually recognized. . For this reason, the confirmation of the connection state is left to a separate electrical inspection.

  The present invention has been made in view of the above problems, and in a face-down type mounting structure in which a chip is mounted face-down on a substrate, the connection state between the chip and an object to be bonded can be appropriately visually confirmed. With the goal.

In order to achieve the above object, in the invention according to claim 1, a chip (10) having a main surface electrode (14) on one main surface (11),
A substrate (20) having a conductive body (22, 23) having conductivity on one surface (21),
A face-down type mounting structure in which the chip (10) is mounted on one surface (21) of the substrate (20) with one main surface (11) facing the one surface (21) of the substrate (20). In
The side surface (13) located on the outer surface of one main surface (11) of the chip (10) is electrically connected to the main surface electrode (14) and extends from the one main surface (11) to the side surface (13). Conductor part (15) provided,
In the side surface (13) of the chip (10), the conductor portion (15) and the members to be joined (22, 23) are connected via the conductive bonding material (30).

  According to this, when the chip (10) is mounted face down, the joined body (22) on the one surface (21) of the substrate (20) and the conductor (15) on the side surface (13) of the chip (10) However, by connecting through the conductive bonding material (30), the chip (10) and the bonded body (22) are connected. 10) Visible without being hidden underneath. Therefore, it is possible to appropriately visually recognize the connection state between the chip (10) and the joined body (22).

  Here, as in the invention according to claim 2, in the face-down type mounting structure according to claim 1, one end of the conductor portion (15) is the main surface electrode (11) at one main surface (11). 14), and the other end side is made of a conductive film continuously extending from one main surface (11) to the side surface (13).

  Further, as in the invention according to claim 3, in the face-down type mounting structure according to claim 2, the conductor portion (15) and the joined body (from the main surface (11) to the side surface (13) ( 22) is preferably connected through the conductive bonding material (30) in terms of improving the connection strength between the conductor portion (15) and the object to be bonded (22).

  According to a fourth aspect of the present invention, in the face-down type mounting structure according to any one of the first to third aspects, the one main surface (11) and the side surface (13) of the semiconductor chip (10) The interior angle (θ) formed by is an obtuse angle.

  According to this, compared with the case where the internal angle (θ) formed by one main surface (11) and the side surface (13) is a right angle or less, the conductor portion (15) is less likely to be disconnected.

  In the invention according to claim 5, in the face-down type mounting structure according to any one of claims 1 to 4, one main surface (11) of the semiconductor chip (10) and the substrate (20) A non-conductive underfill material (40) for bonding the semiconductor chip (10) and the substrate (20) is interposed between the one surface (21).

  According to this, the mechanical connection strength between the semiconductor chip (10) and the substrate (20) is reinforced by the underfill material (40).

In the invention according to claim 6, in the face-down type mounting structure according to any one of claims 1 to 5, a plurality of semiconductor chips (10) are provided.
With all the semiconductor chips (10) having one main surface (11) facing one surface (21) of the substrate (20), a plurality of the semiconductor chips (10) are stacked to form the stacked body (100). Formed,
By providing a conductive material (60) on the side surface (13) of the plurality of semiconductor chips (10) so as to connect the conductor portions (15) of the individual semiconductor chips (10), a plurality of semiconductor chips is obtained. The chips (10) are electrically connected to each other,
Conductivity between the conductor portion (15) and the joined body (22, 23) on the side surface (13) of the semiconductor chip (10) facing the one surface (21) of the substrate (20) in the multilayer body (100). The connection via the bonding material (30) is performed.

  According to this, the structure which laminated | stacked the several semiconductor chip (10) can be implement | achieved easily, and it is preferable at points, such as size reduction.

  In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

(A) is a schematic sectional drawing of the face-down type mounting structure concerning 1st Embodiment of this invention, (b) is an A arrow top view of the semiconductor chip in (a), (c), It is a B arrow top view of the semiconductor chip in (a). It is process drawing which shows the manufacturing method of the semiconductor chip in the mounting structure concerning the said 1st Embodiment. It is process drawing which shows the conductor part formation process shown by FIG.2 (c). It is process drawing which shows the manufacturing process and mounting process of the semiconductor chip concerning 2nd Embodiment of this invention. It is a schematic sectional drawing of the face-down type mounting structure concerning 3rd Embodiment of this invention. It is a schematic sectional drawing of the face-down type mounting structure concerning 4th Embodiment of this invention. It is a schematic sectional drawing of the face down type mounting structure as another example of the said 4th Embodiment. It is process drawing which shows the manufacturing process of the semiconductor chip concerning 5th Embodiment of this invention. It is process drawing which shows the manufacturing process of the semiconductor chip concerning 6th Embodiment of this invention. It is process drawing which shows the mounting process of the semiconductor chip concerning 7th Embodiment of this invention. It is process drawing which shows the mounting process of the semiconductor chip as another example of the said 7th Embodiment. It is a schematic plan view which shows another example of the said 7th Embodiment. It is a schematic plan view of the face-down type mounting structure concerning 8th Embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description.

(First embodiment)
In FIG. 1, (a) is a figure which shows schematic sectional structure of the face-down type mounting structure S1 which concerns on 1st Embodiment of this invention, (b) is when it sees from the arrow A direction in (a). It is a figure which shows the schematic plane structure of one main surface 11 of the semiconductor chip 10 of this, (c) shows the schematic plane structure of the side surface 13 of the semiconductor chip 10 when it sees from the arrow B direction in (b). FIG.

  The mounting structure S1 of the present embodiment roughly includes a semiconductor chip 10 having a main surface electrode 14 on one main surface 11 and a substrate 20 having a substrate electrode 22 as a conductive bonded body on one surface 21. The semiconductor chip 10 is a face-down mounting type in which the semiconductor chip 10 is mounted face-down on the one surface 21 of the substrate 20.

  The semiconductor chip 10 is a plate-shaped IC chip made of a general silicon semiconductor or the like, and typically has a rectangular plate shape. Both plate surfaces 11 and 12 having a front-back relationship are the main surfaces. Is. Such a semiconductor chip 10 is formed by a general semiconductor process.

  The main surface electrode 14 is a patterned electrode made of aluminum or the like, and electrically connects the semiconductor chip 10 to the outside. The main surface electrode 14 only needs to be disposed on one main surface 11 which is the surface of the semiconductor chip 10 and may be singular, but here, as in a typical case, the one main surface electrode 14 is provided. A plurality of peripheral portions of the surface 11 are arranged.

  The substrate 20 has a plate shape such as a ceramic substrate, a printed substrate, or an island of a lead frame, and a substrate electrode 22 as an object to be joined is provided on one surface 21 thereof. The substrate electrode 22 is made of a copper film, a film obtained by applying nickel plating to tungsten, or the like, and is electrically connected to the main surface electrode 14 of the semiconductor chip 10.

  The semiconductor chip 10 is mounted on the one surface 21 of the substrate 20 with one main surface 11 facing the one surface 21 of the substrate 20 and the other main surface 12 facing the opposite side of the substrate 20. . Thus, the semiconductor chip 10 is mounted face down on the one surface 21 of the substrate 20.

  Here, the side surface 13 positioned on the outer side of one main surface 11 of the semiconductor chip 10, here, the side surface 13 positioned on the four sides of the semiconductor chip 10 having a rectangular plate shape, is electrically connected to the main surface electrode 14. A conductor portion 15 extending from the main surface 11 to the side surface 13 is provided.

  Specifically, the conductor portion 15 is made of a conductor film having one end connected to the main surface electrode 14 at one main surface 11 and the other end continuously extending from the one main surface 11 to the side surface 13. The conductor portion 15 as such a conductor film is made of Ni plating, Cu plating, or the like formed by general electroless plating.

  As shown in FIG. 1, the conductor portion 15 and the substrate electrode 22 are electrically and mechanically connected via the conductive bonding material 30 on the side surface 13 of the semiconductor chip 10. Here, a part of the substrate electrode 22 which is a bonded body on the one surface 21 of the substrate 20 overlaps with one main surface 11 of the semiconductor chip 10, and the remaining part is located outside the one main surface 11. Yes.

  On the side surface 13 of the semiconductor chip 10, a portion of the substrate electrode 22 located outside the one main surface 11 is connected to the conductor portion 15 via a conductive bonding material 30. The conductive bonding material 30 is made of a conductive adhesive such as a general Ag paste, solder, or the like.

  Next, a method for forming the mounting structure S1 on the substrate 20 of the semiconductor chip 10 of this embodiment, that is, a method for manufacturing the face-down type mounting structure S1 of this embodiment will be described with reference to FIGS.

  FIG. 2 is a process diagram showing a method of manufacturing the semiconductor chip 10 in the mounting structure S1, and shows a schematic cross section of a work in each process. 3A and 3B are process diagrams showing the conductor portion forming process shown in FIG. 2C, where FIG. 3A is a perspective view, and FIGS. 3B to 3E are viewed from the direction of arrow C in FIG. It is a schematic plan view which shows the state of each process at the time.

  First, as shown in FIG. 2A, an element such as a transistor (not shown) and a main surface electrode 14 are formed on a semiconductor wafer 1 made of a silicon semiconductor or the like by a general semiconductor process (main surface electrode). Forming step).

  Next, as shown in FIG. 2B, the scribe region of the semiconductor wafer 1 is half-cut by dicing cut or etching (half-cut process). Here, half cutting is performed from the one main surface 11 side of the semiconductor chip 10, whereby the side surface 13 of the groove formed in the half-cut portion finally becomes the side surface 13 of the semiconductor chip 10.

  Then, the conductor part formation process shown by FIG.2 (c) is performed, and the conductor part 15 which consists of said Ni plating, Cu plating, etc. is formed using the photolithographic method.

  In this conductor portion forming step, first, from the state immediately after the end of the half cut shown in FIGS. 3A and 3B, as shown in FIG. The photoresist 2 is formed on the entire surface of the semiconductor chip 10 including the main surface 11 side.

  Next, as shown in FIG. 3D, by patterning the photoresist 2, the photoresist 2 is formed in an opening shape at a portion where the groove of the half cut portion and the conductor portion 13 are formed.

  Subsequently, as shown in FIG. 3E, a conductor portion 15 is formed in the opening of the photoresist 2 by electroless plating or the like, and then, as shown in FIG. 2 is removed. In this way, the conductor part 15 is formed. In this state, each conductor portion 15 is integrated by a connecting portion 15a formed in the groove, but this connecting portion 15a is removed by dividing the semiconductor wafer 1 by a polishing process performed later.

  After performing the conductor portion forming step in this way, next, as shown in FIG. 2D, a polishing step is performed, and as shown in FIG. 2E, the semiconductor wafer 1 is divided into individual semiconductor chips 10. Divide into units.

  Specifically, the semiconductor wafer 1 is mounted on and supported by the support base 4, and polishing is performed using a grindstone 3 from a surface opposite to the surface that becomes one main surface 11 of the semiconductor chip 10 in the semiconductor wafer 1. The semiconductor wafer 1 is thinned from the opposite surface to the half-cut groove, and the connecting portion 15a is removed. Thereby, as shown in FIG. 2E, the semiconductor chip 10 having the conductor portion 15 is completed.

  Thus, the completed semiconductor chip 10 is face-down mounted on one surface 21 of the substrate 20 as shown in FIG. Specifically, in this mounting process, the conductive bonding material 30 is disposed on the substrate electrode 22 on the one surface 21 of the substrate 10, one main surface 11 is opposed to the one surface 21 of the substrate 20, and the other main surface 11 is disposed. With the surface 12 facing away from the substrate 20, the semiconductor chip 10 is mounted on the one surface 21 of the substrate 20 via the conductive bonding material 30.

  And if the process etc. which harden | cure or solidify the electroconductive joining material 30 are performed, the conductor part 15 and the board | substrate electrode 22 will be connected mechanically and electrically via the electroconductive joining material 30. FIG. As a result, the semiconductor chip 10 and the substrate electrode 22 are mechanically and electrically connected, and the mounting structure S1 of this embodiment shown in FIG. 1 is completed.

  As described above, according to this embodiment, when the semiconductor chip 10 is mounted face-down on the substrate 20, the substrate electrode 22 that is the bonded body on the one surface 21 of the substrate 20 and the conductor on the side surface 13 of the semiconductor chip 10. The part 15 is connected via the conductive bonding material 30, whereby the semiconductor chip 10 and the substrate electrode 22 are connected.

  Therefore, the connection portion of the conductor portion 15 is located so as to protrude from the side surface 13 of the semiconductor chip 10 from between the one main surface 11 of the semiconductor chip 10 and the one surface 21 of the substrate 20, and is hidden under the semiconductor chip 10. Visible without any problem. Therefore, according to this embodiment, it is possible to appropriately visually recognize the connection state between the semiconductor chip 10 and the substrate electrode 22 that is the bonded body.

(Second Embodiment)
FIG. 4 is a process diagram showing a manufacturing process and a mounting process of the semiconductor chip 10 according to the second embodiment of the present invention, and shows a schematic cross section of a work in each process. In the present embodiment, the face-down type mounting structure S2 shown in FIG. 4D is finally manufactured. The difference from the first embodiment will be mainly described.

  First, in this embodiment, the semiconductor wafer 1 formed by the main surface electrode forming process similar to the above is prepared, and this is subjected to a half-cut process. In the half-cut process of the present embodiment, as shown in FIG. 4A, half-cut is performed so that the groove in the half-cut portion is a groove having a V-shaped cross section. Such half-cutting is possible by adjusting the cutting tool shape in dicing, taper etching, or the like.

  Next, as shown in FIG. 4B, the conductor part forming step is performed in the same manner as described above to form the conductor part 15. Thereafter, as shown in FIG. 4C, a polishing step is performed in the same manner as described above, and the semiconductor wafer 1 is divided into individual semiconductor chip 10 units.

  As shown in FIG. 4D, the semiconductor chip 10 thus completed has an obtuse angle of the internal angle θ formed by the one main surface 11 and the side surface 13. Then, by mounting the semiconductor chip 10 face down on the one surface 21 of the substrate 20 in the same manner as described above, the face down type mounting structure S2 of this embodiment shown in FIG. 4D is completed.

  As described above, according to the present embodiment, the internal angle θ formed by one main surface 11 and the side surface 13 in the semiconductor chip 10 is an obtuse angle, so that the internal angle θ is a right angle or less than that when the internal angle θ is a right angle. Thus, the conductor portion 15 is difficult to be disconnected.

  That is, when the internal angle θ is a right angle or an acute angle, the conductor portion 15 at the corner portion is disconnected due to a decrease in the thickness of the conductor portion 15 at the corner portion between the one main surface 11 and the side surface 13. However, if the inner angle θ is made obtuse as in the present embodiment, the concern about disconnection of the conductor portion 15 is reduced.

(Third embodiment)
FIG. 5 is a diagram showing a schematic cross-sectional configuration of a face-down type mounting structure S3 according to the third embodiment of the present invention. In the present embodiment, the difference from the mounting structure S1 of the first embodiment will be mainly described.

  As shown in FIG. 5, in this mounting structure, a non-conductive underfill that bonds the semiconductor chip 10 and the substrate 20 between one main surface 11 of the semiconductor chip 10 and one surface 21 of the substrate 20. A material 40 is interposed.

  Specifically, as this underfill material 40, an electrically insulating resin, which is an underfill material generally used in the field of semiconductor electronics, is used. For example, an adhesive made of an epoxy resin or a film made of an epoxy resin ( A so-called die attach film) is applied.

  The mounting structure S3 of the present embodiment is formed by mounting the semiconductor chip 10 face down on the substrate 20 with the underfill material 40 interposed therebetween. And according to this embodiment, the effect that the mechanical connection strength of the semiconductor chip 10 and the board | substrate 20 is reinforced with the underfill material 40 is anticipated. Of course, this embodiment can be applied in combination with the second embodiment.

(Fourth embodiment)
FIG. 6 is a diagram showing a schematic cross-sectional configuration of a face-down type mounting structure S4 according to the fourth embodiment of the present invention. In the present embodiment, the difference from the mounting structure S1 of the first embodiment will be mainly described.

  As shown in FIG. 6, in this mounting structure S <b> 4, a part of the substrate electrode 22 is not overlapped with one main surface 11 of the semiconductor chip 10, and the entire substrate electrode 22 is one of the semiconductor chips 10. It is located outside the main surface 11.

  In other words, the semiconductor chip 10 is located inside the substrate electrode 22 on the one surface 21 of the substrate 20. Even in such a case, on the side surface 13 of the semiconductor chip 10, the conductor portion 15 and the substrate electrode 22 are connected via the conductive bonding material 30, and the mechanical and electrical connection between the semiconductor chip 10 and the substrate electrode 22. Connection is made.

  FIG. 7 is a diagram showing a schematic cross-sectional configuration of a face-down type mounting structure S5 as another example of the fourth embodiment. In the example of FIG. 7, in the mounting structure of this embodiment, an underfill material 40 similar to that shown in FIG. 5 is further applied between one main surface 11 of the semiconductor chip 10 and one surface 21 of the substrate 20. It is interposed in between.

  Also in this case, the effect of reinforcing the mechanical strength by the underfill material 40 similar to the above is expected. Of course, the mounting structures S4 and S5 of the present embodiment shown in FIGS. 6 and 7 can be applied in combination with the second embodiment.

(Fifth embodiment)
FIG. 8 is a process diagram showing a manufacturing process of the semiconductor chip 10 according to the fifth embodiment of the present invention, and shows a schematic cross section of a work in each process. This embodiment provides an example in which the underfill material 40 shown in FIGS. 5 and 7 is used, and the die attach film (hereinafter abbreviated as DAF) is used for the underfill material 40.

  First, in the present embodiment, a semiconductor wafer 1 formed by the same principal surface electrode forming process as described above is prepared, and this is subjected to a half-cut process. (See FIG. 8A).

  Next, in the present embodiment, as shown in FIG. 8B, the surface to be one main surface 11 in the semiconductor wafer 1 is pressed against the DAF 5 and pasted. The surface of the DAF 5 opposite to the semiconductor wafer 1 is supported by being attached to the film support 6.

  In the same manner as described above, the grindstone 3 is used to polish the semiconductor wafer 1 from the surface opposite to the one main surface 11 of the semiconductor chip 10, and the semiconductor wafer 1 is half-cut from the opposite surface. While the thickness of the cut portion is reduced, the connecting portion 15a is removed.

  The state up to this point is shown in FIG. 8C, and the divided semiconductor chip 10 is attached to the common DAF 5. Thereafter, as shown in FIG. 8D, excess DAF 5 between the semiconductor chips 10 is removed by dicing, etching, or the like.

  Then, the individual semiconductor chip 10 having the DAF 5 bonded to the one main surface 11 is peeled off from the film support 6, and the one surface 21 of the substrate 20 in which the conductive bonding material 30 is disposed on the substrate electrode 22. On the other hand, it is mounted via DAF5. Thereby, a mounting structure of the semiconductor chip 10 to which the underfill material 40 made of DAF as shown in FIGS. 5 and 7 is applied is completed.

  In the case of this embodiment, since the semiconductor chip 10 and the DAF as the underfill material 40 are integrated, the step of disposing the underfill material 40 on the substrate 20 before mounting the semiconductor chip 10 on the substrate 20. Therefore, the production cost can be reduced. Of course, this embodiment can be applied in combination with the second embodiment.

(Sixth embodiment)
FIG. 9 is a process diagram showing a manufacturing process of the semiconductor chip 10 according to the sixth embodiment of the present invention, and shows a schematic cross section of a work in the process.

  In the above embodiment, the conductor portion 15 is a conductor film formed by plating. However, a conductor film formed of Ag paste, Cu paste, or the like may be used. In this case, as shown in FIG. 9, the conductor portion 15 can be formed by applying a paste with, for example, the inkjet nozzle 7 and curing it.

(Seventh embodiment)
FIG. 10 is a process diagram showing a mounting process of the semiconductor chip 10 according to the seventh embodiment of the present invention, and shows a schematic cross section of a work in each process. In the present embodiment, the face-down type mounting structure S6 shown in FIG. 10C is finally manufactured. The difference from the first embodiment will be mainly described.

  In the mounting structure S6 of this embodiment, as shown in FIG. 10C, a plurality of semiconductor chips 10 are provided, and all the semiconductor chips 10 have one main surface 11 on one surface 21 of the substrate 20. In the state of being directed, the plurality of semiconductor chips 10 are stacked to form a stacked body 100. The stacked body 100 is mounted on the one surface 21 of the substrate 20 in a state in which the stacking direction is along a direction perpendicular to the one surface 21 of the substrate 20.

  Here, between the semiconductor chips 10, that is, between one main surface 11 of one semiconductor chip 10 adjacent to each other and the other main surface 12 of the other semiconductor chip 10, there is conductive or nonconductive. An adhesive member 50 is interposed, and the semiconductor chips 10 are fixed by the adhesive member 50. Examples of the adhesive member 50 include an epoxy adhesive and an adhesive film.

  In the stacked body 100, the conductive material 60 is provided on the side surfaces 13 of the plurality of semiconductor chips 10 so as to connect the conductor portions 15 of the individual semiconductor chips 10. They are electrically connected to each other. As the conductive material 60, a material selected from the paste materials applied to the conductive bonding material 30 described above can be adopted, and the conductive material 60 is formed by application by a dispensing method or the like.

  Then, in the semiconductor chip 10 facing the one surface 21 of the substrate 20 in the multilayer body 100, that is, on the side surface 13 of the lowermost semiconductor chip 10 closest to the substrate 20, the conductor portion 15 and A connection is made to the substrate electrode 22, which is an object to be bonded, via the conductive bonding material 30.

  In the example of FIG. 10, as shown in FIG. 10A, the adhesive members 50 are respectively attached to one main surface 11 of the plurality of semiconductor chips 10, and then the lowermost semiconductor chip 10 is attached to the substrate 20. It is mounted on one surface 21, and the upper semiconductor chips 10 are sequentially stacked on the surface 21, thereby forming a stacked body 100 in which all the semiconductor chips 10 are stacked.

  Thereafter, the conductive material 60 is applied and disposed so as to connect the conductor portions 15 on the side surfaces 13, and the conductor portion 15 on the side surface 13 of the lowermost semiconductor chip 10 and the substrate electrode 22 are connected. The conductive bonding material 30 is disposed by coating or the like. Here, the conductive bonding material 30 and the conductive material 60 may be different materials and may be separately disposed, but may be collectively disposed as the same material.

  In this way, the face-down type mounting structure S6 of the present embodiment is completed by curing the conductive bonding material 30 and the conductive material 60, for example. According to the present embodiment, a configuration in which a plurality of semiconductor chips 10 are stacked can be easily realized, which is advantageous in reducing the occupied space on the first surface 21 of the substrate 20 and has advantages such as downsizing the physique. . In the case of the example of FIG. 10, the adhesive member 50 between the lowermost semiconductor chip 10 and the substrate 20 has the function of the underfill material.

  FIG. 11 is a process diagram showing a mounting process of the semiconductor chip 10 as another example of the seventh embodiment. In the example of FIG. 10, a plurality of semiconductor chips 10 are stacked one by one on the one surface 21 of the substrate 20, but in the example of FIG. It is mounted on the substrate 20.

  In this case, after forming the laminated body 100 via the adhesive member 60, as shown in FIG. 11A, the conductive material 60 is applied and disposed so as to connect the conductor portions 15 of the side surfaces 13. To do.

  After that, if the laminate 100 provided with the conductive material 60 is mounted on the one surface 21 of the substrate 20 via the conductive bonding material 30 as in the first embodiment, FIG. The face-down type mounting structure S7 shown is completed. Also in the example of FIG. 11, it goes without saying that the underfill material may be interposed between the lowermost semiconductor chip 10 and the substrate 20.

  FIG. 12 is a schematic plan view showing another example of the seventh embodiment. As shown in FIG. 12, for each semiconductor chip 10 of the multilayer body 100, when the conductor portions 15 on the side surfaces 13 are connected by the conductive material 60, the conductor portions 15 located in the same row between the semiconductor chips 10. The conductive materials 60 may be connected to each other, but the conductive portions 60 may be connected to each other in different rows by forming the conductive materials 60 in a staggered manner.

  Of course, in the laminated body 100 as in the present embodiment, it is possible to employ a configuration in which the internal angle θ formed by one main surface 11 and the side surface 13 is an obtuse angle, as in the second embodiment.

(Eighth embodiment)
FIG. 13 is a diagram showing a schematic plan configuration of a face-down type mounting structure S8 according to the eighth embodiment of the present invention. An electronic component 23 may be used as a member to be connected to the conductor portion 15 of the semiconductor chip 10 via the conductive bonding material 30 on the one surface 21 of the substrate 20.

  In the example of FIG. 13, a component land 24 is provided on one surface 21 of the substrate 20, and an electronic component 23 is mounted on the component land 24 by a die mount material or the like. Examples of the electronic component 23 include a chip capacitor having an electrode on the surface.

  The semiconductor chip 10 is disposed next to the electronic component 23 with the conductor portion 15 on the side surface 13 facing the electronic component 23, and the conductive portion 15 and an electrode (not shown) of the electronic component 23 connect the conductive bonding material 30. Connected electrically and mechanically.

(Other embodiments)
For example, as shown in FIG. 2, when the semiconductor wafer 1 is half-cut to form the side surface 13 and the conductor portion 15 is formed thereon by plating, ultraviolet rays are plated out of the semiconductor wafer 1 after the half-cut. By selectively irradiating the formation portion, if the irradiated portion is a hydrophilic surface and the non-irradiated portion is a hydrophobic surface, the conductive portion 15 can be easily formed by plating only on the hydrophilic surface.

  The conductor portion may be the same material as the main surface electrode 14, for example, an aluminum film formed by sputtering or the like. In this case, the main surface electrode 14 and the conductor portion 15 form an integral continuous film. For example, the main surface electrode 14 and the conductor portion 15 may be formed by sputtering or the like after the half cut.

  In addition, the object to be bonded on the one surface 21 of the substrate 20 may be any conductive material that exists on the one surface 21 and is connected to the conductor portion 15 of the semiconductor chip 10 via the conductive bonding material 30. The substrate electrode 22 and the electronic component 23 are not limited to the above.

  Further, the chip is not limited to the semiconductor chip 10 made of the semiconductor described above, and may be made of, for example, an insulating ceramic, metal, or resin.

DESCRIPTION OF SYMBOLS 10 Semiconductor chip 11 One main surface of semiconductor chip 13 Side surface of semiconductor chip 14 Main surface electrode 15 Conductor part 20 Substrate 21 One side of substrate 22 Substrate electrode 23 Electronic component 30 Conductive bonding material 40 Underfill material 60 Conductive material 100 Lamination Body S1-S8 Face-down type mounting structure

Claims (6)

A chip (10) having a main surface electrode (14) on one main surface (11);
A substrate (20) having a conductive body (22, 23) having conductivity on one surface (21),
The chip (10) is mounted on the one surface (21) of the substrate (20) with the one main surface (11) facing the one surface (21) of the substrate (20). In face-down mounting structure,
The side surface (13) positioned on the outer surface of the one main surface (11) of the chip (10) is electrically connected to the main surface electrode (14) and the one main surface (11) to the side surface (13). A conductor portion (15) extending over the area is provided,
In the side surface (13) of the chip (10), the conductor portion (15) and the joined body (22, 23) are connected via a conductive bonding material (30). Face down type mounting structure.   One end of the conductor portion (15) is connected to the main surface electrode (14) at the one main surface (11), and the other end side is continuous from the one main surface (11) to the side surface (13). 2. The face-down type mounting structure according to claim 1, wherein the face-down type mounting structure is made of a conductive film extending in the form of a conductor.   The conductor portion (15) and the joined body (22) are connected via the conductive bonding material (30) from the one main surface (11) to the side surface (13). The face-down type mounting structure according to claim 2, wherein   The internal angle (θ) formed by the one main surface (11) and the side surface (13) in the semiconductor chip (10) is an obtuse angle, according to any one of claims 1 to 3. Face-down mounting structure.   The semiconductor chip (10) and the substrate (20) are bonded to each other between the one main surface (11) of the semiconductor chip (10) and the one surface (21) of the substrate (20). The face-down type mounting structure according to any one of claims 1 to 4, wherein a conductive underfill material (40) is interposed. A plurality of the semiconductor chips (10) are provided,
All the semiconductor chips (10) are stacked with the one main surface (11) facing the one surface (21) of the substrate (20). Forming a body (100),
A conductive material (60) is provided on the side surface (13) of the plurality of semiconductor chips (10) so as to connect the conductor portions (15) of the individual semiconductor chips (10). The semiconductor chips (10) are electrically connected to each other,
On the side surface (13) of the semiconductor chip (10) facing the one surface (21) of the substrate (20) in the multilayer body (100), the conductor portion (15) and the joined body (22). 23), the face-down type mounting structure according to any one of claims 1 to 5, wherein the connection is made via the conductive bonding material (30).

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