JP2012222257A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of easily and selectively insulating an electrode regardless of a shape of the electrode.SOLUTION: In order to form an electric insulation film on solder bumps 3a of a plurality of semiconductor chips 2 formed on a semiconductor wafer, laser beams are irradiated on the solder bumps 3a to form oxide films 7 on surfaces of the bumps 3a. Accordingly, electric insulation of power supply electrodes of defective semiconductor chips is achieved to allow a collective burn-in test to be performed on a semiconductor wafer except on defective semiconductor chips thereby solving the problem of a resin flow due to a use of an insulation resin.

Description

  The present invention relates to a method of manufacturing a semiconductor device that insulates a specific electrode of a plurality of semiconductor chips formed on a semiconductor wafer, and a semiconductor device manufactured by the method.

  A plurality of semiconductor chips are formed on a semiconductor wafer through a diffusion process and divided into individual semiconductor chips. Leads for external connection are formed and sealed with resin or ceramic. Become.

  As the manufacturing process of semiconductor chips becomes smaller and more multifunctional, burn-in (screening) tests are indispensable to ensure product quality and to prevent problems after mounting in advance. . The burn-in test is performed in a state where a temperature load and an electrical load are applied to the semiconductor chip. Conventionally, the burn-in test has been performed in a sealed product state. The number of devices sold in the form of devices (chips) has increased, and quality assurance in the wafer state has become important, so a batch burn-in test in the wafer state has also been carried out. The batch wafer burn-in test can detect defects in the process before assembly and shorten the inspection time in the post-process, and can also reduce the burn-in cost, thereby improving productivity and reducing inspection cost. it can.

  In order to realize the batch wafer burn-in test, it is necessary to apply power to the electrodes necessary for the burn-in inspection formed on each of a plurality of semiconductor chips on the semiconductor wafer. One hundred thousand or more electrodes are collectively contacted.

  At that time, if power is supplied to a defective semiconductor chip, abnormal heat may be generated, which may affect the operation of adjacent non-defective elements, or may cause problems such as burning a wafer burn-in probe card. For this reason, it is necessary to shut off the power supply to the semiconductor chip that is determined to be defective by the prior probe inspection. Conventionally, a method has been employed in which a large number of electrodes existing on one or more defective semiconductor chips on a semiconductor wafer are covered with an ultraviolet curable resin to be electrically insulated.

Hereinafter, a conventional electrode insulation method will be described with reference to FIGS.
FIG. 8 is a diagram for explaining a conventional electrode insulation method using a dispenser method, and FIG. 9 is a diagram for explaining a conventional electrode insulation method using an ink jet method.

  As a resin application method, for example, as shown in FIG. 8, an ultraviolet curable resin 6 is applied to the electrode pads 3 of a required semiconductor chip 2 on a semiconductor wafer and discharged by bringing a dispenser-type application nozzle 14 into contact therewith. There is a method (for example, refer to Patent Document 1).

  In addition, as shown in FIG. 9, when the ultraviolet curable resin 6 is coated on the electrode pads 3 of the required semiconductor chip 2 on the semiconductor wafer, a predetermined height that does not contact the application site by the inkjet application nozzle 17. In addition, resin application by an ink jet method in which the liquid resin 5 is discharged is also performed (for example, see Patent Document 2).

JP 2005-101439 A JP 2008-1089888 A

  The coating method shown in FIG. 8 or FIG. 9 can be applied to a thin electrically insulating coating electrode having a viscosity of 10 μm to 100 CPS and a thickness of 1 μm or less. In the case of a dome shape having a thickness of about 100 μm, there is a problem that the insulating resin flows from the surface of the solder bump and the electrode pad 3 cannot be sufficiently insulated.

  In addition, when an insulating resin having a high viscosity that does not flow from the surface of the solder bumps is used, problems such as clogging of the coating nozzle occur, so the hole diameter of the coating nozzle must be 50 μm or more, The application amount of the resin 6 is 100 picoliters or more, and there is a problem that application to the minute electrode pad 3 becomes difficult.

  In view of the above problems, an object of the present invention is to easily insulate an electrode easily regardless of the shape of the electrode.

  In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes a step of forming a plurality of semiconductor chips having a plurality of electrodes on a semiconductor wafer, a step of performing pass / fail judgment of the semiconductor chip by probe inspection, A step of forming an insulating oxide film on a surface of the predetermined electrode of the semiconductor chip determined to be defective by probe inspection; and a step of performing a batch burn-in test on the semiconductor wafer. .

The electrode on which the oxide film is formed is preferably a power supply electrode.
The formation of the oxide film is preferably performed by laser irradiation.
Further, the thickness of the oxide film can be adjusted by laser output.

The laser spot diameter may be smaller than the length of one side of the electrode.
Moreover, you may perform laser irradiation with respect to one said electrode by the several laser irradiation to the center part of the said electrode, and its peripheral part.

  A step of forming a plurality of semiconductor chips each having a plurality of electrode pads and solder bumps formed on the electrode pads on a semiconductor wafer; a step of determining pass / fail of the semiconductor chips by probe inspection; and a probe inspection The method includes a step of removing predetermined solder bumps of the semiconductor chip determined to be defective, and a step of performing a batch burn-in test on the semiconductor wafer.

The removed electrode is preferably a power supply electrode.
Preferably, the electrode pad includes an inspection needle connection region and a solder bump connection region, the solder bump is formed in the solder bump connection region, and the probe inspection is probed to the inspection needle connection region. .

  Furthermore, the semiconductor device of the present invention includes a semiconductor wafer, non-defective and defective semiconductor chips formed on the semiconductor wafer, electrodes formed on the semiconductor chip, and defective semiconductors among the electrodes. And an insulating oxide film formed on a predetermined electrode formed on the chip.

The predetermined electrode is preferably a power supply electrode.
The electrode is preferably a solder bump formed on an electrode pad.
Preferably, the electrode pad includes an inspection needle connection region and a solder bump connection region, and the solder bump is formed in the solder bump connection region.

  As described above, the electrode can be selectively insulated easily regardless of the shape of the electrode.

Conceptual diagram showing a configuration of a laser irradiation apparatus used in the method for manufacturing a semiconductor device according to the first embodiment. Diagram showing the configuration of a semiconductor wafer The figure which illustrates the composition of a semiconductor chip The figure which illustrates the structure of the semiconductor chip in which the electrode pads are arranged in a grid The figure explaining the oxide film formation process in Embodiment 1 8A and 8B illustrate a method for manufacturing a semiconductor device in Embodiment 2. The figure which shows the structure of the electrode pad of the semiconductor device which concerns on Embodiment 3. FIG. The figure explaining the electrode insulation method by the conventional dispenser system The figure explaining the electrode insulation method by the conventional inkjet system

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
Since the semiconductor device manufacturing apparatus according to the present invention has a mechanism for performing heat treatment by laser irradiation on a specific electrode on a semiconductor wafer on which a plurality of semiconductor chips are formed, first, for a semiconductor wafer to be processed, This will be described with reference to FIGS.

2 is a diagram illustrating the configuration of a semiconductor wafer, FIG. 3 is a diagram illustrating the configuration of a semiconductor chip, and FIG. 4 is a diagram illustrating the configuration of a semiconductor chip in which electrode pads are arranged in a grid.
As shown in FIG. 2, a plurality of semiconductor chips 2 are formed on the semiconductor wafer 1.
As shown in FIG. 3A, each semiconductor chip 2 may be formed on the periphery of the semiconductor chip 2 so that the electrode pad 3 surrounds the circuit portion 4. Further, as shown in FIG. 3B, in the semiconductor chip 2, the electrode pads 3 may be formed not only in the peripheral portion of the semiconductor chip 2 but also in the surrounding region of the circuit portion 4.

Further, as shown in FIG. 4, the electrode pads 3 may be arranged in a grid shape on the entire semiconductor chip 2. Here, on the electrode pad 3, a solder bump including a solder bump 3a for supplying power and a solder bump 3b for signal may be provided. Usually, the cross-sectional shape of the solder bump is a dome shape. In the future, since the electrode structure composed of the electrode pads 3 and the solder bumps is expected to be further narrowed and narrowed, it is required to perform insulation processing with particularly high positional accuracy in the wafer burn-in test. Hereinafter, an insulating process for solder bumps formed as electrodes will be described.
(Embodiment 1)
First, an apparatus for forming an insulating film on a pad electrode, which is a method for manufacturing a semiconductor device according to the first embodiment, will be described with reference to FIG.

  FIG. 1 is a conceptual diagram showing a configuration of a laser irradiation apparatus used in the semiconductor device manufacturing method according to the first embodiment. This laser irradiation mechanism is for forming an insulating oxide film on a pad electrode of a defective semiconductor chip among a plurality of semiconductor chips on a semiconductor wafer.

  As shown in FIG. 1, a wafer stage 12 for installing a semiconductor wafer 1, an XY moving stage 13 for moving the wafer stage 12 in the X direction and the Y direction, and a target electrode of the semiconductor wafer 1 on the wafer stage 12. A laser irradiation unit 15 for performing electrical insulation processing, a laser controller 15a for controlling the irradiation operation of the laser irradiation unit 15, and a position recognition camera for recognizing a target electrode pad on the semiconductor wafer 1 and its application position from above. 16, the recognition camera controller 16a, the wafer stage controller 13a for controlling the operation of the XY moving stage 13 so as to place the target electrode pad on the semiconductor wafer 1 at the processing position, the laser controller 15a, the recognition camera controller 16a and the wafer. And a integrated controller 21 for integrally controlling the stage controller 13a.

  In the laser irradiation unit 15, an irradiation unit is arranged in the vicinity of the upper part of the insulation target electrode, and the laser irradiation timing is controlled by the integrated controller 21.

  When the electrode pad 3 of the semiconductor chip 2 illustrated in FIGS. 2 to 4 is insulated using the laser irradiation apparatus shown in FIG. 1, first, the target electrode pad 3 on the semiconductor wafer 1 is moved to the position recognition camera 16. The laser beam is irradiated to any electrode pad 3 in the target semiconductor chip 2 by an irradiation signal emitted from the integrated controller 21 after being positioned immediately below the laser irradiation unit 15. In the first embodiment, the surface of the selected electrode pad 3 is insulative by selecting the electrode pad 3 for power supply of the semiconductor chip 2 that has been determined as a defective product by the prior probe inspection and irradiating the laser. This is characterized in that an oxide film is formed. Thereafter, this step is repeated for the number of defective chips to be processed.

Next, the oxide film forming step in the first embodiment will be described with reference to FIG.
FIG. 5 is a diagram for explaining the oxide film forming step in the first embodiment.
As shown in FIG. 5, the surface of the solder bump 3a is heated by irradiating the solder bump 3a, which is the electrode pad 3 for power supply of the semiconductor chip 2 determined to be defective by the prior probe inspection, with laser. By combining with oxygen, an oxide film 7 of an insulating layer covering the surface of the solder bump 3a is formed.

  By irradiating the laser in this way, the semiconductor wafer 1 which is the semiconductor device of the first embodiment is formed with a plurality of semiconductor chips 2 determined to be non-defective or defective by the probe inspection, and the semiconductor chips determined to be defective. The insulating oxide film 7 is formed on the surface of at least the electrode pad 3 for supplying power or the solder bump 3a formed on the electrode pad 3 for supplying power.

  As described above, according to the semiconductor device and the manufacturing method of the semiconductor device in the first embodiment, by forming the oxide film 7 on the surface of the desired electrode by laser irradiation, the electrode can be easily formed regardless of the shape of the electrode. Can be selectively insulated, and it is possible to prevent defective characteristics of non-defective semiconductor chips and heat loss of the probe card.

  Further, since the laser heat source is not brought into contact with the insulating portion, no load is applied and no stress is generated on the electrode. Further, compared to the application method in which the application nozzle is brought into contact with the application site, the application mechanism can be increased in speed and lead time can be shortened because the vertical mechanism and the vertical operation are not required. Even when compared with the ink jet method, the speed can be increased in consideration of the liquid discharge time.

  In addition, since it is possible to irradiate a laser beam with a minute spot, the surface of the electrode can be locally oxidized, the insulation state is stable, and even a large number of electrodes can be reliably heat-treated.

  The laser preferably has an irradiation spot diameter of 60 μm or less. This is because the size of one side of an electrode of a consumer LSI or the like is generally assumed to be about 60 μm and can be insulated in a desired area. Since it is considered that the diameter will be reduced in the future, the insulating oxide film 7 can be more reliably formed by making the laser spot diameter smaller than the electrode size.

  Further, the laser output may be controlled in order to ensure an optimum insulating film thickness. By preventing the thickness of the insulating film from exceeding 10 μm, it does not hinder the connection of other bump electrodes that are simultaneously connected to non-defective elements. Further, in order to secure an optimum insulating film thickness and an insulating film forming region, the laser spot is made smaller than the electrode or the solder bump 3a, laser irradiation is performed in a plurality of times, and once in the center of the solder bump 3a. The laser irradiation may be performed multiple times from once to multiple times around the periphery or boundary of the solder bump 3a. Further, by increasing the laser output, the electrode itself can be burned out and insulated.

In the above description, the oxide film 7 is formed on the electrodes and the solder bumps 3a by laser irradiation. However, the oxide film 7 may be formed by other methods such as selectively applying an oxidizing agent.
In the above description, the oxide film 7 is formed only on the power supply electrode of the defective semiconductor chip. However, the present invention can also be applied to the case where other electrodes such as a signal electrode are insulated depending on the form of burn-in.
(Embodiment 2)
Next, a semiconductor device and a method for manufacturing the semiconductor device in the second embodiment will be described with reference to FIGS.

FIG. 6 is a diagram for explaining a method of manufacturing a semiconductor device in the second embodiment.
As shown in FIG. 6, the method of manufacturing a semiconductor device according to the second embodiment is a solder for supplying at least power to a semiconductor chip determined to be defective by the probe inspection before the burn-in after the probe inspection. The bump 3a is removed. That is, it is possible to insulate the electrodes by mechanically removing the solder bumps 3a by destroying the solder bumps 3a themselves by bringing the solder bumps 3a into contact with components for removing the bumps.

  This is because when the probe terminal connected to the solder bump is shorter than the height of the solder bump, the mechanically removed portion is removed deeper than the probe terminal, so that electrical insulation is possible without contact with the fracture surface. It becomes. For example, when the solder bump height is 100 μm and the probe terminal is connected deeply to 50 μm from the upper surface of the solder bump, the solder bump is removed by 50 μm or more to be electrically insulated.

  The merit of the mechanical removal method is that the use condition is only a simple setting such as the height of the removed part, temperature control to control the viscosity when using insulating resin, Operation is possible without setting complicated conditions such as setting to control the coating amount.

Further, when the solder bump 3a is not formed, the electrode pad 3 can be removed.
By removing the solder bumps 3a in this way, the semiconductor wafer 1 which is the semiconductor device of the second embodiment is formed with a plurality of semiconductor chips 2 that are determined to be non-defective or defective by the probe inspection, and are determined to be defective. The solder bumps 3a formed on at least the power supply electrode pads 3 of the semiconductor chip 2 are removed.

As described above, according to the semiconductor device and the manufacturing method of the semiconductor device in the second embodiment, it is possible to easily remove the electrode regardless of the shape of the electrode by removing the electrode pad 3 or the solder bump 3a of the desired electrode. It is possible to selectively insulate, and it is possible to prevent defective characteristics of non-defective semiconductor chips and heat loss of the probe card.
(Embodiment 3)
Next, a semiconductor device and a method for manufacturing the semiconductor device in the third embodiment will be described with reference to FIGS.

FIG. 7 is a diagram showing the configuration of the electrode pads of the semiconductor device according to the third embodiment.
As shown in FIG. 7, in the semiconductor device according to the first embodiment or the second embodiment, the electrode pad 3 may be divided into an inspection needle connection region 19 and a bump connection region 18. The inspection needle connection area 19 is an area where an inspection needle (probe needle) provided on a probe card interposed between the inspection needle and the inspection apparatus is connected. In the figure, 20 indicates an inspection needle trace of the inspection needle. The bump connection area 18 is an area to which the solder bump 3a is connected. As described above, the electrode pad 3 can be divided into the inspection needle connection region 19 and the bump connection region 18, and each inspection can be performed in each region.

  First, probe inspection is performed using a probe card on the semiconductor wafer 1 on which the semiconductor chip 2 in which the electrode pad 3 is divided into the inspection needle connection region 19 and the bump connection region 18 is formed. Thereafter, as shown in the first embodiment, the solder bump 3a or the electrode pad 3 formed on the electrode pad 3 of the semiconductor chip 2 determined to be defective by the probe inspection is insulated on the solder bump 3a or the electrode pad 3 An insulating oxide film is formed thereon. Alternatively, as shown in the second embodiment, the solder bump 3a or the electrode pad is removed. Even if the batch wafer burn-in is performed in this state, conduction of defective products to the semiconductor chip 2 is surely cut off, so that non-defective product characteristics and thermal loss of the probe card are prevented.

  Here, by forming the inspection needle connection area 19 in addition to the bump connection area 18, when reinspecting the defective semiconductor chip 2 with the inspection needle, the inspection needle connection area 19 of the electrode pad 3 is directly inspected. The needle can be connected for inspection.

  On the other hand, depending on the conventional method in which the resin is simply discharged, the resin spreads over the entire electrode pad 3 to form a film. Therefore, when re-inspecting with an inspection needle, it is necessary to penetrate the inspection needle through the coating, resulting in damage to the inspection needle itself, peeling of the coating, resulting in dust generation, The semiconductor chip 2 is adversely affected. In the semiconductor device according to the third embodiment, when it is necessary to re-inspect, the inspection needle does not hit the insulating film, the inspection needle can be prevented from being damaged, and the film peeling such as conventional resin film insulation can be performed. In addition, no dust is generated, and adverse effects on non-defective elements can be prevented.

  The present invention provides a method for manufacturing a semiconductor device that can easily selectively isolate electrodes regardless of the shape of the electrodes, and insulates specific electrodes of a plurality of semiconductor chips formed on a semiconductor wafer, and a method thereof. This is useful for manufactured semiconductor devices and the like.

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Semiconductor chip 3 Electrode pad 3a Solder bump (GND)
3b Solder bump (signal)
DESCRIPTION OF SYMBOLS 4 Circuit part 5 Resin 6 Resin 7 Oxide film 12 Wafer stage 13 XY movement stage 13a Wafer stage controller 14 Coating nozzle 15 Laser irradiation unit 15a Laser controller 16 Position recognition camera 16a Recognition camera controller 17 Inkjet coating nozzle 18 Bump electrode area 19 Inspection needle Connection area 20 Inspection needle track 21 Integrated controller

Claims (14)

Forming a plurality of semiconductor chips having a plurality of electrodes on a semiconductor wafer;
A step of performing pass / fail judgment of the semiconductor chip by probe inspection;
Forming an insulating oxide film on the surface of the predetermined electrode of the semiconductor chip determined to be defective by the probe inspection;
And a step of performing a batch burn-in test on the semiconductor wafer.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the electrode on which the oxide film is formed is a power supply electrode.   The method of manufacturing a semiconductor device according to claim 1, wherein the oxide film is formed by laser irradiation.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the thickness of the oxide film is adjusted by laser output.   The method for manufacturing a semiconductor device according to claim 3, wherein a spot diameter of the laser is smaller than a length of one side of the electrode.   6. The method of manufacturing a semiconductor device according to claim 3, wherein the laser irradiation with respect to one electrode is performed by a plurality of laser irradiations on a central portion of the electrode and a peripheral portion thereof.   The method of manufacturing a semiconductor device according to claim 1, wherein the electrode is a solder bump formed on an electrode pad. Forming a plurality of semiconductor chips comprising a plurality of electrode pads and solder bumps formed on the electrode pads on a semiconductor wafer;
A step of performing pass / fail judgment of the semiconductor chip by probe inspection;
Removing the predetermined solder bumps of the semiconductor chip determined to be defective by the probe inspection;
And a step of performing a batch burn-in test on the semiconductor wafer.   9. The method of manufacturing a semiconductor device according to claim 8, wherein the removed electrode is a power supply electrode. The electrode pad comprises an inspection needle connection region and a solder bump connection region,
10. The semiconductor device according to claim 7, wherein the solder bump is formed in the solder bump connection region, and the probe inspection is performed by probing the inspection needle connection region. Method. A semiconductor wafer;
Non-defective and defective semiconductor chips formed on the semiconductor wafer;
An electrode formed on the semiconductor chip;
A semiconductor device comprising: an insulating oxide film formed on a predetermined electrode formed on the defective semiconductor chip of the electrodes.   12. The semiconductor device according to claim 11, wherein the predetermined electrode is a power supply electrode.   The semiconductor device according to claim 11, wherein the electrode is a solder bump formed on an electrode pad. In the electrode pad,
Inspection needle connection area;
Solder bump connection area,
The semiconductor device according to claim 13, wherein the solder bump is formed in the solder bump connection region.

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