JP2010177604A - Semiconductor manufacturing method and manufacturing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology capable of surely preventing a bridge of an adjacent electrode (such as a solder bump) of a semiconductor chip, and stabilizing the height of the connection (mounting) of the semiconductor chip on a substrate regarding the technology for connecting the semiconductor chip with the substrate. <P>SOLUTION: In the semiconductor manufacturing device (thermocompression bonding device 1) which performs a connection process between the semiconductor chip and the substrate, one or more projections 5 are formed at parts except an area for holding the rear surface of the semiconductor chip 21 on a plane (d) of a heating tool 3 which holds the semiconductor chip 21 to perform heating pressurization. The connection (mounting) height of the semiconductor chip 21 on the substrate 23 is controlled by descending the heating tool 3 which holds the semiconductor chip 21 to the substrate 23 on a stage 2, and making the projections 5 contact with the substrate 23, and an electrode (solder bump 22) of the semiconductor chip 21 is connected to an electrode 25 of the substrate 23 by performing the heating pressurization. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, an electronic device, and the like, and more particularly to a method for connecting (mounting) a semiconductor chip and a substrate.

  With the downsizing and high functionality of electronic devices, the electronic components used are becoming smaller and more dense. For example, the structure of a conventional semiconductor package is a structure such as QFP (Quad Flat Package), SOP (Small Outline Package), TSOP (Thin Small Outline Package), that is, a resin in which a semiconductor chip is sealed using a lead frame. This is a structure in which a gull wing-shaped lead or the like is formed in two or four directions on the outside. This requires a very large area on the substrate (including the mounting area as a whole), including not only the semiconductor chip portion that controls the original function but also the area where the lead that is an electrode is connected to the substrate.

  Therefore, in order to reduce the mounting area on the substrate, a BGA (Ball Grid Array) in which an electrode is formed using a solder ball between the resin sealing the semiconductor chip and the substrate is often used. It has become to. More recently, CSP (Chip Size Package), which enables the size and mounting area of a semiconductor chip to be approximately the same, and WLP (Wafer Level Package), which is re-used on the active element surface of a semiconductor chip using lithography technology, etc. A semiconductor device having a structure in which electrodes are formed by performing wiring is also often used.

  In particular, in portable electronic devices, the occupied area and volume of electronic components are greatly restricted, so that not only one semiconductor chip but also a plurality of semiconductor chips are combined together to increase the density. Semiconductor devices such as structures and SiP (System in Package) structures are increasingly used.

  In these laminated structures, SiP structures, etc., there is an intermediate substrate generally called an interposer substrate, and a semiconductor chip is mounted (connected) with the active element surface facing up to the intermediate substrate, and Au wire or the like is mounted. The electrode of the semiconductor chip and the electrode of the intermediate substrate were connected by wire bonding.

  However, the connection method using wire bonding requires an area larger than the original area of the semiconductor chip when the area of the connection portion is included, so this structure is not very desirable for portable electronic devices that require downsizing. . Therefore, in order to further reduce the size of semiconductor devices, there are an increasing number of semiconductor devices by flip chip connection in which the active element surface of a semiconductor chip is mounted (connected) toward the substrate side to connect the electrodes.

  In this flip-chip connection method, the mounting area can be made smaller than in the wire bonding connection method. There are various structures of the connecting portion in this system. For example, there is a structure in which Au bumps are formed on the electrodes of the semiconductor chip by plating, wire bonding technology, etc., and connected to the solder layer formed on the electrodes of the substrate. Further, there is a structure in which the Au bump is directly connected to the electrode of the substrate by ultrasonic bonding or the like. In addition, there is a structure in which conductive fine particles are connected through a resin.

  In addition to this, solder bumps are formed on the active element surface electrodes of the semiconductor element by solder paste printing, solder ball mounting, plating, etc., and this is connected to the electrodes on the board, using a solder bump structure, etc. is there. This structure is sometimes referred to as a C4 connection.

  On the other hand, with respect to the above system, many thermocompression bonding apparatuses that perform heating and pressurization are commercially available under names such as flip chip bonders. This thermocompression bonding apparatus basically has a stage mechanism for holding a substrate and a heating tool mechanism for holding a semiconductor chip and performing heating and pressurization with a predetermined profile. The heating head (heating tool) and the stage are adjusted to be parallel. Then, the semiconductor chip is held on the flat portion at the tip of the heating head (heating tool), and the heating head (heating tool) is lowered toward the stage holding the substrate. Then, the electrode on the semiconductor chip side and the electrode on the substrate side are brought into contact with each other, and the two are connected by heating to a predetermined temperature and pressurizing to a predetermined pressure. At this time, the heating head (heating tool) is heated in accordance with a temperature profile set by pulse heat or constant heat. The stage holding the substrate can also be changed in temperature to improve connectivity. The semiconductor chip and the substrate are often held by vacuum suction. In that case, a vacuum suction hole is opened on the tip of the heating head or on the stage. Moreover, the load in the case of connection (contact) of both is controlled by the load meter (load cell). A mechanism for aligning the electrodes of the semiconductor chip and the electrodes of the substrate is also attached.

  The semiconductor device having the SiP structure is described in, for example, “All about SiP technology” industrial research group (Non-patent Document 1).

“All about SiP Technology” Industrial Research Committee, p188

  However, in order to increase the functionality, density, and height of a semiconductor device, it is required to reduce the pitch of the electrodes of the semiconductor chip, and both the Au bumps and the solder bumps become very small, making connection difficult. At the same time, the gap between the semiconductor chip and the substrate is narrowed. For this reason, it is difficult to uniformly inject the underfill material into the gap between the semiconductor chip and the substrate (intermediate substrate) after connecting the electrodes of the semiconductor chip and the substrate, and voids are easily generated. If a void exists in the underfill portion between the electrodes, a disconnection failure is likely to occur in a subsequent heating step such as a reflow process, and thermal fatigue reliability and insulation reliability during use are likely to decrease.

  For this reason, in order to inject the underfill material while suppressing the generation of voids, the gap between the semiconductor chip and the substrate (intermediate substrate) is connected accurately so that the gap is stable and suitable for mass production. There is a need to.

  In addition, the distance between the semiconductor chip and the substrate (intermediate substrate) is also important in the connection portion where no void is generated in the underfill portion. This is because the internal temperature rises when an electronic device is used, and stress is generated in the connection part due to the difference in the thermal expansion coefficient between the semiconductor chip and the substrate, but the mounting (connection) height of the semiconductor chip from the substrate is high. If they are different from each other, the magnitude of the stress generated in the connection portion changes, and the desired reliability may not be obtained. For example, when the mounting height is lowered, the stress on the connection portion increases, and reliability may not be ensured even in exactly the same use environment. Therefore, also from the viewpoint of ensuring the reliability of the connection portion, it is necessary to connect the semiconductor chip and the substrate (intermediate substrate) so that the interval between the semiconductor chip and the substrate (intermediate substrate) is stable and constant at the time of mass production.

  Further, regarding the above method, when an electrode using solder bumps was used, the semiconductor chip was conventionally thick, so that the semiconductor chip was mounted on the substrate and connected by heating through a reflow furnace. In this case, since the shape is finally determined by the surface tension of the solder, a certain level of mounting height uniformity can be secured. However, due to the demand for low profile, the semiconductor chip becomes thinner, and when heated by a reflow furnace, even if the solder bump melts, it cannot physically contact the substrate electrodes due to warping of the chip. Connection is getting difficult. In particular, a thin substrate such as an intermediate substrate or a chip is likely to warp.

  Therefore, there is a demand for a method of connecting a semiconductor chip having electrodes with the solder bumps by a heating and pressing method (flip chip connection method). In the solder bump heat-press connection, the problem of chip warpage can be solved by adsorption to a heating tool having a flat tip portion (a flat portion in contact with the chip). However, since the solder melts at a high temperature, there is a problem that the solder bumps are crushed by a load and a bridge (short) is generated between adjacent bumps.

  For this reason, it is necessary to prevent the bridge. As a countermeasure for that, for example, a thermocompression bonding apparatus having a special heating tool mechanism capable of accurately controlling a low load of 50 g or less is required.

  However, in the above apparatus, it is difficult to control the low-load region, and there may be variations in the solder height of the final connection portion. In addition, since a dedicated device is required, the cost increases.

  The present invention has been made in view of the problems as described above, and its main purpose is to connect a semiconductor chip or the like (element) in a semiconductor device that tends to be miniaturized (electrode miniaturization) and a substrate. In particular, it is possible to reliably prevent bridging of adjacent electrodes (bumps) in a semiconductor chip having electrodes such as solder bumps, and to stabilize the height of connection (mounting) of the semiconductor chip on the substrate (in other words, For example, it is possible to provide a technology capable of reducing the connection height variation and connecting with high accuracy.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows. In order to achieve the above object, a typical embodiment of the present invention is to connect a predetermined semiconductor device by connecting (mounting) an element such as a semiconductor chip having electrodes to a substrate by a heating and pressing method or the like. A technique such as a manufacturing method (semiconductor manufacturing method) and an apparatus thereof (semiconductor manufacturing apparatus) has the following configuration.

  Regarding the connection between the chip and the substrate and the heating and pressurizing method, the present inventor changes the load at the time of connection (contact) and heats, and at what load the bridge with the adjacent electrode (bump) is generated. I investigated. As a result, when the electrode is, for example, a Sn-Ag solder bump, the load should be about 50 g or less in order not to cause the bridge reliably, and the solder bump shape (number, pitch, bump size, etc.) It was found that accurate control in a very low load region such as 20 g or 10 g or less is necessary depending on the case. Accurate control in such a low load region is generally a technically difficult task.

  As a countermeasure, it is also conceivable to control the position (height) of the heating tool (heating head) instead of controlling it with a load so that the electrodes (solder bumps) do not bridge between adjacent ones. This is possible in principle, but in practice it is difficult to achieve a proper connection (mounting) height. That is, each member has a thickness variation, and in particular, since the ratio of the substrate thickness variation may be large, the electrodes (solder bumps) are very narrow and fine, and an appropriate gap range between the chip and the substrate. In the case where the distance is narrow, an appropriate connection (mounting) height cannot be achieved only by controlling the position of the heating tool (heating head).

  Therefore, in this embodiment, means for accurately controlling the height (position) of connection (mounting) between an element such as a semiconductor chip and the substrate, and control by a load at the time of connection (contact) between the element and the substrate ( In particular, as a means for accurate control in a low load region, the following configuration is provided. In particular, this embodiment can be applied to a structure using electrodes such as solder bumps in the heating and pressurization method and the flip chip connection method.

  In the present embodiment, in a semiconductor manufacturing method and its apparatus (particularly, a thermocompression bonding apparatus using a heating and pressing method) including a step of connecting an electrode (for example, a solder bump) of a semiconductor chip to an electrode of a substrate (for example, an intermediate substrate), To be realized. This manufacturing apparatus includes a heating tool (heating tool mechanism including a heating head) that performs adsorption holding and heating and pressing of a semiconductor chip, a stage mechanism that mounts and holds a substrate, and the like. The heating tool has a structure in which one or more protrusions are formed on a plane other than the chip holding area on the plane of the tip (chip holding side). As for the formation of the protrusion, a configuration in which the heating tool (heating head) and the protrusion are integrally formed in advance, a configuration in which individual components are connected and fixed, and the like are possible.

  In this apparatus and method, the back side of the chip is held in a flat portion (chip holding region) where there is no protrusion in the heating tool, and the substrate electrode held on the stage and the chip surface side electrode (for example, solder bump) )) Is aligned (by a camera or the like), and then the heating tool is lowered. At that time, it is possible to accurately control the connection height of the chip by contacting the upper surface on the substrate side by the protrusion. Then, after heating and connecting the electrode of a chip | tip and the electrode of a board | substrate, a heating tool is raised.

  In another embodiment, one or more spacers are mounted (arranged or formed) on the substrate at a position other than the chip connection region as a means instead of the protrusion. On the other hand, hold the back of the chip on the flat part of the heating tool, align the chip electrode with the substrate electrode, lower the heating tool until it contacts the spacer on the substrate, and heat and press Thus, the chip and the substrate are connected.

  The semiconductor manufacturing method and apparatus of this embodiment have the following configuration, for example. A semiconductor manufacturing apparatus has a stage that holds a substrate and a heating device that holds and heat-presses a semiconductor chip, and holds (vacuum suction) the back surface of the semiconductor chip on a flat surface (lower surface) of the heating device. The semiconductor chip holding region has one or more protrusions having a predetermined height at locations other than the semiconductor chip holding region, and the height (thickness) of the protrusion is the height of the semiconductor chip and its electrodes ( (Thickness). And in this manufacturing method, in the connection process which connects the electrode of a semiconductor chip to the electrode of a board | substrate using this semiconductor manufacturing apparatus, a board | substrate is hold | maintained on a stage and a semiconductor chip is set | placed on the semiconductor chip holding area | region of the plane of a heating apparatus. Holding the back surface (upper surface) of the semiconductor chip, aligning the electrode on the front surface (lower surface) of the semiconductor chip with the electrode on the upper surface of the substrate, and moving and heating in a direction perpendicular to the plane of the substrate and the semiconductor chip, including lowering of the heating device By controlling the pressurization, the height (position) of the connection between the semiconductor chip and the substrate is controlled by utilizing the fact that the protrusion contacts the substrate when the heating device is lowered, and the heating device is applied to the electrodes of the semiconductor chip. The semiconductor chip and the substrate are connected to each other by performing heating and pressurization.

  The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows. According to a typical embodiment of the present invention, the present invention relates to a technique for connecting a semiconductor chip or the like and a substrate in a semiconductor device that tends to be miniaturized (electrode miniaturization), and in particular, a semiconductor having electrodes by solder bumps or the like. The bridge of adjacent electrodes on the chip can be surely prevented, and the height of the connection (mounting) of the semiconductor chip on the substrate can be stabilized (in other words, the connection height can be reduced and the connection can be made accurately). Can do.

  In particular, in the case of a configuration in which the heating tool is provided with a protrusion, the heating tool stops descending when the protrusion comes into contact with the substrate (when the load reaches a predetermined value or more), and the connection height can be accurately controlled. Therefore, it is possible to connect the semiconductor chips at a constant and uniform height on the substrate.

  Further, in the case of a configuration in which a spacer is mounted on the substrate, the lowering of the heating tool is similarly stopped by this spacer, so that it is possible to connect the semiconductor chips at a constant and uniform height on the substrate.

  In particular, when the above method is used when the electrode of the semiconductor chip is a solder bump, the adjacent electrode can be used without using a thermocompression bonding apparatus (equipment) having a special heating tool capable of precisely controlling the low load range. It is possible to prevent bridging between (solder bumps). In addition, since the connection can be stably performed at the time of mass production with a constant connection height, the generation of voids can be prevented in the subsequent underfill injection process, and the reliability of the connection portion can be improved.

  In particular, in the manufacture of a semiconductor device such as SiP that requires low load control, it can be stably mass-produced with a constant connection height.

It is a figure which shows schematic structure (cross section) of the semiconductor manufacturing apparatus (thermocompression bonding apparatus) and manufacturing method which are one embodiment (Embodiment 1) of the present invention. It is a figure which shows the individual element in the semiconductor manufacturing apparatus (thermocompression bonding apparatus) which is one embodiment of this invention. 2 is a diagram illustrating a planar configuration of a semiconductor chip used in the first embodiment. FIG. 3 is a diagram illustrating a planar configuration of a substrate used in Embodiment 1. FIG. (A)-(d) is a figure which shows the connection process (apparatus state) of this semiconductor manufacturing method. It is a figure which shows the height (z) of the heating tool in the connection process of the semiconductor manufacturing method of Embodiment 1, temperature, and the relationship (control profile) of a load. 3 is a diagram showing a cross-sectional structure of a semiconductor device having a SiP structure which is a semiconductor device configured as a result of connection in the first embodiment. FIG. 6 is a diagram showing a modification of the heating tool (projection) in the first embodiment. FIG. It is a figure which shows the structure using a protection member as a modification in Embodiment 1. FIG. It is a figure which shows the example of the heating tool which has the processus | protrusion which reaches a stage as a modification in Embodiment 1. FIG. It is a figure which shows the example used for the connection to the board | substrate of Au bump as a modification in Embodiment 1. FIG. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure shown about the semiconductor manufacturing apparatus (thermocompression bonding apparatus) and manufacturing method which are one embodiment (Embodiment 2) of this invention, (a) is the structure (conventional) of the board | substrate sheet | seat containing a some board | substrate. (B) is a figure which shows the structure of the board | substrate sheet | seat applied in Embodiment 2. FIG. It is a figure which shows schematic structure (cross section) of the semiconductor manufacturing apparatus (thermocompression bonding apparatus) and manufacturing method which are one embodiment (Embodiment 3) of this invention. It is a figure which shows the modification (the 1) of the spacer in Embodiment 3. FIG. It is a figure which shows the modification (the 2) of the spacer in Embodiment 3. FIG. As a modified example of Embodiment 3, it is a figure which shows the schematic structure in the case of connecting a some semiconductor chip simultaneously in a semiconductor manufacturing apparatus (thermocompression bonding apparatus). As a modified example of Embodiment 3, it is a figure which shows the model structure in the case of providing a processus | protrusion instead of a spacer on a board | substrate in a semiconductor manufacturing apparatus (thermocompression bonding apparatus). As a modified example of Embodiment 3, it is a figure which shows the model structure in the case of providing the processus | protrusion by an underfill material on a board | substrate in a semiconductor manufacturing apparatus (thermocompression bonding apparatus).

  Hereinafter, embodiments (semiconductor manufacturing apparatus, semiconductor manufacturing method) of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
A semiconductor manufacturing apparatus (thermocompression bonding apparatus) and a semiconductor manufacturing method according to Embodiment 1 of the present invention will be described with reference to FIGS. In the first embodiment, a protrusion is formed on the heating tool (heating head) side.

<Overview>
FIG. 1 shows a schematic configuration of a thermocompression bonding apparatus 1 which is a semiconductor manufacturing apparatus according to an embodiment of the present invention. FIG. 1 is a cross section of the thermocompression bonding apparatus 1 as viewed from the side. For illustration, it has a horizontal plane direction (x, y) and a vertical direction (z).

  In FIG. 1, the thermocompression bonding apparatus 1 includes a stage 2 (stage mechanism) and a heating tool (heating tool mechanism including a heating head) 3. The state of the thermocompression bonding apparatus 1 in FIG. 1 is a state in which the substrate 23 and the semiconductor chip 21 to be connected are held. That is, the substrate 23 is placed and held on the stage 2 and the semiconductor chip 21 is held on the heating tool 3.

  FIG. 2 individually shows each element relating to the thermocompression bonding apparatus 1 and the connection target (substrate 23, semiconductor chip 21) of FIG. 1 for explanation.

  The substrate 23 has a solder resist 24 and electrodes 25 formed on the upper surface (indicated by c).

  The semiconductor chip 21 is provided with solder bumps 22 (electrodes by solder bumps) on the lower surface (indicated by a) which is the active element surface (front surface) (referred to as a semiconductor chip 20 in a state where the solder bumps 22 are formed). The upper surface (indicated by b), which is the back surface, is flat and is held in a region (semiconductor chip holding region 8) on the heating tool 3 side.

  The heating tool 3 includes a main body 7 and a protrusion 5. The main body 7 is a rigid body and has a rectangular cross section. The main body 7 is provided with a vacuum suction hole 6 for holding the semiconductor chip 21 in the center. The hole 6 has a diameter of 1 mm at the center of the plane. The lower surface (indicated by d) of the tip of the heating tool 3 (main body 7) is the semiconductor chip 21 holding side. The lower surface (d) of the heating tool 3 (main body 7) includes a planar portion (semiconductor chip holding region) 8 that can hold the semiconductor chip 21 (the upper surface b) corresponding to the position of the hole 6. .

  Further, the projection 5 is formed at a location (projection formation region 9) different from the semiconductor chip holding region 8 with respect to the plane (d) of the heating tool 3 (main body 7). The protrusion 5 which is this feature has a predetermined height h, and the height h is slightly larger than the height of the semiconductor chip 21.

  As a shape of the heating tool 3, the semiconductor chip holding region 8 in the flat surface (d) at the tip is a 15 mm square. The protrusions 5 are formed in a prismatic shape having a 2 mm square and a height h of 0.45 mm in the protrusion forming regions 9 at the four corners of the plane (d).

  The material of the heating tool 3 (main body 7) is ceramic, and was manufactured by processing the main body 7 so as to leave the portion of the protrusion 5 when the heating tool 3 was manufactured. In addition, although formation of the protrusion 5 was made into the form integrated with the main body 7, it is good also as a form which connects an individual component in the form like FIG.

<Semiconductor chip>
A method for connecting the semiconductor chip 21 and the substrate 23 using the thermocompression bonding apparatus 1 (heating tool 3) of the present embodiment will be described below in order.

  First, FIG. 3 shows the shape of the semiconductor chip 21 used in the present embodiment (and connection experiment) in the horizontal plane direction (xy). In the plane (a) on the active element surface side of the semiconductor chip 21, the solder bumps 22 are shown. The size of the semiconductor chip 21 is 8.5 mm square, and the thickness of Si is 0.4 mm. On the active element surface of the semiconductor chip 21, solder bumps 22 are formed in six rows near the outer periphery.

  The composition of the solder bumps 22 is Sn-Ag lead-free solder. The height of the solder bumps 22 is about 100 μm, and the pitch of the solder bumps 22 is 260 μm. The solder bumps 22 were formed by printing Sn-Ag solder paste using a metal mask, reflow heating, and washing.

<Board>
In FIG. 4, the shape in the horizontal plane direction (xy) of the substrate 23 to be connected corresponding to the semiconductor chip 21 is shown. The shape of the substrate 23 is 15 mm square and the thickness is 1 mm. The material of the substrate 23 is a glass epoxy base material, and the electrode 25 part is opened by a solder resist 24 on the surface. The electrode 25 is made of Ni on Cu and Au plated thereon.

  On the upper surface (c) of the substrate 23 (solder resist 24), there is a substantially planar portion (semiconductor chip connection region) 26 to which the semiconductor chip 21 is connected (mounted). An electrode 27 for wire bonding is disposed outside the semiconductor chip connection region 26. The wire bonding electrodes 27 are disposed, for example, in the vicinity of the outer periphery of the substrate 23, in the vicinity of the four sides excluding the four corner regions (projection contact regions 28) of the substrate 23 in FIG.

  In the present embodiment (FIG. 4), projection contact areas 28 indicated by broken lines are provided at the four corners of the substrate 23. The protrusion contact region 28 is a portion (a part of the solder resist 24) where the protrusion 5 of the heating tool 3 comes into contact during connection.

<Connection process>
Next, a connection process (thermocompression process) in the semiconductor manufacturing method of the present embodiment will be described with reference to FIG. The profiles in FIGS. 5 and 6 correspond to each other.

  First, FIG. 5A shows a state before the heating tool 3 holding the semiconductor chip 21 is lowered with respect to the substrate 23 placed and held on the stage 2 of the thermocompression bonding apparatus 1. The semiconductor chip 21 was fixed to the semiconductor chip holding region 8 of the heating tool 3 by vacuum suction. As shown by e, the position (height in the z-axis direction) of the tip of the solder bump 22 of the held semiconductor chip 21 is slightly below the position (height) of the tip of the protrusion 5 shown by f.

  The substrate 23, the semiconductor chip 21, and the heating tool 3 are aligned and arranged in the horizontal plane direction (x, y). In the vertical direction (z) which is the height direction, characteristic connection control is performed.

  Next, FIG. 5B shows a state in which the tip of the solder bump 22 of the semiconductor chip 21 is in contact with the electrode 25 on the substrate 23 side after descending from FIG. At this time, as indicated by f, the position of the tip of the protrusion 5 does not reach the upper surface (c) of the substrate 23 (the solder resist 24, the protrusion contact area 28).

  Next, FIG. 5C is slightly lowered from FIG. 5B, the solder bump 22 is crushed, and the tip (f) of the protrusion 5 is the upper surface (c) of the substrate 23 (solder resist 24, protrusion It is in a state of contact with the contact area 28). In this state, the electrodes (22, 25) are connected by heat treatment of the solder bumps 22.

  Finally, FIG.5 (d) is the state which raised the heating tool 3 after the connection of FIG.5 (c). On the stage 2, the semiconductor device 30 has a shape after the substrate 23 and the semiconductor chip 21 are connected.

  5A, when the semiconductor chip 21 (the semiconductor chip 20 with the solder bumps 22 attached) is held (vacuum suction) with respect to the heating tool 3, the semiconductor chips 21 are arranged in a chip tray placed at a predetermined position. The back surface (upper surface b) of the semiconductor chip 21 was adsorbed from the chip tray to the semiconductor chip holding region 8 on the flat surface (d) at the tip of the heating tool 3.

  The electrodes of the solder bumps 22 of the semiconductor chip 21 and the electrodes 25 of the substrate 23 on the stage 2 are aligned by a camera and marks, and the heating tool 3 is lowered.

<Control profile>
FIG. 6 shows the relationship (control profile) between the movement (height) of the heating tool 3 in the z-axis direction during the control (process) of the main connection, the load, the temperature, and the like. The horizontal axis is time (t1 etc. is time). On the vertical axis, the “height (z)” line (601) is the movement (height, position) in the z-axis direction of the heating tool 3 (and its protrusion 5 and the held semiconductor chip 20). The “temperature” line (602) is the temperature of the heating tool 3. A “load” line (603) is a load detected by the heating tool 3 by contact with the substrate 23 or the like.

  In the line (601) of the height (z), (1) indicates the lowering (t1 to t3) of the heating tool 3, (2) indicates the time point (t2) of contact of the solder bump 22, and (3 ) Indicates the point of time (t3) at which the protrusion 5 contacts. (4) is a constant height state (t3 to t9). (5) shows the rise of the heating tool 3 (after t9).

  In the temperature line (602), a indicates the heating start time (t4). b shows the time (t5) at which the maximum temperature is reached. c indicates the time point (t7) at which the temperature starts to decrease.

  In the load line (603), A indicates the time point (t2) at which the load increase starts. This corresponds to the point of contact of the solder bump 22 in (2). B shows the time (t3) at which the load suddenly increases. This corresponds to the point of contact of the protrusion 5 in (3). Here, heating is started as in a. C shows a state in which the load decreases due to melting of the solder bumps 22 (after t6).

<Connection control (1)>
The heating tool 3 descends from the state of FIG. 5A, and the tip (e) of the solder bump 22 contacts the electrode 25 of the substrate 23 (t2) as shown in FIG. 5B. By this contact, an increase in load is detected by a load cell (load cell) attached to the upper part of the heating tool 3. This load cell is a known technique.

  However, the change in the load is very small because the solder bumps 22 (individual bumps) are small, the solder material is generally soft, and the height of the solder bumps 22 varies. It is difficult to accurately detect the point where contact has begun.

  Furthermore, when the heating tool 3 is lowered as it is from the state of FIG. 5B, the load gradually increases and is formed on the flat surface (d) at the tip of the heating tool 3 as shown in FIG. 5C. The protrusion 5 contacts the solder resist 24 (protrusion contact area 9) on the surface of the substrate 23 (t3).

  Then, as shown in B and (3) of FIG. 6, the load increases significantly, and at the same time, the heating tool 3 stops descending, and the position of the heating tool 3 is fixed.

  At this point, the solder bump 22 contacts the electrode 25 of the substrate 23 and is slightly deformed in a solid state.

  Next, heat is applied at the position of the heating tool 3 according to a preset temperature profile such as the line (602) in FIG. 6 (a, b). Then, the solder bump 22 is melted (C), the repulsive force from the solder bump 22 disappears, and the solder bump 22 is connected to the electrode 25 of the substrate 23.

  Even when the solder bumps 22 are melted, the height of the semiconductor chip 21 does not change because the protrusions 5 are formed on the flat surface (d) of the tip of the heating tool 3. Therefore, the solder bumps 22 are not crushed, and no bridging between adjacent solder bumps 22 occurs.

  Thereafter, when the supply of heat to the heating tool 3 is stopped, the temperature of the heating tool 3 and the temperature of the semiconductor chip 21 are lowered (t7), and the solder bumps 22 are solidified.

  Thereafter, the vacuum suction of the heating tool 3 is released, and the heating tool 3 is raised as shown in FIG. 5D (t9).

  The solder bumps 22 that are electrodes of the semiconductor chip 21 are connected to the electrodes 25 of the substrate 23 by the control process as described above.

  As a temperature profile used in the control method of this connection, the heating tool 3 is held at 280 ° C. for 8 seconds (t5 to t7), and then forcibly cooled for 10 seconds. Moreover, as a load, it set so that a load could be applied to 150g (t3-t6).

<Connection control (2)>
Further, as a pretreatment for connection, Ar plasma treatment was performed. Ar plasma treatment can remove the surface oxide film to some extent, so improvement in connectivity can be expected. Like Ar ion sputtering, attaching these pretreatment mechanisms to the thermocompression bonding equipment is very effective for quality improvement. is there.

  In addition, a pretreatment method using flux was also examined. Specifically, the flux was supplied to the solder bumps 22 of the semiconductor chip 21 by transfer. As the flux, a rosin flux having good transferability to the solder bumps 22 was used, and the flux was supplied on a SUS plate with a metal squeegee 2 to a thickness of 30 μm. Thereafter, the surface (a) of the semiconductor chip 21 on which the solder bumps 22 are formed is immersed in the flux surface until it contacts the SUS plate, and the flux is transferred to the tips of the solder bumps 22. The transfer of the flux is performed in the thermocompression bonding apparatus 1, and the semiconductor chip 21 in a state where the flux is transferred to the tip of the solder bump 22 is provided with a reversing mechanism of the semiconductor chip 21, thereby providing a flat surface at the tip of the heating tool 3. It was able to be vacuum-sucked in the region (8) of (d).

<Connection control (3)>
As shown in FIG. 5D, the shape of the semiconductor device 30 after the connection between the substrate 23 and the semiconductor chip 21 is approximately 0 to the upper surface (b) of the semiconductor chip 21 on the substrate 23. .45 mm.

  In the thermocompression bonding process, the solder resist 24 (protrusion) on the upper surface of the substrate 23 is brought into contact with the protrusion 5 of the heating tool 3 and the upper surface (c) of the substrate 23 in the arrangement relationship as shown in FIGS. There was no problem because no particularly large damage was observed in the contact area 28).

  Further, with respect to the connection portion (semiconductor chip connection region 26) between the substrate 23 and the semiconductor chip 21, no bridge between adjacent solder bumps 22 is observed from X-ray observation, and the solder bump 22 is surely confirmed from cross-sectional observation. It was confirmed that the electrode was connected to the electrode 25 of the substrate 23.

  As described above, the connection between the semiconductor chip 21 and the substrate 23 was performed using the protrusion 5 of the heating tool 3. However, for example, in connection of 30 chips, there was almost no variation in the connection height.

  In addition, as a profile at the time of connection, the heating tool 3 is lowered and stopped at the position where the protrusion 5 contacts and heated (t4), and then the heating tool 3 is raised (t9). In order to reliably wet the uneven solder bumps 22 to the electrodes 25 of the substrate 23, the following may be performed. That is, the height of the protrusion 5 is reduced to, for example, 0.43 mm, the solder bump 22 is brought into contact with the electrode 25 of the substrate 23, the solder bump 22 is greatly deformed, heated, and sufficiently melted. You may cool, after pulling up the heating tool 3 to the final target connection height, for example, the position of 0.46 mm from the board | substrate 23 upper surface (c). This is because if the final height of the solder (22) is high, the stress due to the difference in thermal expansion between the semiconductor chip 21 and the substrate 23 is reduced.

<Laminated SiP Structure Semiconductor Device>
FIG. 7 shows a semiconductor device 36 (including the semiconductor device 30) having a stacked SiP structure. After the flux residue was washed in the above process, as shown in FIG. 7, an underfill 31 was injected between the electrodes of the substrate 23 and the semiconductor chip (first semiconductor chip) 21 and cured. The presence or absence of voids was examined using an ultrasonic flaw detector, but almost no voids were found in the underfill 31 material between the electrodes.

  Furthermore, after this, there are various steps such as lamination of another semiconductor chip (second semiconductor chip) 32, connection by wire bonding 33, resin sealing (resin) 34, connection of back surface solder bump 35, and the like. Also in these steps, no problem occurred in the connection portion between the semiconductor chip 21 and the substrate 23, and the stacked SiP structure semiconductor device 36 shown in FIG. 7 could be assembled. The stacked SiP structure is a known technique.

  As described above, in the connection between the substrate 23 and the semiconductor chip 21 by the thermocompression bonding apparatus 1 and the manufacturing method of the present embodiment, the protrusion 5 is formed on a part of the flat surface (d) at the tip of the heating tool 3. Normally (conventional), even in the case of solder bumps with a narrow pitch that may bridge with a load of about 50 g or less, stable connection without causing bridging with a load that is easy to control of about 100 g or more Is possible. Further, it is possible to realize a connection with uniform surface and no height variation while preventing bridging between solder bumps.

  The thermocompression bonding apparatus 1 and the manufacturing method of the present embodiment are not limited to the above-described forms, and various forms are possible corresponding to the forms of the substrate 23 and the semiconductor chip 21. Various modifications are shown below.

<Modification (1)>
For example, the formation of the protrusion 5 on the heating tool 3 can be as follows. First, as shown in FIG. 4, with respect to one semiconductor chip connection region 26, the four protrusions 5 (projection contact regions 28) at the four corners are not limited, and at least one position and number are effective. . For example, one, two, three protrusions 5 or a large number of protrusions 5 can be used.

  In addition to the prism, the shape of the protrusion 5 may be a columnar shape, a rod shape, a pyramid shape, a conical shape, a spherical shape, or the like. There is no problem if the height (h) of the projection 5 at the center line in the z direction of the projection 5 is appropriately designed.

  Further, the protrusion 5 may have a shape in which the edge portion is chamfered. In that case, it is possible to reduce or prevent damage to the substrate 21 (projection contact region 28) when the substrate 23 and the semiconductor chip 21 do not contact each other in parallel at the time of connection. The chamfering may have any shape as long as the center height (h) of the protrusion 5 is a predetermined height.

<Modification (2)>
Further, as shown in FIG. 8, as another modification, a frame-shaped protrusion 41 higher than the main plane is formed on the entire periphery on the lower surface (d) side of the heating tool 3, thereby forming the above-described form. Similarly, the height can be controlled. Further, the frame-shaped protrusion 41 is not limited to a shape having all four sides, and may have a shape including one side, two sides, or three sides.

<Modification (3)>
As another modification, as shown in FIG. 9, a portion (semiconductor) on which a semiconductor chip 21 is mounted on a substrate 23 to protect the electrode 27 (pad) for wire bonding, the solder resist 24, etc. A protective member (buffer member) 42 may be provided on at least a portion (projection contact region 28) with which the protrusion 5 is in contact with other than the chip connection region 26). As the protection member 42, a high heat-resistant film or sheet, a thin metal plate, or the like is used. In this embodiment, the protection member 42 is placed so as to cover the projection contact area 28 on the upper surface (c) of the substrate 23, and the projection 5 of the heating tool 3 is brought into contact therewith. In this case, it is necessary to design the thickness of the protection member 42 and the height (h) of the protrusion 5 together. When a thin metal plate is used as the protective member 42, the load from the protrusion 5 can be dispersed over a large area of the substrate 23, and damage to the substrate 23 can be reduced or prevented.

<Modification (4)>
Moreover, in the said embodiment, although it controlled by making the processus | protrusion 5 of the heating tool 3 contact the surface (c) of the board | substrate 23, in the case of the board | substrate which is easy to generate | occur | produce the damage by a heat | fever, and for surrounding wire bonding In the case where there is not much space on the substrate 23 (protrusion abutment region 28) where the protrusion 5 can be contacted due to the arrangement of the electrode 27 and the like, as shown in FIG. is there.

  In the configuration of FIG. 10, the heating tool 3 is made larger in the lateral direction (x, y) than the size of FIG. 1 and the like, and the protrusion 5 is a height including the thickness of the substrate 23 like the main protrusion 43. This is the configuration designed in (h ′). As a result, it is possible to control the connection height by bringing the projections 43 into contact with the stage 2 around the substrate 23 as described above. In this case, in addition to the variation in the thickness of the semiconductor chip 21, the variation in the thickness of the substrate 23 is added, so that it may be difficult to set the height of the protrusion 43.

  As another modification, the formation (arrangement) of the protrusions 5 is not performed from the lower plane (d) of the heating tool 3 (main body 7) but to the lateral surface of the heating tool 3 (main body 7). It is good also as a form to form (arrange). In this case, it can be set as the structure which does not heat so much with respect to the processus | protrusion 5. FIG.

<Modification (5)>
Further, the heating tool 3 having the protrusions 5 can be applied to various connection part structures other than the connection part of the semiconductor chip 20 having the solder bumps 22 (electrodes) to the electrodes 25 of the substrate 23. .

  For example, as shown in FIG. 11, the present invention can also be applied to the case where the semiconductor chip 21 on which the Au bumps 51 are formed is connected to the substrate 23 on which the thin solder layer 52 is formed by thermocompression bonding. Also in this case, the solder bridge between the adjacent electrodes due to the thin solder layer 52 can be prevented and the connection height is constant, so that the underfill material can be uniformly injected and the generation of voids can be suppressed. .

  Further, the substrate 23 is not limited to an organic substrate, but can be applied to connection to a Si substrate or a Si chip. In addition, the present invention can also be applied to a case where conductive particles are sandwiched between electrodes without using solder, such as ACF connection.

  In addition to the connection method by thermocompression bonding, it can also be used for mounting BGA parts. Also, local heating is effective when it is not desired to heat other substrate portions.

(Embodiment 2)
Next, the semiconductor manufacturing apparatus and method according to the second embodiment of the present invention will be described with reference to FIG. In FIG. 12, an example in which a semiconductor chip having an outer shape of 10 mm square, a thickness of 0.12, and solder bumps having a pitch of 150 μm as electrodes is connected to a predetermined substrate (substrate sheet 61, substrate piece 62). Indicates. FIG. 12A shows an arrangement example of a plurality of conventional substrates, and FIG. 12B shows an arrangement of a plurality of substrates in the second embodiment.

  The substrate (substrate piece 62) corresponding to the semiconductor chip is 15 mm square and 0.4 mm thick. As shown in FIG. 12A, the substrate sheet 61 has the 15 mm square. The substrate pieces 62 are arranged side by side and are finally separated.

  There is an electrode portion for PoP (Package on Package) near the outer periphery of the rectangle (position similar to FIG. 4) in the 15 mm square substrate piece 62 to which the semiconductor chip is connected. In order to avoid the contact of the protrusion 5 of the heating tool 3 with the electrode part, in the second embodiment, the arrangement of the substrate sheet 61 is changed as shown in FIG. That is, the space 63 was provided between the 15 mm square substrate pieces 62 by separating the vertical rows in the horizontal direction.

  As the heating tool 3, a protrusion 5 having a height of 0.15 mm and a length of 8 mm is provided in a space on the left and right sides. That is, it is a linear protrusion 5 that is long in the horizontal plane direction (y). For example, when a semiconductor chip is connected to the substrate piece 64 in FIG. 12B, the protrusion 5 of the heating tool 3 comes into contact with the left and right space 63 portions (protrusion abutment region 65). I was able to control it.

  In this case, the load of the thermocompression bonding apparatus 1 was set to 200 g, the heating was performed at 300 ° C. for 7 seconds, and the connection could be made without variation in the load height. Further, there was no problem in the subsequent underfill injection properties.

(Embodiment 3)
Next, the semiconductor manufacturing apparatus and method according to the third embodiment of the present invention will be described with reference to FIG. In the third embodiment, a spacer 71 is provided as an alternative means on the substrate 23 side, not on the protrusion 5 on the heating tool 3 side.

  In FIG. 13, the schematic configuration of the connection method of the third embodiment is shown in the same manner as in FIG. In this method, a spacer 71 is arranged around a portion (semiconductor chip connection region 26) where the semiconductor chip 21 is mounted on the substrate 23, and a heating tool 72 having a flat tip (lower plane d) is used.

  The shape of the semiconductor chip 21 used in the present embodiment is 10 mm square, the thickness of Si is 0.1 mm, and five rows of solder bumps 22 are formed near the outer periphery of the active element surface. The composition of the solder bumps is Sn-Ag lead-free solder, and the pitch of the solder bumps is 100 μm. Solder bumps were created by plating.

  The substrate 23 corresponding to the connection of the semiconductor chip 21 is 15 mm square, but is supplied in the shape of the substrate sheet as shown in FIG. 12 and is cut off in the final process. The substrate 23 has a thickness of 0.4 mm, and an electrode 25 portion is opened by a solder resist 24 on a wiring made of Cu. An electrode (27) for PoP connection is arranged around the portion to which the semiconductor chip is connected (semiconductor chip connection region 26).

  The shape of the heating tool 72 used for the connection is 18 mm square, and the material is ceramic. A vacuum suction hole 6 having a diameter of 1 mm is provided in the center.

  The shape of the spacer 71 is a disk having a diameter of 3 mm and a thickness of 0.13 mm, and the material is SUS (stainless steel). The spacers 71 are arranged one by one in the two diagonal directions in the substrate 23.

  The pretreatment and heating conditions were such that after the surface of the solder bump 22 of the semiconductor chip 21 was subjected to Ar plasma cleaning, the flux was transferred. The flux is a rosin-based flux. The solder bump 22 surface of the semiconductor chip 21 was pressed against the flux and transferred to the tip of the solder bump 22 with a squeegee having a thickness of 10 μm. The semiconductor chip 21 to which this flux was transferred was vacuum-adsorbed to the flat surface (d) (semiconductor chip holding region 8) of the tip of the heating tool 72, while the spacer 71 was disposed at a predetermined position on the substrate 23.

  The electrodes of the substrate 23 and the semiconductor chip 21 are aligned, and the heating tool 72 is lowered. Then, the spacer 71 (the upper surface thereof) comes into contact with a part of the flat surface (d) at the tip of the heating tool 72 (spacer contact region 76). When the load at that time reached 200 g, the lowering of the heating tool 72 was stopped. At this position, heating was performed at 320 ° C. for 5 seconds, and then forced cooling was performed for 5 seconds. Then, vacuum suction was released and the heating tool 72 was raised.

  As a result, even if the solder bumps 22 are crushed, they can be connected without bridging adjacent solder bumps, and there is almost no variation in connection height even among a plurality of connection samples. In addition, the underfill injection property after cleaning was also good.

  Further, the shape of the spacer 71 used in the present embodiment is not limited to the above, and there are various applications. In addition to the disk shape, for example, a prism, a cylinder, a sphere, and the like are possible. Alternatively, spacers of various thicknesses are prepared and used in combination, so that various products can be supported.

  Further, as a modified example of the spacer 71, a shape surrounding the periphery of the semiconductor chip 21 (a frame shape, for example, a 15 mm square and a 12 mm inner portion is a hole and a thickness is 0.13 mm as a spacer 73 shown in FIG. ).

  Further, in order to simplify the process of arranging the spacer 71 (73) each time for connecting one semiconductor chip 21, as in the case of the spacer 74 shown in FIG. Efficiency may be improved by using a mesh-shaped spacer 74 manufactured by the above method.

  Furthermore, in the third embodiment, the semiconductor chip 21 is connected to the substrate 23 one by one, but the form as shown in FIG. 16 may be used. That is, only alignment and arrangement of the substrate 23 with the electrodes are performed on the plurality of semiconductor chips 21, and then the spacer 71 is arranged around each semiconductor chip 21 (region between adjacent areas). The semiconductor chip 21 is pressurized and heated using a large thermocompression bonding tool 75 capable of simultaneously heating and pressing, and the height control is simultaneously performed by the spacer 71.

  As another modification, as shown in FIG. 17, as a configuration of the substrate 23, a protrusion (protrusion 81) that can serve as a spacer is formed on the substrate 23 using a resin or the like, and the position of the heating tool 3 (72). Control may be possible.

  As the protrusions 81 on the substrate 23, for example, the height of the heating tool 3 is controlled by forming the protrusions 81 with two layers of the solder resist 24.

  As another modification, as shown in FIG. 18, the underfill material is printed in the vicinity of the center of the semiconductor chip connection region 26 on the substrate 23 so as to have a certain thickness, as shown in FIG. A form formed by curing or the like, or a form in which a film-like resin material is already determined may be used. Thereby, the protrusion 82 made of the underfill material serves as a spacer and is effective for positioning the heating tool 3.

  Moreover, about each form mentioned above, it is possible similarly as a form which has the protrusion 5 also in the heating tool 3 side. That is, a part to be the protrusion 5 or the spacer 71 is provided in a pair at corresponding positions on both the heating tool 3 side and the substrate 23 side, and the height of the state in which both parts of the pair are brought into contact with each other is set. It is a form with a predetermined height.

(Embodiment 4)
Next, a fourth embodiment will be described. In the above-described embodiment, the method of providing the protrusion 5 on the tip plane (d) of the heating tool 3 or the method of mounting the spacer 71 on the substrate 23 has been described. As another embodiment 4, these (protrusions 5, spacers 71) can be used supplementarily.

  In other words, the heating tool 3 for low load control is used to control the movement of the semiconductor chip 21 when it is connected. In practice, however, it is generally very difficult to control the load as described above. Therefore, when the heating tool 3 cannot detect the contact point of the electrode and is lowered too much, an auxiliary component (role of a stopper) is used to stop the heating tool 3 from being lowered by the protrusion 5 or the spacer 71. ).

  As described above, in each embodiment, by using the protrusion 5 on the heating tool 3 side, the spacer 71 on the substrate 23, or the like, it is possible to stably connect without variation in height. A semiconductor device can be connected with a high yield, a stable resin injection property can be ensured, and a highly reliable connection portion can be formed.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention can be used for manufacturing various semiconductor devices.

  DESCRIPTION OF SYMBOLS 1 ... Thermocompression bonding apparatus, 2 ... Stage, 3 ... Heating tool, 5 ... Projection, 6 ... Hole, 7 ... Main body, 8 ... Semiconductor chip holding area, 9 ... Projection formation area, 20, 21 ... Semiconductor chip, 22 ... Solder Bump, 23 ... substrate, 24 ... solder resist, 25 ... electrode, 26 ... semiconductor chip connection (mounting) area, 27 ... electrode for wire bonding, 28 ... projection contact area, 30 ... semiconductor device, 31 ... underfill, 32 ... Second semiconductor chip, 33 ... Wire bonding, 34 ... Resin sealing (resin), 35 ... Backside solder bump, 36 ... Semiconductor device of stacked SiP structure, 41 ... Protrusion, 42 ... Protective member, 43 ... Projection, 51 ... Au bump, 52 ... Thin solder layer, 61 ... Substrate sheet, 62,64 ... Substrate (substrate piece), 63 ... Space, 65 ... Protrusion contact area, 71 ... Spacer, 72 ... Thermal tools, 73 ... spacer 74 ... spacer 75 ... thermocompression bonding tool, 76 ... spacer contact region, 81 ... projection, 82 ... projection.

Claims (11)

A semiconductor manufacturing method for connecting a semiconductor chip having an electrode to a substrate having an electrode using a semiconductor manufacturing apparatus,
The semiconductor manufacturing apparatus includes a stage for holding the substrate and a heating device for holding and heating and pressing the semiconductor chip, and a semiconductor chip holding region for holding the semiconductor chip is provided on a plane of the heating device. And at least one protrusion having a predetermined height is formed at a place other than the semiconductor chip holding region, and the height of the protrusion is designed according to the height of the semiconductor chip and its electrode. And
In the connecting step of connecting the electrode of the semiconductor chip to the electrode of the substrate using the semiconductor manufacturing apparatus,
Holding the substrate on the stage;
Holding the semiconductor chip in the semiconductor chip holding region in the plane of the heating device;
Aligning the electrodes of the semiconductor chip and the electrodes of the substrate;
Controlling movement including lowering of the heating device in a direction perpendicular to a plane of the substrate and the semiconductor chip, and utilizing the fact that the protrusion contacts the substrate when the heating device is lowered The height of the connection with the substrate is controlled, and the heating and pressurization is controlled for the portion including the electrode of the semiconductor chip, thereby connecting the electrode of the semiconductor chip to the electrode of the substrate. Semiconductor manufacturing method. The semiconductor manufacturing method according to claim 1,
In the connecting step, the heating device is lowered while holding the semiconductor chip, is lowered until the protrusion comes into contact with a region of the upper surface of the substrate, and the semiconductor chip is heated and pressed in the stopped state. After connecting the electrode of this and the electrode of the said board | substrate, it raises in the state which released | separated the said semiconductor chip, The semiconductor manufacturing method characterized by the above-mentioned. The semiconductor manufacturing method according to claim 1,
A method of manufacturing a semiconductor, comprising: when the heating device is lowered until the protrusion comes into contact with the upper surface of the substrate, the heating device is stopped when a load at the time of the contact becomes a predetermined value or more. The semiconductor manufacturing method according to claim 1,
The semiconductor manufacturing method, wherein the electrodes of the semiconductor chip are electrodes formed by solder bumps attached to the surface of the semiconductor chip at a predetermined pitch corresponding to the electrodes of the substrate. The semiconductor manufacturing method according to claim 1,
The protrusion of the heating device is formed in a line shape or a frame shape having at least one side around the semiconductor chip holding region. The semiconductor manufacturing method according to claim 1,
A protective member is placed on the upper surface of the substrate so as to include a region where the protrusion of the heating device comes into contact,
The semiconductor manufacturing method, wherein the height of the protrusion is designed to be smaller by the thickness of the protective member. The semiconductor manufacturing method according to claim 1,
The projection of the heating device is formed at a location outside the region of the substrate on the stage, and the height of the projection is designed in accordance with the height of the substrate, In this case, the height of the connection between the semiconductor chip and the substrate is controlled by utilizing the contact of the protrusion with the stage when the heating device is lowered. A semiconductor manufacturing method for connecting a semiconductor chip having an electrode to a substrate having an electrode using a semiconductor manufacturing apparatus,
The semiconductor manufacturing apparatus includes a stage for holding the substrate and a heating device for holding and heating and pressing the semiconductor chip, and a semiconductor chip holding region for holding the semiconductor chip is provided on a plane of the heating device. Have
One or more spacers having a predetermined height are arranged in places other than the semiconductor chip connection region for connecting the semiconductor chip in the plane of the substrate,
The height of the spacer is designed according to the height of the semiconductor chip and its electrodes,
In the connecting step of connecting the electrode of the semiconductor chip to the electrode of the substrate using the semiconductor manufacturing apparatus,
Holding the substrate on the stage;
Placing the spacer on the substrate;
Holding the semiconductor chip in the semiconductor chip holding region in the plane of the heating device;
Aligning the electrodes of the semiconductor chip and the electrodes of the substrate;
Controlling movement including lowering of the heating device in a direction perpendicular to the plane of the substrate and the semiconductor chip, and utilizing the fact that the spacer contacts the plane of the heating device when the heating device is lowered Connecting the electrode of the semiconductor chip to the electrode of the substrate by controlling the height of the connection between the chip and the substrate and controlling the heating and pressurizing the portion including the electrode of the semiconductor chip; A semiconductor manufacturing method. The semiconductor manufacturing method according to claim 8.
The semiconductor manufacturing method, wherein the spacer is arranged in a line shape or a frame shape having at least one side around the semiconductor chip connection region. A semiconductor manufacturing apparatus for connecting a semiconductor chip having an electrode to a substrate having an electrode,
A stage that holds the substrate, and a heating device that holds the semiconductor chip and performs heating and pressurization,
The plane of the heating device has a semiconductor chip holding region for holding the semiconductor chip, and one or more protrusions having a predetermined height are formed in places other than the semiconductor chip holding region,
The height of the protrusion is designed according to the height of the semiconductor chip and its electrode,
In the connecting step of connecting the electrode of the semiconductor chip to the electrode of the substrate, the substrate is held on the stage, the semiconductor chip is held in the semiconductor chip holding region on the plane of the heating device, and the semiconductor chip The electrodes of the substrate and the electrodes of the substrate are aligned, and the movement including the lowering of the heating device is controlled in a direction perpendicular to the plane of the substrate and the semiconductor chip, and the protrusions are formed on the substrate when the heating device is lowered. The height of the connection between the semiconductor chip and the substrate is controlled using contact with the substrate, and the heating and pressurization is controlled for the portion including the electrode of the semiconductor chip, whereby the electrode of the semiconductor chip Is connected to the electrode of the substrate. A semiconductor manufacturing apparatus for connecting a semiconductor chip having an electrode to a substrate having an electrode,
A stage that holds the substrate, and a heating device that holds the semiconductor chip and performs heating and pressurization,
The plane of the heating device has a semiconductor chip holding region for holding the semiconductor chip,
One or more spacers having a predetermined height are arranged in places other than the semiconductor chip connection region for connecting the semiconductor chip in the plane of the substrate,
The height of the spacer is designed according to the height of the semiconductor chip and its electrodes,
In the connecting step of connecting the electrode of the semiconductor chip to the electrode of the substrate, the substrate is held on the stage, the semiconductor chip is held in the semiconductor chip holding region on the plane of the heating device, and the semiconductor chip The electrodes of the substrate and the electrodes of the substrate are aligned, and the movement including the lowering of the heating device is controlled in a direction perpendicular to the plane of the substrate and the semiconductor chip, and the spacer is heated when the heating device is lowered. The height of the connection between the semiconductor chip and the substrate is controlled using contact with the plane of the device, and the heating and pressurization is controlled with respect to a portion including the electrode of the semiconductor chip. A semiconductor manufacturing apparatus, wherein an electrode of a chip is connected to an electrode of the substrate.

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