JP2012209418A - Wiring board and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which can effectively prevent solder from permeating to get in between a wiring conductor forming a connection pad and a solder resist layer, in which a semiconductor element connection pad and an outer connection pad are satisfactorily wetted by a lead-free solder even if the lead-free solder is deposited on the semiconductor element connection pad and the outer connection pad, thereby the entire surfaces of the semiconductor element connection pad and the outer connection pad are covered with the solder having a sufficient thickness, and which has excellent reliability of mounting of the semiconductor element on the wiring board and excellent reliability of mounting of the wiring board on an external electric circuit substrate.SOLUTION: A wiring conductor 2 has a surface covered with a solder resist layer 5, having an arithmetic average roughness Ra of 0.5 μm or more, and a surface exposed from openings 5a, 5b of the solder resist layer 5, having an arithmetic average roughness Ra of 0.4 μm or less.

Description

  The present invention relates to a wiring board for mounting a semiconductor element and a manufacturing method thereof.

  A printed circuit board that is used to mount semiconductor elements such as semiconductor integrated circuit elements, and that is composed of a plurality of laminated wiring conductors made of copper foil and other insulating plates made of glass substrate and thermosetting resin. A build-up wiring board is used, which consists of a wiring board and a plurality of insulating layers made of a thermosetting resin and filler and a wiring conductor made of a copper plating layer on an insulating board made of a glass substrate and a thermosetting resin. ing. On the upper surface of such a wiring board, semiconductor element connection pads made of wiring conductors for connecting to the electrodes of the semiconductor elements are arranged in a lattice pattern, and openings that expose the central portions of these semiconductor element connection pads are arranged. A solder resist layer made of a cured product of an ultraviolet curable photosensitive resin having a portion is applied. In addition, external connection pads made of wiring conductors for connection to an external electric circuit board are arranged in a lattice pattern on the lower surface of such a wiring board, and the central portion of these external connection pads is exposed. A solder resist layer made of a cured product of an ultraviolet curable photosensitive resin having an opening is applied. Furthermore, solder bumps for bonding the electrodes of the semiconductor element and the semiconductor element connection pads are welded onto the semiconductor element connection pads exposed from the openings of the solder resist layer, and are exposed from the openings of the solder resist layer. On the external connection pad, a solder layer for connection to an external electric circuit board is welded.

  In such a wiring board, the semiconductor element is placed on the upper surface of the wiring board such that each electrode thereof abuts a corresponding solder bump, and these are placed on a heating device such as an electric furnace for about 260. The semiconductor element is mounted on the wiring board by heating the solder bump to about 0 ° C. to melt the solder bump and bonding the solder bump and the electrode of the semiconductor element. In addition, the wiring board on which the semiconductor element is mounted has the solder ball welded to the solder layer welded to the external connection pad, and the solder ball is in contact with the wiring conductor of the external electric circuit board. It is mounted on an external electric circuit board by melting.

  However, when the semiconductor element is mounted on the wiring board or when the wiring board is mounted on the external electric circuit board, a part of the melted solder is exposed from the edge of the opening of the solder resist layer to the semiconductor element connection pad or the external connection pad. In some cases, a phenomenon may occur in which the film penetrates between the wiring conductor forming the solder and the solder resist layer and enters the solder resist layer. Such solder penetration is considered to be one of the causes of a decrease in the elastic modulus of the solder resist layer at a high temperature of 260 ° C. when melting the solder. Therefore, ultraviolet curing and thermal curing are performed during the formation of the solder resist layer. Is used in combination to increase the crosslink density of the solder resist layer and increase the elastic modulus at high temperatures. Furthermore, by making the arithmetic mean roughness Ra of the surface of the wiring conductor forming the semiconductor element connection pad and the external connection pad 0.5 μm or more by etching, the adhesion between the wiring conductor and the solder resist layer is strengthened and soldered. It has also been proposed to suppress the sneaking in.

JP 2008-244000 A

  However, if the arithmetic mean roughness Ra of the surface of the wiring conductor forming the semiconductor element connection pad or the external connection pad is roughened to 0.5 μm or more by etching, solder bumps or When the solder layer is deposited, if the solder is lead-free solder, the lead-free solder has poor wettability with respect to copper, so that the semiconductor element connection pad and the external connection pad do not get wet well and the solder has sufficient thickness. Phenomenon that a part that is not covered with solder occurs partially. When such a portion occurs, the semiconductor element connection pad and the semiconductor element or the external connection pad and the external electric circuit board cannot be firmly bonded, and solder breakage or the like occurs between them, and the wiring board Therefore, the mounting reliability of the semiconductor element with respect to the above and the mounting reliability of the wiring board with respect to the external electric circuit board become low.

  As a result of earnest research, the inventor of the present application has etched the wiring conductor surface when the arithmetic average roughness Ra of the surface of the wiring conductor forming the semiconductor element connection pad and the external connection pad is 0.5 μm or more by etching. The height of the minute protrusions on the roughened surface increases and the protrusions become thin. When lead-free solder is welded to this roughened surface, the high and thin protrusions appear in the lead-free solder. So-called solder erosion occurs partially and a void is formed at the location, and the semiconductor element connection pad and the external connection pad are not sufficiently wetted with the solder and covered with a sufficient thickness of solder. The present invention has been completed by ascertaining the occurrence of unidentified parts.

  The present invention has been devised based on such knowledge, and the problem is that the arithmetic average roughness Ra of the surface of the wiring conductor forming the semiconductor element connection pad and the external connection pad is as rough as 0.5 μm or more. By doing so, the adhesion between the solder resist layer and the wiring conductor is strengthened, and a part of the melted solder forms a semiconductor element connection pad and an external connection pad from the edge of the opening of the solder resist layer. Effectively prevent penetration and penetration into the layer, and lead-free solder is good for semiconductor element connection pads and external connection pads even if lead-free solder is welded to semiconductor element connection pads and external connection pads As a result, the entire surface of the semiconductor element connection pads and external connection pads are covered with a sufficiently thick solder, and the semiconductor element mounting signal on the wiring board is covered. It is to provide a wiring board having excellent mounting reliability of the wiring board on sexual and external electric circuit board.

  The wiring board of the present invention includes a wiring conductor made of copper having a plurality of connection pads on the upper surface of an insulating substrate, and a solder resist layer having an opening that covers the outer periphery of the connection pad and exposes the center of the connection pad And a wiring board in which lead-free solder is welded to the connection pad exposed from the opening, and the surface of the wiring conductor covered with the solder resist layer is arithmetic The average roughness Ra is 0.5 μm or more, and the surface exposed from the opening is an arithmetic average roughness Ra of 0.4 μm or less.

  The method of manufacturing a wiring board according to the present invention includes a step of forming a wiring conductor made of copper having a plurality of connection pads on an upper surface of an insulating substrate, and an arithmetic average roughness by chemically etching the exposed surface of the wiring conductor. A solder resist having a roughened surface with Ra of 0.5 μm or more, and an opening that covers an outer peripheral portion of the connection pad on the insulating substrate and the wiring conductor and exposes a central portion of the connection pad A step of forming a layer, and a step of smoothing the surface of the connection pad exposed from the opening by wet blasting and chemical etching after the wet blasting so that the arithmetic average roughness Ra is 0.4 μm or less. And a step of welding lead-free solder to the connection pad exposed from the opening.

  According to the wiring board of the present invention, since the surface covered with the solder resist layer is 0.5 μm in arithmetic mean roughness Ra, the wiring conductor forming the connection pad is connected to the wiring conductor via this roughened surface. And the solder resist layer firmly adhere to each other, and the roughened surface of the wiring conductor acts as a barrier for preventing the penetration of solder. In addition, since the surface of the connection pad exposed from the opening of the solder resist layer has an arithmetic average roughness Ra of 0.4 μm or less, the convex portion of the exposed surface does not greatly dissolve in the solder, and therefore the void Since the connection pad and the solder get wet well without any occurrence, the entire surface of the connection pad is covered with a sufficient thickness of solder, and the mounting reliability of the semiconductor element to the wiring board and the mounting reliability of the wiring board to the external electric circuit board are excellent. It becomes a wiring board.

  Further, according to the method for manufacturing a wiring board of the present invention, after the exposed surface of the wiring conductor forming the connection pad is chemically etched to obtain a roughened surface having an arithmetic average roughness Ra of 0.5 μm, the solder Since the resist layer is formed, the wiring conductor and the solder resist layer can be firmly adhered to each other through the roughened surface, and the roughened surface of the wiring conductor can be used as a barrier for preventing the penetration of solder. Further, since the surface of the connection pad exposed from the opening of the solder resist layer is smoothed so that the arithmetic average roughness Ra is 0.4 μm or less by wet blasting and chemical etching after the wet blasting, Since the convex part of the exposed surface does not melt into the solder significantly, the connection pad and the solder get wet well without the generation of voids, and the entire surface of the connection pad is covered with a sufficiently thick solder, so that the semiconductor element for the wiring board It is possible to provide a wiring board excellent in mounting reliability and mounting reliability of the wiring board with respect to the external electric circuit board.

FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring board according to the present invention. FIG. 2 is an enlarged schematic cross-sectional view of a main part of the wiring board shown in FIG. 3A to 3D are schematic cross-sectional views for each process for explaining the method for manufacturing a wiring board according to the present invention.

  Next, an example of an embodiment of the wiring board of the present invention will be described in detail with reference to FIGS. FIG. 1 is a schematic cross-sectional view showing an example of an embodiment of a wiring board 10 of the present invention, and FIG. 2 is an enlarged schematic cross-sectional view of a main part of the wiring board 10 shown in FIG. In these drawings, 1 is an insulating substrate, 2 is a wiring conductor, 3 is a semiconductor element connection pad, 4 is an external connection pad, 5 is a solder resist layer, 6 is a solder bump, and 7 is a solder layer. The wiring board 10 of the invention is configured.

  In the wiring substrate 10 of this example, the insulating substrate 1 is formed by laminating two insulating layers 1b made of thermosetting resin on the upper and lower surfaces of the insulating plate 1a made by impregnating glass fabric with thermosetting resin. The solder resist layer 5 is laminated on the outermost insulating layer 1b. A mounting portion A on which the semiconductor element S is mounted is formed at the center of the upper surface of the insulating substrate 1, and a semiconductor element connection pad to which the electrode T of the semiconductor element S is electrically connected is mounted on the mounting portion A. 3 is formed. Further, external connection pads 4 that are electrically connected to the external electric circuit board are formed on the lower surface of the insulating substrate 1, and the corresponding semiconductor element pads 3 and external connection pads are respectively provided from the upper surface to the lower surface of the insulating substrate 1. Wiring conductors 2 are disposed to electrically connect 4 to each other. Further, solder bumps 6 are welded to the semiconductor element connection pads 3. A solder layer 7 is welded to the external connection pad 4.

  In this wiring board 10, the semiconductor element S is placed on the upper surface of the wiring board 10 so that the electrodes T are in contact with the corresponding solder bumps 6, and these are mounted on a heating device such as an electric furnace. The semiconductor element S is mounted on the wiring board 10 by heating to about 260 ° C. to melt the solder bump 6 and bonding the solder bump 6 and the electrode T of the semiconductor element S together. Further, the wiring board 10 on which the semiconductor element S is mounted has the solder ball B welded to the solder layer 7 welded to the external connection pad 4, and the solder ball B and the wiring conductor of the external electric circuit board are contacted. The solder balls B are melted in the contact state, and mounted on the external electric circuit board.

  The insulating plate 1a is a core member in the wiring board 10 of the present example, and is formed by impregnating a glass fabric in which glass fiber bundles are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin. The insulating plate 1a has, for example, a plurality of through holes 8 having a thickness of about 0.3 to 1.5 mm and a diameter of about 0.1 to 1 mm from the upper surface to the lower surface. A part of the wiring conductor 2 is attached to the upper and lower surfaces and the inner surfaces of the through holes 8, and the upper and lower wiring conductors 2 are electrically connected via the through holes 8.

  Such an insulating plate 1a is manufactured by thermally curing an insulating sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling the insulating sheet from the upper surface to the lower surface. The wiring conductors 2 on the upper and lower surfaces of the insulating plate 1a have a copper foil having a thickness of about 3 to 50 μm attached to the entire upper and lower surfaces of the insulating sheet for the insulating plate 1a, and the copper foil is etched after the sheet is cured. By doing so, a predetermined pattern is formed. The wiring conductor 2 on the inner surface of the through hole 8 is provided with a copper plating film having a thickness of about 3 to 50 μm by an electroless plating method and an electrolytic plating method on the inner surface of the through hole 8 after the through hole 8 is provided in the insulating plate 1a. Formed by precipitation.

  Furthermore, the insulating plate 1 a is filled with a hole filling resin 9 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin in the through hole 8. The hole-filling resin 9 is used to form the wiring conductor 2 and each insulating layer 1b directly above and below the through-hole 8 by closing the through-hole 8, and is an uncured paste-like thermosetting resin. Is filled in the through-hole 8 by screen printing and thermally cured, and then the upper and lower surfaces thereof are polished to be substantially flat. Then, two insulating layers 1b are laminated on the upper and lower surfaces of the insulating plate 1a including the hole filling resin 9, respectively.

  Each insulating layer 1b laminated on the upper and lower surfaces of the insulating plate 1a is made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and has a thickness of about 20 to 60 μm. Has a plurality of via holes 11 of about 30 to 100 μm. Each of these insulating layers 1b is for providing an insulating interval for wiring the wiring conductor 2 with high density. A high-density wiring can be three-dimensionally formed by electrically connecting the upper wiring conductor 2 and the lower wiring conductor 2 via the via hole 11. Each of the insulating layers 1b has an insulating film made of an uncured thermosetting resin having a thickness of about 20 to 60 μm attached to the upper and lower surfaces of the insulating plate 1a. And the next insulating layer 1b is sequentially stacked thereon in the same manner. In addition, the wiring conductor 2 deposited in the surface of each insulating layer 1b and the via hole 11 is made of copper having a thickness of about 5 to 50 μm in the surface of each insulating layer 1b and in the via hole 11 every time each insulating layer 1b is formed. It is formed by depositing a plating film on a predetermined pattern by a known pattern forming method such as a semi-additive method.

  The semiconductor element connection pad 3 formed on the mounting portion A on the upper surface of the insulating substrate 1 has a circular shape with a diameter of about 50 to 150 μm exposed from the solder resist layer 5, and the pitch in the region within the mounting portion A is 100 to 250 μm. A large number of lattice-like arrays are formed. Such a semiconductor element connection pad 3 functions as a terminal portion for electrically connecting the electrode T of the semiconductor element S to the wiring conductor 2, and is one of the wiring conductors 2 formed on the uppermost insulating layer 1b. The part is formed by exposing the part in a circular opening 5 a having a diameter of about 50 to 150 μm provided in the solder resist layer 5.

  The external connection pads 4 formed on the lower surface of the insulating substrate 1 are circular with a diameter of about 300 to 500 μm exposed from the solder resist layer 5, and the pitch is about 600 to 1000 μm in almost the entire area of the lower surface of the insulating substrate 1. A large number of lattice-like arrays are formed. The external connection pad 4 functions as a terminal portion for electrically connecting the wiring conductor 2 to the external electric circuit board, and a part of the wiring conductor 2 formed on the lowermost insulating layer 1b is used as a solder resist layer. 5 is exposed by being exposed in a circular opening 5b having a diameter of 300 to 500 μm.

  The solder resist layer 5 is made of a thermosetting resin having photosensitivity, such as an acrylic-modified epoxy resin, and has a thickness of about 10 to 30 μm. As described above, the opening 5a that exposes the semiconductor element connection pad 3 or An opening 5b for exposing the external connection pad 4 is provided. Thereby, the wiring conductor 2 in the outermost layer is protected, and the semiconductor element connection pad 3 and the external connection pad 4 can be connected to the semiconductor element S and the external electric circuit board through the openings 5a and 5b. Such a solder resist layer 5 is formed by applying or sticking a photosensitive resin paste or resin film to the surfaces of the uppermost layer and the lowermost insulating layer 1b and adopting a photolithography technique to form the openings 5a and 5b. It is formed by exposing and developing the pattern having it, followed by ultraviolet curing and heat curing.

  The solder bump 6 welded to the semiconductor element connection pad 3 is made of lead-free solder such as tin-silver alloy or tin-silver-copper alloy, and electrically connects the semiconductor element connection pad 3 and the electrode T of the semiconductor element S. It functions as a connection member for connecting to. Then, the solder bump 6 is heated and melted while the electrode T of the semiconductor element S is in contact with the solder bump 6, whereby the semiconductor element connection pad 3 and the electrode T of the semiconductor element S are electrically connected via the solder bump 6. Will be connected. Thus, by soldering the solder bump 6 to the semiconductor element connection pad 3 in advance, the workability of the connection of the electrode T to the semiconductor element connection pad 3 becomes very good. Prior to bringing the electrode T of the semiconductor element S into contact with the solder bump 6, if the upper end portion of the solder bump 6 is pressed and flattened, the electrode T of the semiconductor element S and the solder bump 6 are brought into contact with each other. Is easy and reliable. Therefore, prior to bringing the electrode T of the semiconductor element S into contact with the solder bump 6, it is preferable to press and flatten the upper end portion of the solder bump 5.

  The solder layer 7 welded to the external connection pad 4 is made of lead-free solder such as tin-silver alloy or tin-silver-copper alloy, for example, like the solder bump 6. It functions as a spare solder for welding. The solder ball B is welded to the external connection pad 4 by heating and melting the solder layer 7 and the solder ball B in a state where the solder ball B is in contact with the solder layer 7.

  The solder bumps 6 are formed on the respective semiconductor element connection pads 3 by using a print mask having openings arranged in a grid and arranged at positions corresponding to the respective semiconductor element connection pads 3. The solder in the printed solder paste is heated and melted to be welded onto each semiconductor element connection pad 3. In addition, the solder layer 7 is printed with solder paste for the solder layer 7 on each external connection pad 7 by using a print mask having openings arranged in a grid and arranged at positions corresponding to the respective external connection pads 4. The solder in the solder paste that has been applied and printed is melted on the external connection pads 4 by heating and melting.

  In the wiring board 10 of this example, as shown in FIGS. 2A and 2B, the wiring conductor 2 deposited on the outermost insulating layer 1 b was covered with the solder resist layer 5. The surface has an arithmetic average roughness Ra of 0.5 μm or more, and the surface exposed from the openings 5a and 5b of the solder resist layer 5 has an arithmetic average roughness Ra of 0.4 μm or less. As described above, the wiring conductor 2 forming the semiconductor element connection pad 3 and the external connection pad 4 has a surface covered with the solder resist layer 5 as a roughened surface with an arithmetic average roughness Ra of 0.5 μm or more. The wiring conductor 2 and the solder resist layer 5 are firmly adhered to each other through the roughened surface, and the roughened surface of the wiring conductor 2 functions as a barrier for preventing the penetration of solder. Therefore, according to the wiring board 10 of the present example, it is possible to effectively prevent the solder from entering and sinking between the wiring conductor 2 and the solder resist layer 5.

  Further, since the exposed surfaces of the semiconductor element connection pads 3 and the external connection pads 4 exposed from the openings 5a and 5b of the solder resist layer 5 are surfaces having an arithmetic average roughness Ra of 0.4 μm or less, this exposure is performed. The height of the minute convex part on the surface does not increase and the convex part does not become thin. Therefore, according to the wiring board 10 of this example, when the solder bumps 6 and the solder layer 7 made of lead-free solder are melted on the exposed surfaces of the semiconductor element connection pads 3 and the external connection pads 4, the protrusions of the exposed surfaces are formed. Therefore, the semiconductor element connection pad 3 and the external connection pad 4 and the solder are wetted satisfactorily, and the entire surface of the semiconductor element connection pad 3 and the external connection pad 4 has a sufficient thickness. The wiring substrate 10 is covered with solder and has excellent mounting reliability of the semiconductor element S and mounting reliability with respect to the external electric circuit board.

  When the arithmetic mean roughness Ra of the roughened surface covered with the solder resist layer 5 in the wiring conductor 2 deposited on the outermost insulating layer 1b is less than 0.5 μm, the wiring conductor 2 and the solder resist The adhesion with the layer 5 is weak and the roughness of the roughened surface tends to have a low function as a barrier for preventing the penetration of solder. Conversely, when it exceeds 0.8 μm, the roughening becomes excessive, Such excessive roughening makes it difficult to form the wiring conductor 2 in a predetermined shape and size. Accordingly, the arithmetic average roughness Ra of the roughened surface covered with the solder resist layer 5 in the wiring conductor 2 deposited on the outermost insulating layer 1b is preferably in the range of 0.5 to 0.8 μm.

  Further, if the exposed surface of the semiconductor element connection pad 3 and the external connection pad 4 exposed from the openings 5a and 5b of the solder resist layer 5 exceeds 0.4 μm in arithmetic average roughness Ra, minute protrusions on the exposed surface As the height of the protrusion increases, the protrusion becomes thinner, and the protrusion on the exposed surface greatly dissolves in the solder and a void is generated at the location. As a result, the entire surface of the semiconductor element connection pad 3 and the external connection pad 4 are exposed. Without being covered with a sufficient thickness of solder, there is a greater risk that the mounting reliability of the semiconductor element S with respect to the wiring board 10 and the mounting reliability of the wiring board 10 with respect to the external electric circuit board will be reduced. Therefore, it is preferable that the exposed surfaces of the semiconductor element connection pads 3 and the external connection pads 4 exposed from the openings 5a and 5b of the solder resist layer 5 have an arithmetic average roughness Ra of 0.4 μm or less.

  Next, an example of an embodiment of the method for manufacturing a wiring board according to the present invention will be described with reference to FIGS. 3A to 3D, parts similar to those of the wiring board 10 described above are denoted by the same reference numerals, and detailed description thereof is omitted.

  First, as shown in FIG. 3A, the semiconductor element connection pads 3 and the external connection pads 4 are formed by the wiring conductors 2 on the outermost insulating layer 1b. The wiring conductor 2 is formed by using a known pattern forming method such as a semi-additive method, as described in the above-described example of the embodiment of the wiring board. In FIGS. 3A to 3D, the semiconductor element connection pads 3 and the external connection pads 4 are representatively shown in the same pattern in order to avoid making the figure complicated.

  Next, as shown in FIG. 3B, the arithmetic mean roughness Ra is obtained by etching the surface of the wiring conductor 2 forming the semiconductor element connection pad 3 and the external connection pad 4 with a roughening solution containing formic acid, for example. It roughens so that it may become 0.5 micrometer or more. The arithmetic mean roughness Ra on the surface of the wiring conductor 2 may be adjusted by the etching time when the surface of the wiring conductor 2 is etched with the roughening solution. That is, if the time for etching the surface of the wiring conductor 2 with the roughening solution is short, the value of the arithmetic average roughness Ra on the surface of the wiring conductor 2 is small. Conversely, if the time for etching is long, the value of Ra is large. Become.

  Next, as shown in FIG. 3C, the outer periphery of the semiconductor element connection pad 3 and the external connection pad 4 are covered on the outermost insulating layer 1b and the wiring conductor 2, and the semiconductor element connection pad 3 and the outside A solder resist layer 5 having openings 5a and 5b that expose the central portion of the connection pad 4 is formed. Such a solder resist layer 5 is formed by applying or sticking a photosensitive resin paste or resin film to the surface of the outermost insulating layer 1b as described in the embodiment of the wiring board described above. It is formed by exposing and developing a pattern having openings 5a and 5b using a lithography technique, followed by ultraviolet curing and thermal curing. At this time, since the surface covered with the solder resist layer 5 is a roughened surface having an arithmetic average roughness Ra of 0.5 μm or more, the wiring conductor 2 is connected to the wiring conductor 2 via the roughened surface. The solder resist layer 5 is firmly adhered, and the roughened surface of the wiring conductor 2 functions as a barrier for preventing solder from entering. In this case, if the arithmetic average roughness Ra of the roughened surface covered with the solder resist layer 5 in the wiring conductor 2 deposited on the outermost insulating layer 1b is less than 0.5 μm, the wiring conductor 2 and the solder The adhesion with the resist layer 5 is weak and the unevenness of the roughened surface tends to have a low function as a barrier to prevent the penetration of solder. Conversely, when the thickness exceeds 0.8 μm, the roughening becomes excessive. Such excessive roughening makes it difficult to form the wiring conductor 2 in a predetermined shape and size. Therefore, the arithmetic average roughness Ra of the roughened surface covered with the solder resist layer 5 in the wiring conductor 2 deposited on the outermost insulating layer 1b should be in the range of 0.5 to 0.8 μm. preferable.

Next, as shown in FIG. 3D, the surfaces of the semiconductor element connection pads 3 and the external connection pads 4 exposed from the openings 5a and 5b of the solder resist layer 5 are mechanically and chemically polished to perform arithmetic. Planarization is performed so that the average roughness Ra is 0.4 μm or less. Such flattening is performed by first polishing the surfaces of the semiconductor element connection pads 3 and the external connection pads 4 exposed from the openings 5a by using a wet blasting method, thereby crushing and smoothing the roughened surfaces. A method is adopted in which the crushed and smooth surface is planarized by etching about 0.5 to 2 μm with a soft etching solution containing hydrogen peroxide and sulfuric acid.

  Finally, solder bumps 6 and a solder layer 7 are welded onto the semiconductor element connection pads 3 and the external connection pads 4 exposed from the openings 5a and 5b, whereby the wiring board 10 according to the present invention shown in FIGS. Is completed. At this time, the exposed surface of the semiconductor element connection pad 3 and the external connection pad 4 exposed from the openings 5a and 5b of the solder resist layer 5 is a surface having an arithmetic average roughness Ra of 0.4 μm or less. The height of the minute convex portion on the exposed surface does not increase and the convex portion does not become thin. Therefore, according to the method of manufacturing the wiring board of this example, when the solder bumps 6 and the solder layer 7 made of lead-free solder are melted on the exposed surfaces of the semiconductor element connection pads 3 and the external connection pads 4, The semiconductor element connection pad 3 and the external connection pad 4 and the solder are wetted satisfactorily without the generation of voids and the formation of voids in the solder. It is possible to provide the wiring substrate 10 that is covered with a solder having a sufficient thickness and has excellent mounting reliability of the semiconductor element S and mounting reliability with respect to an external electric circuit substrate. In order to weld the solder bumps 6 and the solder layer 7 on the semiconductor element connection pads 3 and the external connection pads 4, as described in the example of the embodiment of the wiring substrate 10, each of the semiconductor element connection pads 3 and 3. Solder paste was printed on each of the semiconductor element connection pads 3 and the external connection pads 4 using a printing mask having openings arranged in a grid and arranged at positions corresponding to the external connection pads 4 and printed. What is necessary is just to heat-melt the solder in a solder paste.

  Next, examples of the present invention will be described. First, through holes having a diameter of 200 μm are formed at a pitch of 500 μm on a double-sided copper-clad plate in which a glass fabric is impregnated with a bismaleimide triazine resin and a thickness of 0.4 μm is attached to a 0.4 mm thick insulating plate. Perforated. Next, after the inside of the through hole is desmeared with a potassium permanganate solution, electroless copper plating having a thickness of 1 μm is applied to the inside of the through hole and the surface of the copper foil, and then the thickness is formed on the electroless copper plating layer. A 10 μm electrolytic plating layer was applied. Next, a paste containing an epoxy resin and a silica filler is filled in the through hole and thermally cured to fill the through hole with a hole filling resin, and then the upper and lower surfaces of the double-sided copper-clad plate are polished by a roll grinder. And flattened. Next, after electroless copper plating was applied to a thickness of 1 μm on the upper and lower surfaces of the double-sided copper-clad plate including the hole-filling resin, an electrolytic copper plating layer was then applied to a thickness of 10 μm. Next, using a subtractive method, the copper foil and the copper plating layer on the double-sided copper-clad plate were etched to form wiring conductors on both sides of the insulating plate to produce a core substrate.

  Next, an uncured resin film containing an epoxy resin having a thickness of 35 μm and a silica filler is pasted on both surfaces of the core substrate and thermally cured to form an insulating layer. A 70 μm via hole was drilled. Next, after desmearing the surface of the resin layer and the inside of the via hole with an aqueous potassium permanganate solution, electroless copper plating having a thickness of 1 μm was deposited on the surface of the insulating layer and inside the via hole. Next, a plating resist layer having a thickness of 25 μm having an opening pattern for forming a wiring conductor including an opening for forming a semiconductor element connection pad having a diameter of 190 μm is deposited on the electroless plating layer on the upper surface side, and the lower surface side A plating resist layer having a thickness of 25 μm having an opening pattern for forming a wiring conductor including an opening for forming an external connection pad having a diameter of 700 μm is deposited on the electroless copper plating layer, and the electroless plating exposed from the opening pattern An electrolytic copper plating layer having a thickness of 15 μm was deposited on the layer. Next, the plating resist layer is peeled off and removed from the electroless copper plating layer, and the electroless copper plating layer exposed by peeling of the plating resist layer is removed with an etching solution containing hydrogen peroxide and sulfuric acid. A wiring conductor of the outermost layer having semiconductor element connection pads having a diameter of 190 μm on the upper surface side at a pitch of 250 μm and external connection pads having a diameter of 700 μm on the lower surface side at a pitch of 1000 μm was formed.

  Next, the surface of the outermost wiring conductor was roughened by etching with an etching solution containing formic acid so that the arithmetic average roughness Ra was 0.5 μm or more. Next, a photosensitive resin paste for solder resist containing an acrylic-modified epoxy resin and a silica filler is applied on the outermost insulating layer and the wiring conductor by screen printing so that the thickness on the wiring conductor is 20 μm. In addition, after exposing and developing so as to have an opening having a diameter of 130 μm in the center of the semiconductor element connection pad and having an opening of 500 μm in the center of the external connection pad, ultraviolet soldering and heat curing are performed to form a solder resist layer. Formed.

  Next, the surfaces of the semiconductor element connection pads and the external connection pads exposed from the solder resist layer were physically polished by a wet blast method. By this polishing, the unevenness of the exposed surfaces of the semiconductor element connection pad and the external connection pad was crushed, and the arithmetic average roughness Ra became about 0.4 to 0.5 μm. Further, by etching the surfaces of the semiconductor element connection pad and the external connection pad whose irregularities are crushed by this wet blasting with an etching solution containing hydrogen peroxide and sulfuric acid, the arithmetic average roughness is 0.3 to 0.4 μm. did.

  Next, a solder paste of lead-free solder is printed and applied onto the semiconductor element connection pad and the external connection pad by screen printing, and then the solder in the solder paste is heated and melted at a temperature of about 260 ° C. Solder bumps were welded to each other and a solder layer was welded to the external connection pads to obtain samples of the present invention (Sample Nos. 2, 3, and 4).

  For comparison, the arithmetic average roughness of the exposed surfaces of the sample (sample No. 1), the semiconductor element connection pad, and the external connection pad, in which the arithmetic average roughness Ra of the wiring conductor covered with the solder resist layer is 0.4 μm. A sample (sample No. 5) having a thickness Ra of 0.45 μm was prepared, and solder bumps and solder layers were welded in the same manner.

  Next, at this point, inspection is performed with a 40 × optical microscope to check for the presence of solder diving in the semiconductor element connection pads and the presence of solder wetting defects in the external connection pads. Further, the solder bumps and solder layers are welded. The sample was heated at 250 ° C. for 5 minutes to give the first heat load, then again heated at 250 ° C. for 4 minutes to give the second heat load, and then again heated at 250 ° C. for 4 minutes and the third time. After inspecting with a 40 × optical microscope to check for the presence of solder diving, the cross section was observed with a 1000 × SEM photograph, and voids at the interface between the pad and the solder were observed. The presence or absence was confirmed. The results are shown in Table 1.

  As shown in Table 1, in the samples within the scope of the present invention (Sample Nos. 2, 3 and 4), no solder dive was observed immediately after solder welding or after the third thermal load. On the other hand, in the sample for comparison (sample No. 1), solder dipping was not observed immediately after the formation of the solder bumps, but solder peeling was confirmed after the thermal load. Further, in the sample for comparison (sample No. 5), no solder dive was observed even after heat load, but solder wetting failure and voids were confirmed.

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 2 Wiring conductor 3 Semiconductor element connection pad 4 External connection pad 5 Solder resist layer 5a, 5b Opening part of solder resist layer 6 Solder bump 7 Solder layer 10 Wiring board

Claims (2)

  A wiring conductor made of copper having a plurality of connection pads and a solder resist layer covering the outer periphery of the connection pads and having an opening exposing the center of the connection pads are sequentially deposited on the upper surface of the insulating substrate. And a wiring board formed by welding lead-free solder to the connection pad exposed from the opening, wherein the surface of the wiring conductor covered with the solder resist layer has an arithmetic average roughness Ra of 0. A wiring board characterized in that the surface exposed from the opening is 0.5 μm or more and the arithmetic average roughness Ra is 0.4 μm or less.   A process of forming a wiring conductor made of copper having a plurality of connection pads on the upper surface of an insulating substrate, and a roughening with an arithmetic average roughness Ra of 0.5 μm or more by chemically etching the exposed surface of the wiring conductor Forming a solder resist layer having an opening that covers an outer periphery of the connection pad and exposes a central portion of the connection pad on the insulating substrate and the wiring conductor; and the opening. Smoothing the surface of the connection pad exposed from the portion by wet blasting and chemical etching after the wet blasting so that the arithmetic average roughness Ra is 0.4 μm or less, and the surface exposed from the opening A method of manufacturing a wiring board, comprising the step of welding lead-free solder to a connection pad.

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