JP2012191381A - Antenna connection state detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an antenna connection state detection circuit capable of preventing a failure due to an antenna connection fault, etc.SOLUTION: An antenna connection state detection circuit (1) for detecting the connection state of an antenna (2) includes a first resistance (111) whose one end is connected to a power source; a second resistance (121) connected between an antenna connection terminal (B) of the antenna (2) and the other end of the first resistance (111); and a first switch connected between the both ends of the second resistance (121). When the impedance of the antenna (2) connected to the antenna connection terminal (B) is outside a predetermined range, the first switch is turned off. When the impedance of the antenna is within the predetermined range, the first switch is turned on.

Description

  The present invention relates to an antenna connection state detection circuit for detecting a connection state of an antenna.

  In a transmission / reception apparatus used for GPS or the like, it is important that an antenna is normally connected in order to realize proper transmission / reception of radio waves. In order to detect an antenna connection state, an antenna connection state detection circuit for detecting whether or not the antenna connection state is normal may be incorporated in the transmission / reception apparatus. As an antenna connection state detection circuit, a circuit configured such that the output of a comparator varies according to an antenna load is known (see, for example, Patent Document 1).

  By the way, as shown in FIG. 3, an antenna connection state detection circuit having a configuration in which two comparators and two transistors are combined can be considered. The antenna connection state detection circuit 3 shown in FIG. 3 includes comparators 301 and 302, a PNP transistor 303, an NPN transistor 304, and resistors 305 to 314, and currents flowing through the resistors 305 and 306 by the comparators 301 and 302. By detecting this, it is possible to detect the connection state of the antenna.

  In the antenna connection state detection circuit 3 shown in FIG. 3, the power supply potential is supplied to the terminal 321, and the grounded antenna 4 is connected to the terminal 322. The output terminals of the two comparators 301 and 302 are connected to the output terminals 323 and 324 of the antenna connection state detection circuit 3. The two input terminals of the comparator 301 are connected to resistors 305 and 306 connected in series between the terminal 321 and the terminal 322 so that the output of the comparator 301 varies depending on the current flowing through the resistors 305 and 306. It is configured. The two input terminals of the comparator 302 are connected to both ends of the resistor 305, and the output of the comparator 302 is configured to vary depending on the current flowing through the resistor 305. The transistor 303 is disposed between the resistor 306 and the terminal 322 so that power supply to the antenna 4 can be controlled. The transistor 304 is connected to the output terminal of the comparator 302 and the base of the transistor 303 so that the transistor 303 can be controlled according to the output of the comparator 302.

  In the antenna connection state detection circuit 3, when the terminal 322 is open because a part of the antenna (for example, a cable) is cut, the potential of the terminal 322 becomes substantially equal to the potential of the terminal 321, and the resistance 305 306, little current flows. In this case, since the comparators 301 and 302 do not operate, the power supply potential (high potential) is applied to the output terminals 323 and 324. As a result, a high potential is applied to the base of the transistor 304, the transistor 304 is turned on, and the transistor 303 is also turned on.

  Further, when the antenna is normally connected and the antenna load connected to the terminal 322 is an appropriate value, the potential of the terminal 322 is lower than the potential of the terminal 321, and a potential difference is generated between both ends of the resistors 305 and 306. In this case, the comparator 301 outputs a low potential, and the comparator 302 holds a high potential. A high potential is applied to the base of the transistor 304, the transistor 304 is turned on, and the transistor 303 is also turned on.

  In the antenna connection state detection circuit 3, since the potentials of the output terminals 323 and 324 change according to the antenna connection state, the antenna connection state is detected from the potentials of the output terminals 323 and 324.

JP 2009-118077 A

  However, the antenna connection state detection circuit 3 has a problem when the terminal 322 has a low impedance, for example, about 100Ω due to a failure of the antenna 4 or the like. When the terminal 322 is completely short-circuited, the comparator 302 outputs a low voltage sufficient to turn off the transistor 304, the transistor 304 is turned off and the transistor 303 is also turned off, and an excessive current to the terminal 322 is prevented. The However, when the impedance of the terminal 322 becomes about 100Ω, the output of the comparator 302 is not completely lowered, and the impedance between the collector and the emitter of the transistor 304 has a certain value, so that the current between the emitter and the base of the transistor 303 is reduced. When the collector allowable loss of the transistor 303 is greatly exceeded, the transistor 303 is destroyed.

  As a method for preventing destruction of the transistor 303 in the case of such a state abnormality, for example, a method using a power transistor having a large collector allowable loss as the transistor 303 can be given. However, such a power transistor has a high component cost, and as a result, the cost associated with the antenna connection state detection circuit increases. Even if a power transistor is used, the point that a large current flows through the transistor remains the same, and the problem of transistor breakdown is not essentially solved.

  The present invention has been made in view of the above points, and an object thereof is to provide an antenna connection state detection circuit that can detect an antenna connection failure and the like and can suppress the destruction of a switch when an antenna connection terminal is short-circuited. And

  The antenna connection state detection circuit of the present invention is an antenna connection state detection circuit that detects the connection state of an antenna, and includes a first resistor having one end connected to a power source, an antenna connection terminal of the antenna, and the first connection A second resistor connected between the other ends of the resistor and a first switch connected between both ends of the second resistor, the impedance of the antenna connected to the antenna connection terminal If the antenna is outside the predetermined range, the first switch is turned off, and if the impedance of the antenna is within the predetermined range, the first switch is turned on.

  According to this configuration, the first switch and the second resistor are connected in parallel, and the first impedance when the impedance of the load connected to the antenna connection terminal (antenna impedance) is outside a predetermined range. Since this switch is turned off, the current can be passed through the second resistor when the impedance of the antenna is extremely low and a large current may flow. Thereby, destruction of the first switch due to a large current can be prevented. That is, it is possible to prevent a failure due to an antenna connection failure or the like. In addition, since it is not necessary to use a power transistor having a large collector allowable loss for the first switch, it is possible to reduce the component cost of the antenna connection state detection circuit.

  In the antenna connection state detection circuit of the present invention, a negative side input end is connected to one end of the first resistor, a positive side input end is connected to the other end of the first resistor, and one end is the first resistor. A third resistor connected to one end of the first resistor, the other end connected to the output end of the comparator, one end connected to the output end of the comparator, and the other end connected to the control end of the first switch. A second switch connected, one end of each connected to the output end of the comparator, the other end connected to the control end of the second switch, a fourth resistor, and an output end of the comparator A first detection signal output terminal connected to one end of the capacitor and one end of the fourth resistor, and a second detection signal output terminal connected to the other end of the second switch, antenna The connection terminal is connected to the control end of the second switch, the other end of the capacitor, and the other end of the fourth resistor, and the antenna is obtained from a combination of output levels of the first and second detection signal output terminals. The connection state may be detected.

  According to this configuration, the output level of the first detection signal output terminal and the output level of the second detection signal output terminal vary depending on the impedance of the load connected to the antenna connection terminal. The antenna connection state can be detected from the output level.

  In the antenna connection state detection circuit of the present invention, the first switch is formed of a PNP transistor, and an emitter serving as one end of the first switch is connected to the other end of the first resistor, The collector which becomes the other end of the switch is connected to the antenna connection terminal, the second switch is made of an NPN transistor, the emitter which is one end of the second switch is connected to the output end of the comparator, The collector which becomes the other end of the second switch may be connected to the control end of the first switch.

  In the antenna connection state detection circuit of the present invention, if the combination of the output levels of the first and second detection signal output terminals is (low level, low level), it indicates that the connection state of the antenna is a normal state, If the combination of the output levels of the first and second detection signal output terminals is other than (low level, low level), it may indicate that the antenna connection state is abnormal.

  According to the present invention, it is possible to provide an antenna connection state detection circuit that can detect an antenna connection failure and the like and can suppress the destruction of the switch when the antenna connection terminal is short-circuited.

It is a circuit diagram which shows the structural example of the antenna connection state detection circuit which concerns on this Embodiment. It is a table which shows the relationship between an antenna connection state and the output level of an antenna connection state detection circuit. It is a circuit diagram which shows the structural example of an antenna connection state detection circuit.

  Hereinafter, the configuration of an antenna connection state detection circuit according to an embodiment of the present invention will be described with reference to FIG.

  FIG. 1 is a circuit diagram showing a configuration example of an antenna connection state detection circuit according to an embodiment of the present invention. The antenna connection state detection circuit 1 according to the present embodiment includes an antenna detection circuit 11, a current limiting circuit 12, a temperature compensation circuit 13, and a potential holding circuit 14. Further, the antenna connection state detection circuit 1 is connected to a power supply and is supplied with a terminal (power supply terminal) A to which a power supply potential Vdd is supplied, a terminal (antenna connection terminal) B connected to the antenna 2, and a first detection signal output. It has a terminal Out1 and a second detection signal output terminal Out2. Note that the other end of the antenna 2 connected to the terminal B is connected to the ground and supplied with a ground potential GND (0 V).

  The antenna detection circuit 11 is configured to be able to detect the state of the antenna connected to the terminal B. Specifically, the antenna detection circuit 11 includes four resistors 111 to 114 and a comparator 115. The resistor 111 is connected in series between the terminal A and the terminal B so that a current according to the connection state of the antenna flows. Two ends of the comparator 115 are connected to both ends of the resistor 111 via the resistor 112 and the resistor 113, respectively, so that a current flowing through the resistor 111 can be detected. The output terminal of the comparator 115 is connected to the first detection signal output terminal Out1, and the potential at the output terminal of the comparator 115 is applied as the output of the first detection signal output terminal Out1. The resistor 114 adjusts the gain of the antenna detection circuit 11 and is determined by the ratio between the resistor 114 and the resistors 112 and 113.

  One end of the resistor 111 is connected to the terminal B through the current limiting circuit 12. The resistor 111 has a predetermined resistance value so that the state of the antenna connected to the terminal B can be detected by the comparator 115. For example, when the impedance of the antenna 2 in a normal connection state is 100Ω to 5 kΩ, the resistance value of the resistor 111 can be 3.3Ω. The resistance values of the resistors 112 to 113 can be set to 100Ω, for example. Further, the resistance value of the resistor 114 can be set to 47 KΩ, for example.

  In the antenna detection circuit 11 configured as described above, if the impedance of the antenna 2 is a value smaller than the upper limit value of the appropriate range (for example, a value smaller than 5 kΩ), the first input terminal of the comparator 115. And the second input terminal have a potential difference larger than a predetermined value (the current flowing through the resistor 111 is larger than the predetermined value). In this case, the output terminal of the comparator 115 is at a low potential (hereinafter, low level). If the impedance of the antenna 2 is greater than a threshold value (for example, greater than 5 kΩ), the potential difference between the first input terminal and the second input terminal of the comparator 115 is smaller than a predetermined value (resistor 111 is The flowing current is smaller than a predetermined value). In this case, the comparator 115 does not operate, and a high potential (hereinafter, high level) is applied to the output terminal of the comparator 115. Therefore, it is possible to determine whether the current flowing through the resistor 111 is larger than a predetermined value from the output of the first detection signal output terminal Out1 connected to the output terminal of the comparator 115, and to detect the connection state of the antenna 2.

  FIG. 2 is a table showing the relationship between the antenna connection state and the output level of the antenna connection state detection circuit 1. As shown in FIG. 2, in a connection state where the antenna load is high (high load), the output level of the first detection signal output terminal Out1 is high, and the antenna load is in a proper connection state (normal) or the antenna load is low. In the connected state, the output level of the first detection signal output terminal Out1 is low.

  The current limiting circuit 12 is configured to be able to limit the current flowing between the terminal A and the terminal B according to the state of the antenna detected by the antenna detection circuit 11. Specifically, the current limiting circuit 12 includes three resistors 121 to 123, a PNP transistor 125 and an NPN transistor 126 as switches. The transistor 125 is connected in series between the terminal A and the terminal B via the emitter-collector so that power can be supplied to the antenna 2 via the terminal B. The resistor 121 is connected in parallel to the emitter-collector of the transistor 125, and when the transistor 125 is off, the current between the terminal A and the terminal B flows through the resistor 121.

  The transistor 126 is arranged so that switching of the transistor 125 can be controlled in accordance with the output level of the first detection signal output terminal Out1 and the potential of the terminal B. Specifically, the base of the transistor 126 is connected to the terminal B through the resistor 122 and is connected to the first detection signal output terminal Out1 through the resistor (thermistor) 131, and the emitter is connected to the first detection signal output terminal Out1. The collector is connected to the base of the transistor 125 through the resistor 123. The collector of the transistor 126 is connected to the second detection signal output terminal Out2, and the potential of the collector of the transistor 126 is applied as the output of the second detection signal output terminal Out2.

  The resistor 121 has a predetermined value so that a current between the terminal A and the terminal B flows through the transistor 125 when the transistor 125 is on, and a current between the terminal A and the terminal B flows through the resistor 121 when the transistor 125 is off. It has a resistance value. For example, the resistance value of the resistor 121 can be 820Ω. With this structure, the current between the terminal A and the terminal B flows through the transistor 125 when the transistor 125 is on, and flows through the resistor 121 when the transistor 125 is off. For example, the resistance value of the resistor 122 may be 20 kΩ, the resistance value of the resistor 123 may be 5.6 kΩ, and the resistance (thermistor) 131 may be 47 kΩ, for example.

  The current limiting circuit 12 configured in this way limits the current flowing between the terminal A and the terminal B according to the connection state of the antenna 2 detected by the antenna detection circuit 11. Specifically, when the impedance of the antenna 2 is less than the lower limit of the appropriate range (for example, less than 100Ω), a low level is applied to the base of the transistor 126, the transistor 126 is turned off, and the transistor 125 is also turned off. Become. For this reason, the current between the terminal A and the terminal B flows through the resistor 121. In this case, since the resistor 121 has a certain resistance value, the transistor 125 is protected and the current between the terminal A and the terminal B is suppressed.

  Further, when the impedance of the antenna 2 is within an appropriate range (for example, 100Ω or more and 5 kΩ or less), the terminal B is given a predetermined potential corresponding to the impedance of the antenna 2 or the resistance values of the resistor 111 and the resistor 121. It is done. The transistor 126 is configured to be turned on when the terminal B becomes a predetermined potential. In the structure, the transistor 126 and the transistor 125 are turned on. For this reason, the current between the terminal A and the terminal B flows through the transistor 125, and a normal current flows through the antenna 2.

  Further, when the impedance of the antenna 2 is larger than the upper limit value of the appropriate range (for example, larger than 5 kΩ), the current flowing through the resistor 111 becomes smaller than a predetermined value, and the potential difference between the first input terminal and the second input terminal of the comparator 115. Becomes a value smaller than a predetermined value. As a result, the first detection signal output terminal Out1 becomes high level, so that the transistor 126 is turned off. Then, the transistor 125 is also turned off, and the second detection signal output terminal Out2 becomes high level.

  As shown in FIG. 2, in the connection state where the antenna load is high (high load), the output level of the second detection signal output terminal Out2 is high, and in the connection state where the antenna load is appropriate (normal), the second detection signal is output. The output level of the output terminal Out2 is low, and the output level of the second detection signal output terminal Out2 is high in a connection state where the antenna load is low. Therefore, the connection state of the antenna 2 can be detected from the combination of the output level of the first detection signal output terminal Out1 and the output level of the second detection signal output terminal Out2.

  The temperature compensation circuit 13 is configured to prevent the base voltage of the transistor 126 in the current limiting circuit 12 from fluctuating due to a change in ambient temperature. Specifically, the temperature compensation circuit 13 includes a resistor (thermistor) 131. One end of the resistor (thermistor) 131 is connected to the first detection signal output terminal Out1. The other end of the resistor (thermistor) 131 is connected to the other end of the resistor 122 in the current limiting circuit 12 and the base of the transistor 126. The temperature compensation circuit 13 may include other resistors in addition to the resistor (thermistor) 131.

  The potential holding circuit 14 is provided so as to prevent a rapid change in the voltage of the base of the transistor 126 in the current limiting circuit 12. Specifically, the potential holding circuit 14 includes a capacitor 141. One end of the capacitor 141 is connected to the first detection signal output terminal Out1. The other end of the capacitor 141 is connected to the other end of the resistor 122 in the current limiting circuit 12, the other end of the resistor (thermistor) 131, and the base of the transistor 126.

  As described above, in the antenna connection state detection circuit 1, the output of the first detection signal output terminal Out1 and the output of the second detection signal output terminal Out2 take values corresponding to the impedance of the load connected to the terminal B. . Therefore, the connection state between the terminal B and the antenna can be detected from the output of the first detection signal output terminal Out1 and the output of the second detection signal output terminal Out2.

  In the antenna connection state detection circuit 1, when the impedance of the load connected to the terminal B is outside the proper range, the transistor 125 of the current limiting circuit 12 is turned off, and the impedance of the load connected to the terminal B is within the proper range. If so, the transistor 125 of the current limiting circuit 12 is turned on. Therefore, the transistor 125 is turned off in a situation where a large current can flow through the transistor 125, such as when the antenna is short-circuited, so that the transistor 125 can be prevented from being damaged by the large current. Further, current consumption can be suppressed by the resistance value of the resistor 121.

  Hereinafter, the operation of the above-described antenna connection state detection circuit 1 will be described.

  When the antenna load is almost 0Ω due to an antenna short-circuit or the like, or when the antenna load is small (for example, when the lower limit value of the appropriate range is less than 100Ω), a current flows through the resistor 111 and a potential difference occurs between both ends of the resistor 111. . At this time, since the output of the comparator 115 is at a low level, the output of the first detection signal output terminal Out1 is at a low level. On the other hand, since the potential of the terminal B is at a low level, a low level is input to the base of the transistor 126 via the resistor 122 or the resistor (thermistor) 131, the transistor 126 is turned off, and the transistor 125 is turned off. At this time, the output of the second detection signal output terminal Out2 becomes high level.

  That is, when the antenna load is small due to a short circuit of the antenna 2, the output of the first detection signal output terminal Out1 is low level, and the output of the second detection signal output terminal Out2 is high level. For this reason, it can be confirmed from the output of the first detection signal output terminal Out1 and the output of the second detection signal output terminal Out2 that the antenna load is extremely small and the connection state is not normal. At this time, if the transistor 125 is on, a large current flows through the transistor 125. However, the transistor 125 is turned off, so that the transistor 125 can be prevented from being broken by the large current. Furthermore, since the current flows through the resistor 121, the current flowing through the antenna connection state detection circuit 1 can be limited by the resistor 121.

  When the antenna load is extremely large due to an antenna disconnection or the like (for example, when the upper limit value of the appropriate range is larger than 5 kΩ), the potential of the terminal A is given to the terminal B via the resistor 111, the resistor 121, etc. Is at a high level. For this reason, the current flowing through the resistor 111 is smaller than a predetermined value. At this time, the comparator 115 does not operate, and the potential of the terminal A is applied to the output terminal of the comparator 115. That is, the potential at the output terminal of the comparator 115 becomes high level, and the output of the first detection signal output terminal Out1 also becomes high level. Therefore, the transistor 126 is turned off and the transistor 125 is also turned off. At this time, the output of the second detection signal output terminal Out2 becomes high level.

  That is, when the antenna load is extremely large due to an antenna disconnection or the like, the output of the first detection signal output terminal Out1 is at a high level, and the output of the second detection signal output terminal Out2 is at a high level. For this reason, it can be confirmed from the output of the first detection signal output terminal Out1 and the output of the second detection signal output terminal Out2 that the antenna load is extremely large and the connection state is not normal.

  When the antenna is normally connected and the antenna load is within an appropriate range (for example, about 100Ω to 5 kΩ), a current flows through the resistor 111 and a potential difference is generated between both ends of the resistor 111. At this time, since the output of the comparator 115 is at a low level, the output of the first detection signal output terminal Out1 is at a low level. On the other hand, a predetermined potential corresponding to the impedance of the antenna 2, the resistor 111, the resistor 121, and the like is applied to the terminal B. Here, since the potential determined by the potential of the predetermined level given to the terminal B, the resistance value of the thermistor 131, and the resistance value of the resistor 122 is set to a potential enough to turn on the transistor 126, the transistor 126 Turns on. As a result, the transistor 125 is also turned on. At this time, the output of the second detection signal output terminal Out2 is at a low level.

  That is, when the antenna is normally connected and the antenna load is within an appropriate range, the output of the first detection signal output terminal Out1 is low level, and the output of the second detection signal output terminal Out2 is low level. Therefore, it can be confirmed that the antenna is normally connected from the output of the first detection signal output terminal Out1 and the output of the second detection signal output terminal Out2.

  As described above, in the antenna connection state detection circuit 1 of the present embodiment, the transistor 125 and the resistor 121 are connected in parallel, and the impedance of the load connected to the antenna connection terminal B (impedance of the antenna 2) is Since the transistor 125 is turned off when it is out of the predetermined range, for example, when the impedance of the antenna 2 is extremely low and a large current may flow, a current can be passed through the resistor 121. Thus, the transistor 125 can be prevented from being broken due to a large current. Further, since it is not necessary to use a power transistor having a large collector allowable loss as the transistor 125, the component cost can be suppressed.

  In addition, the present invention is not limited to the description of the above embodiment, and can be implemented with appropriate modifications in a mode in which the effect is exhibited. For example, the antenna connection state detection circuit of the present invention includes components equivalent to the components shown in FIG. In addition, other circuit elements may be included as long as the operation is not hindered. Moreover, the impedance of each component can be changed as appropriate according to the impedance of the antenna to be connected. Further, as the first transistor and the second transistor, an FET or the like can be used instead of the bipolar transistor. Further, the temperature compensation circuit 13 which is an auxiliary element can be configured by a normal resistor without being configured by a thermistor.

  The antenna connection state detection circuit of the present invention is useful for detecting the antenna connection state in a GPS module, for example.

DESCRIPTION OF SYMBOLS 1 Antenna connection state detection circuit 2 Antenna 11 Antenna detection circuit 12 Current limiting circuit 13 Temperature compensation circuit 14 Potential holding circuit 111-114 Resistance 115 Comparator 121-123 Resistance 125, 126 Transistor 131 Resistance (thermistor)
141 Capacitor A terminal (power supply terminal)
B terminal (antenna connection terminal)
Out1 first detection signal output terminal Out2 second detection signal output terminal

Claims (4)

An antenna connection state detection circuit for detecting a connection state of an antenna,
A first resistor having one end connected to a power source;
A second resistor connected between the antenna connection terminal of the antenna and the other end of the first resistor;
A first switch connected across the second resistor;
With
Turning off the first switch if the impedance of the antenna connected to the antenna connection terminal is outside a predetermined range; turning on the first switch if the impedance of the antenna is within the predetermined range; An antenna connection state detection circuit. A comparator having a negative input terminal connected to one end of the first resistor and a positive input terminal connected to the other end of the first resistor;
A third resistor having one end connected to one end of the first resistor and the other end connected to the output end of the comparator;
A second switch having one end connected to the output end of the comparator and the other end connected to the control end of the first switch;
A capacitor and a fourth resistor each having one end connected to the output end of the comparator and the other end connected to the control end of the second switch;
A first detection signal output terminal connected to an output end of the comparator, one end of the capacitor, and one end of the fourth resistor;
A second detection signal output terminal connected to the other end of the second switch,
The antenna connection terminal is connected to the control end of the second switch, the other end of the capacitor, and the other end of the fourth resistor;
The antenna connection state detection circuit according to claim 1, wherein the connection state of the antenna is detected from a combination of output levels of the first and second detection signal output terminals. The first switch is composed of a PNP transistor, an emitter serving as one end of the first switch is connected to the other end of the first resistor, and a collector serving as the other end of the first switch is the antenna. Connected to the connection terminal,
The second switch is composed of an NPN transistor, an emitter serving as one end of the second switch is connected to an output terminal of the comparator, and a collector serving as the other end of the second switch is the first switch. The antenna connection state detection circuit according to claim 2, wherein the antenna connection state detection circuit is connected to the control terminal of the antenna.   If the combination of the output levels of the first and second detection signal output terminals is (low level, low level), it indicates that the connection state of the antenna is normal, and the first and second detection signal output terminals 4. The antenna connection state detection circuit according to claim 2, wherein if the combination of the output levels is other than (low level, low level), the connection state of the antenna is an abnormal state. 5. .

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