JP2012191146A - Solid-state imaging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a spike of a silicide material that poses a junction leakage current and to reduce a white defect, which is an image defect, and RTS noise.SOLUTION: A solid-state imaging device comprises: a photodiode that is formed on a semiconductor substrate composed of silicon and photoelectrically converts incident light; a transfer transistor for transferring a signal obtained in the photodiode; and a photosensitive region 10 in which a plurality of unit pixels 11 including an in-pixel transistor for amplifying the signal are arranged in a one-dimensional form or a two-dimensional form. The in-pixel transistor includes a gate pattern 13 and a diffusion layer 12 in which a silicide is formed. A dummy pattern 14 is formed at least adjacent to a side of a surface of the diffusion layer 12.

Description

  The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device in which silicide is formed in a transistor in a pixel region.

  Since a MOS (Metal Oxide Semiconductor) type solid-state imaging device has a MOS transistor for amplifying a signal detected by a photodiode in each pixel, it has higher sensitivity than a CCD (Charge Coupled Device) type solid-state imaging device. is there.

  In recent years, improvement in image reading speed of a solid-state imaging device has been demanded. In order to improve the image reading speed, a semiconductor compound (silicide) containing a refractory metal is formed in a self-aligned manner at the gate and source / drain of the transistor to reduce parasitic resistance in the CMOS logic circuit.

  A conventional MOS type solid-state imaging device will be described with reference to FIGS. As shown in FIGS. 6A and 6B, a plurality of unit pixels 110 are two-dimensionally arranged in the pixel region 100 of the conventional solid-state imaging device. Each unit pixel 110 includes a photodiode 111, a transfer transistor 112, a reset transistor 113, an amplification transistor 114, and a selection transistor 115. Around the photosensitive region 100, a vertical shift register 120 that selects pixels in the column direction, a horizontal shift register 130 that selects pixels in the row direction, and a timing for supplying necessary pulses to the vertical shift register 120 and the horizontal shift register 130 A timing circuit such as the generation circuit 140 is provided.

  In order to operate such a MOS type solid-state imaging device at high speed, a configuration in which a silicide including a refractory metal used in a CMOS logic circuit or the like is formed in a transistor constituting a pixel is used. However, it is known that when silicide is formed on a photodiode, the junction leakage current increases and the imaging characteristics deteriorate. Therefore, as shown in FIG. 7, the silicide 210 is not formed on the diffusion layer 201 of the photodiode, and the silicide 210 is formed on the gate 202 and the source / drain 203 of the transistor that constitutes the pixel. And the structure which can reduce a leakage current is proposed by patent document 1 grade | etc.,.

Japanese Patent Laid-Open No. 2001-111022

  In general, the process of forming a silicide includes a process of performing a high temperature treatment after depositing a refractory metal film on a silicon substrate and selectively forming a silicide only on a portion in contact with the silicon substrate. At this time, if a natural oxide film is formed on the silicon substrate, formation of silicide is suppressed and resistance increases. For this reason, immediately before depositing the refractory metal film on the silicon substrate, cleaning using argon plasma is performed on the silicon substrate in an apparatus for depositing the refractory metal film. After removing the natural oxide film, a refractory metal film is deposited on the silicon substrate in a vacuum state, thereby preventing the natural oxide film from being formed on the silicon substrate. However, the plasma cleaning process increases damage to the silicon substrate.

As shown in FIG. 8, a refractory metal film 303 is formed on the diffusion layer (source / drain portion) 304 of the transistor 302 in the pixel region formed on the damaged silicon substrate 301, and heat treatment is performed. Then, the refractory metal film 303 abnormally diffuses (spikes 305) into the silicon substrate 301 so as to penetrate the diffusion layer 304. When a spike 305 is generated in the diffusion layer 304 of the transistor 302 in the pixel region, a white flaw that is an image defect occurs due to a leak current of about 5 × 10 ⁻¹⁶ A / μm, and the output for each frame changes Random telegraph signal (RTS) noise may occur.

  FIG. 9 shows a layout of a pixel array of a general solid-state imaging device. A photodiode is formed on a semiconductor substrate, a diffusion layer 401 in which no silicide is formed, a diffusion layer 402 in which silicide is formed, and A gate pattern 403 made of polysilicon is formed. The diffusion layers 401 and 402 are isolated from each other by STI (shallow trench isolation). The spike is a region having a relatively long finger length 404 defined by the distance from the gate pattern 403 to the end of the diffusion layer 402 opposite to the gate pattern 403 in the diffusion layer 402 that is in contact with the gate pattern 403 only at one end side. Occurs at 405.

  Therefore, in order to prevent white scratches and RTS noise, it is necessary to suppress leakage current due to such spikes.

  The present invention has been made in view of the above problems, and an object of the present invention is to prevent white flaws and RTS noise, which are image defects, by preventing a spike of a silicide material that causes a junction leakage current.

  In order to achieve the above object, according to the present invention, a solid-state imaging device has a configuration in which a dummy pattern is formed in the vicinity of a diffusion layer of a transistor.

  Specifically, a solid-state imaging device according to the present invention is formed on a silicon semiconductor substrate and photoelectrically converts incident light, a transfer transistor for transferring a signal obtained by the photodiode, and a signal A plurality of unit pixels including an in-pixel transistor for amplifying the light source, each of which includes a photosensitive region arranged in a one-dimensional or two-dimensional manner, the in-pixel transistor including a gate pattern and a diffusion layer formed with a silicide, On the semiconductor substrate, a dummy pattern is formed in the vicinity of at least one side of the surface of the diffusion layer.

  According to the solid-state imaging device of the present invention, since a dummy pattern made of silicon is formed in the vicinity of at least one side of the surface of the diffusion layer, it is possible to prevent a silicide material spike that causes a junction leakage current and prevent image defects. Certain white scratches and RTS noise can be reduced.

  In the solid-state imaging device according to the present invention, it is preferable that the length from the gate pattern to the end of the diffusion layer opposite to the gate pattern is not more than twice the height of the gate pattern.

  According to the solid-state imaging device of the present invention, it is possible to prevent a silicide material spike that causes a junction leakage current, and to reduce white defects and RTS noise that are image defects.

It is a top view which shows the pixel area | region of the solid-state imaging device which concerns on one Embodiment of this invention. It is a graph which shows the correlation with the magnitude | size of DC bias of a plasma cleaning, and a spike generation rate. It is a graph which shows the correlation with the finger length of a transistor, and a spike incidence. (A) And (b) is a top view which shows the formation position of the gate pattern in the solid-state imaging device concerning one Embodiment of this invention. It is a top view which shows the formation position of the gate pattern in the solid-state imaging device concerning one Embodiment of this invention. (A) And (b) is a circuit diagram which shows the conventional solid-state imaging device, (a) is a photosensitive area | region, (b) is a unit pixel. It is sectional drawing which shows the conventional solid-state imaging device. It is sectional drawing which shows the subject which this invention tends to solve. It is a top view which shows the area | region where a spike arises.

  A solid-state imaging device according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, in the solid-state imaging device according to the present embodiment, a plurality of unit pixels are two-dimensionally arranged in a pixel region (photosensitive region) 10 formed on a silicon semiconductor substrate. In each unit pixel, a photodiode for photoelectrically converting incident light, a transfer transistor for transferring a signal obtained by the photodiode, and an in-pixel transistor for amplifying the transferred signal are formed. In the pixel region 10, a plurality of diffusion layers 11 in which no silicide is formed are formed in the photodiode. A plurality of diffusion layers 12 having silicide formed thereon are formed between the diffusion layers 11 and in the region A where the in-pixel transistor is formed, and the film thickness is approximately between the diffusion layers 12. A gate pattern 13 made of 180 nm polysilicon is formed. The diffusion layers 11 and 12 are isolated from each other by STI. The minimum diffusion layer width W1 of the diffusion layer 12 is about 0.33 μm, and the minimum element isolation width W2 between the diffusion layer 11 and the diffusion layer 12 is about 0.22 μm. In this embodiment, silicide is formed by first cleaning the semiconductor substrate with argon plasma under a DC bias condition of about 145 V under a pressure of about 0.067 Pa, and then adding cobalt to the semiconductor substrate. Is deposited to a thickness of about 10 nm. Thereafter, the first annealing is performed at about 440 ° C. for 60 seconds, and unreacted cobalt on the silicon substrate is selectively removed, and then the second annealing is performed at about 750 ° C. for 30 seconds to form silicide. . A dummy pattern (polysilicon pattern) 14 made of a silicon material such as polysilicon is formed in an STI region adjacent to at least one side of the surface of the diffusion layer 12 on which silicide is formed.

  In general, when a silicide containing a refractory metal is formed, before the refractory metal film is deposited on the semiconductor substrate, the semiconductor substrate is removed in order to remove a natural oxide film on the semiconductor substrate made of silicon. Plasma cleaning is performed. This plasma cleaning is known to have a large etching effect in a direction inclined by about 45 ° with respect to the substrate surface. For this reason, minute damage is likely to be formed in a region of the semiconductor substrate at a certain distance from the gate pattern 13 (approximately twice or more the height of the gate pattern 13). As a result, when the heat treatment for forming the silicide is performed, the refractory metal abnormally diffuses in the semiconductor substrate and a spike is generated.

As shown in FIG. 2, by reducing the DC bias at the time of plasma cleaning, it is possible to reduce the incidence of spikes that cause a leakage current of 5 × 10 ⁻¹⁶ A / μm or more that causes image defects. . However, in order to maintain the cleaning effect, there is a limit (a in the figure) in the range in which the DC bias can be lowered, and a sufficient improvement effect of spikes cannot be expected.

  Therefore, in the present embodiment, the polysilicon pattern 14 is provided on the element isolation adjacent to the diffusion layer to be silicided. Thereby, during plasma cleaning, ions incident on the semiconductor substrate at an angle of about 45 ° with respect to the substrate surface are hindered by the polysilicon pattern 14, so that damage to the semiconductor substrate can be reduced, and spikes can be reduced. Occurrence can be greatly reduced. In the present embodiment, the effect can be obtained by disposing the polysilicon pattern 14 having a width of about 0.1 μm at one position away from the diffusion layer by about 150 nm. In FIG. 1, the polysilicon pattern 14 has the same length as the diffusion layer 12, but may be longer than the diffusion layer 12.

  As shown in FIG. 3, by shortening the distance (finger length) from the gate pattern 13 to the end of the diffusion layer 12 on the side opposite to the gate pattern 13, the region where the semiconductor substrate is damaged during plasma cleaning. Can reduce the spike occurrence rate. Further, when the polysilicon pattern is arranged in the vicinity of the diffusion layer 12 as compared with the case where the polysilicon pattern 14 is not arranged in the vicinity of the diffusion layer 12, the spike occurrence rate can be further reduced and the finger length is set to a predetermined value. It is also possible to completely prevent spikes by making the length b or less. In the present embodiment, a polysilicon pattern 14 having a width of about 0.1 μm is disposed at one position away from the diffusion layer 12 by about 150 nm, and the finger length is 350 nm or less which is not more than twice the height of the gate pattern 13. By making the following, the occurrence of spikes can be prevented.

  Next, a layout for forming a polysilicon pattern having an effect of preventing the occurrence of spikes will be described with reference to FIGS.

  As shown in FIG. 4A, polysilicon patterns 14 may be formed on both sides of the diffusion layer 12 of the transistor. Further, as shown in FIG. 4B, a polysilicon pattern 14 may be formed in the vicinity of the three sides of the surface of the diffusion layer 12 of the transistor.

  4A and 4B show the case where the polysilicon pattern 14 is formed in parallel to the diffusion layer 12, but the polysilicon pattern 14 is not necessarily diffused as shown in FIG. It may not be parallel to the layer 12.

  According to the solid-state imaging device according to an embodiment of the present invention, damage to the semiconductor substrate due to plasma cleaning is reduced, and spikes can be prevented. As a result, a highly sensitive solid-state imaging device can be formed with a high manufacturing yield.

  In this embodiment, element isolation by STI is targeted, but it can also be applied to element isolation by LOCOS (local oxidation of silicon).

  The present invention is not limited to the above-described embodiment, and various modifications and applications are possible within the scope of the effects of the present invention. A feature of the present invention is that a polysilicon pattern is disposed in an STI region adjacent to a diffusion layer where a silicide is to be formed later, and a finger length is shortened within a range in which white scratches due to spikes do not increase.

  Therefore, it is possible to replace the above-mentioned layout with another equivalent layout without departing from the technical idea.

  In addition, the present invention is particularly suitable for manufacturing a MOS solid-state imaging device, but can be applied to all solid-state imaging devices including a transistor that forms silicide in a pixel region. By making the layout of the diffusion layer the same as that described above, a highly sensitive solid-state imaging device can be obtained.

  The solid-state imaging device according to the present invention can reduce white defects and RTS noise, which are image defects, and is particularly useful for a solid-state imaging device in which a silicide structure is formed in a transistor in a pixel region.

10 pixel area (photosensitive area)
11 Diffusion layer 12 (silicide is not formed) Diffusion layer 13 (silicide is formed) 13 Gate pattern 14 Polysilicon pattern (dummy pattern)

Claims (2)

A plurality of photodiodes formed on a semiconductor substrate made of silicon and including a photodiode for photoelectrically converting incident light, a transfer transistor for transferring a signal obtained by the photodiode, and an in-pixel transistor for amplifying the signal Comprising a photosensitive region in which the unit pixels are arranged one-dimensionally or two-dimensionally,
The in-pixel transistor includes a gate pattern and a diffusion layer having silicide formed thereon,
A solid-state imaging device, wherein a dummy pattern is formed in the vicinity of at least one side of the surface of the diffusion layer on the semiconductor substrate.   2. The solid-state imaging device according to claim 1, wherein a length from the gate pattern to an end of the diffusion layer opposite to the gate pattern is not more than twice the height of the gate pattern.

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