JP2012174759A - Compound semiconductor layer manufacturing method and photoelectric conversion element - Google Patents

Compound semiconductor layer manufacturing method and photoelectric conversion element Download PDF

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JP2012174759A
JP2012174759A JP2011032943A JP2011032943A JP2012174759A JP 2012174759 A JP2012174759 A JP 2012174759A JP 2011032943 A JP2011032943 A JP 2011032943A JP 2011032943 A JP2011032943 A JP 2011032943A JP 2012174759 A JP2012174759 A JP 2012174759A
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Yoshio Tadakuma
芳夫 多田隈
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02E10/541CuInSe2 material PV cells
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Abstract

PROBLEM TO BE SOLVED: To manufacture a compound semiconductor layer such that band energy discontinuity between laminated layers can be moderated.SOLUTION: A compound semiconductor layer manufacturing method of forming a compound semiconductor surface layer 31 composed of a group Ib element, a group IIIb element and a group VIb element which have a composition different from that of a chalcopyrite compound semiconductor layer 30 on a surface of the chalcopyrite compound semiconductor layer 30 composed of a group Ib element, a group IIIb element and a group VIb element, comprises a first process of forming a semiconductor layer 31a composed of at least a group Ib element and a group VIb element, and a second process of immersing the semiconductor layer formed in the first process in a solution containing at least a compound containing a group IIIb element and a compound containing a group VIb element.

Description

本発明は、光電変換素子をなす化合物半導体層の製造方法および光電変換素子に関するものである。   The present invention relates to a method for producing a compound semiconductor layer constituting a photoelectric conversion element and a photoelectric conversion element.

従来、太陽電池においては、バルクの単結晶Siまたは多結晶Si、あるいは薄膜のアモルファスSiを用いたSi系太陽電池が主流であったが、Siに依存しない化合物半導体系太陽電池の研究開発がなされている。化合物半導体系太陽電池としては、Ib族元素とIIIb族元素とVIb族元素とからなるCISあるいはCIGS系(CI(G)Sは、一般式Cu1-zIn1-xGaxSe2-yy(式中、0≦x≦1,0≦y≦2,0≦z≦1)で表される化合物半導体であり、x=0のときがCIS系、x>0のときがCIGS系である)の薄膜系が知られている。 Conventionally, in the case of solar cells, Si-based solar cells using bulk single crystal Si or polycrystalline Si, or thin-film amorphous Si have been mainstream, but research and development of Si-independent compound semiconductor solar cells has been made. ing. As a compound semiconductor solar cell, a CIS or CIGS system composed of an Ib group element, an IIIb group element, and a VIb group element (CI (G) S represents a general formula Cu 1-z In 1-x Ga x Se 2-y A compound semiconductor represented by S y (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 2, 0 ≦ z ≦ 1), when x = 0, CIS system, and when x> 0, CIGS system Are known).

CuInSe2型太陽電池は効率の高い太陽電池として注目されているが、バンドギャップが小さいために太陽光を有効に活用できないという問題がある。このため、Gaを適当量添加してバンドギャップを調整している。バンドギャップの観点からはCuInS2の方が大きいため、Gaを入れなくても太陽光を有効に利用できるはずであるが、実際には発電効率はCuInS2の方が低い。これは太陽光の有効利用の他にキャリアの移動度、平均寿命、拡散距離等の電子的特性も発電効率に大きく影響を及ぼすからである。従って、光電子を発生して電荷分離を行なうという側面からするとCuInGaSe2型の材料の方が好ましい。 Although the CuInSe 2 type solar cell is attracting attention as a highly efficient solar cell, there is a problem in that sunlight cannot be effectively used because of a small band gap. For this reason, the band gap is adjusted by adding an appropriate amount of Ga. From the viewpoint of the band gap, CuInS 2 is larger, so that sunlight should be used effectively without adding Ga, but in reality, the power generation efficiency is lower with CuInS 2 . This is because, in addition to effective use of sunlight, electronic characteristics such as carrier mobility, average lifetime, and diffusion distance have a great influence on power generation efficiency. Therefore, a CuInGaSe 2 type material is preferable from the viewpoint of generating photoelectrons to separate charges.

一方で、発生したキャリアを系外に取り出すためには幾つかの層を経由して最終的には透光性導電層から取り出すため、積層する層間をキャリアが移動するときにバンドエネルギー的にスムーズにつながっていることが好ましい。各層のバンドの位置は、材料によって決まってしまうため光吸収能が高い材料とキャリア伝達能が高い材料とは必ずしも一致しない。そこで、光吸収層の表面近傍(次の層との界面)のみを異なった組成の材料に置き換え、エネルギーバンドの連続性を高めることができればより発電効率の高い太陽電池を作製することが理論的に可能である。   On the other hand, in order to take out the generated carrier out of the system, it is finally taken out from the translucent conductive layer via several layers, so that the band energy is smooth when the carrier moves between the laminated layers. It is preferable that it is connected to. Since the position of the band in each layer is determined by the material, a material having a high light absorption capability and a material having a high carrier transmission capability do not necessarily match. Therefore, it is theoretically possible to manufacture a solar cell with higher power generation efficiency if the continuity of the energy band can be improved by replacing only the vicinity of the surface of the light absorption layer (interface with the next layer) with a material having a different composition. Is possible.

また、太陽電池を構成する各層はその材料に特有の格子定数を持っている。一般に格子定数が非常に近い材料同士の界面では結晶性の乱れが少なく、逆に大きく異なる材料同士の界面では格子定数の相違により生じる格子歪を緩和するために結晶性の低い領域が形成される。これらの様子は膜の断面TEM等で観察することができる。結晶性の低い領域はエネルギーバンドの局所的乱れを形成し、この領域を通過するキャリアの散乱による抵抗値の増大や電子・正孔の再結合等による発電特性の低下を引き起こす。この点でも、光吸収層の表面近傍(次の層との界面)のみを異なった組成の材料に置き換え、格子定数のフィッティングを高めることによっても発電効率の高い太陽電池を作製することが理論的に可能である。   Each layer constituting the solar cell has a lattice constant specific to the material. In general, there is little disorder of crystallinity at the interface between materials with very close lattice constants, and conversely, low-crystalline regions are formed at the interfaces between greatly different materials to alleviate lattice distortion caused by the difference in lattice constants. . These states can be observed with a cross-sectional TEM of the film. A region with low crystallinity forms a local disturbance in the energy band, which causes an increase in resistance due to scattering of carriers passing through this region and a decrease in power generation characteristics due to recombination of electrons and holes. In this respect as well, it is theoretically possible to produce a solar cell with high power generation efficiency by replacing only the vicinity of the surface of the light absorption layer (interface with the next layer) with a material having a different composition and enhancing the fitting of the lattice constant. Is possible.

上記のような観点から光吸収層の表面改質の必要性が高まってきており、特許文献1には、CuInGaSe2半導体表面をIn、ZnおよびSを含む処理液で処理することにより表面をCuInGaZnS2に変える技術が記載されている。また、特許文献2には、金属部分を先に製膜しておいてSe雰囲気中で加熱処理してSe化合物を一旦形成し、その後S雰囲気での加熱処理により表面近傍をS化する技術が記載されている。 From the above viewpoint, the necessity of surface modification of the light absorption layer is increasing. Patent Document 1 discloses that a surface of CuInGaZnS is treated by treating the surface of a CuInGaSe 2 semiconductor with a treatment liquid containing In, Zn and S. The technology to change to 2 is described. Patent Document 2 discloses a technique in which a metal portion is first formed, heat-treated in a Se atmosphere to form a Se compound once, and then the surface vicinity is changed to S by heat-treatment in the S atmosphere. Are listed.

特許第3589380号公報Japanese Patent No. 3589380 特許第3249408号公報Japanese Patent No. 3249408

上記特許文献1には薄膜形成のダイナミックスの記述は無いが、処理液がIn−Zn−Sであるにもかかわらず表面に形成された薄膜がCuやGaを含有するということは、処理液がCuInGaSe2表面をエッチングしながら再析出する際に圧倒的に濃度の高いSでSeが置き換えられていると考えられる。すなわち、新たに形成される表面層にはその下部の基体となる半導体の成分が用いられていることになる。このような場合、新たに形成される表面層は組成的にはバリエーションが低くなってしまい必ずしも最適な組成が得られるとは限らない。また、特許文献2では、表面近傍のSeをSに置換するのみで、カチオンの種類や濃度等を変えることはできない。 Although Patent Document 1 does not describe the dynamics of thin film formation, the fact that the thin film formed on the surface contains Cu or Ga even though the treatment liquid is In—Zn—S means that the treatment liquid It is considered that Se is replaced by S with an overwhelmingly high concentration when it re-deposits while etching the CuInGaSe 2 surface. In other words, the newly formed surface layer uses a semiconductor component serving as the underlying substrate. In such a case, the newly formed surface layer has a low variation in composition, and an optimal composition is not always obtained. Moreover, in patent document 2, only the substitution of Se in the vicinity of the surface with S cannot change the kind and concentration of the cation.

本発明は上記事情に鑑みなされたものであり、光電変換半導体層の表面の組成の自由度を大きくすることにより、積層される層間のバンドエネルギー的不連続性を緩和することが可能な化合物半導体層の製造方法を提供すること、および本発明の製造方法によって製造される化合物半導体層を備えた半導体素子を提供することを目的とするものである。   The present invention has been made in view of the above circumstances, and a compound semiconductor capable of relaxing the band energy discontinuity between stacked layers by increasing the degree of freedom of the composition of the surface of the photoelectric conversion semiconductor layer. It is an object of the present invention to provide a method for producing a layer and to provide a semiconductor element provided with a compound semiconductor layer produced by the production method of the present invention.

本発明の化合物半導体層の製造方法は、Ib族元素とIIIb族元素とVIb族元素とからなるカルコパイライト系化合物半導体層の表面に該カルコパイライト系化合物半導体層とは異なる組成を有するIb族元素とIIIb族元素とVIb族元素とからなる化合物半導体表層を形成する化合物半導体層の製造方法であって、前記カルコパイライト系化合物半導体層の表面に少なくともIb族元素とVIb族元素とからなる半導体層を形成する第一の工程と、該第一の工程で形成した半導体層を少なくともIIIb族元素を含む化合物とVIb族元素を含む化合物を含有する溶液に浸漬させる第二の工程とにより前記化合物半導体表層を形成することを特徴とするものである。   The method for producing a compound semiconductor layer according to the present invention comprises a group Ib element having a composition different from that of the chalcopyrite compound semiconductor layer on the surface of a chalcopyrite compound semiconductor layer comprising a group Ib element, a group IIIb element, and a group VIb element. A method for producing a compound semiconductor layer for forming a compound semiconductor surface layer composed of a group IIIb element and a group VIb element, the semiconductor layer comprising at least a group Ib element and a group VIb element on the surface of the chalcopyrite compound semiconductor layer And the second step of immersing the semiconductor layer formed in the first step in a solution containing at least a compound containing a group IIIb element and a compound containing a group VIb element. A surface layer is formed.

前記第二の工程における溶液はさらにIIb族元素を含む化合物を含んでいてもよい。
前記第一の工程におけるIb族元素はCuで、VIb族元素はSまたはSeの少なくともいずれかであることが好ましい。
前記第二の工程におけるIIIb族元素はInまたはGaの少なくともいずれかであり、VIb族元素はSまたはSeの少なくともいずれかであることが好ましい。
前記第二の工程におけるIIb族元素はZnまたはCdの少なくともいずれかであることが好ましい。
The solution in the second step may further contain a compound containing a group IIb element.
In the first step, the group Ib element is preferably Cu, and the group VIb element is preferably at least one of S and Se.
The group IIIb element in the second step is preferably at least one of In or Ga, and the group VIb element is preferably at least one of S or Se.
The group IIb element in the second step is preferably at least one of Zn and Cd.

本発明の光電変換素子は、基板上に、下部電極と、上記化合物半導体層の製造方法によって製造された化合物半導体層と、バッファ層と、透光性導電層とが順次積層されたことを特徴とするものである。   The photoelectric conversion element of the present invention is characterized in that a lower electrode, a compound semiconductor layer manufactured by the method for manufacturing a compound semiconductor layer, a buffer layer, and a translucent conductive layer are sequentially stacked on a substrate. It is what.

前記基板は、Alを主成分とするAl基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板、Feを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl材が複合された複合基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板、Feを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl膜が成膜された基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板のいずれかであることが好ましい。 The substrate is an anodized substrate in which an anodized film mainly composed of Al 2 O 3 is formed on at least one surface side of an Al base material mainly composed of Al, and at least an Fe material mainly composed of Fe An anodized substrate in which an anodized film mainly composed of Al 2 O 3 is formed on at least one surface side of a composite base material in which an Al material composed mainly of Al is composited on one surface side, mainly Fe An anodized film mainly composed of Al 2 O 3 was formed on at least one surface side of the base material on which an Al film composed mainly of Al was formed on at least one surface side of the Fe material as a component It is preferably one of the anodized substrates.

本発明の化合物半導体層の製造方法は、Ib族元素とIIIb族元素とVIb族元素とからなるカルコパイライト系化合物半導体層の表面にこのカルコパイライト系化合物半導体層とは異なる組成を有するIb族元素とIIIb族元素とVIb族元素とからなる化合物半導体表層を形成する化合物半導体層の製造方法であって、カルコパイライト系化合物半導体層の表面に少なくともIb族元素とVIb族元素とからなる半導体層を形成する第一の工程と、この第一の工程で形成した半導体層を少なくともIIIb族元素を含む化合物とVIb族元素を含む化合物を含有する溶液に浸漬させる第二の工程とにより化合物半導体表層を形成するので、化合物半導体表層を組成的にキャリア伝達能が高い最適な組成とすることが可能である。   The method for producing a compound semiconductor layer according to the present invention includes a group Ib element having a composition different from that of the chalcopyrite compound semiconductor layer on the surface of a chalcopyrite compound semiconductor layer comprising a group Ib element, a group IIIb element, and a group VIb element. A compound semiconductor layer manufacturing method for forming a compound semiconductor surface layer comprising a group IIIb element and a group VIb element, wherein a semiconductor layer comprising at least a group Ib element and a group VIb element is formed on the surface of the chalcopyrite compound semiconductor layer A compound semiconductor surface layer is formed by a first step of forming and a second step of immersing the semiconductor layer formed in the first step in a solution containing at least a compound containing a group IIIb element and a compound containing a group VIb element. Since it is formed, it is possible to make the compound semiconductor surface layer have an optimum composition that has a high carrier transmission ability in terms of composition.

本発明の化合物半導体層の製造方法の工程を示す工程図である。It is process drawing which shows the process of the manufacturing method of the compound semiconductor layer of this invention. 本発明の製造方法によって製造される化合物半導体層を用いた光電変換素子の概略断面図である。It is a schematic sectional drawing of the photoelectric conversion element using the compound semiconductor layer manufactured by the manufacturing method of this invention. 陽極酸化基板の構成を示す概略断面図である。It is a schematic sectional drawing which shows the structure of an anodized substrate.

本発明の化合物半導体層の製造方法は、Ib族元素とIIIb族元素とVIb族元素とからなるカルコパイライト系化合物半導体層の表面に、このカルコパイライト系化合物半導体層とは異なる組成を有するIb族元素とIIIb族元素とVIb族元素とからなる化合物半導体表層(以下、単に化合物半導体表層ともいう)を形成する化合物半導体層の製造方法であって、カルコパイライト系化合物半導体層の表面に少なくともIb族元素とVIb族元素とからなる半導体層を形成する第一の工程と、この第一の工程で形成した半導体層を少なくともIIIb族元素を含む化合物とVIb族元素を含む化合物を含有する溶液に浸漬させる第二の工程とにより化合物半導体表層を形成することを特徴とするものである。   The method for producing a compound semiconductor layer according to the present invention includes a group Ib having a composition different from that of the chalcopyrite compound semiconductor layer on the surface of a chalcopyrite compound semiconductor layer composed of a group Ib element, a group IIIb element, and a group VIb element. A method for producing a compound semiconductor layer for forming a compound semiconductor surface layer (hereinafter also simply referred to as a compound semiconductor surface layer) comprising an element, a group IIIb element, and a group VIb element, wherein at least a group Ib is formed on the surface of the chalcopyrite compound semiconductor layer A first step of forming a semiconductor layer comprising an element and a VIb group element; and immersing the semiconductor layer formed in the first step in a solution containing a compound containing at least a IIIb group element and a compound containing a VIb group element The second step is to form a compound semiconductor surface layer.

本発明の化合物半導体層の製造方法を図1の工程図を用いて詳細に説明する。第一の工程ではカルコパイライト系化合物半導体層30の表面に、少なくともIb族元素とVIb族元素とからなる半導体層31aを形成する。Ib族元素はCuであることが好ましく、VIb族元素はSeまたはSが好ましい。Ib族元素とVIb族元素はいずれか一方であってもよいし、両方であってもよい。半導体層31aの形成方法は特に限定されるものではなく、例えば塗布焼結法、電解法、スパッタ法、液相法、化学気相成長法、有機金属熱分解法、蒸着法、近接昇華法、スプレー法などの従来公知の方法で形成すればよい。第一の工程の前にカルコパイライト層30を形成する際に表面に析出した異物層を取り除くために、例えばKCN水溶液等に浸漬する工程が必要な場合がある。このような場合、一旦溶液系で処理した後に真空系を経由する気相法や高温を要する製膜法で薄膜を形成するためには、十分な乾燥工程を含むことが必要で、全工程時間を引き延ばす要因となる。従って、第一の工程も第二の工程と同様に液相法とすれば、製造コストの低減とともに、製造工程を良好な連続性をもったものとすることができる。   The manufacturing method of the compound semiconductor layer of this invention is demonstrated in detail using the process drawing of FIG. In the first step, a semiconductor layer 31 a made of at least an Ib group element and a VIb group element is formed on the surface of the chalcopyrite compound semiconductor layer 30. The Ib group element is preferably Cu, and the VIb group element is preferably Se or S. Either one or both of the Ib group element and the VIb group element may be used. The method for forming the semiconductor layer 31a is not particularly limited. For example, a coating sintering method, an electrolytic method, a sputtering method, a liquid phase method, a chemical vapor deposition method, a metal organic thermal decomposition method, a vapor deposition method, a proximity sublimation method, What is necessary is just to form by conventionally well-known methods, such as a spray method. In order to remove the foreign substance layer deposited on the surface when forming the chalcopyrite layer 30 before the first step, for example, a step of immersing in a KCN aqueous solution or the like may be necessary. In such a case, in order to form a thin film by a vapor phase method or a film forming method that requires high temperature after processing in a solution system once, it is necessary to include a sufficient drying process, and the total process time It becomes a factor to postpone. Therefore, if the first step is also a liquid phase method like the second step, the manufacturing process can be reduced and the manufacturing process can have good continuity.

第二の工程では第一の工程で形成した半導体層31aを、少なくともIIIb族元素を含む化合物とVIb族元素を含む化合物を含有する溶液に浸漬させる。第二の工程における溶液は、IIIb族元素を含む化合物とVIb族元素を含む化合物に加えて、IIb族元素を含む化合物を含むものであってもよい。IIIb族元素を含む化合物とVIb族元素を含む化合物はいずれか一方であってもよいし、両方であってもよい。第二の工程におけるIIIb族元素はInまたはGaであることが好ましく、VIb族元素はSまたはSeであることが好ましく、IIb族元素はZnまたはCdであることが好ましい。この第二の工程により、半導体層31a表面の一部が溶解して溶液中のIIIbおよびIIb族元素が半導体層31a内に拡散する過程を繰り返して半導体層31が形成されると考えられる。   In the second step, the semiconductor layer 31a formed in the first step is immersed in a solution containing a compound containing at least a IIIb group element and a compound containing a VIb group element. The solution in the second step may contain a compound containing a group IIb element in addition to a compound containing a group IIIb element and a compound containing a group VIb element. Either one or both of the compound containing a Group IIIb element and the compound containing a Group VIb element may be used. The group IIIb element in the second step is preferably In or Ga, the group VIb element is preferably S or Se, and the group IIb element is preferably Zn or Cd. By this second step, it is considered that the semiconductor layer 31 is formed by repeating a process in which a part of the surface of the semiconductor layer 31a is dissolved and group IIIb and IIb elements in the solution diffuse into the semiconductor layer 31a.

上記の第一の工程、それに続く第二の工程とにより当初のIb族元素とIIIb族元素とVIb族元素からなるカルコパイライト系化合物半導体とは異なる組成を有する化合物半導体表層31を形成することができる。溶液中のみの一工程で本発明のような好ましい組成を有する薄膜を形成するには、高沸点の有機溶媒中またはオートクレーブ等の高温高圧条件下で行わなければならない。常圧下での水溶液反応系では反応温度が限られIb族とVIb族の反応速度およびIIIb族とVIb族との反応速度が大きく異なり、Ib-VIb化合物とIIIb-VIb化合物の二層に分離してしまうか、それぞれが安定なpH等の領域が異なるため水酸化物となりカルコパイライト構造の均一な複合化合物を形成することが非常に困難である。反応系のpH や原料の化合物を選択することにより上記の反応速度や安定性の差を小さくすることは可能であるが、限られた温度領域内では満足行く結果を得ることはできない。   The compound semiconductor surface layer 31 having a composition different from that of the chalcopyrite compound semiconductor composed of the original group Ib element, group IIIb element, and group VIb element can be formed by the first process and the subsequent second process. it can. In order to form a thin film having a preferred composition as in the present invention in one step only in a solution, it must be carried out in a high boiling point organic solvent or under high temperature and high pressure conditions such as autoclave. In an aqueous solution reaction system under normal pressure, the reaction temperature is limited, the reaction rates of the Ib group and VIb group and the reaction rates of the group IIIb and VIb group are greatly different, and separated into two layers of Ib-VIb compound and IIIb-VIb compound. In other words, it is very difficult to form a complex compound having a chalcopyrite structure as a hydroxide because each has a different stable pH range. Although it is possible to reduce the difference in the reaction rate and stability by selecting the pH of the reaction system and the starting compound, satisfactory results cannot be obtained within a limited temperature range.

上記のような二層に分離した膜または水酸化物を含む膜を形成すると、著しく発電特性を低下させる場合がある。例えば、分離層の一つが硫化銅の場合、導電性が高い性質のためバッファ層にピンホール等の欠陥が存在するとリーク電流を生じることとなる。また、酸化インジウムや水酸化インジウムは逆に高抵抗層になる場合があり両者とも発電効率を低下させる要因となる。薄膜系ではなく微粒子の系ではあるが、例えば非特許文献(Bonil Koo,Reken N.Patel,and Brian A Korgel,J.Am.Chem.Soc.131(2009)3135)ではCu源としてCuCl、In源としてInCl3およびSe源としてセレノウレアを用いてオレイルアミン溶液中で三元素を共存させた状態で240℃、1時間かけてCuInSe2の微粒子を形成している。また、非特許文献(Yang Jiang,Yue Wu,Xiao Mo,Weichao Yu,Yi Xie,and Yitai Qian,39(2000)2964)では、Cu源としてCu粉末、In源としてIn粉末およびSe源としてSe粉末を用いてエチレンジアミン溶液中で三元素を共存させた状態でオートクレーブにより280℃、48時間かけてCuInSe2の微粒子を形成している。このように溶液中でも三元素を共存させた状態で高温または高温.高圧条件下でカルコパイライトを形成することは可能であるが、高温・高圧状態で連続的に膜形成を行なうことは不可能であり、高沸点溶媒中で形成する場合は有機物が残留すると太陽電池特性を低下させる要因となるため洗浄工程が非常に複雑となり高コスト化を引き起こす。従って、本発明のように、一部を半導体層31aとして析出させた後で溶液側から残りの組成を供給するという二段階で形成することにより、好ましい組成を有する化合物半導体表層を形成することが最適である。 When a film separated into two layers as described above or a film containing a hydroxide is formed, the power generation characteristics may be significantly reduced. For example, when one of the separation layers is copper sulfide, a leakage current is generated when defects such as pinholes exist in the buffer layer because of the high conductivity. Further, indium oxide and indium hydroxide may conversely become a high resistance layer, both of which are factors that reduce power generation efficiency. Although it is not a thin film system but a fine particle system, for example, in non-patent literature (Bonil Koo, Reken N. Patel, and Brian A Korgel, J. Am. Chem. Soc. 131 (2009) 3135), CuCl, In CuInSe 2 fine particles are formed at 240 ° C. for 1 hour using InCl 3 as a source and selenourea as a Se source in the presence of three elements in an oleylamine solution. Further, in non-patent literature (Yang Jiang, Yue Wu, Xiao Mo, Weichao Yu, Yi Xie, and Yitai Qian, 39 (2000) 2964), Cu powder as Cu source, In powder as In source and Se powder as Se source CuInSe 2 fine particles are formed by autoclaving at 280 ° C. for 48 hours in a state where three elements coexist in an ethylenediamine solution. Thus, chalcopyrite can be formed under high temperature or high temperature and high pressure conditions in the presence of the three elements in the solution, but continuous film formation at high temperature and high pressure is impossible. In the case of forming in a high boiling point solvent, if the organic substance remains, it becomes a factor of deteriorating the solar cell characteristics, so that the cleaning process becomes very complicated and the cost is increased. Therefore, as in the present invention, a compound semiconductor surface layer having a preferred composition can be formed by forming the semiconductor layer 31a as a semiconductor layer 31a and then supplying the remaining composition from the solution side in two steps. Is optimal.

第二の工程に用いる溶液は、溶媒として、塩酸、酢酸、硝酸および硫酸から選ばれる少なくとも一つの酸を含むことが好ましく、また、この溶液のpHは1〜4であることが好ましい。酸性溶液を用いることにより、層を安定かつ迅速に形成することが可能である。溶液の温度は10℃〜100℃とすることが好ましい。このような低温プロセスで製造が可能であるので、製造コストを低減することができる。溶液に浸漬する時間は、用いる溶液の濃度や化合物の種類によっても異なるが、概ね1〜30分程度であることが好ましい。層厚の調製は溶液に浸漬する時間によって適宜調整することが可能である。   The solution used in the second step preferably contains, as a solvent, at least one acid selected from hydrochloric acid, acetic acid, nitric acid and sulfuric acid, and the pH of this solution is preferably 1 to 4. By using an acidic solution, it is possible to form the layer stably and rapidly. The temperature of the solution is preferably 10 ° C to 100 ° C. Since it is possible to manufacture by such a low temperature process, the manufacturing cost can be reduced. The time of immersion in the solution varies depending on the concentration of the solution used and the type of compound, but is preferably about 1 to 30 minutes. The preparation of the layer thickness can be appropriately adjusted depending on the time of immersion in the solution.

溶液に含まれるIIIb族元素を含む化合物としては、IIIb族元素のハロゲン化物(塩化物、ヨウ化物または臭化物、以下、同様)、酢酸塩、硝酸塩、硫酸塩から適宜選択することが可能である。VIb族元素を含む化合物はVIb族元素の窒素有機化合物であることが好ましく、具体的にはチオアセトアミドおよびチオ尿素が好ましい。IIb族元素を含む化合物は、IIb族元素のハロゲン化物、酢酸塩、硝酸塩および硫酸塩から適宜選択することが可能である。なお、第一の工程を液相法で行う場合のVIb族元素を含む化合物は、上記と同様のものを利用することができる。また、Ib族元素を含む化合物としては、Ib族元素のハロゲン化物、酢酸塩、硝酸塩、硫酸塩から適宜選択することが可能である。用いる溶液の濃度は、化合物によっても異なるが0.005モル/L〜0.1モル/Lであることが好ましい。   The compound containing a group IIIb element contained in the solution can be appropriately selected from a halide of a group IIIb element (chloride, iodide or bromide, hereinafter the same), acetate, nitrate, and sulfate. The compound containing a VIb group element is preferably a nitrogen organic compound of a VIb group element, and specifically, thioacetamide and thiourea are preferred. The compound containing a group IIb element can be appropriately selected from a halide, acetate, nitrate, and sulfate of a group IIb element. In addition, the same thing as the above can be utilized for the compound containing a VIb group element in the case of performing a 1st process by a liquid phase method. In addition, the compound containing a group Ib element can be appropriately selected from halides, acetates, nitrates, and sulfates of group Ib elements. The concentration of the solution used varies depending on the compound, but is preferably 0.005 mol / L to 0.1 mol / L.

化合物半導体表層を形成した後に、化合物半導体表層を熱処理することが好ましい。熱処理によって、化合物半導体表層の内部および化合物半導体表層と基体としたカルコパイライト系化合物半導体層との界面における欠陥密度をさらに減少させることができ、不連続性をより緩和することが可能である。熱処理は100℃〜400℃の範囲で実施することが好ましく、200℃〜350℃の範囲で実施することがより好ましい。   It is preferable to heat-treat the compound semiconductor surface layer after forming the compound semiconductor surface layer. By the heat treatment, the defect density in the compound semiconductor surface layer and at the interface between the compound semiconductor surface layer and the chalcopyrite compound semiconductor layer as the substrate can be further reduced, and the discontinuity can be further relaxed. The heat treatment is preferably performed in the range of 100 ° C to 400 ° C, and more preferably in the range of 200 ° C to 350 ° C.

次に図2および図3を参照して、本発明の製造方法によって製造される化合物半導体層を光電変換層として用いた光電変換素子について説明する。図2は光電変換素子の一実施の形態を示す概略断面図である。なお、視認しやすくするため、図中、各構成要素の縮尺等は実際のものとは適宜異ならせてある。図2に示すように光電変換素子1は、基板10上に、下部電極(裏面電極)20と光電変換層30とバッファ層40と窓層50と透光性導電層(透明電極)60と上部電極(グリッド電極)70とが順次積層されたものである。   Next, with reference to FIG. 2 and FIG. 3, the photoelectric conversion element using the compound semiconductor layer manufactured by the manufacturing method of this invention as a photoelectric converting layer is demonstrated. FIG. 2 is a schematic cross-sectional view showing an embodiment of a photoelectric conversion element. In addition, in order to make it easy to visually recognize, the scale of each component in the drawing is appropriately different from the actual one. As shown in FIG. 2, the photoelectric conversion element 1 includes a lower electrode (back electrode) 20, a photoelectric conversion layer 30, a buffer layer 40, a window layer 50, a translucent conductive layer (transparent electrode) 60, and an upper portion on a substrate 10. An electrode (grid electrode) 70 is sequentially laminated.

そして、光電変換層30はその表面に本発明の製造方法によって製造される光電変換層30の組成とは異なる組成の化合物半導体表層31が形成されている。光電変換層30の膜厚は特に制限されず、1.0〜3.0μmが好ましく、1.5〜2.0μmが特に好ましい。化合物半導体表層31の膜厚は10nm以下であることが好ましい(半導体層31aの層厚は5〜10nm程度が好ましい。)   And the compound semiconductor surface layer 31 of the composition different from the composition of the photoelectric converting layer 30 manufactured by the manufacturing method of this invention is formed in the photoelectric converting layer 30 on the surface. The film thickness of the photoelectric conversion layer 30 is not particularly limited, and is preferably 1.0 to 3.0 μm, particularly preferably 1.5 to 2.0 μm. The thickness of the compound semiconductor surface layer 31 is preferably 10 nm or less (the thickness of the semiconductor layer 31a is preferably about 5 to 10 nm).

基板10は基材11の少なくとも一方の面側を陽極酸化して得られた基板である。基材11は、Alを主成分とするAl基材、Feを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl材が複合された複合基材、あるいはFeを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl膜が成膜された基材であることが好ましい。   The substrate 10 is a substrate obtained by anodizing at least one surface side of the base material 11. The base material 11 is an Al base material containing Al as a main component, a composite base material in which an Al material containing Al as a main component is combined on at least one surface side of an Fe material containing Fe as a main component, or Fe as a main component. A base material in which an Al film mainly composed of Al is formed on at least one surface side of the Fe material as a component is preferable.

基板10は、図3の左図に示すように、基材11の両面に陽極酸化膜12が形成されたものでもよいし、図3の右図に示すように、基材11の片面に陽極酸化膜12が形成されたものでもよい。陽極酸化膜12はAl23を主成分とする膜である。デバイスの製造過程において、AlとAl23との熱膨張係数差に起因した基板の反り、およびこれによる膜剥がれ等を抑制するには、図2の左図に示すように基材11の両面に陽極酸化膜12が形成されたものがより好ましい。 The substrate 10 may be one in which an anodic oxide film 12 is formed on both surfaces of a base material 11 as shown in the left diagram of FIG. 3, or an anode on one surface of the base material 11 as shown in the right diagram of FIG. The oxide film 12 may be formed. The anodic oxide film 12 is a film mainly composed of Al 2 O 3 . In order to suppress the warpage of the substrate due to the difference in thermal expansion coefficient between Al and Al 2 O 3 and the film peeling due to this in the device manufacturing process, as shown in the left diagram of FIG. More preferably, the anodic oxide film 12 is formed on both surfaces.

下部電極(裏面電極)20の主成分としては特に制限されず、Mo,Cr,W,およびこれらの組合せが好ましく、Mo等が特に好ましい。下部電極(裏面電極)20の膜厚は制限されず、200〜1000nm程度が好ましい。   The main component of the lower electrode (back electrode) 20 is not particularly limited, and Mo, Cr, W, and combinations thereof are preferable, and Mo or the like is particularly preferable. The film thickness of the lower electrode (back electrode) 20 is not limited and is preferably about 200 to 1000 nm.

バッファ層40は、CdS、ZnS、Zn(S,O)、Zn(S,O,OH)を主成分とする層からなる。バッファ層40の導電型は特に制限されず、n型等が好ましい。バッファ層40の膜厚は特に制限されず、10nm〜2μmが好ましく、15〜200nmがより好ましい。   The buffer layer 40 is a layer mainly composed of CdS, ZnS, Zn (S, O), and Zn (S, O, OH). The conductivity type of the buffer layer 40 is not particularly limited, and n-type or the like is preferable. The film thickness of the buffer layer 40 is not particularly limited, and is preferably 10 nm to 2 μm, more preferably 15 to 200 nm.

窓層50は、光を取り込む中間層である。窓層50の組成としては特に制限されず、i−ZnO等が好ましい。窓層50の膜厚は特に制限されず、10nm〜2μmが好ましく、15〜200nmがより好ましい。なお、窓層は任意の層であり、窓層50のない光電変換素子としてもよい。   The window layer 50 is an intermediate layer that captures light. The composition of the window layer 50 is not particularly limited, and i-ZnO or the like is preferable. The film thickness of the window layer 50 is not particularly limited, preferably 10 nm to 2 μm, and more preferably 15 to 200 nm. The window layer is an arbitrary layer and may be a photoelectric conversion element without the window layer 50.

透光性導電層(透明電極)60は、光を取り込むと共に、下部電極20と対になって、光電変換層30で生成された電流が流れる電極として機能する層である。透光性導電層60の組成としては特に制限されず、ZnO:Al等のn−ZnO等が好ましい。透光性導電層60の膜厚は特に制限されず、50nm〜2μmが好ましい。   The translucent conductive layer (transparent electrode) 60 is a layer that takes in light and functions as an electrode through which a current generated in the photoelectric conversion layer 30 flows in a pair with the lower electrode 20. The composition of the translucent conductive layer 60 is not particularly limited, and n-ZnO such as ZnO: Al is preferable. The film thickness of the translucent conductive layer 60 is not particularly limited, and is preferably 50 nm to 2 μm.

上部電極(グリッド電極)70の主成分としては特に制限されず、Al等が挙げられる。上部電極70膜厚は特に制限されず、0.1〜3μmが好ましい。   The main component of the upper electrode (grid electrode) 70 is not particularly limited, and examples thereof include Al. The film thickness of the upper electrode 70 is not particularly limited, and is preferably 0.1 to 3 μm.

本発明の製造方法によって製造される化合物半導体層を利用した光電変換素子は、太陽電池等に好ましく使用することができる。光電変換素子1に対して必要に応じて、カバーガラス、保護フィルム等を取り付けて、太陽電池とすることができる。
以下、本発明の化合物半導体層の製造方法を実施例によりさらに詳細に説明する。
The photoelectric conversion element using the compound semiconductor layer manufactured by the manufacturing method of the present invention can be preferably used for a solar cell or the like. If necessary, a cover glass, a protective film, or the like can be attached to the photoelectric conversion element 1 to form a solar cell.
EXAMPLES Hereinafter, the manufacturing method of the compound semiconductor layer of this invention is demonstrated in detail by an Example.

(積層体A)
基板として厚み1mmのソーダライムガラス(SLG)基板上に、スパッタ法によりMo下部電極を0.8μm厚で成膜し、Mo下部電極上にCIGS層の成膜法の一つとして知られている3段階法を用い、光吸収層として膜厚1.8μmのCu(In0.7Ga0.3)Se2層を成膜したものを積層体Aとした。
(Laminate A)
It is known as one of the methods for forming a CIGS layer on a Mo lower electrode by depositing a Mo lower electrode with a thickness of 0.8 μm on a 1 mm thick soda lime glass (SLG) substrate by sputtering. A laminate A was obtained by forming a Cu (In 0.7 Ga 0.3 ) Se 2 layer having a thickness of 1.8 μm as a light absorption layer using a three-stage method.

(積層体B)
ステンレス(SUS)、Al複合基材上のAl表面にアルミニウム陽極酸化膜(AAO)を形成した陽極酸化基板を用い、さらにAAO表面にソーダライムガラス(SLG)層が形成された基板を準備した。基板中の各層の厚みは、SUS:300μm超、Al:300μm、AAO:20μm、SLG:0.2μmとした。SLG層上に、スパッタ法によりMo下部電極を0.8μm厚で成膜し、Mo下部電極上にCIGS層の成膜法の一つとして知られている3段階法を用い、光吸収層として膜厚1.8μmのCu(In0.7Ga0.3)Se2層を成膜したものを積層体Bとした。
(Laminated body B)
Using a stainless steel (SUS), an anodized substrate having an aluminum anodic oxide film (AAO) formed on the Al surface on an Al composite substrate, and a substrate having a soda lime glass (SLG) layer formed on the AAO surface was prepared. The thickness of each layer in the substrate was SUS: over 300 μm, Al: 300 μm, AAO: 20 μm, and SLG: 0.2 μm. A Mo lower electrode is formed on the SLG layer by sputtering to a thickness of 0.8 μm, and a three-stage method known as one of CIGS layer forming methods is formed on the Mo lower electrode as a light absorption layer. A layered product B was obtained by forming a Cu (In 0.7 Ga 0.3 ) Se 2 layer having a thickness of 1.8 μm.

(第一の工程の概要)
水50mlに対してIb族元素を含む化合物およびVIb族元素を含む化合物を所定量混合してよく攪拌した。充分攪拌した後、この水溶液を80℃に加熱して積層体を1分〜30分間浸漬した。反応終了後純水にて十分に洗浄した後、積層体を乾燥させた。
(Outline of the first process)
A predetermined amount of a compound containing an Ib group element and a compound containing a VIb group element was mixed with 50 ml of water and stirred well. After sufficiently stirring, the aqueous solution was heated to 80 ° C. to immerse the laminate for 1 to 30 minutes. After completion of the reaction, the laminate was sufficiently washed with pure water and then dried.

(第二の工程の概要)
水50mlに対してIIIb族元素を含む化合物およびVI族元素を含む化合物を所定量混合してよく攪拌した。IIIb族元素およびVIb族元素以外にIIb族元素を含む場合には、IIb族元素を所定量添加した。充分攪拌した後、この水溶液を80℃に加熱して積層体を1分〜30分間浸漬した。反応終了後純水にて十分に洗浄した後、積層体を乾燥させた。
(Outline of the second process)
A predetermined amount of a compound containing a group IIIb element and a compound containing a group VI element was mixed with 50 ml of water and stirred well. When the IIb group element was included in addition to the IIIb group element and the VIb group element, a predetermined amount of the IIb group element was added. After sufficiently stirring, the aqueous solution was heated to 80 ° C. to immerse the laminate for 1 to 30 minutes. After completion of the reaction, the laminate was sufficiently washed with pure water and then dried.

(組成解析)
光吸収層の深さ方向の組成は2次イオン質量分析法(SIMS)を用いて測定した。
(Composition analysis)
The composition in the depth direction of the light absorption layer was measured using secondary ion mass spectrometry (SIMS).

(実施例1)
積層体Aを用いて、第一の工程はIb族元素を含む化合物として塩化第一銅を0.005mol、VIb族元素を含む化合物としてチオ硫酸ナトリウムを0.015mol用いた。第二の工程ではIIIb族元素を含む化合物として塩化インジウムを0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.05mol用いた。加熱時間は第一の工程を3分間、第二の工程は5分間とした。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、InおよびSであり、GaおよびSeは検出されなかった。
Example 1
Using the laminate A, the first step used 0.005 mol of cuprous chloride as a compound containing a group Ib element and 0.015 mol of sodium thiosulfate as a compound containing a group VIb element. In the second step, 0.005 mol of indium chloride was used as the compound containing the IIIb group element, and 0.05 mol of thioacetamide was used as the compound containing the VIb group element. The heating time was 3 minutes for the first step and 5 minutes for the second step. As a result of the composition analysis, the elements constituting the vicinity of the surface of the light absorption layer were Cu, In, and S, and Ga and Se were not detected.

(実施例2)
第一の工程は実施例1と同様とした。第二の工程はIIIb族元素を含む化合物として塩化インジウムを0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.05molさらにIIb族元素を含む化合物として硫酸カドミウムを0.001mol用いた。加熱時間は第一の工程を3分間、第二の工程は5分間とした。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、In、CdおよびSであり、GaおよびSeは検出されなかった。
(Example 2)
The first step was the same as in Example 1. In the second step, 0.005 mol of indium chloride was used as a compound containing a group IIIb element, 0.05 mol of thioacetamide was used as a compound containing a group VIb element, and 0.001 mol of cadmium sulfate was used as a compound containing a group IIb element. The heating time was 3 minutes for the first step and 5 minutes for the second step. As a result of the composition analysis, the elements constituting the surface vicinity of the light absorption layer were Cu, In, Cd, and S, and Ga and Se were not detected.

(実施例3)
第一の工程は実施例1と同様とした。第二の工程はIIIb族元素を含む化合物として塩化インジウムを0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.05molさらにIIb族元素を含む化合物として硫酸亜鉛七水和物を0.001mol用いた。加熱時間は第一の工程を3分間、第二の工程は5分間とした。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、In、ZnおよびSであり、GaおよびSeは検出されなかった。
(Example 3)
The first step was the same as in Example 1. The second step is 0.005 mol of indium chloride as a compound containing a group IIIb element, 0.05 mol of thioacetamide as a compound containing a group VIb element, and 0.001 mol of zinc sulfate heptahydrate as a compound containing a group IIb element. Using. The heating time was 3 minutes for the first step and 5 minutes for the second step. As a result of the composition analysis, the elements constituting the surface vicinity of the light absorption layer were Cu, In, Zn and S, and Ga and Se were not detected.

(実施例4)
積層体Bを用いて、第一の工程はIb族元素を含む化合物として塩化第一銅を0.005mol、VI族元素を含む化合物としてチオ硫酸ナトリウムを0.015mol用いた。第二の工程はIIIb族元素を含む化合物として塩化インジウムを0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.05mol用いた。加熱時間は第一の工程を3分30秒、第二の工程は6分間とした。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、InおよびSであり、GaおよびSeは検出されなかった。
Example 4
In the first step, 0.005 mol of cuprous chloride was used as a compound containing a group Ib element and 0.015 mol of sodium thiosulfate was used as a compound containing a group VI element. In the second step, 0.005 mol of indium chloride was used as the compound containing the IIIb group element, and 0.05 mol of thioacetamide was used as the compound containing the VIb group element. The heating time was 3 minutes 30 seconds in the first step and 6 minutes in the second step. As a result of the composition analysis, the elements constituting the vicinity of the surface of the light absorption layer were Cu, In, and S, and Ga and Se were not detected.

(比較例1)
積層体Aを用いてIb族元素を含む化合物として塩化第一銅を0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.015molおよびIIIb族元素を含む化合物として塩化インジウムを0.005molの三元素同時に含有する溶液に浸漬して5分間加熱した。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、In、SおよびOであり、GaおよびSeは検出されなかった。
(Comparative Example 1)
Using Stack A, 0.005 mol of cuprous chloride as a compound containing a group Ib element, 0.015 mol of thioacetamide as a compound containing a group VIb element, and 0.005 mol of indium chloride as a compound containing a group IIIb element It was immersed in a solution containing the three elements simultaneously and heated for 5 minutes. As a result of the composition analysis, the elements constituting the surface vicinity of the light absorption layer were Cu, In, S and O, and Ga and Se were not detected.

(比較例2)
積層体Bを用いてIb族元素を含む化合物として塩化第一銅を0.005mol、VIb族元素を含む化合物としてチオアセトアミドを0.015molおよびIIIb族元素を含む化合物として塩化インジウムを0.005molの三元素同時に含有する溶液に浸漬して6分間加熱した。組成分析の結果、光吸収層の表面近傍を構成する元素は、Cu、In、SおよびOであり、GaおよびSeは検出されなかった。
(Comparative Example 2)
Using Stack B, 0.005 mol of cuprous chloride as a compound containing a group Ib element, 0.015 mol of thioacetamide as a compound containing a group VIb element, and 0.005 mol of indium chloride as a compound containing a group IIIb element It was immersed in a solution containing the three elements simultaneously and heated for 6 minutes. As a result of the composition analysis, the elements constituting the surface vicinity of the light absorption layer were Cu, In, S and O, and Ga and Se were not detected.

(評価)
(発電効率の測定)
実施例および比較例で形成した光吸収層上にスパッタ法で窓層としてi−ZnO層および透明導電層としてAlをドープしたn−ZnO層を成膜した。さらにその上に蒸着法によりAl上部電極の成膜を行い、太陽電池特性を評価するためのセルとした。作製したセルにAir Mass(AM)=1.5、100mW/cm2の擬似太陽光を用いてエネルギー変換効率を測定した。
(Evaluation)
(Measurement of power generation efficiency)
An i-ZnO layer as a window layer and an n-ZnO layer doped with Al as a transparent conductive layer were formed by sputtering on the light absorption layers formed in Examples and Comparative Examples. Further, an Al upper electrode was formed thereon by vapor deposition to form a cell for evaluating solar cell characteristics. The energy conversion efficiency was measured using the artificial sunlight of Air Mass (AM) = 1.5 and 100 mW / cm 2 for the produced cell.

実施例の第一および第二の工程で用いたIb族元素、IIIb族元素、VIb族元素の詳細、形成した光吸収層の内部と表面の組成、評価結果を表1に、比較例の化合物半導体表層形成工程の詳細、形成した光吸収層の内部と表面の組成、評価結果を表2に示す。なお実施例1〜3および比較例1の発電効率は積層体Aを基準とした、実施例4および比較例2の発電効率は積層体Bを基準とした相対値で示した。また、表中のCIGSeはCu(In0.7Ga0.3)Se2、CISはCuInS2であり、CISOは構造は未確定であるが恐らくCuまたはInの水酸化物を含む複合化合物であると考える。 Table 1 shows the details of the Ib group element, IIIb group element, and VIb group element used in the first and second steps of the examples, the composition of the inside and the surface of the formed light absorption layer, and the evaluation results. Table 2 shows the details of the semiconductor surface layer forming step, the composition of the inside and surface of the formed light absorption layer, and the evaluation results. The power generation efficiencies of Examples 1 to 3 and Comparative Example 1 are shown as relative values based on the laminate A, and the power generation efficiencies of Example 4 and Comparative Example 2 are shown as relative values based on the laminate B. Also, CIGSe in the table is Cu (In 0.7 Ga 0.3 ) Se 2 , CIS is CuInS 2 , and CISO is a complex compound that has an undefined structure but probably contains Cu or In hydroxide.

Figure 2012174759
Figure 2012174759

Figure 2012174759
Figure 2012174759

表1および表2に示すように、実施例の光吸収層はその内部は光吸収能が高いCIGSe材料によって形成され、その表面はキャリア伝達能が高い材料で形成されているため、内部で高効率で変換されたキャリアをエネルギーバンドの連続性を高めた表面層を経由して取り出すことができるため、より発電効率の高い太陽電池とすることができた。一方、比較例の光吸収層は化合物半導体表層形成工程が一段階であるために、所望とする表層を形成することができず、発電効率は低いものとなった。なお、実施例と比較例は積層体Aあるいは積層体Bの発電効率を基準とした相対値で示しているため、表に示す数値には一見隔たりが小さいように見えるが、実際には表に示す差よりも大きな相違である。   As shown in Table 1 and Table 2, the light absorption layer of the example is formed of a CIGSe material having a high light absorption capability inside, and the surface thereof is formed of a material having a high carrier transmission capability. Since the carriers converted by efficiency can be taken out via the surface layer having improved energy band continuity, a solar cell with higher power generation efficiency could be obtained. On the other hand, since the light absorption layer of the comparative example has a single step of forming the compound semiconductor surface layer, the desired surface layer could not be formed, and the power generation efficiency was low. In addition, since the example and the comparative example are shown as relative values based on the power generation efficiency of the layered product A or the layered product B, the numerical values shown in the table seem to be slightly different from each other. The difference is larger than the difference shown.

1 光電変換素子
10 陽極酸化基板
11 Al基材
12 陽極酸化膜
20 下部電極(裏面電極)
30 カルコパイライト系化合物半導体層(光電変換半導体層)
31 化合物半導体表層
40 バッファ層
50 窓層
60 透光性導電層(透明電極)
70 上部電極(グリッド電極)
DESCRIPTION OF SYMBOLS 1 Photoelectric conversion element 10 Anodized substrate 11 Al base material 12 Anodized film 20 Lower electrode (back surface electrode)
30 Chalcopyrite compound semiconductor layer (photoelectric conversion semiconductor layer)
31 Compound semiconductor surface layer 40 Buffer layer 50 Window layer 60 Translucent conductive layer (transparent electrode)
70 Upper electrode (grid electrode)

Claims (7)

Ib族元素とIIIb族元素とVIb族元素とからなるカルコパイライト系化合物半導体層の表面に該カルコパイライト系化合物半導体層とは異なる組成を有するIb族元素とIIIb族元素とVIb族元素とからなる化合物半導体表層を形成する化合物半導体層の製造方法であって、前記カルコパイライト系化合物半導体層の表面に少なくともIb族元素とVIb族元素とからなる半導体層を形成する第一の工程と、該第一の工程で形成した半導体層を少なくともIIIb族元素を含む化合物とVIb族元素を含む化合物を含有する溶液に浸漬させる第二の工程とにより前記化合物半導体表層を形成することを特徴とする化合物半導体層の製造方法。   The surface of a chalcopyrite compound semiconductor layer comprising a group Ib element, a group IIIb element and a group VIb element comprises a group Ib element, a group IIIb element and a group VIb element having a composition different from that of the chalcopyrite compound semiconductor layer. A method for producing a compound semiconductor layer for forming a compound semiconductor surface layer, the method comprising: forming a semiconductor layer comprising at least a group Ib element and a group VIb element on the surface of the chalcopyrite compound semiconductor layer; The compound semiconductor surface layer is formed by a second step of immersing the semiconductor layer formed in one step in a solution containing at least a compound containing a group IIIb element and a compound containing a group VIb element. Layer manufacturing method. 前記第二の工程における溶液がさらにIIb族元素を含む化合物を含むことを特徴とする請求項1記載の化合物半導体層の製造方法。   The method for producing a compound semiconductor layer according to claim 1, wherein the solution in the second step further contains a compound containing a group IIb element. 前記第一の工程におけるIb族元素がCuであり、VIb族元素がSまたはSeの少なくともいずれかであることを特徴とする請求項1または2記載の化合物半導体層の製造方法。   The method for producing a compound semiconductor layer according to claim 1 or 2, wherein the Ib group element in the first step is Cu and the VIb group element is at least one of S and Se. 前記第二の工程におけるIIIb族元素がInまたはGaの少なくともいずれかであり、VIb族元素がSまたはSeの少なくともいずれかであることを特徴とする請求項1、2または3記載の化合物半導体層の製造方法。   4. The compound semiconductor layer according to claim 1, wherein the group IIIb element in the second step is at least one of In or Ga, and the group VIb element is at least one of S or Se. Manufacturing method. 前記第二の工程におけるIIb族元素がZnまたはCdの少なくともいずれかであることを特徴とする請求項2、3または4記載の化合物半導体層の製造方法。   The method for producing a compound semiconductor layer according to claim 2, 3 or 4, wherein the group IIb element in the second step is at least one of Zn and Cd. 基板上に、下部電極と、請求項1〜5いずれか1項記載の化合物半導体層の製造方法によって製造された化合物半導体層と、バッファ層と、透光性導電層とが順次積層されたことを特徴とする光電変換素子。   A lower electrode, a compound semiconductor layer manufactured by the method for manufacturing a compound semiconductor layer according to any one of claims 1 to 5, a buffer layer, and a light-transmitting conductive layer are sequentially stacked on the substrate. A photoelectric conversion element characterized by the above. 前記基板が、
Alを主成分とするAl基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板、
Feを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl材が複合された複合基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板、
Feを主成分とするFe材の少なくとも一方の面側にAlを主成分とするAl膜が成膜された基材の少なくとも一方の面側にAl23を主成分とする陽極酸化膜が形成された陽極酸化基板、
のいずれかであることを特徴とする請求項6記載の光電変換素子。
The substrate is
An anodized substrate in which an anodized film mainly composed of Al 2 O 3 is formed on at least one surface side of an Al base material mainly composed of Al;
An anodized film mainly composed of Al 2 O 3 is formed on at least one surface side of a composite base material in which an Al material composed mainly of Al is combined on at least one surface side of an Fe material mainly composed of Fe. Formed anodized substrate,
An anodized film mainly composed of Al 2 O 3 is formed on at least one surface side of a base material on which an Al film mainly composed of Al is formed on at least one surface side of an Fe material mainly composed of Fe. Formed anodized substrate,
The photoelectric conversion element according to claim 6, wherein the photoelectric conversion element is any one of the following.
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WO2016171157A1 (en) * 2015-04-24 2016-10-27 京セラ株式会社 Photoelectric conversion device
KR20160137947A (en) * 2013-12-23 2016-12-02 벵부 디자인 앤드 리서치 인스티튜트 포 글래스 인더스트리 Layer system for thin-film solar cells

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KR20160137947A (en) * 2013-12-23 2016-12-02 벵부 디자인 앤드 리서치 인스티튜트 포 글래스 인더스트리 Layer system for thin-film solar cells
JP2016541124A (en) * 2013-12-23 2016-12-28 バンブ・デザイン・アンド・リサーチ・インスティテュート・フォー・グラス・インダストリー Layer system for thin film solar cells
KR101882595B1 (en) * 2013-12-23 2018-08-24 벵부 디자인 앤드 리서치 인스티튜트 포 글래스 인더스트리 Layer system for thin-film solar cells
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