JP2012169489A - Solid-state imaging device and method of manufacturing the same and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize improvement of manufacturing efficiency, a reduction in cost, improvement of reliability, and a reduction in size.SOLUTION: A solid-state imaging device is configured in which an infrared cut filter layer 311 is provided on a surface of a glass substrate 301 facing a sensor component 100 so as to cover a portion corresponding to a pixel area PA and a part of a surrounding area SA located around the pixel area PA. A bonding layer 501 is provided in a peripheral portion of surfaces of the sensor component 100 and an infrared cut filter 300 opposed to each other so as to contact with a portion of the glass substrate 301 not covered by the infrared cut filter layer 311 and a peripheral portion of the infrared cut filter layer 311.

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof. The present invention also relates to an electronic device such as a camera including a solid-state imaging device.

  Electronic devices such as digital video cameras and digital still cameras include solid-state imaging devices. For example, the solid-state imaging device includes a CMOS (Complementary Metal Oxide Semiconductor) type image sensor chip and a CCD (Charge Coupled Device) type image sensor chip.

  In the solid-state imaging device, a plurality of pixels are arranged in an array on the imaging surface. In each pixel, a photoelectric conversion unit is provided. The photoelectric conversion unit is, for example, a photodiode, and receives signal light incident through an optical system including an external imaging lens on the light receiving surface and performs photoelectric conversion, thereby generating a signal charge.

  The solid-state imaging device is manufactured, for example, in the form of a chip size package. Specifically, the glass substrate is bonded so as to face one surface of a silicon wafer provided with a plurality of solid-state image sensors (sensor elements). Here, partitioning is performed so that adjacent solid-state imaging devices are partitioned by an adhesive material, and this bonding is performed. Then, through silicon vias are formed in the silicon wafer, and wiring is performed between one surface and the other surface. Then, after bumps are formed on the other surface, dicing is performed to obtain a chip size. Thereby, the solid-state imaging device is manufactured in the form of a chip size package.

  Further, in the solid-state imaging device, an optical filter is provided between the external imaging lens and the imaging surface in order to improve the image quality of the captured image. For example, an infrared cut filter that cuts infrared light other than visible light is arranged as an optical filter, which makes it possible to improve color reproducibility.

  For example, a glass substrate is made to function as an infrared cut filter by depositing a multilayer film on one surface of a glass substrate to be bonded in a chip size package to provide an infrared cut filter layer (for example, a patent Reference 1).

JP 2001-203913 (for example, paragraph [0014])

  In order to satisfy the spectral characteristics of visible light, the infrared cut filter layer composed of a multilayer film is formed, for example, by depositing 30 to 60 layers on one surface of a glass substrate. Therefore, the glass substrate may be warped due to stress due to the film formation.

  For this reason, it may be difficult to bond the glass substrate provided with the infrared cut filter layer formed of the multilayer film and the silicon wafer provided with the pixels. In addition, there may be a problem in transport and chucking when forming the through silicon via.

  In particular, when an infrared cut filter layer composed of a multilayer film is provided on a large glass substrate of 8 inches or more, large warpage is likely to occur. For example, when a 12-inch glass substrate is used, warping of several millimeters occurs. As described above, when a large glass substrate is used, the occurrence of the above-described problems becomes obvious.

  Moreover, when the infrared cut filter layer which consists of a multilayer film is provided, an infrared cut filter layer may peel by the impact in a manufacturing process.

  In particular, when an infrared cut filter layer composed of a multilayer film is provided on the surface of the glass substrate opposite to the surface to be attached to the silicon wafer, scratches are generated in the infrared cut filter layer during conveyance and chucking. There is a case. In addition, when the lens is bonded to the chip size package, the infrared cut filter layer composed of the multilayer film may be peeled off from the interface with the glass substrate. Further, when carrying or chucking while supporting on the surface provided with the infrared cut filter layer, air may leak from the pattern of the infrared cut filter layer. For this reason, it may be difficult to improve manufacturing efficiency.

  In addition, when the infrared cut filter is composed of other parts, the cost may increase due to the use of another part. Moreover, the thickness of the whole may become thick.

  As described above, when a glass substrate provided with an infrared cut filter layer composed of a multilayer film is used, it may be difficult to manufacture the device and it may be difficult to improve manufacturing efficiency. In addition, the reliability of the apparatus may be reduced. In addition, it may be difficult to reduce the cost of the device or downsize the device.

  Therefore, the present invention provides a solid-state imaging device, a manufacturing method thereof, and an electronic apparatus that can improve manufacturing efficiency, reduce costs, improve reliability, and achieve miniaturization.

  The solid-state imaging device according to the present invention includes an optical filter in which a filter layer is formed on a transparent substrate, and a pixel that receives light incident through the filter layer, and is disposed so as to face the optical filter. A plurality of solid-state imaging devices arranged in a pixel region of a substrate; and an adhesive layer provided between the optical filter and the solid-state imaging device and bonding the optical filter and the solid-state imaging device. The filter layer is a dielectric multilayer film in which a plurality of high-refractive index dielectric layers and low-refractive index dielectric layers are alternately stacked, and faces the solid-state imaging device on the transparent substrate. A surface corresponding to the pixel region and a part of a region located around the pixel region, and the adhesive layer includes the solid-state imaging device and the optical surface. fill Doo is in the peripheral portion of the facing surface, a portion in the transparent substrate not covered by said filter layer, in the peripheral portion of the filter layer, is provided so as to at least contact.

  The method for manufacturing a solid-state imaging device according to the present invention includes a step of forming an optical filter by forming a filter layer on a transparent substrate, and a solid-state by providing a plurality of pixels that receive light in a pixel region of a semiconductor substrate. A solid-state image sensor forming step for forming an image sensor, and an adhesive layer is provided between the optical filter and the solid-state image sensor facing each other so that the pixels receive light incident through the filter layer. The optical filter and the solid-state imaging device are bonded to each other, and in the optical filter forming step, a plurality of high refractive index dielectric layers and low refractive index dielectric layers are alternately provided. Of the surface of the transparent substrate facing the solid-state imaging device, the laminated dielectric multilayer film is a portion corresponding to the pixel region and a region located around the pixel region. The filter layer is formed so as to cover a part thereof, and in the bonding step, the transparent substrate is a peripheral portion of the surface facing the semiconductor substrate and is covered with the filter layer. By providing the adhesive layer so as to be at least in contact with the portion not present and the peripheral portion of the filter layer, the optical filter and the solid-state imaging device are bonded together.

  In the present invention, the transparent multilayer substrate is coated with the dielectric multilayer film on the portion of the surface facing the solid-state imaging device corresponding to the pixel region and part of the region located around the pixel region. A filter layer is formed. An optical filter is provided by providing an adhesive layer so as to be in contact with at least the peripheral portion of the transparent substrate facing the semiconductor substrate and not covered with the filter layer, and the peripheral portion of the filter layer. And a solid-state imaging device are bonded together.

  According to the present invention, it is possible to provide a semiconductor device, a manufacturing method thereof, and an electronic apparatus that can improve manufacturing efficiency, reduce costs, improve reliability, and achieve miniaturization.

FIG. 1 is a configuration diagram showing a configuration of a camera 40 in Embodiment 1 according to the present invention. FIG. 2 is a diagram illustrating a main configuration of the solid-state imaging device 1 according to the first embodiment of the present invention. FIG. 3 is a diagram illustrating a main configuration of the solid-state imaging device 1 according to the first embodiment of the present invention. FIG. 4 is a diagram showing an overall configuration of the sensor element 100 in the first embodiment according to the present invention. FIG. 5 is a diagram illustrating a main configuration of the sensor element 100 according to the first embodiment of the present invention. FIG. 6 is a diagram showing the pixel P in the first embodiment according to the present invention. FIG. 7 is a diagram illustrating the pixel P in the first embodiment of the present invention. FIG. 8 is a diagram showing the color filter CF in the first embodiment according to the present invention. FIG. 9 is a timing chart showing a pulse signal supplied to each unit when reading a signal from the pixel P in the first embodiment according to the present invention. FIG. 10 is a diagram illustrating a method for manufacturing the solid-state imaging device according to the first embodiment of the present invention. FIG. 11 is a diagram illustrating a method for manufacturing the solid-state imaging device according to the first embodiment of the present invention. FIG. 12 is a diagram illustrating a manufacturing method for forming the infrared cut filter 300 in the first embodiment according to the present invention. FIG. 13 is a diagram illustrating an upper surface of the infrared cut filter 300 before dicing in the first embodiment according to the present invention. FIG. 14 is a diagram showing a solid-state imaging device of a comparative example of Embodiment 1 according to the present invention. FIG. 15 is a diagram illustrating a main part of the solid-state imaging device according to the second embodiment of the present invention. FIG. 16 is a diagram illustrating a manufacturing method for forming the infrared cut filter 300 in the third embodiment of the present invention. FIG. 17 is a diagram illustrating a main part of the solid-state imaging device according to the fourth embodiment of the present invention. FIG. 18 is a diagram illustrating a manufacturing method for forming the infrared cut filter 300 in the fourth embodiment of the present invention. FIG. 19 is a diagram illustrating a main part of the solid-state imaging device according to the fifth embodiment of the present invention. FIG. 20 is a diagram illustrating a main part of the solid-state imaging device according to the fifth embodiment of the present invention. FIG. 21 is a diagram illustrating a main part of the solid-state imaging device according to the fifth embodiment of the present invention.

  Embodiments according to the present invention will be described with reference to the drawings.

The description will be given in the following order.
1. Embodiment 1 (in the case of cavity structure)
2. Embodiment 2 (Cavityless structure)
3. Embodiment 3 (When a filter layer is formed by laminating a plurality of resist patterns)
4). Embodiment 4 (when the filter layer is tapered)
5. Embodiment 5 (in the case of a three-dimensional mounting structure)
6). Other

<1. Embodiment 1>
[1] Apparatus Configuration (1-1) Main Configuration of Camera FIG. 1 is a configuration diagram showing the configuration of the camera 40 in Embodiment 1 according to the present invention.

  As shown in FIG. 1, the camera 40 includes a solid-state imaging device 1, an optical system 42, a control unit 43, and a signal processing unit 44. Each part will be described sequentially.

  The solid-state imaging device 1 generates signal charges by receiving incident light H incident as a subject image via the optical system 42 on the imaging surface PS and performing photoelectric conversion. Here, the solid-state imaging device 1 is driven based on a control signal output from the control unit 43. Then, the signal charge is read and output as an electric signal.

  The optical system 42 includes optical members such as an imaging lens and a diaphragm, and is disposed so as to collect incident light H onto the imaging surface PS of the solid-state imaging device 1.

  The control unit 43 outputs various control signals to the solid-state imaging device 1 and the signal processing unit 44, and controls and drives the solid-state imaging device 1 and the signal processing unit 44.

  For example, the signal processing unit 44 generates a color digital image by performing signal processing on the electrical signal output from the solid-state imaging device 1.

(1-2) Main Configuration of Solid-State Imaging Device The main configuration of the solid-state imaging device 1 will be described.

  2 and 3 are diagrams showing the main configuration of the solid-state imaging device 1 according to the first embodiment of the present invention.

  Here, FIG. 2 is a perspective view, FIG. 3 is a cross-sectional view, and both schematically show the configuration of the solid-state imaging device 1.

  As shown in FIGS. 2 and 3, the solid-state imaging device 1 of the present embodiment includes a sensor element 100, an infrared cut filter 300, and an adhesive layer 501.

  As shown in FIGS. 2 and 3, the sensor element 100 and the infrared cut filter 300 are arranged so as to face each other.

  Here, as shown in FIG. 3, a hollow cavity portion 600 is provided in the central portion of the facing surfaces of the sensor element 100 and the infrared cut filter 300. Then, an adhesive layer 501 is provided in the peripheral portion of the facing surface of the sensor element 100 and the infrared cut filter 300, and both are bonded together by the adhesive layer 501.

  Each part which comprises the solid-state imaging device 1 is demonstrated sequentially.

(A) Sensor element 100 The sensor element 100 which comprises the solid-state imaging device 1 is demonstrated.

  As shown in FIGS. 2 and 3, in the solid-state imaging device 1, the sensor element 100 includes a semiconductor substrate 101. For example, the semiconductor substrate 101 is made of single crystal silicon, and a pixel area PA and a peripheral area SA are provided on a surface facing the infrared cut filter 300. In the sensor element 100, each pixel in the pixel region PA receives incident light H in the visible light region that enters from above through the infrared cut filter 300 and the cavity portion 600, and outputs the received light as an electrical signal.

  Although details will be described later, each pixel in the pixel area PA is provided with a microlens ML as shown in FIG. The sensor element 100 is bonded to the infrared cut filter 300 with an adhesive layer 501.

(A-1) Overall Configuration of Sensor Element 100 FIG. 4 is a diagram illustrating an overall configuration of the sensor element 100 in the first embodiment according to the present invention. FIG. 4 shows the top surface.

  In the sensor element 100, the pixel area PA is provided in the central portion of the semiconductor substrate 101 as shown in FIG. The pixel area PA has a rectangular shape, and a plurality of pixels P are arranged in each of the horizontal direction x and the vertical direction y.

  In the sensor element 100, the peripheral area SA is located around the pixel area PA as shown in FIG. In the peripheral area SA, peripheral circuits are provided.

  Specifically, as shown in FIG. 4, a vertical drive circuit 13, a column circuit 14, a horizontal drive circuit 15, an external output circuit 17, a timing generator (TG) 18, and a shutter drive circuit 19 are It is provided as a peripheral circuit. Each unit is driven based on a control signal input from the control unit 43 (see FIG. 1), and an imaging operation is executed.

  As shown in FIG. 4, the vertical drive circuit 13 is provided on the side of the pixel area PA in the peripheral area SA, and selects and drives the pixels P in the pixel area PA in units of rows.

  As shown in FIG. 4, the column circuit 14 is provided at the lower end of the pixel area PA in the peripheral area SA, and performs signal processing on signals output from the pixels P in units of columns. Here, the column circuit 14 includes a CDS (Correlated Double Sampling) circuit (not shown), and performs signal processing to remove fixed pattern noise.

  As shown in FIG. 4, the horizontal drive circuit 15 is electrically connected to the column circuit 14. The horizontal drive circuit 15 includes, for example, a shift register, and sequentially outputs a signal held for each column of pixels P in the column circuit 14 to the external output circuit 17.

  As shown in FIG. 4, the external output circuit 17 is electrically connected to the column circuit 14, performs signal processing on the signal output from the column circuit 14, and then outputs the signal to the outside. The external output circuit 17 includes an AGC (Automatic Gain Control) circuit 17a and an ADC circuit 17b. In the external output circuit 17, after the AGC circuit 17a applies a gain to the signal, the ADC circuit 17b converts the analog signal into a digital signal and outputs it to the outside.

  As shown in FIG. 4, the timing generator 18 is electrically connected to each of the vertical drive circuit 13, the column circuit 14, the horizontal drive circuit 15, the external output circuit 17, and the shutter drive circuit 19. The timing generator 18 generates various timing signals and outputs them to the vertical drive circuit 13, the column circuit 14, the horizontal drive circuit 15, the external output circuit 17, and the shutter drive circuit 19, thereby performing drive control for each part.

  The shutter drive circuit 19 is configured to select the pixels P in units of rows and adjust the exposure time in the pixels P.

(A-2) Main part structure of sensor element 100 FIG. 5: is a figure which shows the principal part structure of the sensor element 100 in Embodiment 1 concerning this invention. FIG. 5 shows a partial cross section.

  In the sensor element 100, a wiring layer 111 is provided on the surface (upper surface) of the semiconductor substrate 101 as shown in FIG. The wiring layer 111 is a multilayer wiring layer and includes a plurality of wirings 111h and an insulating layer 111z. The wiring layer 111 is formed by alternately stacking wirings 111h and insulating films, and each wiring 111h is provided so as to be covered with the insulating layer 111z. In the wiring layer 111, a pad electrode PAD is provided in the peripheral area SA.

  In the sensor element 100, an insulating layer 400 and a conductive layer 401 are sequentially provided on the back surface (lower surface) of the semiconductor substrate 101 as shown in FIG. A bump 402 is provided on the lower surface of the conductive layer 401.

  In the sensor element 100, the photodiode 21 is provided in the semiconductor substrate 101 in the pixel area PA as shown in FIG. In the pixel area PA, the color filter CF and the microlens ML are sequentially provided on the upper surface of the wiring layer 111. Each of the photodiode 21, the color filter CF, and the microlens ML is provided in each of the plurality of pixels P provided in the pixel area PA. The photodiode 21 receives incident light H incident from the surface side of the semiconductor substrate 101 via the microlens ML, the color filter CF, and the wiring layer 111. That is, the solid-state imaging device according to the present embodiment is a “surface irradiation type” image sensor chip. Details of the pixel P will be described later.

  In the sensor element 100, a via hole VH penetrating the semiconductor substrate 101 is provided in the peripheral area SA as shown in FIG. That is, a through silicon via is provided. The via hole VH is formed so as to expose the lower surface of the pad electrode PAD provided in the wiring layer 111. The via hole VH is covered with a conductive layer 401 with an insulating layer 400 interposed therebetween. An opening is formed in the insulating layer 400 so as to expose a part of the lower surface of the pad electrode PAD. The conductive layer 401 is formed so as to fill the opening of the insulating layer 400, and is electrically connected to the pad electrode PAD. In the peripheral region SA, semiconductor elements constituting the peripheral circuit shown in FIG. 4 are formed on the semiconductor substrate 101, but are not shown in FIG.

(A-3) Configuration of Pixel P FIGS. 6 and 7 are diagrams showing the pixel P in Embodiment 1 according to the present invention.

  Here, FIG. 6 is a plan view of the pixel P. FIG. FIG. 7 is a diagram illustrating a circuit configuration of the pixel P.

  As shown in FIGS. 6 and 7, the pixel P includes a pixel transistor Tr in addition to the photodiode 21 shown in FIG. Here, the pixel transistor Tr includes a transfer transistor 22, an amplification transistor 23, a selection transistor 24, and a reset transistor 25, and is configured to perform an operation of reading signal charges from the photodiode 21.

  In the pixel P, a plurality of photodiodes 21 are arranged so as to correspond to the plurality of pixels P shown in FIG. That is, the image pickup surface (xy surface) is provided side by side in the horizontal direction x and in the vertical direction y orthogonal to the horizontal direction x. For example, the photodiode 21 includes a charge storage region (not shown) in which an n-type impurity is diffused inside the semiconductor substrate 101. A hole accumulation region (not shown) in which p-type impurities are diffused is formed at each interface between the upper surface side and the lower surface side of the n-type charge accumulation region so as to suppress the occurrence of dark current. Has been.

  As shown in FIG. 6, a pixel separation portion PB that electrically separates a plurality of pixels P is provided around the pixel P, and a photodiode 21 is provided in a region partitioned by the pixel separation portion PB. Is provided. For example, the pixel separation portion PB is formed by diffusing a p-type impurity in the semiconductor substrate 101 (see FIG. 4 and FIG. 5).

  As shown in FIG. 7, the anode of the photodiode 21 is grounded, and the accumulated signal charge (here, electrons) is read out by the pixel transistor Tr and output to the vertical signal line 27 as an electric signal. . Specifically, the photodiode 21 is connected to the gate of the amplification transistor 23 via the transfer transistor 22 as shown in FIG. In the photodiode 21, the accumulated signal charge is transferred as an output signal by the transfer transistor 22 to the floating diffusion FD connected to the gate of the amplification transistor 23.

  In the pixel P, a plurality of pixel transistors Tr are arranged so as to correspond to the plurality of pixels P shown in FIG. For example, as illustrated in FIG. 6, the pixel transistor Tr is formed in a pixel separation portion PB that separates the pixels P in the semiconductor substrate 101.

  Although not shown in FIG. 4, the pixel transistor Tr is provided on the surface of the semiconductor substrate 101 covered with the wiring layer 111. For example, each of the transistors 22 to 25 constituting the pixel transistor Tr is an N-channel MOS transistor, and each gate is formed using, for example, polysilicon. Each of the transistors 22 to 25 is covered with a wiring layer 111.

  In the pixel transistor Tr, the transfer transistor 22 is configured to transfer the signal charge generated by the photodiode 21 to the floating diffusion FD. Specifically, as shown in FIG. 7, the transfer transistor 22 is provided so as to be interposed between the photodiode 21 and the floating diffusion FD. The transfer transistor 22 transfers the signal charge accumulated in the photodiode 21 to the floating diffusion FD when the transfer signal TG is transmitted from the transfer line 26 to the gate and turned on.

  In the pixel transistor Tr, the amplification transistor 23 is configured to amplify and output a signal based on the signal charge transferred by the transfer transistor 22. Specifically, as shown in FIG. 7, the amplification transistor 23 has a gate connected to the floating diffusion FD. The amplification transistor 23 has a drain connected to the power supply potential supply line Vdd and a source connected to the selection transistor 24. The amplification transistor 23 is supplied with a constant current from the constant current source I and operates as a source follower when the selection transistor 24 is selected to be turned on. For this reason, in the amplification transistor 23, the selection signal SEL is supplied to the selection transistor 24, whereby the signal based on the transferred signal charge is amplified.

  In the pixel transistor Tr, the selection transistor 24 is configured to output an electrical signal from the pixel P to the vertical signal line 27 based on the selection signal SEL. Specifically, as shown in FIG. 7, the gate of the selection transistor 24 is connected to the address line 28 to which the selection signal SEL is supplied. Then, when the selection signal SEL is supplied and the selection transistor 24 is turned on, the selection transistor 24 outputs the output signal amplified by the amplification transistor 23 to the vertical signal line 27 as described above.

  In the pixel transistor Tr, the reset transistor 25 is configured to reset the gate potential of the amplification transistor 23. Specifically, as shown in FIG. 7, the gate of the reset transistor 25 is connected to the reset line 29 to which the reset signal RST is supplied. The reset transistor 25 has a drain connected to the power supply potential supply line Vdd and a source connected to the floating diffusion FD. The reset transistor 25 resets the gate potential of the amplification transistor 23 to the power supply potential via the floating diffusion FD when the reset signal is supplied from the reset line 29 to the gate and is turned on.

  Each wiring such as the transfer line 26, the address line 28, the vertical signal line 27, and the reset line 29 shown in FIG. 7 corresponds to the wiring 111h constituting the wiring layer 111 shown in FIG.

  As described above, each pixel P is provided with the color filter CF and the microlens ML.

  In the pixel P, the color filter CF is configured to color the incident light H and transmit it to the light receiving surface JS of the semiconductor substrate 101. For example, the color filter CF is formed by applying a coating liquid containing a color pigment and a photoresist resin by a coating method such as a spin coating method to form a coating film, and then patterning the coating film by a lithography technique. Is done.

  FIG. 8 is a diagram showing the color filter CF in the first embodiment according to the present invention. In FIG. 8, the upper surface of the color filter CF is shown.

  As shown in FIG. 8, the color filter CF includes a red filter layer CFR, a green filter layer CFG, and a blue filter layer CFB. The red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB are adjacent to each other, and one of them is provided corresponding to each of the plurality of pixels P.

  Here, as shown in FIG. 8, each of the red filter layer CFR, the green filter layer CFG, and the blue filter layer CFB is arranged so as to be aligned in the Bayer array BH. That is, the plurality of green filter layers CFG are arranged in a diagonal direction so as to have a checkered pattern. The red filter layer CFR and the blue filter layer CFB are arranged so as to be aligned diagonally in the plurality of green filter layers CFG.

  In the pixel P, the microlens ML is provided on the upper surface of the color filter CF as shown in FIG. The microlens ML is a convex lens whose center is formed thicker than the edge above the light receiving surface JS, and is configured to condense incident light H onto the light receiving surface JS of the photodiode 21. For example, the microlens ML is formed using an organic resin material having a refractive index of about 1.6. The microlens ML is formed by patterning a photosensitive resin film by a photolithography technique and then deforming it into a lens shape by a reflow process. In addition, the microlens ML may be formed by performing an etch-back process after forming a lens-shaped resist film on the lens material film.

  FIG. 9 is a timing chart showing a pulse signal supplied to each unit when reading a signal from the pixel P in the first embodiment according to the present invention. Here, (a) shows the selection signal SEL, (b) shows the reset signal RST, and (c) shows the transfer signal TG (see FIG. 7).

  First, as shown in FIG. 9, at a first time point t1, the selection signal is set to a high level so that the selection transistor 24 is turned on. Then, at the second time point t2, the reset signal is set to the high level so that the reset transistor 25 is turned on. As a result, the gate potential of the amplification transistor 23 is reset.

  Next, at a third time point t3, the reset signal is set to a low level so that the reset transistor 25 is turned off. Thereafter, a voltage corresponding to the reset level is read out to the column circuit 14.

  Next, at a fourth time point t4, the transfer signal is set to a high level so that the transfer transistor 22 is turned on, and the signal charge accumulated in the photodiode 21 is transferred to the floating diffusion FD.

  Next, at the fifth time point t5, the transfer signal is set to a low level so that the transfer transistor 22 is turned off. Thereafter, a signal level voltage corresponding to the amount of the accumulated signal charge is read out to the column circuit 14.

  In the column circuit 14, the difference between the reset level read first and the signal level read later is accumulated, and the signal is accumulated. As a result, fixed pattern noise generated due to variations in Vth of each transistor provided for each pixel P is cancelled.

  In the operation of driving the pixels as described above, since the gates of the transistors 22, 24, and 25 are connected in units of rows including a plurality of pixels P arranged in the horizontal direction x, a plurality of units arranged in units of the rows are connected. For the other pixels P. Specifically, the selection is sequentially performed in the vertical direction in units of horizontal lines (pixel rows) by the selection signal supplied by the vertical drive circuit 13 described above. The transistors of each pixel are controlled by various timing signals output from the timing generator 18. As a result, the output signal at each pixel P is read out to the column circuit 14 for each pixel column through the vertical signal line 27.

  The signals accumulated in the column circuit 14 are selected by the horizontal drive circuit 15 and sequentially output to the external output circuit 17.

(B) About the infrared cut filter 300 The infrared cut filter 300 which comprises the solid-state imaging device 1 is demonstrated.

  As shown in FIGS. 2 and 3, in the solid-state imaging device 1, the infrared cut filter 300 includes a glass substrate 301. The glass substrate 301 is provided with an infrared cut filter layer 311 on the surface facing the sensor element 100.

  As shown in FIGS. 2 and 3, the infrared cut filter layer 311 is provided in the central portion of the glass substrate 301. The infrared cut filter layer 311 has a rectangular planar shape, and is formed on the glass substrate 301 so as to cover the entire region corresponding to the pixel region PA of the sensor element 100. At the same time, the infrared cut filter layer 311 is formed on the glass substrate 301 so as to cover a part of the region corresponding to the peripheral region SA of the sensor element 100.

  That is, the infrared cut filter layer 311 is formed on the glass substrate 301 so as to cover a wider area than the area corresponding to the pixel area PA of the sensor element 100. In addition, the infrared cut filter layer 311 is formed on the glass substrate 301 so as to cover a region narrower than the facing region without covering the entire region facing the sensor element 100.

  The infrared cut filter layer 311 is a dielectric multilayer film. That is, the infrared cut filter layer 311 is formed by alternately laminating a high refractive index dielectric layer and a low refractive index dielectric layer, and reflects and cuts light in the infrared region by the interference action of each layer. The light in the visible region is selectively transmitted.

(C) Adhesive layer 501 The adhesive layer 501 constituting the solid-state imaging device 1 will be described.

  As shown in FIG. 3, the adhesive layer 501 is provided in the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other. That is, the adhesive layer 501 is provided around the cavity portion 600 between the sensor element 100 and the infrared cut filter 300, and the sensor element 100 and the infrared cut filter 300 are bonded together.

  In the present embodiment, the adhesive layer 501 is provided so as to be in contact with the peripheral portion of the glass substrate 301 of the infrared cut filter 300 that is not covered with the infrared cut filter layer 311. At the same time, the adhesive layer 501 is provided in contact with the peripheral portion of the infrared cut filter layer 311 in the infrared cut filter 300. Specifically, the adhesive layer 501 is provided so as to be in contact with the side end surface of the infrared cut filter layer 311 and the side end portion of the surface facing the sensor element 100 in the infrared cut filter layer 311.

(2) Manufacturing Method The main part of the manufacturing method for manufacturing the solid-state imaging device 1 will be described below.

  10 and 11 are diagrams showing a method of manufacturing the solid-state imaging device in the first embodiment according to the present invention.

  Here, FIGS. 10 and 11 sequentially show the steps for manufacturing the solid-state imaging device.

  In this embodiment, as shown in FIGS. 10 and 11, the large disk-shaped wafer provided with the plurality of solid-state imaging devices 1 is divided through the steps (a) to (f). The one solid-state imaging device 1 is manufactured.

  Details of each step will be described.

(A) Formation of Sensor Element 100 First, as shown in FIG. 10A, the sensor element 100 is formed.

  Here, as shown in FIG. 10A, a plurality of sensor elements 100 are provided on a large semiconductor wafer 101W (silicon wafer).

  Specifically, the plurality of sensor elements 100 are provided by appropriately providing each part such as the pixel P in each of the areas CA where the plurality of solid-state imaging devices are provided in the semiconductor wafer 101W.

(B) Formation of Infrared Cut Filter 300 Next, as shown in FIG. 10B, the infrared cut filter 300 is formed.

  Here, as shown in FIG. 10B, a plurality of infrared cut filters 300 are formed on a large glass wafer 301W.

  Specifically, a plurality of infrared cut filters 300 are provided by providing an infrared cut filter layer 311 in each of the areas CA where the plurality of solid-state imaging devices are provided on the surface of the glass wafer 301W that faces the sensor element 100. Form.

  For example, a glass wafer 301W having the same linear expansion coefficient as that of the semiconductor wafer 101W is used. For example, a glass wafer 301W having the same linear expansion coefficient as that of the semiconductor wafer 101W (CTE = 3.2 ppm) and a thickness of 500 μm is used. In addition, it is also preferable to use a material having a close linear expansion coefficient (CTE = 2.9 to 3.5 ppm).

  The infrared cut filter layer 311 is provided in a state where the glass wafer 301W is supported by the manufacturing apparatus on the surface opposite to the surface facing the sensor element 100 in the glass wafer 301W. That is, the glass wafer 301W is supported on the surface of the glass wafer 301W opposite to the surface on which the infrared cut filter layer 311 is provided. For example, the glass wafer 301W is supported by a vacuum chuck, an electrostatic chuck, or a mechanical chuck. And it is supported by the surface and is conveyed.

  FIG. 12 is a diagram illustrating a manufacturing method for forming the infrared cut filter 300 in the first embodiment according to the present invention.

  Here, FIG. 12 sequentially shows each process of performing the infrared cut filter 300.

  In this embodiment, as shown in FIG. 12, the infrared cut filter layer 311 is formed on the glass wafer 301W through the steps (a1) to (a3). That is, the infrared cut filter layer 311 is formed by a lift-off method.

  Specifically, first, as shown in FIG. 12A1, a photoresist pattern PR is provided.

  Here, the photoresist pattern PR is formed so as to be positioned above the region other than the region where the infrared cut filter layer 311 is formed on the upper surface of the glass wafer 301W.

  For example, after forming a photosensitive resin film (not shown) on the upper surface of the glass wafer 301W, the photoresist pattern PR is formed by patterning the photosensitive resin film (not shown) by photolithography.

  In the present embodiment, the photoresist pattern PR is formed so that the side close to the glass wafer 301W has a narrow width and has a cross-sectional shape whose width increases as the distance from the glass wafer 301W increases. That is, the photoresist pattern PR is formed so that the cross section has an inversely tapered shape.

For example, the photoresist pattern PR is formed so as to satisfy the following conditions.
[Conditions for photoresist pattern PR]
Thickness: 6.5 to 11 μm (The infrared cut filter layer 311 needs to be thicker than the dielectric multilayer film formed by laminating 30 to 60 layers. Each layer of the dielectric multilayer film is 1 / 4λ. Therefore, on average, the thickness is 150 nm (600 nm / 4) Therefore, the dielectric multilayer film has a thickness of 4.5 to 9 μm, and for the photoresist pattern PR, (It is preferable to increase the thickness to about 2μ.)
・ Inclination angle: 87-89 °
Material: Lift-off resist Distance between photoresist patterns PR: 50 to 800 μm (Because the remaining width after dicing is necessary for adhesive strength. Before dicing, dicing street width 30 to 100 μm + (min 50 to 300 × 2) Will be)

  Next, as shown in FIG. 12 (a2), an infrared cut filter layer 311 is formed.

  Here, the infrared cut filter layer 311 is formed so as to cover the upper surface of the glass wafer 301W on which the photoresist pattern PR is formed. Thereby, the infrared cut filter layer 311 is formed on the upper surface of the photoresist pattern PR together with the upper surface of the glass wafer 301W.

  Specifically, the infrared cut filter layer 311 is formed by forming a dielectric multilayer film in which high refractive index layers and low refractive index layers are alternately stacked.

For example, the high refractive index layer is formed using a material such as TiO ₂ , Ta ₂ O ₅ , and Nb ₂ O ₅ . Then, a low refractive index layer is formed using a material such as SiO ₂ or MgF ₂ . And about the high refractive index layer and the low refractive index layer, the infrared cut filter layer 311 is formed by laminating | stacking 30-60 layers, for example. For example, the high refractive index layer and the low refractive index layer are formed by a physical film forming method such as vacuum vapor deposition, ion assist vapor deposition, ion plating, or sputtering.

  Next, as shown in FIG. 12A3, the photoresist pattern PR is removed.

  Here, as described above, the photoresist pattern PR having the infrared cut filter layer 311 formed on the upper surface is removed. Thereby, the infrared cut filter layer 311 is formed in a desired pattern on the upper surface of the glass wafer 301W. That is, as shown in FIG. 3, when the glass substrate 301 is attached to the sensor element 100, a portion corresponding to the pixel region PA and a part of the peripheral region SA among the surfaces facing the glass substrate 301 An infrared cut filter layer 311 is formed so as to cover the surface.

  FIG. 13 is a diagram showing the top surface of the glass wafer on which the infrared cut filter layer 311 is formed in Embodiment 1 according to the present invention. That is, FIG. 13 shows the upper surface of the infrared cut filter 300 before dicing. In FIG. 13, the portion where the infrared cut filter layer 311 is formed is shown in black, and the portion where the infrared cut filter layer 311 is not formed is shown in white.

  As shown in FIG. 13, an infrared cut filter layer 311 is provided in each of the areas CA where a plurality of solid-state imaging devices are provided on the upper surface of the glass wafer 301W. Each of the plurality of infrared cut filter layers 311 is formed with a gap interposed therebetween.

  At this time, as shown in FIG. 13, a notch pattern NC for alignment may be formed around the glass wafer 301W. For example, it is preferable to form the notch pattern NC with the same shape as the silicon wafer for forming the sensor element 100. This eliminates the need for special mark detection in the alignment of the two. In other words, the alignment mechanism of the apparatus can be aligned by detecting the positioning and rotation of the outer shape, and can be aligned with an inexpensive apparatus configuration without changing the alignment method for each model.

(C) Bonding of Sensor Element 100 and Infrared Cut Filter 300 Next, as shown in FIG. 10C, the sensor element 100 and the infrared cut filter 300 are bonded together.

  Here, the glass wafer 301W provided with the infrared cut filter 300 is turned upside down. Thereafter, the upper surface of the supported semiconductor wafer 101W and the lower surface provided with the infrared cut filter layer 311 in the glass wafer 301W are made to face each other. Then, both are aligned and pasted together. That is, the glass substrate 301 and the semiconductor substrate 101 are aligned and bonded so that each of the plurality of infrared cut filters 300 corresponds to each of the plurality of sensor elements 100.

  Specifically, in each of the areas CA where the plurality of solid-state imaging devices are provided, both are arranged so that a hollow cavity portion 600 is provided in the central portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other. to paste together.

  Further, in each of the areas CA where the plurality of solid-state imaging devices are provided, the adhesive layer 501 is provided on the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other, thereby bonding them together.

  For example, on the surface of the semiconductor wafer 101W, the adhesive layer 501 is formed in a lattice shape so as to partition a region CA where a plurality of solid-state imaging devices are provided, and then the glass wafer 301W is aligned and bonded.

For example, the adhesive layer 501 is formed so as to satisfy the following conditions.
[Conditions for Adhesive Layer 501]
・ Thickness: 10 to 70 μm (actually 50 μm, if thin, interference fringes may appear due to diffraction)
・ Width: At least 200μm ・ Material: Photosensitive acrylic epoxy adhesive

  As a result, as shown in FIG. 3, the sensor element 100 and the infrared cut filter are arranged so that the pixel receives light incident through the infrared cut filter layer 311 and the cavity portion 600 in the bonded state. An adhesive layer 501 is provided while facing 300. That is, in this step, the glass substrate 301 is bonded to the peripheral portion of the surface facing the semiconductor substrate 101 and not covered with the infrared cut filter layer 311 and the peripheral portion of the infrared cut filter layer 311. The layers 501 are provided so as to be in contact with each other, and the two are bonded to each other.

(D) Inversion Next, as shown in FIG. 11 (d), the sensor element 100 and the infrared cut filter 300 bonded together are inverted upside down.

  Here, this inversion is performed so that the surface of the sensor element 100 opposite to the surface facing the infrared cut filter 300 faces upward. And in the infrared cut filter 300, this bonded surface is supported by the manufacturing apparatus on the surface opposite to the surface on which the infrared cut filter layer 311 is provided. That is, it is supported on the lower surface of the glass wafer 301W.

(E) Formation of Bump 402 Next, as shown in FIG. 11E, the bump 402 is formed.

  Here, the bump 402 is formed on the surface opposite to the surface facing the infrared cut filter 300 in the sensor element 100. That is, the bump 402 is formed on the surface opposite to the surface facing the glass wafer 301W in the semiconductor wafer 101W.

  Specifically, prior to the formation of the bumps 402, via holes VH are formed in the semiconductor substrate 101 constituting the sensor element 100 to expose the surface of the pad electrode PAD. Then, after providing the insulating layer 400 and the conductive layer 401, bumps 402 are formed using a metal material (see FIG. 5).

(F) Dicing Next, as shown in FIG. 11 (f), dicing is performed to divide into a plurality of solid-state imaging devices 1.

  Here, the wafer state in which a plurality of solid-state imaging devices 1 are provided is divided for each solid-state imaging device 1 by performing dicing processing in a scribe region between the plurality of solid-state imaging devices 1. That is, dicing is performed on the glass wafer 301 </ b> W and the semiconductor wafer 101 </ b> W bonded together to divide the plurality of solid-state imaging devices 1.

  Thus, dicing is performed so that the semiconductor wafer 101W is divided into a plurality of semiconductor substrates 101, and the glass wafer 301W is divided into a plurality of glass substrates 301, thereby completing the solid-state imaging device 1.

(3) Summary As described above, in the solid-state imaging device of the present embodiment, the infrared cut filter 300 has the infrared cut filter layer 311 formed on the glass substrate 301. The sensor element 100 is disposed so as to face the infrared cut filter 300, and a plurality of pixels that receive light incident through the infrared cut filter layer 311 are provided in the pixel region PA of the semiconductor substrate 101. It is arranged. An adhesive layer 501 is provided between the infrared cut filter 300 and the sensor element 100, and both are bonded together.

  Here, the infrared cut filter layer 311 is a dielectric multilayer film in which a plurality of high refractive index dielectric layers and low refractive index dielectric layers are alternately stacked. The infrared cut filter layer 311 includes a portion corresponding to the pixel region PA and a part of the peripheral region SA located around the pixel region PA in the surface of the glass substrate 301 facing the sensor element 100. It is formed so as to cover. In addition, the adhesive layer 501 includes a portion that is not covered with the infrared cut filter layer 311 on the glass substrate 301 in the periphery of the surface where the sensor element 100 and the infrared cut filter 300 face each other, and the infrared cut filter. It is in contact with the peripheral portion of the layer 311.

  FIG. 14 is a diagram showing a solid-state imaging device of a comparative example of Embodiment 1 according to the present invention. Here, FIG. 14 is a cross-sectional view similarly to FIG. 3, and schematically shows the configuration of the solid-state imaging device.

  As shown in FIG. 14, in the comparative example, the infrared cut filter layer 311 of the infrared cut filter 300 is provided in the central portion of the glass substrate 301 in the same manner as described above. The adhesive layer 501 is provided so as to be in contact with a peripheral portion of the glass substrate 301 that is not covered with the infrared cut filter layer 311. However, unlike the above, the adhesive layer 501 is not provided in contact with the peripheral portion of the infrared cut filter layer 311. That is, the adhesive layer 501 is not provided so as to be in contact with the side end surface of the infrared cut filter layer 311 and the side end portion of the surface facing the sensor element 100 in the infrared cut filter layer 311.

  For this reason, in the comparative example, since the infrared cut filter layer 311 is not fixed to the glass substrate 301 by the adhesive layer 501, it may be peeled off from the glass substrate 301. And the image quality of a captured image may fall by the infrared cut filter layer 311 which peeled. In particular, when the pixel size is miniaturized (for example, □ 1.4 μm), the influence is large and the above-described problems are likely to occur.

  In contrast, in the present embodiment, as shown in FIG. 3, the adhesive layer 501 is provided so as to contact the peripheral portion of the infrared cut filter layer 311, and the infrared cut filter layer 311 is made of glass. It is fixed to the substrate 301.

  Therefore, this embodiment can prevent suitably that the infrared cut filter layer 311 peels from the glass substrate 301. FIG.

  In addition, since the side end portion of the infrared cut filter layer 311 is not exposed, it is not easily affected by moisture contained in the outside air. Therefore, peeling can be suitably prevented.

  In this embodiment, in the step of forming the infrared cut filter 300, the infrared cut filter layer 311 is formed on the glass substrate 301 by a lift-off method. For this reason, in this embodiment, as shown in FIG. 12A2, the infrared cut filter layer 311 is formed discontinuously on the surface of the glass wafer 301W, and the entire surface of the glass wafer 301W is continuously formed. Not covered. Thus, warpage of the glass substrate 301 can be suppressed.

  In the present embodiment, the infrared cut filter layer 311 is formed on the glass substrate 301 on the side facing the semiconductor substrate 101. For this reason, the surface on which the infrared cut filter layer 311 is formed in the glass substrate 301 is exposed, and the surface on which the infrared cut filter layer 311 is formed is not exposed. Therefore, it is possible to prevent the infrared cut filter layer 311 from being damaged by handling in the manufacturing process.

  Further, in the present embodiment, in the step of forming the infrared cut filter 300, the notch pattern same as the notch shape (not shown) formed in the semiconductor substrate 101 is formed on the glass substrate simultaneously with the formation of the infrared cut filter layer 311. 301 is formed. In the bonding step, both are aligned using the notch shape of the semiconductor substrate 101 and the notch pattern of the glass substrate 301.

  Therefore, this embodiment can easily realize improvement in manufacturing efficiency, cost reduction, improvement in reliability, and downsizing.

<2. Second Embodiment>
(1) Device Configuration, etc. FIG. 15 is a diagram illustrating a main part of a solid-state imaging device in Embodiment 2 according to the present invention. FIG. 15 shows a cross section similar to FIG.

  As shown in FIG. 15, in the present embodiment, the configuration of the adhesive layer 501b is different from that of the first embodiment. Except for this point and points related thereto, the present embodiment is the same as the first embodiment. For this reason, the description of overlapping parts is omitted as appropriate.

  As shown in FIG. 15, the adhesive layer 501 b is provided between the sensor element 100 and the infrared cut filter 300 as in the case of the first embodiment.

  However, in this embodiment, unlike Embodiment 1, the cavity part 600 (refer FIG. 3) is not provided in the center part of the surface which faces the sensor element 100 and the infrared cut filter 300. FIG. In the present embodiment, the low refractive index layer 110 is provided so as to cover the microlens ML. The low refractive index layer 110 is formed so that the thickness of the flat portion covering the microlens ML is, for example, about 0.3 to 5 μm.

  The sensor element 100 is bonded to the upper surface of the low refractive index layer 110 with the infrared cut filter 300 and the adhesive layer 501. Here, an adhesive layer 501 is provided on the entire surface of the sensor element 100 and the infrared cut filter 300 facing each other, and the sensor element 100 and the infrared cut filter 300 are bonded to each other by the adhesive layer 501. . That is, the adhesive layer 501b is provided not only on the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other but also on the central portion of the surface.

  Specifically, the adhesive layer 501 includes a surface of the glass substrate 301 of the infrared cut filter 300 that is not covered with the infrared cut filter layer 311 and a surface that faces the sensor element 100 in the infrared cut filter layer 311. It is provided in contact with both.

  For example, the adhesive layer 501 is preferably made of a siloxane, epoxy, or acrylic adhesive. In particular, siloxane-based adhesives are suitable because they are excellent in heat resistance and chemical resistance in the manufacturing process, and are excellent in transparency and light resistance when used as a solid-state imaging device.

Note that this embodiment has a structure without the cavity portion 600 (see FIG. 3), and the adhesive layer 501 (for example, n) having a refractive index higher than that of air is provided in the portion where the cavity portion 600 is provided in the first embodiment. = 1.4 to 1.6). For this reason, for the microlens ML, it is preferable to improve the light collection efficiency using a material having a higher refractive index than the adhesive layer 501. For example, it is preferable to form the microlens ML using a high refractive index material such as SiN (n = 2.1).
When the cavity portion 600 is present, light condensing occurs due to the lens effect due to the difference between the refractive index of the microlens ML (for example, around 1.6) and the refractive index of air (1). However, if the whole is filled with adhesive, the difference in refractive index between the refractive index of the adhesive (around 1.5) and the microlens ML (for example, around 1.6) is small. drop down. Therefore, the microlens ML is formed using a material with a high refractive index (for example, 1.8 to 2.2), and the low refractive index layer 110 is a small refractive index (for example, 1.33 to 1). .45). Thereby, the refractive index difference becomes as large as around 0.6, and the light collection efficiency can be improved.

(2) Summary As described above, the infrared cut filter layer 311 of the present embodiment corresponds to the pixel region PA among the surfaces facing the sensor element 100 in the glass substrate 301 as in the first embodiment. It is formed so as to cover the part and a part of the peripheral area SA. In addition, the adhesive layer 501b includes a portion that is not covered with the infrared cut filter layer 311 on the glass substrate 301 in the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other, and the infrared cut filter. At least in contact with the peripheral portion of the layer 311.

  In the present embodiment, unlike the first embodiment, the adhesive layer 501b is provided on the entire surface where the infrared cut filter 300 and the sensor element 100 face each other. That is, it is a cavityless structure.

  For this reason, in this embodiment, generation | occurrence | production of peeling can be prevented more suitably. In particular, the occurrence of peeling due to heat cycle can be suitably prevented.

<3. Embodiment 3>
(1) Manufacturing method etc. FIG. 16: is a figure which shows the manufacturing method which forms the infrared cut filter 300 in Embodiment 3 concerning this invention. FIG. 16 shows a cross section similar to FIG.

  As shown in FIG. 16, in the present embodiment, the manufacturing method for forming the infrared cut filter 300 is different from that in the first embodiment. Except for this point and points related thereto, the present embodiment is the same as the first embodiment. For this reason, the description of overlapping parts is omitted as appropriate.

  In the present embodiment, as shown in FIG. 16, the infrared cut filter layer 311 is formed on the glass wafer 301W through the steps (a1) to (a3). Also in this embodiment, the infrared cut filter layer 311 is formed by a lift-off method.

  In forming the infrared cut filter 300, first, a photoresist pattern PR is provided as shown in FIG.

  Here, the photoresist pattern PR is formed so as to be positioned above the region other than the region where the infrared cut filter layer 311 is formed on the upper surface of the glass wafer 301W.

  In this embodiment, the photoresist pattern PR is provided by sequentially laminating the first photoresist pattern PR1 and the second photoresist pattern PR2 having a width wider than the first photoresist pattern PR1.

  For example, it is preferable to form the first photoresist pattern PR1 so as to be narrower by about 0.5 to 5 μm than the second photoresist pattern PR2. The first photoresist pattern PR1 is preferably thicker than the 30-60 dielectric multilayer film formed as the infrared cut filter layer 311. Since each layer of the dielectric multilayer film needs to have a thickness of ¼λ, the average thickness is 150 nm (600 nm / 4). Therefore, the dielectric multilayer film has a thickness of 4.5 to 9 μm. For this reason, it is preferable that the total thickness of the first photoresist pattern PR1 and the second photoresist pattern PR2 is about 2 μm thicker than this thickness.

  Next, as shown in FIG. 16A2, an infrared cut filter layer 311 is formed.

  Here, as in the case of the first embodiment, the infrared cut filter layer 311 is formed so as to cover the upper surface of the glass wafer 301W on which the photoresist pattern PR is formed. Thereby, the infrared cut filter layer 311 is formed on the upper surface of the photoresist pattern PR together with the upper surface of the glass wafer 301W.

  Next, as shown in FIG. 16A3, the photoresist pattern PR is removed.

  Here, as described above, the photoresist pattern PR having the infrared cut filter layer 311 formed on the upper surface is removed. Thereby, the infrared cut filter layer 311 is formed in a desired pattern on the upper surface of the glass wafer 301W.

(2) Summary As described above, in the present embodiment, the solid-state imaging device is configured similarly to the first embodiment.

  Therefore, as in the first embodiment, this embodiment can easily realize improvement in manufacturing efficiency, cost reduction, improvement in reliability, and downsizing.

<4. Embodiment 4>
(1) Device Configuration, etc. FIG. 17 is a diagram showing the main part of a solid-state imaging device in Embodiment 4 according to the present invention. FIG. 17 shows a cross section similar to FIG.

  As shown in FIG. 17, in the present embodiment, the configuration of the infrared cut filter layer 311d is different from that of the first embodiment. Except for this point and points related thereto, the present embodiment is the same as the first embodiment. For this reason, the description of overlapping parts is omitted as appropriate.

  As shown in FIG. 17, the infrared cut filter layer 311d is provided on the surface of the glass substrate 301 that faces the sensor element 100, as in the first embodiment.

  Here, as shown in FIG. 17, the infrared cut filter layer 311 d is provided so that the cross section has a tapered shape, unlike the case of the first embodiment (see FIG. 3).

  Specifically, the side surface of the infrared cut filter layer 311d is inclined so that the width decreases from the glass substrate 301 side toward the sensor element 100 side.

  Then, an adhesive layer 501 is provided so as to cover the inclined side end surface of the infrared cut filter layer 311d.

  FIG. 18 is a diagram illustrating a manufacturing method for forming the infrared cut filter 300 in the fourth embodiment of the present invention. FIG. 18 shows a cross section similar to FIG.

  In the present embodiment, as shown in FIG. 18, an infrared cut filter layer 311d is formed on the glass wafer 301W through the steps (a1) to (a3).

  First, as shown in FIG. 18A1, an infrared cut filter layer 311d is formed.

  Here, the infrared cut filter layer 311d is formed so as to cover the entire upper surface of the glass wafer 301W under the same conditions as in the first embodiment.

  Next, as shown in FIG. 18A2, pattern processing is performed on the infrared cut filter layer 311d.

  Here, the photoresist pattern PRd is formed on the upper surface of the infrared cut filter layer 311d formed on the entire upper surface of the glass wafer 301W. Then, an isotropic etching process is performed on the infrared cut filter layer 311d using the photoresist pattern PRd as a mask. Thereby, the infrared cut filter layer 311d is patterned so that the cross section has a tapered shape.

  For example, the infrared cut filter layer 311d is formed so that the inclination angle of the tapered shape is an angle close to 45 °. In addition, when pattern processing is performed by dry etching, the side surfaces are formed to be vertical.

  Next, as shown in FIG. 18A3, the photoresist pattern PRd is removed.

  Here, as described above, the photoresist pattern PRd formed on the upper surface of the infrared cut filter layer 311 is removed. Thereby, the infrared cut filter layer 311 is formed in a desired pattern on the upper surface of the glass wafer 301W.

(2) Summary As described above, the infrared cut filter layer 311d of the present embodiment corresponds to the pixel region PA among the surfaces of the glass substrate 301 facing the sensor element 100, as in the first embodiment. It is formed so as to cover the part and a part of the peripheral area SA. In addition, the adhesive layer 501 includes a portion that is not covered with the infrared cut filter layer 311d on the glass substrate 301 in the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other, and the infrared cut filter. It is in contact with the peripheral portion of the layer 311d.

  In the present embodiment, unlike the first embodiment, the infrared cut filter layer 311d is inclined at the side end surface so that the width becomes narrower from the glass substrate 301 side toward the sensor element 100 side. And the contact bonding layer 501 is provided so that the side end surface which inclines in this infrared cut filter layer 311d may be covered.

  For this reason, in this embodiment, generation | occurrence | production of peeling can be prevented more suitably.

<5. Embodiment 5>
(1) Device Configuration, etc. FIGS. 19, 20, and 21 are diagrams showing the main part of a solid-state imaging device in Embodiment 5 according to the present invention.

  Here, FIG. 19 is a perspective view similar to FIG. FIG. 20 is a cross-sectional view similarly to FIG. 3, and both schematically show the configuration of the solid-state imaging device. FIG. 21 shows a partial cross section, similar to FIG.

  Unlike the first embodiment, the solid-state imaging device according to the present embodiment includes a logic circuit element 200 as illustrated in FIGS. 19, 20, and 21. Further, as shown in FIG. 21, the form of the sensor element 100e is different from that of the first embodiment. Further, the configuration of the adhesive layer 501e is different from that of the first embodiment. Except for this point and points related thereto, the present embodiment is the same as the first embodiment. For this reason, the description of overlapping parts is omitted as appropriate.

  As shown in FIGS. 19 and 20, the sensor element 100 e and the infrared cut filter 300 are arranged so as to face each other as in the case of the first embodiment.

  Here, as shown in FIG. 20, unlike the case of the first embodiment, a hollow cavity portion 600 (see FIG. 3) is provided in the central portion of the facing surfaces of the sensor element 100e and the infrared cut filter 300. It is not done. Further, similarly to the second embodiment, the low refractive index layer 110 is provided so as to cover the microlens ML. An adhesive layer 501e is provided on the entire facing surface of the sensor element 100 and the infrared cut filter 300, and the sensor element 100e and the infrared cut filter 300 are bonded to each other by the adhesive layer 501e. Unlike the first embodiment, the adhesive layer 501e is provided on the entire surface where the infrared cut filter 300 and the sensor element 100e face each other. That is, it is a cavityless structure as in the second embodiment.

  As shown in FIGS. 19 and 20, the sensor element 100e is provided with a pixel area PA and a peripheral area SA located around the pixel area PA, as in the first embodiment. The pixel area PA has a rectangular shape as in the first embodiment, and a plurality of pixels (not shown) are arranged in each of the horizontal direction x and the vertical direction y. However, in the peripheral area SA, unlike the first embodiment, part or all of the peripheral circuit is not provided. In the present embodiment, some or all of the peripheral circuits that are not provided in the peripheral region SA of the sensor element 100e are provided in the logic circuit element 200. For example, in the peripheral area SA of the sensor element 100e, the vertical drive circuit 13 and the timing generator 18 shown in FIG. 4 are provided. In the logic circuit element 200, for example, the column circuit 14, the horizontal drive circuit 15, and the external output circuit 17 shown in FIG. 4 are provided.

  As shown in FIG. 21, in the sensor element 100e, a wiring layer 111 is provided on the surface (lower surface) of the semiconductor substrate 101. In the sensor element 100e, the photodiode 21 is provided inside the semiconductor substrate 101 in the pixel area PA. Unlike Embodiment 1, in the pixel area PA, the color filter CF and the microlens ML are sequentially provided on the back surface (upper surface) of the semiconductor substrate 101. The photodiode 21 receives incident light H incident from the back side of the semiconductor substrate 101 via the microlens ML, the color filter CF, and the wiring layer 111. That is, the solid-state imaging device of this embodiment is a “backside illumination type” image sensor chip.

  As illustrated in FIGS. 19 and 20, the logic circuit element 200 is disposed on the opposite side of the surface on which the infrared cut filter 300 is disposed in the sensor element 100 e. The logic circuit element 200 is electrically connected to the sensor element 100.

  As shown in FIG. 21, the logic circuit element 200 includes a semiconductor substrate 201. For example, the semiconductor substrate 201 is made of single crystal silicon and is disposed so as to face the sensor element 100e.

  In the logic circuit element 200, the semiconductor substrate 201 is provided with a semiconductor element 220 on the surface on the sensor element 100e side. The semiconductor element 220 is, for example, a MOS transistor, and is not shown, but a plurality of semiconductor elements 220 are provided so as to constitute the peripheral circuit shown in FIG. A wiring layer 211 is provided so as to cover the surface (upper surface) of the semiconductor substrate 201. The wiring layer 211 is a multilayer wiring layer and includes a plurality of wirings 211h and an insulating layer 211z. The wiring layer 211 is formed by alternately stacking wirings 211h and insulating films, and each wiring 211h is provided so as to be covered with the insulating layer 211z. In the wiring layer 211, a pad electrode PAD is provided.

  In the logic circuit element 200, an insulating layer 400 and a conductive layer 401 are sequentially provided on the back surface (lower surface) of the semiconductor substrate 101 as shown in FIG. A bump 402 is provided on the lower surface of the conductive layer 401.

  In the logic circuit element 200, as shown in FIG. 21, a via hole VH penetrating the semiconductor substrate 201 is provided. That is, a through silicon via is provided. The via hole VH is formed so as to expose the lower surface of the pad electrode PAD provided in the wiring layer 211. The via hole VH is covered with a conductive layer 401 with an insulating layer 400 interposed therebetween. An opening is formed in the insulating layer 400 so as to expose a part of the lower surface of the pad electrode PAD. The conductive layer 401 is formed so as to fill the opening of the insulating layer 400, and is electrically connected to the pad electrode PAD.

  The sensor element 100e and the logic circuit element 200 are joined as shown in FIG. Here, as shown in FIG. 21, the wiring layer 111 of the sensor element 100e and the wiring layer 211 of the logic circuit element 200 are joined, and the wiring layers 111 and 211 are electrically connected by wiring. Yes.

(2) Summary As described above, the infrared cut filter layer 311 of the present embodiment corresponds to the pixel region PA among the surfaces of the glass substrate 301 facing the sensor element 100e, as in the first embodiment. It is formed so as to cover the part and a part of the peripheral area SA. In addition, the adhesive layer 501e includes a portion that is not covered with the infrared cut filter layer 311 on the glass substrate 301 in the peripheral portion of the surface where the sensor element 100 and the infrared cut filter 300 face each other, and the infrared cut filter. At least in contact with the peripheral portion of the layer 311.

Therefore, as in the first embodiment, this embodiment can easily realize improvement in manufacturing efficiency, cost reduction, improvement in reliability, and downsizing.
In the present embodiment, the case where a part of the peripheral circuit is provided in the peripheral region SA of the sensor element 100 has been described, but the present invention is not limited to this. The peripheral circuit SA may not be provided in the peripheral area SA of the sensor element 100, and all of the peripheral circuits shown in FIG. 4 may be provided in the logic circuit element 200. In addition, instead of the logic circuit element 200, a wiring board may be provided. That is, a solid-state imaging device may be configured by stacking a plurality of semiconductor chips having different functions.

<6. Other>
In carrying out the present invention, the present invention is not limited to the above-described embodiment, and various modifications can be employed.

  In the above-described embodiment, when the semiconductor device is a solid-state imaging device, the case where the solid-state imaging device is applied to a camera has been described. However, the present invention is not limited to this. You may apply to other electronic devices provided with a solid-state imaging device like a scanner and a copy machine.

  In the above embodiment, the case where two or three semiconductor chips are stacked has been described. However, the present invention is not limited to this. The present invention may be applied to the case where four or more semiconductor chips are stacked.

  In addition, the above embodiments may be appropriately combined.

  In the above embodiment, the solid-state imaging device 1 corresponds to the solid-state imaging device of the present invention. In the above embodiment, the camera 40 corresponds to the electronic apparatus of the present invention. In the above embodiment, the sensor elements 100 and 100e correspond to the solid-state imaging element of the present invention. In the above embodiment, the semiconductor substrate 101 and the semiconductor wafer 101W correspond to the semiconductor substrate of the present invention. In the above embodiment, the infrared cut filter 300 corresponds to the optical filter of the present invention. Moreover, in said embodiment, the glass substrate 301 and the glass wafer 301W are equivalent to the transparent substrate of this invention. In the above embodiment, the infrared cut filter layers 311 and 311d correspond to the filter layer of the present invention. In the above embodiment, the adhesive layers 501, 501b, and 501e correspond to the adhesive layers of the present invention. Further, in the above embodiment, the cavity portion 600 corresponds to the cavity portion of the present invention. In the above embodiment, the pixel P corresponds to the pixel of the present invention. In the above embodiment, the pixel area PA corresponds to the pixel area of the present invention.

  DESCRIPTION OF SYMBOLS 1 ... Solid-state imaging device, 13 ... Vertical drive circuit, 14 ... Column circuit, 15 ... Horizontal drive circuit, 17 ... External output circuit, 17a ... AGC circuit, 17b ... ADC circuit, 18 ... timing generator, 19 ... shutter drive circuit, 21 ... photodiode, 22 ... transfer transistor, 23 ... amplification transistor, 24 ... selection transistor, 25 ... Reset transistor, 26 ... transfer line, 27 ... vertical signal line, 28 ... address line, 29 ... reset line, 40 ... camera, 43 ... control unit, 44 ... signal Processing unit, 100, 100e ... sensor element, 101 ... semiconductor substrate, 101W ... semiconductor wafer, 200 ... logic circuit element, 220 ... semiconductor element, 300 ... Outer cut filter, 301 ... glass substrate, 301W ... glass wafer, 311, 311d ... infrared cut filter layer, 400 ... insulating layer, 401 ... conductive layer, 402 ... bump, 501, 501 b, 501 e ... adhesive layer, 600 ... cavity portion, CF ... color filter, JS ... light receiving surface, ML ... microlens, NC ... notch pattern, P ... Pixel, PA ... Pixel region, PB ... Pixel separation part, PR, PRd ... Photoresist pattern, PR1 ... First photoresist pattern, PR2 ... Second photoresist pattern, VH ...・ Beer hall

Claims (10)

An optical filter having a filter layer formed on a transparent substrate;
A solid-state imaging device that is arranged so as to face the optical filter, and a plurality of pixels that receive light incident through the filter layer are arranged in a pixel region of a semiconductor substrate;
An adhesive layer that is provided between the optical filter and the solid-state imaging device, and that bonds the optical filter and the solid-state imaging device;
The filter layer is a dielectric multilayer film in which a plurality of high-refractive index dielectric layers and low-refractive index dielectric layers are alternately stacked, and is a surface of the transparent substrate facing the solid-state imaging device. Are formed so as to cover a portion corresponding to the pixel region and a part of a region located around the pixel region,
The adhesive layer is at least in contact with a peripheral portion of the surface where the solid-state imaging element and the optical filter face each other, and a portion not covered with the filter layer with the transparent substrate and a peripheral portion of the filter layer Is provided as
Solid-state imaging device. A cavity is provided between the optical filter and the solid-state imaging device facing each other,
The solid-state imaging device is provided with the pixel region such that the pixel receives light incident through the cavity portion,
The adhesive layer is provided so as to surround the periphery of the cavity portion while the optical filter and the solid-state imaging element face each other.
The solid-state imaging device according to claim 1. The adhesive layer is provided on the entire surface where the optical filter and the solid-state imaging element face each other.
The solid-state imaging device according to claim 1. The filter layer has a side end surface that is inclined so that the width is narrowed from the transparent substrate side toward the solid-state imaging device side,
The adhesive layer is provided so as to cover a side end face inclined in the filter layer.
The solid-state imaging device according to claim 2. Forming an optical filter by forming a filter layer on a transparent substrate; and an optical filter forming step;
A solid-state imaging device forming step of forming a solid-state imaging device by providing a plurality of pixels that receive light in a pixel region of a semiconductor substrate; and
The optical filter and the solid-state image sensor are attached by providing an adhesive layer between the optical filter and the solid-state image sensor so that the pixels receive light incident through the filter layer. And a bonding process,
In the optical filter forming step, a dielectric multilayer film in which a plurality of dielectric layers having a high refractive index and dielectric layers having a low refractive index are alternately laminated is a surface on the side facing the solid-state imaging device on the transparent substrate. The filter layer is formed by providing a portion corresponding to the pixel region and a part of a region located around the pixel region,
In the bonding step, the adhesion is performed so that at least the peripheral portion of the surface of the transparent substrate facing the semiconductor substrate that is not covered with the filter layer is in contact with the peripheral portion of the filter layer. By providing a layer, the optical filter and the solid-state imaging device are bonded together.
Manufacturing method of solid-state imaging device. In the optical filter forming step, a plurality of the optical filters are formed on the transparent substrate,
In the solid-state image sensor forming step, a plurality of the solid-state image sensors are formed on the semiconductor substrate,
In the bonding step, the transparent substrate and the semiconductor substrate are aligned and bonded so that each of the plurality of optical filters corresponds to each of the plurality of solid-state imaging elements,
Dividing into a plurality of solid-state imaging devices by carrying out dicing processing for the state in which the transparent substrate and the semiconductor substrate are bonded together,
A method for manufacturing a solid-state imaging device according to claim 5. In the optical filter forming step, the filter layer is formed on the transparent substrate by a lift-off method.
A method for manufacturing a solid-state imaging device according to claim 6. The optical filter forming step includes:
A photoresist pattern forming step of forming a photoresist pattern so as to be positioned above a region other than a region where the filter layer is formed on the surface of the transparent substrate;
Forming a filter layer on the surface of the transparent substrate on which the photoresist pattern is formed so as to cover the upper surface of the transparent substrate and the upper surface of the photoresist pattern;
Removing a photoresist pattern having an upper surface coated with the filter layer, and a photoresist pattern removing step;
In the photoresist pattern forming step, the photoresist pattern is formed so that the side close to the transparent substrate has a narrow width and has a cross-sectional shape whose width increases with distance from the transparent substrate.
A method for manufacturing the solid-state imaging device according to claim 7. In the optical filter forming step, the same notch pattern as the notch shape formed on the semiconductor substrate is formed on the transparent substrate simultaneously with the formation of the filter layer,
In the bonding step, using the notch shape of the semiconductor substrate and the notch pattern of the transparent substrate, the semiconductor substrate and the transparent substrate are aligned.
A method for manufacturing the solid-state imaging device according to claim 7. An optical filter having a filter layer formed on a transparent substrate;
A solid-state imaging device that is arranged so as to face the optical filter, and a plurality of pixels that receive light incident through the filter layer are arranged in a pixel region of a semiconductor substrate;
An adhesive layer that is provided between the optical filter and the solid-state imaging device, and that bonds the optical filter and the solid-state imaging device;
The filter layer is a dielectric multilayer film in which a plurality of high-refractive index dielectric layers and low-refractive index dielectric layers are alternately stacked, and is a surface of the transparent substrate facing the solid-state imaging device. Are formed so as to cover a portion corresponding to the pixel region and a part of a region located around the pixel region,
The adhesive layer is at least in contact with a peripheral portion of the surface where the solid-state imaging element and the optical filter face each other, and a portion not covered with the filter layer with the transparent substrate and a peripheral portion of the filter layer Is provided as
Electronics.

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