JP2012160502A - Substrate for semiconductor light-emitting element, method of manufacturing the same, and semiconductor light-emitting element using substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a light-emitting element having excellent crystallinity and optical extraction efficiency, and suppressing increase in a forward voltage in a high-current region, and to provide a method of manufacturing the light-emitting element substrate, and a light-emitting element using the light-emitting element substrate.SOLUTION: In a semiconductor light-emitting element substrate, a semiconductor light-emitting element is manufactured by growing a semiconductor crystal on a first principal surface on the substrate. A plurality of convex parts each having an inclined plane on which the growth of the semiconductor crystal is suppressed are formed on the first principal surface. The plurality of convex parts are arranged so that the inclined planes are unevenly distributed on the first principal surface, and that light propagated parallel to the first principal surface is reflected on any one of the convex parts.

Description

  The present invention relates to a semiconductor light emitting device in which convex portions are arranged on the surface of a substrate, and more particularly to a semiconductor light emitting device in which light extraction efficiency is increased by the arrangement of the convex portions, a substrate used therefor, and a manufacturing method thereof.

  2. Description of the Related Art A semiconductor element, for example, a light emitting diode (LED) made of a nitride semiconductor is generally configured by sequentially stacking an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate and forming electrodes thereon. Yes. The light in the active layer is emitted to the outside of the device from the externally exposed surface (upper surface, side surface) of the semiconductor structure, the exposed surface (back surface, side surface) of the substrate, and the like. When the light generated in the semiconductor layer is incident on the interface with the electrode or the interface with the substrate at an angle greater than a predetermined critical angle, the light propagates laterally in the semiconductor layer while repeating total reflection. A part is absorbed, and the light extraction efficiency decreases.

  Therefore, in order to improve the light extraction efficiency, it has been considered to provide unevenness on the semiconductor growth surface side of the substrate. As conventional techniques for providing unevenness on the growth surface of a substrate, there are the following documents, and in relation to Patent Document 3, JP 2006-066642 A, JP 2005-064492 A, JP 2005-101230 A, There are JP-A-2005-136106 and JP-A-2005-314121, and JP-A-2000-331937, JP-A-2002-280609, and JP-A-2002-289540 are related to patent documents 4 and 5. There is a publication.

JP 2003-318441 A JP 2005-101656 A Japanese Patent Laying-Open No. 2005-047718 JP 2002-164296 A JP 2002-280611 A JP 2001-053012 A JP 2008-177528 A JP 2007-194450 A

In order to improve the light extraction efficiency, it is preferable that the convex portions are densely arranged and the height of the convex portions is high. In addition, when the convex portion is disposed on the semiconductor crystal surface, the semiconductor crystal can be grown while suppressing the propagation of defects by lateral growth of dislocations generated at the substrate interface and crystal bonding. When densely arranged and the height of the convex portion is high, a highly crystalline semiconductor with reduced threading dislocations can be obtained.
However, the reduction of the through potential causes a problem that the resistance of the semiconductor crystal increases and the forward voltage of the obtained semiconductor light emitting element increases. The increase of the forward voltage appears remarkably in a large current region such as lighting application.

  Accordingly, in view of the above circumstances, the present invention provides a substrate for a light-emitting element that is excellent in crystallinity and light extraction efficiency and suppresses an increase in forward voltage in a high current region, a method for manufacturing the light-emitting element substrate, and the light-emitting element It is an object to provide a light-emitting element using a substrate.

To achieve the above object, a semiconductor light emitting device substrate according to the present invention is a semiconductor light emitting device substrate in which a semiconductor light emitting device is manufactured by growing a semiconductor crystal on a first main surface on a substrate,
A plurality of convex portions each having an inclined surface in which growth of the semiconductor crystal is suppressed is formed on the first main surface;
The plurality of convex portions are arranged on the first main surface such that the inclined surface is unevenly distributed on the first main surface, that is, the region where the inclined surface is densely arranged and the region where the inclined surface is roughly arranged. And the light propagating parallel to the first main surface is reflected at any one of the convex portions.

  The semiconductor light-emitting element substrate according to the present invention has a crystal growth surface by arranging the convex portion on the first main surface so that the inclined surface on which the growth of the semiconductor crystal is suppressed is unevenly distributed on the first main surface. While some of the dislocations that occur in are confined inside the crystal by lateral growth of the crystal, the number of threading dislocations that appear on the crystal surface increases. Further, by arranging the convex portion so that the light propagating in equilibrium with respect to the first main surface is reflected at any of the convex portions, emission of light from the side surface of the semiconductor light emitting element substrate is prevented, High light extraction efficiency can be maintained.

FIG. 1 is a cross-sectional view of a nitride semiconductor light emitting device according to the present invention. FIG. 2 is a plan view showing an example of the arrangement of convex portions on the first main surface of a conventional semiconductor light emitting element substrate. FIG. 3 is a plan view showing an example (Example 1) of the arrangement of convex portions on the first main surface of the semiconductor light emitting element substrate according to the first embodiment of the present invention. FIG. 4 is a plan view showing another example (Example 2) of the arrangement of the protrusions on the first main surface of the semiconductor light emitting element substrate according to the first aspect of the present invention. FIG. 5 is a plan view showing an example (Example 3) of an arrangement of convex portions on the first main surface of the semiconductor light emitting element substrate according to the second mode of the present invention. FIG. 6 is a plan view showing another example (Example 4) of the arrangement of the protrusions on the first main surface of the semiconductor light emitting element substrate according to the second mode of the present invention. FIG. 7 is a plan view showing still another example (Example 5) of the arrangement of the protrusions on the first main surface of the semiconductor light emitting element substrate according to the second mode of the present invention. FIG. 8 is a plan view showing an example of the arrangement of convex portions on the first main surface of the semiconductor light emitting element substrate according to the third embodiment of the present invention. FIG. 9 is a plan view schematically showing the shape of the electrode of the semiconductor light emitting device according to the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the embodiments described below are examples for embodying the technical idea of the present invention, and the present invention is not specified as follows. The dimensions, materials, shapes, relative arrangements, and the like of the components described in the embodiments are not intended to limit the scope of the present invention only to specific examples unless otherwise specified. Not too much. Note that the size, positional relationship, and the like of the members shown in each drawing may be exaggerated for clarity of explanation. Furthermore, each element constituting the present invention may be configured such that a plurality of elements are configured by the same member and the plurality of elements are shared by one member, and the function of the one member is shared by the plurality of members. It can also be realized.

  As shown in FIG. 1, the semiconductor light emitting device of the present invention has a base layer 12, a first conductivity type layer (n-type layer) 13, an active layer (light emission layer) 14, a second conductivity type layer (on a substrate 10). A semiconductor multilayer structure 11 in which p-type layers 15 are sequentially laminated is provided, and a plurality of convex portions (dimples) 1 are provided on a first main surface 2 of a substrate 10 on which a base layer 12 is grown. By forming the convex portion on the first main surface, the light propagating in the horizontal direction can be reflected by the convex portion and propagated in the vertical direction, and as a result, the light extraction efficiency of the semiconductor light emitting device is improved. The Further, when the convex portion is formed on the first main surface, the semiconductor crystal can be grown while suppressing the propagation of defects by lateral growth and crystal bonding of dislocations generated at the substrate interface. A semiconductor with reduced crystallinity and high crystallinity can be obtained. Hereinafter, the crystal growth mechanism will be described in more detail.

When growing a nitride semiconductor (for example, GaN), a substrate such as sapphire, spinel, SiC, or GaN is used. For example, on a crystal growth surface (for example, the C-plane (0001) of sapphire) on which the crystal can be grown. A nitride semiconductor crystal is grown. However, when these substrates are used, the crystal surface formed due to the lattice mismatch between the GaN crystal and the substrate (due to the difference between the lattice constant of the substrate and the lattice constant of the nitride semiconductor) There will be a large number of dislocations.
On the other hand, the protrusion usually has an inclined surface 4 (or a surface perpendicular to the substrate surface) that is not parallel to the substrate surface. When the substrate surface 2 is a surface capable of crystal growth of a nitride semiconductor (hereinafter referred to as a crystal growth surface), the inclined surface 4 (or vertical surface) has a plane orientation different from that of the crystal growth surface. In this plane, crystal growth is suppressed (hereinafter, these planes are referred to as crystal growth suppression planes). The convex portion may have a flat surface 3 (crystal growth surface) parallel to the substrate surface at the top thereof. As described above, when the convex portion is formed on the first main surface, the crystal growth suppression surface exists in the crystal growth surface capable of crystal growth. The semiconductor crystal grows three-dimensionally on the crystal growth surface, and side and lateral crystal growth occurs so as to cover the crystal growth suppression surface, thereby suppressing the propagation of defects. As a result, dislocations extending in the growth direction are confined in the underlying layer, and threading dislocations appearing on the surface are reduced.

  In the conventional convex arrangement, the convex parts are regularly arranged so that the distances between the centers of adjacent convex parts are the same, for example, at the apex of a polygonal lattice such as a triangular lattice, a quadrangular lattice, or a hexagonal lattice. It is arranged to be located. In the conventional semiconductor light emitting device substrate, the convex portions are densely arranged to increase the light extraction efficiency of the semiconductor light emitting device. When the convex portions are arranged densely, the ratio of the area of the crystal growth suppression surface to the first main surface of the semiconductor light emitting element substrate is increased, thereby increasing the lateral growth of the semiconductor crystal covering the crystal growth suppression surface, Dislocations are reduced. As a result, a highly crystalline semiconductor crystal having good characteristics can be obtained. However, when the number of dislocations in the semiconductor crystal is small, there arises a problem that the forward voltage increases particularly in a high current region.

Therefore, the semiconductor light emitting element substrate according to the present invention reduces the number of convex portions from the conventional convex arrangement (triangular lattice or the like) densely arranged so that the distance between the centers of adjacent convex portions is the same. As a result, the area of the crystal growth surface is increased.
If the number of convex portions is reduced by increasing the lattice size of the conventional convex portion arrangement so that the distance between the centers of adjacent convex portions is the same and reducing the number of convex portions, the area of the crystal growth surface is Although it increases, a part of the light propagating in the lateral direction parallel to the first main surface of the substrate is emitted from the side surface of the semiconductor light emitting element without being reflected by any convex part, and the light extraction efficiency is lowered. End up.
On the other hand, in the semiconductor light emitting device substrate of the present invention, the inclined surfaces are densely arranged by reducing the number of convex portions and arranging the convex portions so that the inclined surfaces (that is, crystal growth suppressing surfaces) are unevenly distributed. The region to be arranged and the region to be roughly arranged are provided on the first main surface, and the area of the crystal growth surface is increased. As a result, the number of threading dislocations on the crystal surface increases, and the forward voltage of the resulting semiconductor light emitting device decreases. The number of threading dislocations on the crystal surface can be estimated by measuring the number of V pits generated due to threading dislocations on the crystal surface using an atomic force microscope (AFM). The number of V pits on the surface of the semiconductor crystal is preferably 600 to 800/10 μm ² .
In addition, by arranging the convex portions so that the inclined surfaces are unevenly distributed, the distance between the centers of the adjacent convex portions is short (or the portion where the convex portions are densely arranged) and the center of the adjacent convex portions. Protrusions are arranged so that a part having a long distance (or a part where the convex parts are roughly arranged) is present on the first main surface, and as a result, the horizontal direction is parallel to the first main surface of the substrate. Is propagated in the vertical direction by being reflected by one of the convex portions arranged on the first main surface. Therefore, the semiconductor light emitting device of the present invention can have the same light extraction efficiency as that of a conventional semiconductor light emitting device having convex portions arranged densely.

  In order to prevent the light propagating parallel to the first main surface of the substrate from being emitted from the side surface of the substrate without being reflected by the convex portion by reducing the convex portion as described above, the convex portion It arrange | positions so that it may reflect in either convex part, and a dimension is defined. As a result, a decrease in light extraction efficiency due to a decrease in the convex portion is suppressed. Two or more types of convex portions having different shapes and / or dimensions may be arranged on the first main surface.

  The example of the specific form of the convex part arrangement | positioning which concerns on this invention is shown below.

[First embodiment]
In the first embodiment of the semiconductor light emitting device of the present invention, in an arrangement in which some arrangement positions are periodically removed from the conventional convex arrangement position set so that the distance between adjacent arrangement positions becomes equal, By providing a plurality of convex portions on the first main surface of the substrate, the number of convex portions is reduced. For example, it is possible to reduce the number of convex portions by providing a plurality of convex portions in an arrangement in which some arrangement positions are periodically removed from the conventional arrangement positions set at each vertex of the triangular lattice. In the portion where the arrangement position of the convex portion is removed, the inclined surface of the convex portion in which crystal growth is suppressed is reduced, and the distance between the centers of the adjacent convex portions is longer than in other portions. The number of convex portions depends on the shape, size and arrangement of the convex portions, but is preferably reduced to about 60 to 80%, more preferably 70 to 80% of the number of convex portions in the conventional form. If the number of convex portions is too small, the light extraction efficiency decreases, and the internal quantum efficiency decreases due to the high dislocation of the crystal, which is not preferable.
An example of the first form is shown in FIG. The convex portion arrangement in this example is an arrangement obtained by removing the arrangement position corresponding to the center 32 of the hexagon 31 having one side of the triangular lattice 21 as one side from the conventional convex portion arrangement position as shown in FIG. This is a convex arrangement in which the convex parts are arranged to reduce the number of convex parts.
Another example of the first form is shown in FIG. The convex arrangement in this example is an arrangement position corresponding to the center 42 of the rhombus 41 having one side that is twice the length of one side of the triangular lattice 21 from the conventional convex arrangement position as shown in FIG. In this arrangement, a plurality of convex portions are arranged in the removed arrangement to reduce the number of convex portions.

[Second form]
In the second embodiment of the semiconductor light emitting device of the present invention, the convex portions arranged at the apexes and the centers of the polygons so that the number of convex portions existing on the first main surface is smaller than the conventional convex portion arrangement. Are arranged periodically. In this case, in order not to reduce the light extraction efficiency, there are portions where the distance between the centers of adjacent convex portions is short and long, and as a result, the inclined surfaces of the convex portions where crystal growth is suppressed are unevenly distributed. In other words, the set of convex portions is arranged on the first main surface so that there are a portion where the inclined surfaces are densely present and a portion where the inclined surfaces are coarsely present. For example, a set of six convex portions arranged at each vertex and center of a regular pentagon is arranged on the first main surface so that there are a portion where the crystal growth suppression surface is dense and a portion where the crystal growth suppression surface is present. Arrange periodically.
The number of convex portions depends on the shape, size and arrangement of the convex portions, but is preferably reduced to about 55 to 80%, more preferably 70 to 80% of the number of convex portions in the conventional form. If the number of convex portions is too small, the light extraction efficiency decreases, and the internal quantum efficiency decreases due to the high dislocation of the crystal, which is not preferable.
An example of the second form is shown in FIG. In this example, a convex portion having the same size as the conventional convex portion as shown in FIG. 2 is arranged at each vertex of the regular octagon 51, and a convex portion 52 having a larger dimension than the conventional convex portion is arranged at the center of the regular octagon. Is done. A direction in which the regular octagon is arranged such that one regular octagon shares one side 53 with another regular octagon adjacent to the regular octagon in one direction, with the regular octagon as one set. , The regular octagon is arranged such that one regular octagon shares another side 54 with another regular octagon adjacent thereto.
Another example of the second form is shown in FIG. In this example, convex portions are arranged at the apexes and the center of the regular pentagon 61, and the first principal surface is formed such that the center of the regular pentagon coincides with each lattice point of the triangular lattice 62 with the regular pentagon as a set. A convex part is arranged on the top.
Another example of the second embodiment is shown in FIG. In this example, a convex portion is arranged at each vertex and center of the regular pentagon 71. With this regular pentagon as a set, regular pentagons oriented in the same direction are arranged in a straight line in the first row 72 on the first main surface, and in the second row 73 in the direction opposite to the first row. The regular pentagons arranged in a straight line are arranged so that the centers of the regular pentagons in the first row and the centers of the regular pentagons in the second row are arranged in a zigzag manner. In the third row 74 and the fourth row 75, regular pentagons are arranged so as to be line-symmetric with the set of the first row and the second row. Further, the first regular pentagon in the second column, the second regular pentagon located next to the first regular pentagon in the second column, and the first and second regular pentagons are line symmetric, in the third column Convex portions are arranged at the center 701 of a quadrangle whose apexes are the centers 76 to 79 of the third regular pentagon and the fourth regular pentagon. Convex portions are arranged according to repetition of the first to fourth rows arranged in the above configuration.

[Third embodiment]
In the third embodiment of the semiconductor light emitting device of the present invention, a semiconductor crystal can be grown by removing a plurality of adjacent arrangement positions from the arrangement positions set so that the distances between adjacent arrangement positions are equal. The plurality of convex portions are provided on the first main surface in an arrangement in which a flat region is provided. As a result, there are densely inclined surfaces in which crystal growth is suppressed in portions other than the flat region, whereas there are no convex inclined surfaces in which crystal growth is suppressed in the flat region. Further, in the flat region, the distance between the centers of the adjacent convex portions is longer than that in other portions.
The flat region is preferably provided periodically on the first main surface. The shape of the flat region may be any shape, and may be, for example, a circle or a polygon. When the flat region is circular, the size (ie, diameter) of the flat region is preferably 8 to 20 μm, more preferably 10 to 15 μm. The ratio of the area of the flat region to the area of the first main surface is preferably 10 to 30%, more preferably 10 to 20%. If the ratio of the flat area to the first main surface area is too large, the internal quantum efficiency is lowered due to the high dislocation of the crystal, and the light extraction efficiency is lowered, which is not preferable.
An example of the third embodiment is shown in FIG. Circular flat regions 81 capable of crystal growth are periodically arranged on the first main surface of the semiconductor light emitting device substrate on which the convex portions are arranged as in the conventional convex portion arrangement as shown in FIG. .

  The convex arrangement according to the present invention may be other than those shown above.

  The convex part can be formed on the substrate by setting the crystal orientation of the substrate, the surface orientation of the substrate surface on which the convex part is formed, the mask shape and dimensions, and the etching conditions according to the target shape.

The etching method may be either wet etching or dry etching. Specifically, gas phase etching, plasma etching, and reactive ion etching can be used as the dry etching, and as an etching gas at that time, Cl-based gas, F-based gas, for example, Cl ₂ , SiCl ₄ , BCl ₃ , In addition to HBr, SF ₆ , CHF ₃ , C ₄ F ₈ , CF ₄ and the like, an inert gas such as Ar can be used.
As an etching solution for wet etching, for example, in the case of a sapphire substrate, phosphoric acid, pyrophosphoric acid, a mixed acid obtained by adding sulfuric acid thereto, or potassium hydroxide can be used. As the etching solution, various etchants can be used depending on the substrate material, and a high temperature etching solution such as hot phosphoric acid is usually used. The mask material is appropriately selected according to the substrate material and the etching solution in addition to silicon oxide such as SiO _2, and is selected from the group consisting of V, Zr, Nb, Hf, Ti, Ta, Al, for example. And oxides of at least one element, nitrides of at least one element selected from the group consisting of Si, B, and Al.

  A nitride semiconductor layer light emitting device can be formed by growing a nitride semiconductor on the semiconductor light emitting device substrate formed by the method as described above.

[substrate]
The substrate is formed from a material suitable for epitaxial growth of the semiconductor stack. Examples of the substrate suitable for the epitaxial growth of the nitride semiconductor include insulating substrates such as sapphire and spinel, and conductive substrates such as SiC and nitride semiconductor (for example, GaN).

In forming a light-emitting element, a semiconductor grown on a substrate is represented by a general formula In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). The gallium nitride compound semiconductor material can be used. In particular, the binary / ternary mixed crystal can be suitably used as described later. In addition to nitride semiconductors, the present invention can also be applied to other semiconductor materials such as GaAs, GaP compound semiconductors, AlGaAs, InAlGaP compound semiconductors.

  Hereinafter, the arrangement of the convex portions in the semiconductor light emitting device substrate of the prior art and the semiconductor light emitting device substrate of the example of the present invention will be described. Unless otherwise specified, in all the examples, the convex portion has the same shape and dimensions as those of the conventional convex portion described later.

[Prior art (comparative example)]
In FIG. 2, an example of arrangement | positioning of the convex part in the 1st main surface of the conventional semiconductor light-emitting element substrate is shown. In this example, a convex portion 1 having a substantially triangular pyramid shape is arranged at each lattice point of a triangular lattice 21 whose lattice shape is a regular triangle. The first main surface 2 where no protrusion is formed and the flat surface 3 parallel to the first main surface at the top of the protrusion are crystal growth surfaces on which a semiconductor crystal can be grown. The inclined surface 4 of the convex portion is a crystal growth suppression surface on which the growth of the semiconductor crystal is suppressed. The distance between the centers of the adjacent convex portions is the same, and the crystal growth surface and the crystal growth suppression surface are uniformly distributed. Hereinafter, this convex arrangement is referred to as “conventional convex arrangement”. In the conventional protrusion arrangement, the protrusions are densely arranged in order to increase the light extraction efficiency of the semiconductor light emitting device.

[Example 1 (first embodiment)]
FIG. 3 shows the arrangement of the protrusions on the first main surface of the semiconductor light emitting device substrate of Example 1 of the present invention. The convex portion arrangement of the first embodiment has a plurality of convex portions arranged by removing the arrangement position corresponding to the center 32 of the hexagon 31 having one side of the triangular lattice 21 as one side from the conventional convex portion arrangement position. Thus, the convex portion arrangement has a reduced number of convex portions. The number of convex portions existing on the first main surface of the semiconductor light emitting element substrate of Example 1 is 67% of the number of convex portions in the prior art.

[Example 2 (first embodiment)]
FIG. 4 shows the arrangement of the protrusions on the first main surface of the semiconductor light emitting device substrate of Example 2 of the present invention. The convex portion arrangement of Example 2 is a plurality of arrangements in which the arrangement position corresponding to the center 42 of the rhombus 41 having one side that is twice the length of one side of the triangular lattice 21 is removed from the conventional convex portion arrangement position. This is a convex arrangement in which the convex parts are arranged to reduce the number of convex parts. The number of convex portions existing on the first main surface of the semiconductor light emitting element substrate of Example 2 is 75% of the number of convex portions in the conventional technique.

[Example 3 (second embodiment)]
FIG. 5 shows the arrangement of the protrusions on the first main surface of the semiconductor light emitting device substrate of Example 3 of the present invention. In the third embodiment, a convex portion having the same size as the convex portion of the prior art is arranged at each vertex of the regular octagon 51, and a convex portion 52 having a larger dimension than the convex portion of the conventional technology is arranged at the center of the regular octagon. A direction in which the regular octagon is arranged such that one regular octagon shares one side 53 with another regular octagon adjacent to the regular octagon in one direction, with the regular octagon as one set. , The regular octagon is arranged such that one regular octagon shares another side 54 with another regular octagon adjacent thereto. The number of convex portions existing on the first main surface of the semiconductor light emitting element substrate of Example 3 is 60% of the number of convex portions in the conventional technique.

[Example 4 (second embodiment)]
FIG. 6 shows the arrangement of convex portions on the first main surface of the semiconductor light emitting element substrate of Example 4 of the present invention. In the fourth embodiment, convex portions are arranged at the apexes and the center of the regular pentagon 61, and the first main pentagon is set so that the center of the regular pentagon coincides with each lattice point of the triangular lattice 62. A convex part is arranged on the surface. The number of convex portions existing on the first main surface of the semiconductor light emitting element substrate of Example 4 is 78% of the number of convex portions in the prior art.

[Example 5 (second embodiment)]
FIG. 7 shows the arrangement of convex portions on the first main surface of the semiconductor light emitting element substrate of Example 5 of the present invention. In the fifth embodiment, convex portions are arranged at the apexes and the center of the regular pentagon 71. With this regular pentagon as a set, regular pentagons oriented in the same direction are arranged in a straight line in the first row 72 on the first main surface, and in the second row 73 in the direction opposite to the first row. The regular pentagons arranged in a straight line are arranged so that the centers of the regular pentagons in the first row and the centers of the regular pentagons in the second row are arranged in a zigzag manner. In the third row 74 and the fourth row 75, regular pentagons are arranged so as to be line-symmetric with the set of the first row and the second row. Further, the first regular pentagon in the second column, the second regular pentagon located next to the first regular pentagon in the second column, and the first and second regular pentagons are line symmetric, in the third column Convex portions are arranged at the center 701 of a quadrangle whose apexes are the centers 76 to 79 of the third regular pentagon and the fourth regular pentagon. Convex portions are arranged according to repetition of the first to fourth rows arranged in the above configuration. The number of convex portions existing on the first main surface of the semiconductor light emitting element substrate of Example 5 is 57% of the number of convex portions in the conventional technique.

[Fabrication of semiconductor light emitting device]
A 700 × 240 μm semiconductor light-emitting device having the electrode shape shown in FIG. 9 was produced according to the following procedure using the substrates of the comparative example and Examples 1 to 5.
On the C surface (0001) of the sapphire substrate, an SiO ₂ film serving as an etching mask was formed and patterned to form a mask.
Next, the substrate was immersed in an etching bath using a mixed acid of phosphoric acid and sulfuric acid as an etchant and etched at a solution temperature of about 290 ° C. for about 5 minutes.

  Subsequently, the substrate is transferred to an MOCVD apparatus, and a GaN buffer layer of 20 nm is grown at a low temperature (about 510 ° C.) on the first main surface on which the convex portions are formed. 2 μm of GaN was grown c-axis to form an underlayer having a flat surface.

An n-type layer such as an n-type contact layer, an active layer, and a p-type layer were formed on the substrate on which the base layer obtained in this way was formed, thereby producing a semiconductor element structure.
Specifically, on the underlayer,
As a first conductivity type layer (n-type layer), in the region between the n-side contact layer of Si (4.5 × 10 ¹⁸ / cm ³ ) -doped GaN having a film thickness of 5 μm and the contact layer and the active layer, 0 .3 μm undoped GaN layer, 0.03 μm Si (4.5 × 10 ¹⁸ / cm ³ ) doped GaN layer, 5 nm undoped GaN layer, 4 nm undoped GaN layer, and 2 nm undoped In _0.1 Ga A multilayer film in which 10 layers of _0.9 N layers are alternately and repeatedly stacked is used as an active layer on the n-type layer, an undoped GaN barrier layer with a thickness of 25 nm, and an In _0.3 Ga ₀ film with a thickness of 3 nm. _.7 A multi-quantum well structure in which six N layers are alternately and alternately stacked, and finally a barrier layer is stacked,
As the second conductivity type layer (p-type layer) on the active layer, a 4 nm Mg (5 × 10 ¹⁹ / cm ³ ) -doped Al _0.15 Ga _0.85 N layer and a 2.5 nm Mg (5 × 10 ¹⁹ / cm ³ ) Doped In _0.03 Ga _0.97 N layers are alternately stacked 5 layers at a time, and finally the p-side multilayer film layered with the AlGaN layer and Mg film with a thickness of 0.12 μm. A structure (emission wavelength 465 nm, blue LED) in which p-side contact layers of (1 × 10 ²⁰ / cm ³ ) -doped GaN were stacked was formed.

  ITO (about 170 nm) is formed as a translucent ohmic electrode on the surface of the p-type layer, which is the surface of the light emitting structure, and Rh (about 100 nm) / Pt (on the ITO and n-side contact layer). An electrode having a structure in which about 200 nm) / Au (about 500 nm) was laminated in this order was provided.

[Measurement of the number of V pits]
In Comparative Examples and Examples 1 to 5, the surface of the sample grown to the active layer according to the above-described method was observed using an atomic force microscope (AFM), and V pits existing on the sample surface with an area of 10 μm ² were observed. The number was measured.

  Regarding the semiconductor light emitting devices of the comparative example and Examples 1 to 5 manufactured by the above method, the number of V pits, forward current (If) -relative light output (Po) characteristic test, forward current (If) -forward voltage ( Vf) characteristic test, ambient temperature (Ta) -relative light output (Po) characteristic test, and ambient temperature (Ta) -forward voltage (Vf) characteristic test were performed. The results are shown in Tables 1 and 2.

[Number of V-pits]
In Examples 1 to 5, the number of V pits per 10 μm ² of the active layer surface increased by 38 to 155 compared to the comparative example.

[If-Po characteristics]
Even in the high current region (100 mA), the semiconductor light emitting devices of Examples 1 to 5 had a relative light output Po equivalent to that of the semiconductor light emitting device of the comparative example.

[If-Vf characteristics]
In all the semiconductor light emitting devices of Examples 1 to 5, the increase in the forward voltage Vf in the high current region (100 mA) was reduced as compared with the semiconductor light emitting device of the comparative example.

[Ta-Po characteristics and Ta-Vf characteristics]
Regarding the amount of change in Po when the relative light output Po was measured at the ambient temperature Ta of 100 ° C. and 25 ° C., no significant difference was found in the comparative example and Examples 1-5. On the other hand, the result that the increase amount of the forward voltage Vf when the ambient temperature Ta was changed from 100 ° C. to 25 ° C. was lower than that of the comparative example in all of Examples 1 to 5 was obtained.

  Semiconductor light emitting devices are in great demand for energy saving lighting applications as light emitting diodes, and brightness is important, but efficiency is equally important. By locally and periodically arranging a region without unevenness during the production of the uneven substrate of the present invention, high output, low Vf and high efficiency can be achieved without changing the crystal growth conditions of the nitride semiconductor.

DESCRIPTION OF SYMBOLS 1 Convex part 2 The 1st main surface (crystal growth surface) of a board | substrate
3 Flat surface at the top of the protrusion (crystal growth surface)
4 Inclined surface of convex part (crystal growth suppression surface)
DESCRIPTION OF SYMBOLS 10 Substrate 11 Semiconductor laminated structure 12 Underlayer 13 First conductivity type layer (n-type layer)
14 Active layer (light emitting layer)
15 Second conductivity type layer (p-type layer)
21 Triangular lattice 31 Hexagon 32 having one side of the triangular lattice 32 Hexagonal center 41 Diamond 42 having one side twice the length of one side of the triangular lattice 42 Rhombus center 51 Regular octagon 52 Regular octagon Central convex portion 53 One side of regular octagon 51 54 Another side of regular octagon 51 61 Regular pentagon 62 Triangular lattice 71 Regular pentagon 72 First row 73 Second row 74 Third row 75 Fourth row 76 First regular pentagon Center 77 Second regular pentagonal center 78 Third regular pentagonal center 79 Fourth regular pentagonal center 701 76-79 square center 81 Flat region 111 First electrode (first conductivity type layer side) )
112 Second electrode (second conductivity type layer side)
113 Contact electrode 114 Pad electrode

Claims (10)

A semiconductor light emitting device substrate in which a semiconductor light emitting device is manufactured by growing a semiconductor crystal on a first main surface on a substrate,
A plurality of convex portions each having an inclined surface in which growth of the semiconductor crystal is suppressed is formed on the first main surface;
The plurality of convex portions are arranged such that the inclined surface is unevenly distributed on the first main surface, and light propagating in parallel to the first main surface is reflected by any one of the convex portions. A semiconductor light-emitting element substrate.   The plurality of convex portions are arranged such that a portion having a long center-to-center distance between adjacent convex portions and a portion having a short center-to-center distance are present on the first main surface. Semiconductor light emitting device substrate.   The plurality of convex portions are provided in an arrangement in which some arrangement positions are periodically removed from an arrangement position set so that distances between adjacent arrangement positions are equal. A semiconductor light-emitting element substrate according to 1.   3. The semiconductor light emitting element according to claim 1, wherein the convex portions arranged at each vertex and center of the polygon are taken as one set, and the set of the convex portions is periodically arranged on the first main surface. substrate.   5. The semiconductor light-emitting element substrate according to claim 1, wherein two or more types of convex portions having different sizes are disposed on the first main surface.   In the arrangement in which a flat region in which a semiconductor crystal can be grown is provided by removing the plurality of adjacent arrangement positions from the arrangement positions set so that the distances between the adjacent arrangement positions are equal, the plurality of convex portions The semiconductor light emitting element substrate according to any one of claims 1 to 5, wherein is provided on the first main surface.   The semiconductor light emitting element substrate according to claim 6, wherein the flat region is periodically provided on the first main surface.   The substrate according to claim 6 or 7, wherein a ratio of an area of the flat region to an area of the first main surface is 10 to 30%. In the method for manufacturing a semiconductor light emitting device substrate,
A mask process for providing a mask on the first main surface of the substrate;
Forming a convex portion on the substrate by etching the substrate through the mask;
The manufacturing method of the board | substrate of any one of Claims 1-8 by the method which comprises the process of growing a semiconductor on a substrate surface and forming a semiconductor substrate.   A semiconductor light emitting device in which a nitride semiconductor layer light emitting device is formed by growing a nitride semiconductor on the first main surface of the substrate according to claim 1.

Images