JP2012142653A - Phase-locked oscillator and transmitter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a phase-locked oscillator that can accurately determine a locked state and an unlocked state in comparison with conventional ones.SOLUTION: A phase-locked oscillator includes a sampling phase detector SPD. The sampling phase detector SPD outputs a voltage signal in accordance with a phase difference between a reference signal and an oscillation signal output form a voltage-controlled oscillator VCO. A Schmitt circuit 34 generates a pulse signal in accordance with an output of the sampling phase detector. A determination circuit determines locking/unlocking in accordance with the presence or absence of a pulse signal.

Description

  The present invention relates to a phase-locked oscillator including a sampling phase detector (SPD) and a transmitter using the same.

  A phase locked oscillator (PLO) using a sampling phase detector (SPD) is widely known. Such a phase-locked oscillator is widely used as a local oscillator for frequency conversion in a high-frequency transmitter or receiver such as a microwave band. In the transmitter using the phase-locked oscillator, when the synchronization of the phase-locked oscillator is released, the transmission radio wave other than the target transmission frequency is output and becomes an interference wave. It detects that the lock has been released and stops transmission.

  As disclosed in Patent Document 1, the output voltage of the loop filter is used to detect unlocking, that is, unlocking. The output voltage of the loop filter corresponds to the phase difference between the oscillation frequency of the voltage controlled oscillator and the reference signal. When the output voltage of the loop filter enters a predetermined normal range, the state is determined as a locked state. When the output voltage of the loop filter is out of a predetermined normal range, the state is determined as an unlocked state. When the unlock state is detected, the circulator included in the phase locked oscillator sweeps the control voltage of the voltage controlled oscillator. In this way, the lock of the phase-locked oscillator is established again.

JP-A-11-177418 JP 2004-304251 A JP-A-6-164811

  In the aforementioned phase-locked oscillator, the oscillation frequency of the voltage-controlled oscillator must enter a pull-in range narrower than the lock range when establishing the lock. However, if the control voltage range of the voltage-controlled oscillator that is determined to be in the locked state is set to a range corresponding to the lock range, sweeping the control voltage from the unlocked state with the circulator will actually enter the lockable pull-in range. It is erroneously determined to be locked. As a countermeasure, when the control voltage range that is determined to be locked is set to a range that corresponds to the pull-in range, the control voltage is actually within the lock range and the lock state is maintained, but it is erroneously determined to be unlocked. Will be. From the above, it is difficult to accurately determine lock / unlock only in the control voltage range.

  According to some aspects of the present invention, it is possible to provide a phase-locked oscillator that can determine a locked state and an unlocked state more accurately than in the past. According to some aspects of the present invention, a transmitter utilizing such a phase locked oscillator can be provided.

  According to the first aspect of the present invention, a reference signal oscillator that outputs a reference signal, a voltage-controlled oscillator that outputs an oscillation signal at an oscillation frequency corresponding to a control voltage, and a phase difference between the reference signal and the oscillation signal A sampling phase detector that outputs a voltage signal, a Schmitt circuit that generates a rectangular wave according to the output of the sampling phase detector, and a determination circuit that determines lock / unlock according to the presence or absence of the rectangular wave A phase locked oscillator is provided.

  When the phase difference between the reference signal and the oscillation signal is reduced, a lock state is established between the reference signal oscillator and the voltage controlled oscillator. At this time, the Schmitt circuit does not output a rectangular wave. When the locked state is released, the Schmitt circuit outputs a rectangular wave. Based on the characteristics of the Schmitt circuit, the determination circuit can accurately determine the locked state and the unlocked state.

  According to the second aspect of the present invention, the mixer includes a mixer that converts the frequency of the input signal based on the oscillation frequency signal output from the local oscillator, the local oscillator including a reference signal oscillator that outputs a reference signal, a control voltage A voltage-controlled oscillator that outputs an oscillation signal at an oscillation frequency according to the magnitude, a sampling phase detector that outputs a voltage signal according to the phase difference between the reference signal and the oscillation signal, and an output of the sampling phase detector Accordingly, a transmitter is provided that includes a Schmitt circuit that generates a rectangular wave in response, and a determination circuit that determines lock / unlock according to the presence or absence of the rectangular wave.

  When the phase difference between the reference signal and the oscillation signal is reduced, a lock state is established between the reference signal oscillator and the voltage controlled oscillator. At this time, the Schmitt circuit does not output a rectangular wave. When the locked state is released, the Schmitt circuit outputs a rectangular wave. Based on the characteristics of the Schmitt circuit, the determination circuit can accurately determine the locked state and the unlocked state. The operation of the transmitter can be controlled in response to such a determination.

  The transmitter may further include a power amplifier that amplifies the output of the mixer. When the determination circuit determines the unlocking, the determination circuit can stop the operation of the power amplifier. When in the unlocked state, the power consumption of the power amplifier can be reduced.

  A transmitter that amplifies the output of the mixer, an RF amplifier that amplifies the output of the mixer and supplies the output to the power amplifier, counts the wave number of the rectangular wave, and supplies the count value to the determination circuit A counter circuit may be further included. The determination circuit stops the operation of the RF amplifier when the count value exceeds a first value, and stops the operation of the power amplifier when the count value exceeds a second value larger than the first value. be able to.

  Here, as compared with the RF amplifier, the power amplifier takes a long time to reach a thermal saturation state after the power is turned on and to stabilize its output. Therefore, when on / off of the RF amplifier and the power amplifier is controlled in accordance with the degree of the unlocked state, power consumption is reduced and prompt circuit stabilization can be realized after returning to the locked state. it can.

  A transmitter that processes the input signal and supplies the processed signal to the mixer; a power amplifier that amplifies the output of the mixer; and amplifies the output of the mixer and supplies the amplified power to the power amplifier An RF amplifier and a counter circuit that counts the wave number of the rectangular wave and supplies the count value to the determination circuit may be further included. The determination circuit stops the operation of the IF amplifier when the count value exceeds a first value, and stops the operation of the RF amplifier when the count value exceeds a second value larger than the first value. When the count value exceeds a third value larger than the second value, the operation of the power amplifier can be stopped.

  Here, as compared with the IF amplifier, it takes time until the output of the RF amplifier reaches a thermal saturation state after the power is turned on and the output is stabilized. Similarly, it takes time for the power amplifier to reach a thermal saturation state after the power is turned on and to stabilize its output as compared with the RF amplifier. Therefore, if the on / off of the IF amplifier, RF amplifier, and power amplifier is controlled according to the degree of the unlocked state, power consumption is reduced and prompt circuit stabilization is realized after returning to the locked state. Can.

  As described above, according to the present invention, it is possible to provide a phase-locked oscillator that can determine a locked state and an unlocked state more accurately than in the past.

It is a block diagram which shows roughly the structure of the transmitting apparatus which concerns on 1st Embodiment of this invention. 1 is a block diagram illustrating a first embodiment of a phase-locked oscillator. FIG. It is a block diagram which shows the structure of a loop filter circuit in detail. It is a graph which shows the relationship between the oscillation frequency of a voltage controlled oscillator, and a control voltage. It is a block diagram which shows roughly the structure of the transmitting apparatus which concerns on 2nd Embodiment of this invention. It is a block diagram which shows in detail the structure of a determination circuit with the phase-locked oscillator which concerns on 2nd Embodiment. It is a block diagram which shows in detail the structure of the determination circuit which concerns on another specific example with the phase-locked oscillator which concerns on 2nd Embodiment.

  Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

  FIG. 1 schematically shows a configuration of a transmitter 11 according to the first embodiment of the present invention. The transmitter 11 includes an IF amplifier 12. For example, an input signal of 950 MHz to 1450 MHz, that is, an intermediate frequency signal (IF) is input to the IF amplifier 12 and amplified. This type of transmitter 11 can be compared to a satellite communication transmitter such as a block up converter (BUC) or other wireless transmitter.

  The transmitter 11 includes a local oscillator, that is, a phase locked oscillator 13. The phase-locked oscillator 13 outputs a 13.05 GHz local oscillation signal (LO) by the action of a PLL (phase-locked loop) circuit. Details of the phase-locked oscillator 13 will be described later.

  The IF amplifier 12 and the phase locked oscillator 13 are connected to the mixer 14. The mixer 14 mixes the intermediate frequency signal and the local oscillation signal of the phase-locked oscillator 13. As a result, the intermediate frequency signal is converted into a high frequency signal (RF signal) that is the sum of the frequency of the intermediate frequency signal and the frequency of the local oscillation signal.

  The mixer 14 is connected to the RF amplifier 15. The RF amplifier 15 amplifies the output of the mixer 14.

  A power amplifier 16 is connected to the RF amplifier 15. The power amplifier 16 amplifies the output signal of the RF amplifier 15 up to a predetermined output power. The output of the power amplifier 16, that is, the RF signal is propagated from the antenna 17 to the space as a radio signal. In this way, a radio signal is transmitted from the transmitter 11.

  A switch 18 is inserted between the power amplifier 16 and the antenna 17. The switch 18 switches between connection (on) and disconnection (off) between the power amplifier 16 and the antenna 17. The phase locked oscillator 13 is connected to the switch 18. A control signal is output from the phase-locked oscillator 13 when the switch 18 is connected or disconnected. When outputting the control signal, the phase-locked oscillator 13 determines the locked state and the unlocked state. If it is determined that the lock state is established, the switch 18 is connected. When it is determined that “it is unlocked”, the switch 18 is disconnected. In response to disconnection of the switch 18, the transmission of the RF signal is stopped.

  FIG. 2 shows a first embodiment of the phase-locked oscillator 13. The phase-locked oscillator 13 according to the first embodiment includes a reference signal oscillator 19. The reference signal oscillator 19 is a crystal oscillator, for example, and outputs a reference signal having a reference frequency. The phase locked oscillator 13 includes a voltage controlled oscillator (VCO) 21. The voltage controlled oscillator 21 outputs an oscillation signal at an oscillation frequency corresponding to the magnitude of the control voltage. The frequency of the oscillation signal changes according to the magnitude of the control voltage.

なお、ｆ_ｒｅｆは基準信号の周波数を示す。ｆ_ＶＣＯは発振信号の周波数を示す。Ｎは自然数を示す。電圧制御発振器２１の発振周波数が基準周波数の整数倍に一致すると、すなわち、ｆ_ＶＣＯ＝Ｎ・ｆ_ｒｅｆが確立されると、ビートは直流成分のみとなる。 The reference signal oscillator 19 and the voltage controlled oscillator 21 are connected to a sampling phase detector (SPD) 22. The sampling phase detector 22 outputs a beat corresponding to the phase difference between the reference signal and the oscillation signal. The sampling phase detector 22 includes, for example, one step recovery diode and two Schottky diodes. The sampling phase detector 22 converts the reference signal input from the reference signal oscillator 19 into a narrow pulse signal of that frequency. The sampling phase detector 22 samples the oscillation signal input from the voltage controlled oscillator 21 by the narrow pulse signal obtained by the conversion. The lower the phase difference between the two, the higher the beat output level. Here, the beat frequency f _beat is expressed by the following equation.

Note that f _ref indicates the frequency of the reference signal. f _VCO indicates the frequency of the oscillation signal. N represents a natural number. When the oscillation frequency of the voltage controlled oscillator 21 coincides with an integral multiple of the reference frequency, that is, when f _VCO = N · f _ref is established, the beat becomes only the DC component.

  A loop filter circulator hybrid circuit 23 is connected to the output terminal of the sampling phase detector 22. The output, that is, the beat of the sampling phase detector 22 is supplied to the loop filter circulator hybrid circuit 23. The output terminal of the loop filter circulator hybrid circuit 23 is connected to the control terminal of the voltage controlled oscillator 21. The output of the loop filter circulator hybrid circuit 23 is supplied to the voltage controlled oscillator 21 as a control voltage.

  The loop filter circulator hybrid circuit 23 includes a loop filter 24 and a circulator 25. The loop filter 24 extracts a low frequency component, that is, a direct current component from the beat. This low frequency component corresponds to an error voltage reflecting the phase difference between the reference signal and the oscillation signal. When the output level of the beat output from the sampling phase detector 22 decreases, the circulator 25 functions. The search oscillator 25 sweeps the control voltage in a positive direction from 0 [V], for example.

  A determination circuit 26 is connected to the loop filter circulator hybrid circuit 23. An operation state of the circulator 25 is input to the determination circuit 26. The determination circuit 26 determines the locked state and unlocked state of the phase based on the operating state of the circulator 25. The determination circuit 26 generates a control signal for the switch 18 based on the determination of the locked state and the unlocked state. The control signal is supplied to the switch 18. As described above, when it is determined that the state is “unlocked”, the switch 18 is disconnected.

  As shown in FIG. 3, the loop filter circulator hybrid circuit 23 includes an integration circuit 29. The integrating circuit 29 outputs the control voltage of the voltage controlled oscillator 21. A first operational amplifier 31 is incorporated in the integrating circuit 29. A capacitor 32 and a first resistance element 33 are inserted between the inverting input terminal and the output terminal of the first operational amplifier 31. A beat is input to the inverting input terminal of the first operational amplifier 31. The reference voltage Vcc is input to the non-inverting input terminal of the first operational amplifier 31.

  The loop filter circulator hybrid circuit 23 includes a Schmitt circuit 34. The output of the Schmitt circuit 34 is supplied to the integrating circuit 29 through the second resistance element 35. The Schmitt circuit 34 generates a rectangular wave. The integrating circuit 29 integrates the rectangular wave supplied from the Schmitt circuit 34 and outputs a triangular wave, that is, a sweep signal. A second operational amplifier 36 is incorporated in the Schmitt circuit 34. A third resistance element 37 is inserted between the non-inverting input terminal and the output terminal of the second operational amplifier 36. The reference voltage Vcc is input to the inverting input terminal of the second operational amplifier 36. The output of the first operational amplifier 31 is input to the non-inverting input terminal of the second operational amplifier 36 via the fourth resistance element 38. The output of the second operational amplifier 36 is supplied to the inverting input terminal of the first operational amplifier 26 through the second resistance element 35. At the same time, the output of the second operational amplifier 36 is supplied to the determination circuit 26. Here, the first operational amplifier 31, the second operational amplifier 36, the capacitor 32, the first resistance element 33, the second resistance element 35, the third resistance element 37, and the fourth resistance element 38 form the circulator 25.

  A buffer circuit 39 is connected to the inverting input terminal of the first operational amplifier 31. The beat output from the sampling phase detector 22 is supplied to the inverting input terminal of the first operational amplifier 31 through the buffer circuit 39. The output terminal of the third operational amplifier 41 is directly connected to its inverting input terminal. The beat output from the sampling phase detector 22 is input to the non-inverting input terminal of the third operational amplifier 41. The output of the third operational amplifier 41 is supplied to the inverting input terminal of the first operational amplifier 31 through the fifth resistance element 42. In this way, the beat and the output of the Schmitt circuit 34 are connected to the integrating circuit 29 in parallel. Here, the first operational amplifier 31, the third operational amplifier 41, the capacitor 32, the first resistance element 33, and the fifth resistance element 42 form a loop filter 24.

  Next, the operation of the transmitter 11 will be described. Assume that the locked state is maintained by the phase-locked oscillator 13. A control voltage is applied to the voltage controlled oscillator 21 in a voltage value range corresponding to the lock range (hereinafter referred to as “lock range range”). The loop filter 24, that is, the integrating circuit 29 outputs a control voltage so that an oscillation signal having a specified frequency is output from the phase-locked oscillator 13. As long as the control voltage is maintained within the lock range, the lock state is maintained. Radio signals are transmitted in a specified transmission frequency range. At this time, since the phase difference between the reference signal of the reference signal oscillator 19 and the oscillation signal of the voltage controlled oscillator 21 is reduced, the beat output level is increased in the sampling phase detector 22. As a result, the current value of the current flowing through the fifth resistance element 42 exceeds the current value of the current flowing through the second resistance element 35. The search oscillator 25 stops.

  When the circulator 25 is stopped, no square wave is output from the Schmitt circuit 34. The determination circuit 26 determines lock. The determination circuit 26 maintains the connection of the switch 18. As a result, wireless signal transmission is realized in a prescribed transmission frequency range.

  If the oscillation frequency of the voltage controlled oscillator 21 deviates from the lock range based on factors such as environmental temperature change and vibration, the voltage controlled oscillator 21 cannot cope with the fluctuation of the control voltage. The locked state is released. At this time, since the phase difference between the reference signal of the reference signal oscillator 19 and the oscillation signal of the voltage controlled oscillator 21 increases, the output level of the beat output from the sampling phase detector 22 decreases. As a result, the current value of the current flowing through the second resistance element 35 exceeds the current value of the current flowing through the fifth resistance element 42. The search oscillator 25 starts operation. The Schmitt circuit 34 outputs a rectangular wave. The integration circuit 29 outputs a triangular wave according to the output of the rectangular wave and forcibly sweeps the control voltage of the voltage controlled oscillator 21. The frequency increases gradually.

  At the same time, the determination circuit 26 determines unlocking according to the output of the rectangular wave. The determination circuit 26 disconnects the switch 18. As a result, transmission of the radio signal is stopped. Transmission of radio signals with frequencies outside the specified transmission frequency range is avoided.

  When the oscillation frequency of the voltage controlled oscillator 21 gradually increases and enters the pull-in range, the phase-locked oscillator 13 establishes a locked state. The sampling phase detector 22 outputs a beat. As a result, the current value of the current flowing through the fifth resistance element 42 exceeds the current value of the current flowing through the second resistance element 35. The search oscillator 25 stops. The loop filter 24, that is, the integrating circuit 29 outputs a control voltage so that an oscillation signal having a specified frequency is output from the phase-locked oscillator 13. As long as the control voltage is maintained within the lock range, the lock state is maintained.

  When the oscillation frequency enters the pull-in range and the lock state is established, the rectangular wave disappears from the output of the Schmitt circuit 34. The determination circuit 26 determines lock according to the disappearance of the rectangular wave. The determination circuit 26 connects the switch 18. As a result, transmission of the radio signal is resumed. Wireless signal transmission is realized in a specified transmission frequency range.

  As shown in FIG. 4, the voltage controlled oscillator 21 generally defines a variable range fL to fH of the oscillation frequency with respect to the specified oscillation frequency f0. The variable range fL to fH of the oscillation frequency is specified by the lower limit value VtL and the upper limit value VtH of the control voltage. Within the variable range fL to fH, for example, a proportional relationship is established between the magnitude of the control voltage and the oscillation frequency. The pull-in ranges f1 to f2 are set within the variable ranges fL to fH. The pull-in ranges f1 to f2 are specified by the first voltage value V1 and the second voltage value V2 of the control voltage. Similarly, lock ranges f3 to f4 are set in the variable ranges fL to fH. The lock range f3 to f4 is wider than the pull-in range f1 to f2. The lock ranges f3 to f4 are specified by the third voltage value V3 and the fourth voltage value V4 of the control voltage. When shifting from the locked state to the unlocked state, the control voltage deviates from the voltage range V3 to V4 of the lock range. At this time, as described above, the Schmitt circuit 34 outputs a rectangular wave, and the integrating circuit 29 outputs a sweep signal. The determination circuit 26 determines unlocking according to the output of the rectangular wave. Therefore, the transition from the locked state to the unlocked state can be accurately determined. On the contrary, when shifting from the unlocked state to the locked state, the control voltage enters the pull-in range voltage range V1 to V2 from the outside of the pull-in range voltage range V1 to V2. In response to entering the pull-in range, the rectangular wave disappears from the output of the circulator, that is, the Schmitt circuit 34, and the sweep of the control voltage stops. The determination circuit 26 determines lock according to the disappearance of the rectangular wave. Therefore, the transition from the unlocked state to the locked state can be accurately determined.

  FIG. 5 schematically shows a configuration of a transmitter 11a according to the second embodiment of the present invention. In the figure, components equivalent to those of the transmitter 11 according to the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. In this transmitter 11a, control signals are supplied from the phase-locked oscillator 13a according to the second embodiment to the IF amplifier 12, the RF amplifier 15, and the power amplifier 16, respectively. On / off of the IF amplifier 12, the RF amplifier 15, and the power amplifier 16 is controlled according to the supplied control signal. In such on / off control, the phase-locked oscillator 13a determines the unlocked state in a plurality of stages.

  More specifically, as shown in FIG. 6, the determination circuit 26 a of the phase-locked oscillator 13 a includes a pulse generation circuit 44. The pulse generation circuit 44 generates a pulse at the rising timing of the rectangular wave output from the Schmitt circuit 34 of the circulator 25. The pulse generation circuit 44 is connected to the counter circuit 45. The counter circuit 45 counts the number of pulses per unit time. The unit time may be set to a time cycle of 10 [msec], for example. The measurement time is measured by the timer 46. An arithmetic control circuit 47 is connected to the counter circuit 45. The number of pulses per unit time is supplied to the arithmetic control circuit 47. The arithmetic control circuit 47 classifies the unlocked state into a plurality of stages based on the number of pulses per unit time, and controls the control signal 1 and control signal 2 to the IF amplifier 12, the RF amplifier 15, the power amplifier 16 and the switch 18 based on the classification result. , Control signal 3 and control signal 4 are output.

  Specifically, for example, if no pulses are counted within the time cycle, the arithmetic control circuit 47 determines that the phase-locked oscillator 13a is in a locked state. At this time, the arithmetic control circuit 47 supplies the control signal 1 as an ON signal to the IF amplifier 12, the RF amplifier 15, the power amplifier 16 and the switch 18 in order to maintain the operations of the IF amplifier 12, the RF amplifier 15 and the power amplifier 16 as usual. , Control signal 2, control signal 3 and control signal 4 are output.

  When 1 to 3 pulses are counted within the time cycle, an instantaneous unlock state is assumed. The arithmetic control circuit 47 determines that the state is the low unlock state. The phase-locked oscillator 13a returns to the locked state instantly. At this time, the arithmetic control circuit 47 turns off the control signal 1 to stop the operation of the IF amplifier 12 while maintaining the operations of the RF amplifier 15 and the power amplifier 16 as usual. The power consumption of the IF amplifier 12 is reduced. At the same time, the arithmetic control circuit 47 turns off the control signal 4 to disconnect the switch 18.

  When 4 to 6 rectangular waves are counted in the time cycle, a temporary unlocked state is assumed. The phase-locked oscillator 13a is likely to return to the locked state in a short period of time. The arithmetic control circuit 47 determines that the state is a medium unlock state. At this time, the arithmetic control circuit 47 turns off the control signal 1 and the control signal 2 to stop the operations of the IF amplifier 12 and the RF amplifier 15 while maintaining the operation of the power amplifier 16 as usual. The power consumption of the IF amplifier 12 and the RF amplifier 15 is reduced. At the same time, the arithmetic control circuit 47 turns off the control signal 4 to disconnect the switch 18.

  If seven or more rectangular waves are counted in the time cycle, an unstable lock state is assumed. The possibility of returning to the locked state in a short time is low. The arithmetic and control circuit 47 determines that the altitude is unlocked. At this time, the arithmetic control circuit 47 turns off the control signal 1, the control signal 2, and the control signal 3 to stop the operations of the IF amplifier 12, the RF amplifier 15, and the power amplifier 16. The power consumption of the IF amplifier 12, the RF amplifier 15, and the power amplifier 16 is reduced. At the same time, the arithmetic control circuit 47 turns off the control signal 4 to disconnect the switch 18.

  Compared with the IF amplifier 12, the RF amplifier 15 takes time until the output reaches a thermal saturation state after the power is turned on and the output is stabilized. Similarly, it takes time for the power amplifier 16 to reach a thermal saturation state from the turning on of the power supply and stabilize its output as compared with the RF amplifier 15. Therefore, as described above, when the on / off of the IF amplifier 12, the RF amplifier 15 and the power amplifier 16 is controlled according to the degree of the unlocked state, the power consumption is surely reduced and after the return to the locked state. Prompt stabilization of circuit operation can be realized.

  In addition, the count value of the counter circuit 45 may be simply used for determining the locked state and the unlocked state. For example, if the rectangular wave is counted even once in the time cycle, the arithmetic control circuit 47 may determine unlocking. In this case, the determination of the unlocked state may be maintained until the rectangular wave is not detected in the next and subsequent time cycles. If 10 or more rectangular waves are counted in the time cycle, the arithmetic control circuit 47 may determine unlocking. In this case, the unlock determination may be maintained until the count of the rectangular waves falls below 10 in the next and subsequent time cycles. In any case, the unlocked state can be determined finely according to the number of rectangular waves in the time cycle.

  In the phase-locked oscillator 13a according to the second embodiment, as shown in FIG. 7, a window comparator 48 may be incorporated in the determination circuit 26b. In the figure, the same reference numerals are assigned to the same components as those of the phase-locked oscillator 13a according to the second embodiment, and the detailed description thereof is omitted. The control voltage of the voltage controlled oscillator 21 is input to the window comparator 48 from the integrating circuit 29 of the circulator 25. The window comparator 48 extracts the control voltage of the voltage controlled oscillator 21 in the voltage range including the voltage range V1 to V2 of the specific pull-in range f1 to f2. According to the function of the window comparator 48, even if there are a plurality of pull-in ranges in the control voltage variable range VtL to VtH, the phase-locked oscillator 13a can reliably establish a locked state at a specified oscillation frequency. . The occurrence of false lock can be reliably avoided in a pull-in range other than the specified oscillation frequency.

  Note that the frequency of the local oscillation signal is not limited to 13.05 GHz, and may be appropriately set, for example, in the microwave frequency band. That is, the above-described phase-locked oscillator 13 may be used for generating local oscillation signals in other frequency ranges.

  11 transmitter, 11a transmitter, 12 IF amplifier, 13 phase-locked oscillator (local oscillator), 13a phase-locked oscillator (local oscillator), 14 mixer, 15 RF amplifier, 16 power amplifier, 19 reference signal oscillator, 21 voltage controlled oscillator (VCO), 22 sampling phase detector (SPD), 26 determination circuit, 26a determination circuit, 26b determination circuit, 29 integration circuit, 34 Schmitt circuit, 45 counter circuit, 48 window comparator.

Claims (5)

A reference signal oscillator for outputting a reference signal;
A voltage controlled oscillator that outputs an oscillation signal at an oscillation frequency according to the magnitude of the control voltage; and
A sampling phase detector that outputs a voltage signal corresponding to the phase difference between the reference signal and the oscillation signal;
A Schmitt circuit for generating a rectangular wave according to the output of the sampling phase detector;
A phase-locked oscillator comprising: a determination circuit that determines lock / unlock according to the presence or absence of the rectangular wave. A transmitter comprising: the phase-locked oscillator according to claim 1; and a mixer that converts a frequency of an input signal based on an oscillation frequency signal output from the phase-locked oscillator. The transmitter according to claim 2, wherein
A power amplifier for amplifying the output of the mixer;
The determination circuit stops the operation of the power amplifier when determining the unlocking. The transmitter according to claim 2, wherein
An RF amplifier for amplifying the output of the mixer;
A power amplifier for amplifying the output of the RF amplifier;
A counter circuit that counts the wave number of the rectangular wave and supplies a count value to the determination circuit;
The determination circuit stops the operation of the RF amplifier when the count value exceeds a first value, and stops the operation of the power amplifier when the count value exceeds a second value larger than the first value. A transmitter characterized by. The transmitter according to claim 2, wherein
An IF amplifier that amplifies the input signal and supplies the amplified signal to the mixer;
An RF amplifier for amplifying the output of the mixer;
A power amplifier for amplifying the output of the RF amplifier;
A counter circuit that counts the wave number of the rectangular wave and supplies a count value to the determination circuit;
The determination circuit stops the operation of the IF amplifier when the count value exceeds a first value, and performs the operation of the RF amplifier when the count value exceeds a second value larger than the first value. The transmitter is stopped, and the operation of the power amplifier is stopped when the count value exceeds a third value larger than the second value.

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