JP2012090144A - Imaging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase a degree of freedom of a dynamic range to light intensity.SOLUTION: A pixel 21 at least includes: a photodiode 22 that generates an electric charge in accordance with an amount of received light; a floating diffusion 24 that accumulates the electric charge output from the photodiode 22; and a reset transistor 27 that resets the electric charge accumulated in the floating diffusion 24. Further, four pixels 21 are combined, and thereby obtaining a dummy pixel 20. In the dummy pixel 20, exposure is performed in a predetermined exposure order. When the electric charge is accumulated up to electric charge accumulation capacity of the floating diffusion 24 of the pre-exposed pixel 21 depending on the exposure order, a reset operation of the reset transistor 27 for the pixel 21 subsequently exposed is canceled. The present invention can be applied to, e.g., a CMOS image sensor.

Description

  The present invention relates to an image sensor, and more particularly, to an image sensor that can further expand the degree of freedom of a dynamic range with respect to light intensity.

  Conventionally, many methods have been proposed as methods for expanding the dynamic range of an image sensor. For example, there are a method of combining pixel signals having different exposure times, a method of reading out and combining pixel signals a plurality of times, a method of modulating storage capacity, and a method of adding pixel signals while sharing a floating diffusion. These methods for expanding the dynamic range can be summarized as methods for combining and adding signal amounts.

  For example, Patent Document 1 discloses a method for expanding a dynamic range by combining signal amounts using a plurality of pixels. In this method, when the high-sensitivity pixel is not saturated, an image signal is generated using the pixel signal obtained from the high-sensitivity pixel, while when the high-sensitivity pixel is saturated, the low-sensitivity pixel An image signal is generated by combining with a saturation level using a pixel signal obtained from the pixel. Thereby, an ideal characteristic of the output response with respect to the light intensity can be obtained within the absolute signal amount.

JP 2009-273119 A

  However, in the method disclosed in Patent Document 1, only the compression type dynamic range due to a combination of partial overflows is expanded, and it is necessary to limit use (scene) depending on light intensity. The degree of freedom was low. Therefore, there is a demand for an image sensor that can further expand the degree of freedom of the dynamic range with respect to the light intensity.

  The present invention has been made in view of such a situation, and makes it possible to further expand the degree of freedom of the dynamic range with respect to the light intensity.

  An imaging device according to an aspect of the present invention includes a photoelectric conversion unit that generates charges according to the amount of received light, a charge storage unit that stores charges output from the photoelectric conversion unit, and a storage in the charge storage unit. A pixel having at least a reset unit that resets the charged charge, and a pseudo pixel in which a predetermined number of the pixels are combined. In the pseudo pixel, the predetermined number of pixels are exposed in a predetermined exposure order. When charges are accumulated up to the charge accumulation capacity of the charge accumulation unit of the pixel to be exposed first in accordance with the exposure order, the reset operation by the reset unit of the pixel to be exposed next is released.

  In one aspect of the present invention, the pixel is stored in the photoelectric conversion unit that generates charges according to the amount of received light, the charge storage unit that stores charges output from the photoelectric conversion unit, and the charge storage unit. A pseudo-pixel is formed by combining a predetermined number of pixels. In the pseudo pixel, exposure is performed in a predetermined exposure order for a predetermined number of pixels, and when charge is accumulated up to the charge storage capacity of the charge storage portion of the pixel to be exposed first in accordance with the exposure order, next exposure is performed. The reset operation by the pixel reset unit is released.

  According to one aspect of the present invention, the degree of freedom of the dynamic range with respect to the light intensity can be further expanded.

It is a block diagram which shows the structural example of one Embodiment of the image pick-up element to which this invention is applied. It is a figure explaining the pixel arrange | positioned at a pixel array part. It is a figure which shows the 1st structural example of the pseudo pixel which consists of a pixel comprised by four transistors. It is a timing chart of reset and exposure operation. It is a timing chart of a read operation. It is a figure which shows the characteristic of the signal output according to incident high intensity | strength. It is a figure which shows the characteristic of the signal output according to the incident high intensity | strength in the structural example which changed the pixel pitch. 10 is a timing chart of reset and exposure operations in a configuration example in which the pixel pitch is changed. It is a figure which shows the 2nd structural example of the pseudo pixel which consists of a pixel comprised by three transistors. It is a figure which shows the 3rd structural example of the pseudo pixel which consists of a pixel comprised by five transistors. It is a figure which shows the 4th structural example of the pseudo pixel from which the connection structure between pixels differs. It is a figure which shows the other structural example of a pixel array part. It is a figure which shows the 5th structural example of the pseudo pixel which made 2x3 pixel a unit. It is a figure which shows the further another structural example of a pixel array part.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration example of an embodiment of an image sensor to which the present invention is applied.

  The image pickup device 11 is a CMOS (Complementary Metal Oxide Semiconductor) image sensor which is a kind of solid-state image pickup device, and includes a peripheral circuit unit in which a plurality of pixels are arranged in an array on a semiconductor substrate and integrated on the same chip. ing. That is, as shown in FIG. 1, the image sensor 11 includes a pixel array unit 12, a vertical drive unit 13 that is a peripheral circuit unit, a control unit 14, a column processing unit 15, a horizontal drive unit 16, and a signal processing unit 17. It is configured with.

  The pixel array unit 12 has a plurality of pixels arranged in two dimensions. The vertical driving unit 13 sequentially outputs a driving signal for driving (transferring, selecting, resetting, etc.) each pixel of the pixel array unit 12 for each row through the horizontal signal line.

  The control unit 14 supplies clock signals, timing signals, and the like necessary for each operation to the vertical driving unit 13, the column processing unit 15, and the horizontal driving unit 16 to control each unit. The column processing unit 15 extracts a signal level from a pixel signal output from each pixel of the pixel array unit 12 through a vertical signal line by a CDS (Correlated Double Sampling) operation, and extracts pixel data. Output.

  The horizontal driving unit 16 supplies a signal for outputting pixel data to the column processing unit 15 sequentially at a predetermined timing. The signal processing unit 17 amplifies the pixel data output from the column processing unit 15 and outputs the amplified pixel data to the subsequent image processing circuit.

  Next, the pixels disposed in the pixel array unit 12 will be described with reference to FIG.

  For example, the pixel array unit 12 is provided with a plurality of pixels 21 in an arrangement in which row × column is m × n, and FIG. 2 shows some of the plurality of pixels. . In the pixel array unit 12, the color filters of the three primary colors of red, green, and blue are arranged for each 2 × 2 pixel according to the so-called Bayer arrangement.

For example, a red color filter is disposed in the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₀ , and the pixel 21 ₁₁ , and these four pixels output a pixel signal as one pixel. In addition, a green color filter is disposed in the pixel 21 ₀₂ , the pixel 21 ₀₃ , the pixel 21 ₁₂ , and the pixel 21 ₁₃ , and these four pixels output a pixel signal as one pixel. Similarly, a green color filter is arranged in the pixel 21 ₂₀ , the pixel 21 ₂₁ , the pixel 21 ₃₀ , and the pixel 21 ₃₁ , and these four pixels output a pixel signal as one pixel. In addition, a blue color filter is disposed in the pixel 21 ₂₂ , the pixel 21 ₂₃ , the pixel 21 ₃₂ , and the pixel 21 ₃₃ , and these four pixels output a pixel signal as one pixel.

  As described above, the pixel array unit 12 has a structure (Quad structure) in which four pixels are combined to output a pixel signal as one pixel. Therefore, for example, when the number of pixels of the pixel array unit 12 is 16 million pixels, the pixel array unit 12 can be used with a resolution of 4 million pixels. Hereinafter, the combined pixel group when the plurality of pixels 21 are used as one pixel is referred to as a pseudo pixel.

In each pseudo pixel, each pixel 21 constituting the pseudo pixel is exposed in a predetermined order, and arrows connecting the four pixels 21 shown in FIG. Represents the exposure order. For example, in the pseudo pixel composed of the four pixels 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₀ , and the pixel 21 ₁₁ in the upper left, the exposure is performed in the order of the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 _10. The pixel structure is as described above.

Next, the pixel structure of the pseudo pixel 20 including the four pixels 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₀ , and the pixel 21 ₁₁ will be described with reference to FIG. FIG. 3 shows a first configuration example (physical circuit diagram of a 4Tr pixel structure) in which each pixel 21 includes four transistors.

As shown in FIG. 3, the pseudo pixels 20 are mechanically exposed in the order along the illustrated arrows, that is, in the pixel order of the pixels 21 ₀₀ , the pixels 21 ₀₁ , the pixels 21 ₁₁ , and the pixels 21 _10. Configured to start.

The pixel ₂₁₀₀ has a photodiode 22 ₀₀ , a transfer transistor 23 ₀₀ , a floating diffusion 24 ₀₀ , an amplification transistor 25 ₀₀ , a selection transistor 26 ₀₀ , and a reset transistor ₂₇₀₀ .

Photodiode 22 ₀₀ has its anode grounded and a cathode has a connection configuration which is connected to the source of the transfer transistor 23 _00. Photodiode 22 ₀₀ generates charges corresponding to the amount of light received.

The transfer transistor 23 ₀₀ are connected to the vertical driving unit 13 (FIG. 1) gate via a horizontal signal line, a source connected to the cathode of the photodiode 22 _00, the drain of the amplifying transistor 25 ₀₀ gate and the reset transistor 27 _The connection configuration is connected to the ₀₀ source. The connection point between the gate of the amplifying transistor _{25 00} and the drain of the transfer transistor _{23 00} constitute a floating diffusion _{24 00.} The transfer transistor _{23 00,} under the control of the vertical driving unit 13, and transfers the charges generated in the photodiode _{22 00} to the floating diffusion _{24 00.}

Amplifying transistor _{25 00} has a gate connected to the floating diffusion _{24 00,} the drain is connected to the power source VDD, has connection configuration and having a source connected to the drain of the select transistor _{26 00.} Amplifying transistor _{25 00} is transferred from the photodiode _{22 00} amplifies and outputs the charge accumulated in the floating diffusion _{24 00.}

The selection transistor ₂₆₀₀ has a gate connected to the vertical drive unit 13 (FIG. 1) via a horizontal signal line, a source connected to the column processing unit 15 (FIG. 1) via a vertical signal line, and a drain connected to the amplification transistor. and has a connection configured to be connected to the 25 ₀₀ source of. Select transistor 26 _00, under the control of the vertical driving unit 13, and outputs the amplified charges by the amplifying transistor 25 ₀₀ to the column processing section 15 as a pixel signal.

Reset transistor 27 ₀₀ has a gate connected to the vertical driving unit 13 via the horizontal signal line, a source connected to the floating diffusion 24 _00, the drain is in the connection configuration is connected to the power source VDD. Reset transistor 27 _00, under the control of the vertical driving unit 13, performs a reset operation for resetting the charge accumulated in the floating diffusion 24 _00. Further, the reset transistor 27 ₀₀ are connected to the gate and source of the reset transistor 27 ₀₀ is configured to perform blooming countermeasures to prevent the overflow charges to adjacent pixels.

The pixel _{21 01} includes photodiodes _{22 01,} floating diffusion _{24 01,} amplifying transistor _{25 01,} select transistors _{26 01,} the reset transistor _{27 01,} and the blooming countermeasures transistor _{28 01.}

In the pixel _{21 01,} unlike the pixel _{21 00,} the cathode of the photodiode _{22 01} is connected to the floating diffusion _{24 01.} Further, in the pixel _{21 00,} the reset transistor _{27 00,} had performed a reset operation and blooming countermeasures, in the pixel _{21 01,} blooming countermeasures transistor _{28 01} performing blooming countermeasures are provided. Then, in the pixel _{21 01,} the gate of the reset transistor _{27 01} are connected to the floating diffusion _{24 00} pixel _{21 00.}

Similarly to the pixel ₂₁₀₁ , the pixel 21 ₁₁ includes a photodiode 22 ₁₁ , a floating diffusion 24 ₁₁ , an amplification transistor 25 ₁₁ , a selection transistor 26 ₁₁ , a reset transistor 27 ₁₁ , and a blooming countermeasure transistor 28 _11. Yes. In the pixel _{21 11,} the gate of the reset transistor _{27 11} is connected to the floating diffusion _{24 01} pixel _{21 01.}

Similarly to the pixel ₂₁₀₁ , the pixel 21 ₁₀ includes a photodiode 22 ₁₀ , a floating diffusion 24 ₁₀ , an amplification transistor 25 ₁₀ , a selection transistor 26 ₁₀ , a reset transistor 27 ₁₀ , and a blooming countermeasure transistor 28 _10. Yes. In the pixel 21 ₁₀ , the gate of the reset transistor 27 ₁₀ is connected to the floating diffusion 24 ₁₁ of the pixel 21 ₁₁ .

Thus, the pixel _{21 00,} pixels _{21 01,} in the pixel _{21 10,} and the pixel _{21 11,} floating diffusion _{24 00} pixels _{21 00} is connected to the gate of the reset transistor _{27 01} pixel _{21 01.} The floating diffusion _{24 01} pixel _{21 01} are connected to the gate of the reset transistor _{27 11} pixels _{21 11,} floating diffusion _{24 11} pixels _{21 11} is connected to the gate of the reset transistor _{27 10} pixel _{21 10.}

Such a connection configuration, first, the floating diffusion 24 ₀₀ pixels 21 _00, the charge in the charge storage capacitor is storable capacity is accumulated, the charge overflows, the charge to the floating diffusion 24 ₀₁ pixels 21 ₀₁ Accumulation starts. Next, the charge of the charge storage capacitor to the floating diffusion _{24 01} pixel _{21 01} are accumulated, the charge overflows, the accumulation of charge in the floating diffusion _{24 11} pixels _{21 11} is started. Then, when the charge in the charge storage capacitor is accumulated in the floating diffusion 24 ₁₁ of the pixel 21 ₁₁ and the charge overflows, accumulation of the charge in the floating diffusion 24 ₁₀ of the pixel 21 ₁₀ is started.

  Next, the operation of the pseudo pixel 20 in FIG. 3 will be described with reference to FIGS. 4 and 5.

  FIG. 4 is a timing chart of reset and exposure operations, and FIG. 5 is a timing chart of read operations.

First, the vertical drive unit 13 sets the reset signal (RST) to the reset transistors 27 ₀₀ , 27 ₀₁ , 27 ₁₀ , and 27 ₁₁ to Hi, thereby the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₀ , and the pixel 21. ₁₁ reset operation is performed. As a result, the charges accumulated in the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₀ , and the pixel 21 ₁₁ are emptied. Further, the vertical drive unit 13, at this time, transfers signal to the transfer transistor _{23 00} (TG) to Hi.

Then, at the timing of starting the exposure of the pixel _{21 00} (t0), and a reset signal (RST00) for the reset transistor _{27 00,} by the Low and a transfer signal (TG) for the transfer transistor _{23 00,} floating diffusion _{24 00} Accumulation of charge in the battery is started. Note that after the reset operation of the pixel _{21 00} deals with the reset transistor _{27 00} a high impedance (Hi-z).

At this time, the pixel 21 ₀₁ which is the next exposure target pixel, and performing a reset operation to the floating diffusion 24 ₀₀ pixels 21 ₀₀ overflows, in a state of charge is not accumulated in the floating diffusion 24 _01. Then, at the timing when the floating diffusion _{24 00} reaches the capacity (charge storage capacitor) overflow (t1), the floating diffusion _{24 00} potential (FD00) is lowered to the potential for exposing the pixel _{21 01,} pixel 21 The reset operation of ₀₁ is released. That is, at this timing, the electric charges stored in the floating diffusion _{24 00} pixels _{21 00,} the reset signal (RST01) becomes Low for the reset transistor _{27 01} pixel _{21 01.}

Thus, exposure of the pixels _{21 01} is started, the transfer of charge to the floating diffusion _{24 01} starts. In this case, as the floating diffusion 24 ₀₀ pixels 21 ₀₀ does not continue to saturate in a state of overflow, the connection configuration in which the gate and the source of the reset transistor 27 ₀₀ are connected, blooming measures are applied.

Thereafter, the floating diffusion _{24 01} pixels _{21 01,} at the timing when reaching the capacity overflow (t2), enters the reset signal (RST11) is Low for the reset transistor _{27 11} pixels _{21 11,} the exposure of the pixels _{21 11} start Is done. The floating diffusion _{24 11} pixels _{21 11,} at the timing when reaching the capacity overflow (t3), the reset signal (RST10) becomes Low for the reset transistor _{27 10} pixels _{21 10,} the exposure of the pixels _{21 10} starts Is done. By combining such a chain, it becomes possible to mechanically select the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 ₁₀ to be exposed.

In this manner, exposure is started in the order of the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 ₁₀ , charges are accumulated, and readout is simultaneously performed at the timing of reading the charges.

That is, as shown in FIG. 5, a pixel _{21 00} of the select transistor _{26 00,} pixel _{21 01} of the select transistor _{26 01,} the select signal (SEL for selection transistors _{26 10} of the select transistors _{26 11,} and the pixel _{21 10} pixels _{21 11} ) Simultaneously switch from Low to Hi. Thus, the pixels _{21 00} floating diffusion _{24 00,} floating diffusion _{24 01} pixels _{21 01,} floating diffusion _{24 11} pixels _{21 11,} and charge accumulated in the floating diffusion _{24 10} pixels _{21 10,} as the pixel signal The data is read by the column processing unit 15 (FIG. 1).

Then, pixel signals read from the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 ₁₀ are combined by source follower addition.

As described above, the pseudo pixel 20 is configured, and the pixel to be exposed is mechanically selected in accordance with the amount of light received by the pseudo pixel 20, so that the signal processing can be simplified. That is, in the pseudo-pixel 20, the vertical drive unit 13, only outputs a transfer signal for controlling the exposure for the pixel _{21 00} (TG), sequentially in accordance with received light quantity, the pixel _{21 01,} pixels _{21 11,} and the pixel 21 ₁₀ automatically starts exposure. Thus, there is no need to output a reset signal and a transfer signal to the pixel 21 ₀₁ , pixel 21 ₁₁ , and pixel 21 ₁₀ , and signal processing for outputting these signals is not performed. It can be simplified.

  Further, in the pseudo pixel 20, since the reset operation is always performed on the pixel that is not selected as the exposure target, it is possible to prevent the leakage of electric charge to the adjacent pixel. Further, even if the pixel being exposed is saturated, the leakage of electric charges can be prevented (or reduced) by diode connection in which measures against blooming are taken as described above.

  Further, in the pseudo pixel 20, even if the miniaturization of the pixel 21 exceeds the limit of the resolution, a plurality of adjacent pixels 21 are made pseudo one pixel, so that an appropriate exposure range for a wide range of light intensity can be obtained. The degree of freedom of the dynamic range with respect to the light intensity can be expanded more than conventional.

  With reference to FIG. 6, the expansion of the dynamic range in the pseudo pixel 20 will be described.

  FIG. 6 shows signal output characteristics with respect to the intensity of incident light (incident light intensity). In FIG. 6, the broken line indicates the characteristic of one pixel 21, and the solid line indicates the characteristic of the pseudo pixel 20.

  As shown in FIG. 6, in the pseudo pixel 20, the range in which the output signal changes with respect to the incident light intensity is wider than the range in the signal output of one pixel 21, and a plurality of adjacent pixels 21 are simulated. Therefore, the dynamic range is expanded by using only one pixel.

  For example, in the conventional method for expanding the dynamic range, a memory for storing image data for a plurality of frames is provided, and pixel data of a plurality of frames is synthesized. On the other hand, in the image sensor 11, the dynamic range can be expanded by using a plurality of pixels as one pixel without using such a memory. Thus, the image sensor 11 can be downsized by the amount that does not require a memory.

Further, in the image sensor 11, the SN ratio (Signal-Noise ratio) can be improved by modulating the capacity of the floating diffusion 24 of each pixel 21 (by making the charge storage capacity different for each pixel). For example, as shown in FIGS. 4 and 5, the capacitance of the floating diffusion _{24 00} -1.0, the capacity of the floating diffusion _{24 01} -0.9, the capacity of the floating diffusion _{24 11} -0.7, and pixel _{21 10} it is preferable that the capacity of the floating diffusion 24 ₁₀ modulates the capacity such that -0.5.

  Furthermore, in the pseudo pixel 20, the dynamic range corresponding to the incident light intensity can be expanded by changing the pixel pitch of each pixel 21.

  FIG. 7 shows a modification of the pseudo pixel in which the pixel pitch is changed for each pixel.

Pseudo pixel 20 'of FIG. 7, the pixel 21' ₀₀ pixel size (the size of the light receiving surface) is the largest, the pixel 21 _'01, pixel 21' and _10, and the pixel 21 _'11 sequentially, pixel size is small It is comprised so that it may become. In FIG. 7, the characteristic of the pseudo pixel 20 ′ is indicated by a solid line, and the characteristic of the pseudo pixel 20 having a uniform pixel size is indicated by a broken line.

  In the pseudo pixel 20 ′ thus configured, the smaller the pixel size, the lower the sensitivity, and the smaller the slope of the signal output characteristic with respect to the incident light intensity. Therefore, the incident light intensity until the pseudo pixel 20 ′ is saturated as a whole becomes higher than that when the pixel size is uniform. That is, a signal output is output in response to a stronger incident light intensity. Further, in the pseudo pixel 20 ', it is possible to improve the sensitivity in the low luminance region.

  In general, a pixel with high sensitivity is likely to overflow, and the characteristics of the output signal with respect to sensitivity must be considered. On the other hand, in the pseudo pixel 20 ′, overflow can be avoided up to a certain light intensity. it can.

  FIG. 8 is a timing chart of reset and exposure operations in the pseudo pixel 20 '.

As shown in FIG. 8, in the pseudo pixel 20 ′, the time until the pixel _21′01 is saturated (between t1 and t2) is longer than the time until the pixel _21′00 is saturated (between t0 and t1). Become. Further, 'than the time (between t1-t2) until ₀₁ is saturated, the pixel 21' pixel 21 ₁₁ time until saturation (between t2-t3) is longer.

Next, FIG. 9 is a diagram illustrating a second configuration example of the pseudo pixel 20. FIG. 9 shows a circuit configuration of a pseudo pixel 20a including a pixel 21a ₀₀ , a pixel 21a ₀₁ , a pixel 21a ₁₁ , and a pixel 21a ₁₀ constituted by three transistors.

Pixel _{21a 00} includes a photodiode _{22a 00,} the transfer transistors _{23a 00,} floating diffusion _{24a 00,} the amplification transistor _{25a 00,} and in that a reset transistor _{27a 00,} the same structure as the pixel _{21 00} of FIG. 3 Yes. On the other hand, the pixel 21a ₀₀ is different from the pixel _{2100 in} FIG. 3 in that it does not have a selection transistor.

Further, the pixel 21a ₀₁ , the pixel 21a ₁₁ , and the pixel 21a ₁₀ are different from the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 ₁₀ in FIG. 3 in that they do not have a selection transistor. .

In pseudo pixel 20a, a floating diffusion _{24a 00} pixels _{21a 00} is connected to the gate of the reset transistor _{27a 01} pixels _{21a 01,} floating diffusion _{24a 01} pixels _{21a 01} is connected to the gate of the reset transistor _{27a 11} pixels _{21a 11} , has a connection configuration floating diffusion _{24a 10} pixels _{21a 11} is connected to the gate of the reset transistor _{27a 10} pixels _{21a 10.}

Therefore, in the pseudo pixel 20a, similarly to the pseudo pixel 20 in FIG. 3, the pixels 21a ₀₀ , the pixels 21a ₀₁ , the pixels 21a ₁₁ , and the pixels 21a ₁₀ are mechanically sequentially sequentially in the order of the arrows shown in the drawing. The exposure can be started.

Next, FIG. 10 is a diagram illustrating a third configuration example of the pseudo pixel 20. FIG. 10 shows a circuit configuration of a pseudo pixel 20b including a pixel 21b ₀₀ , a pixel 21b ₀₁ , a pixel 21b ₁₁ , and a pixel 21b ₁₀ including five transistors.

Pixel _{21b 00} includes a photodiode _{22b 00,} the transfer transistor _{23b 00,} floating diffusion _{24b 00,} amplifying transistor _{25b 00,} in that it has a selection transistor _{26b 00,} and the reset transistor _{b27 00,} the pixel _{21 00} of FIG. 3 It is constituted similarly. On the other hand, the pixel _{21b 00} is in that it has a blooming countermeasures transistor _{28b 00,} has a different configuration and a pixel _{21 00} of FIG.

That is, in the pixel _{21 00} of FIG. 3, the reset transistor _{27 00,} has been performed the reset operation and blooming countermeasures. In contrast, in the pixel _{21b 00,} the reset transistor _{b27 00} performs only resetting operation, blooming countermeasures is performed by the blooming countermeasures transistor _{28b 00.}

Further, the pixel 21b ₀₁ , the pixel 21b ₁₁ , and the pixel 21b ₁₀ include the transfer transistor 23b ₀₁ , the transfer transistor 23b ₁₁ , and the transfer transistor 23b _{10, so} that the pixel 21 ₀₁ , the pixel 21 ₁₁ , and the pixel 21 in FIG. ₁₀ and a different configuration.

That is, in the pixel _{21b 01,} unlike the pixel _{21 01} of FIG. 3, can be controlled by the transfer transistor _{23b 01} a transfer timing to the floating diffusion _{24 00} charge accumulated in the photodiode _{22b 00.} The same applies to the pixel 21b ₁₁ and the pixel 21b ₁₀ .

Next, FIG. 11 is a diagram illustrating a fourth configuration example of the pseudo pixel 20. 11 includes four pixels _21c is constituted by the transistors _00, pixel _{21c 01,} the circuit configuration of the pseudo pixel 20c comprising pixels _{21c 11} and pixel _{21c 10,} is shown.

In the pseudo pixel 20c, the configuration of the transistors of the pixel 21c ₀₀ , the pixel 21c ₀₁ , the pixel 21c ₁₁ , and the pixel 21c ₁₀ is the same as that of the pseudo pixel 20 in FIG. 3, but the connection configuration between the pixels is a pseudo pixel. 20 and different.

That is, in the pseudo-pixel 20c, a floating diffusion _{24c 00} pixels _{21c 00} are connected to the gate of the reset transistor _{27c 10} of the pixel _{21c 10.} Also, the floating diffusion _{24c 10} pixels _{21c 10} are connected to the gate of the reset transistor _{27c 11} of the pixel _{21c 11.} The floating diffusion _{24c 11} pixels _{21c 11} are connected to the gate of the reset transistor _{27c 01} of the pixel _{21c 01.}

Such a connection configuration, the pseudo-pixels 20c, in the order along the arrows shown, i.e., the pixel _{21c 00,} in the order of pixel _{21c 10,} the pixel _{21c 11,} and pixel _{21c 01,} sequentially, mechanically The exposure can be started.

  Thus, in the pseudo pixel 20c, the exposure order is set to be counterclockwise. Further, in the pseudo pixel 20 of FIG. 3, the exposure order is set to be clockwise, and the exposure order (pixel access order) is random. That is, the exposure order of the pseudo pixels 20 can be arbitrarily set.

  At this time, it is desirable to make the order in which the color centroids are aligned. By adopting an exposure order that aligns the color centroids, color misregistration can be mitigated when the imaging device 11 is employed in an imaging device using a focal plane shutter.

  In the above configuration example, the pseudo pixel 20 is configured with a square of 2 × 2 pixels, but the pseudo pixel 20 may be configured with a rectangle as a unit, for example. That is, a 2 × 3 pixel rectangle can be used as a unit of the pseudo pixel as in the pixel array unit 12 ′ illustrated in FIG. 12.

For example, a red color filter is arranged in the pixel 21 ₀₀ , the pixel 21 ₀₁ , the pixel 21 ₀₂ , the pixel 21 ₁₀ , the pixel 21 ₁₁ , and the pixel 21 ₁₂ , and these six pixels output pixel signals as one pixel. To do. In addition, a green color filter is arranged in the pixel 21 ₀₃ , the pixel 21 ₀₄ , the pixel 21 ₀₅ , the pixel 21 ₁₃ , the pixel 21 ₁₄ , and the pixel 21 ₁₅ , and these six pixels output pixel signals as one pixel. To do. Similarly, a green color filter is disposed in the pixel 21 ₂₀ , the pixel 21 ₂₁ , the pixel 21 ₂₂ , the pixel 21 ₃₀ , the pixel 21 ₃₁ , and the pixel 21 ₃₂ , and these six pixels have a pixel signal as one pixel. Output. In addition, a blue color filter is arranged in the pixel 21 ₂₃ , the pixel 21 ₂₄ , the pixel 21 ₂₅ , the pixel 21 ₃₃ , the pixel 21 ₃₄ , and the pixel 21 ₃₅ , and these six pixels output pixel signals as one pixel. To do.

Next, FIG. 13 is a diagram illustrating a fifth configuration example of the pseudo pixel 20. FIG 12, a 3 × 2 pixels as a unit, the pixel _{21d 00,} pixel _{21d 01,} pixel _{21d 02,} pixel _{21d 10,} the circuit configuration of the pseudo pixel 20d comprising pixels _{21d 11} and pixel _{21d 12,} is shown .

In the pseudo pixel 20d, each of the pixel 21d ₀₀ , the pixel 21d ₀₁ , the pixel 21d ₀₂ , the pixel 21d ₁₀ , the pixel 21d ₁₁ , and the pixel 21d ₁₂ is configured by four transistors, like the pseudo pixel 20 in FIG. (4Tr type pixel structure).

In pseudo pixel 20d, a floating diffusion _{24d 00} pixels _{21d 00} is connected to the gate of the reset transistor _{27d 10} pixels _{21d 10.} Also, the floating diffusion _{24d 10} pixels _{21d 10} is connected to the gate of the reset transistor _{27d 02} pixels _{21d 02} floating diffusion _{24d 02} pixels _{21d 02} is connected to the gate of the reset transistor _{27d 12} pixels _{21d 12} . The floating diffusion _{24d 12} pixels _{21d 12} is connected to the gate of the reset transistor _{27d 11} pixels _{21d 11,} floating diffusion _{24d 11} pixels _{21d 11} is connected to the gate of the reset transistor _{27d 01} pixels _{21d 01.}

  Thus, in the pseudo pixel 20d, the exposure is sequentially started along the arrows illustrated in FIG. In other words, according to the exposure order, if the floating diffusion of the pixel to be exposed first is connected to the gate of the reset transistor of the pixel to be exposed next, the number of pixels constituting the pseudo pixel, The shape of the pixel (square, rectangular, or other shapes), the exposure order in the pseudo pixel, and the like can be arbitrarily designed.

  Further, in the image sensor 11, pseudo pixels may be configured with a larger number of pixels as a unit.

  For example, FIG. 14 illustrates a configuration example of the pixel array unit 12 ″ in which pseudo pixels are configured in units of 4 × 4 pixels.

For example, a red color filter to a pseudo pixel in units of 16 pixels from the pixel 21 ₀₀ to pixel 21 ₃₃ are arranged, these 16 pixel outputs a pixel signal as one pixel. Further, the exposure order of the pseudo pixels is as follows: pixel 21 ₀₀ , pixel 21 ₀₁ , pixel 21 ₀₂ , pixel 21 ₀₃ , pixel 21 ₁₃ , pixel 21 ₂₃ , pixel 21 ₃₃ along the arrows shown in FIG. , Pixel 21 ₃₂ , pixel 21 ₃₁ , pixel 21 ₃₀ , pixel 21 ₂₀ , pixel 21 ₁₀ , pixel 21 ₁₁ , pixel 21 ₁₂ , pixel 21 ₂₂ , and pixel 21 ₂₁ have a clockwise spiral shape.

Also, the green color filter to a pseudo pixel in units of 16 pixels from the pixel 21 ₀₄ to the pixel 21 ₃₇ are arranged, these 16 pixel outputs a pixel signal as one pixel. Similarly, the green color filter in the pseudo-pixels in units of 16 pixels from the pixel 21 ₄₀ to the pixel 21 ₇₃ are arranged, these 16 pixel outputs a pixel signal as one pixel. The blue color filter to a pseudo pixel in units of 16 pixels from the pixel 21 ₄₄ to the pixel 21 ₇₇ are arranged, these 16 pixel outputs a pixel signal as one pixel. In these pseudo-pixels as well, the pixels are exposed in the clockwise spiral exposure order along the arrows shown in FIG.

  Even in the pixel array unit 12 ″ configured in this way, according to the exposure order, the floating diffusion of the pixel to be exposed first is reliably ensured by the connection configuration connected to the gate of the reset transistor of the pixel to be exposed next. Exposure is performed sequentially. Thereby, the dynamic range can be expanded.

  The embodiment of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

  DESCRIPTION OF SYMBOLS 11 Image sensor, 12 Pixel array part, 13 Vertical drive part, 14 Control part, 15 Column processing part, 16 Horizontal drive part, 17 Signal processing part, 20 Pseudo pixels, 21 pixels, 22 Photodiode, 23 Transfer transistor 23, 24 Floating diffusion, 25 amplification transistor, 26 selection transistor, 27 reset transistor, 28 transistor for blooming

Claims (4)

A photoelectric conversion unit that generates charges according to the amount of received light, a charge storage unit that stores charges output from the photoelectric conversion unit, and a reset unit that resets the charges stored in the charge storage unit; A pixel having at least
A pseudo pixel in which a predetermined number of the pixels are combined, and
In the pseudo pixel, the predetermined number of pixels are exposed in a predetermined exposure order, and according to the exposure order, when charge is accumulated up to the charge storage capacity of the charge storage portion of the pixel to be exposed first, An image sensor in which a reset operation by the reset unit of the pixel to be exposed is canceled. The imaging device according to claim 1, wherein in the pseudo pixel, the exposure order of a predetermined number of the pixels is set so that color centroids are aligned. The imaging device according to claim 1, wherein a charge storage capacity of each of the charge storage units is different for each of a predetermined number of the pixels constituting the pseudo pixel. The imaging device according to claim 1, wherein a size of a light receiving surface of each of the photoelectric conversion units is different for each of a predetermined number of the pixels constituting the pseudo pixel.

Images