JP2012083681A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide technology of preventing occurrence of a vertical stripe in a liquid crystal display device in which two gate lines are arranged for each pixel row and one drain line is arranged for two pixel columns.SOLUTION: In the liquid crystal display device, the pixel rows are composed in a first direction and the pixel columns are composed in a second direction, the pixel rows are arranged so as to be shifted, the first and second gate lines are arranged for one pixel row, and one drain line is arranged for two pixel columns. Each pixel row includes a first pixel having a first thin film transistor connected to the first gate line, and a second pixel having a second thin film transistor connected to the second gate line. Each drain line includes a second-direction drain line extended in the second direction and a first-direction drain line extended in the first direction and connected to the second thin film transistor after intersecting the second gage line. The second-direction drain line is extended in the first or second direction and has an additional extension part intersecting the first gate line.

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device that supplies a video signal to two pixel columns through one drain line.

  A liquid crystal display device that supplies a video signal from one drain line to two pixel columns is disclosed in, for example, Patent Document 1.

  In such a liquid crystal display device, for example, odd-numbered pixels are formed on one side of a plurality of pixels arranged in the same pixel row among the pixels arranged in a matrix. The selection is made by the first gate line, and the even-numbered pixel is selected by the second gate line formed on the other side of the pixel. In the liquid crystal display device thus formed, a drain line is disposed between adjacent odd-numbered pixels and even-numbered pixels, and a drain line is disposed between adjacent even-numbered pixels and odd-numbered pixels. Are not arranged.

  In addition, when pixels are formed so as to be shifted in the gate line extending direction (or the drain line extending direction) by a half pitch every other row (one column), this occurs when video signals are supplied in a time division manner. There is a liquid crystal display device in which the occurrence of so-called vertical stripes, which are display defects, is reduced. An example of a liquid crystal display device in which pixels are arranged with a half-pitch shift every other row (one column) in the gate line extending direction is the liquid crystal display device described in Patent Document 2.

JP 2000-35589 A JP-A-6-289423

  A liquid crystal display device in which the technique described in Patent Document 2 is applied to the technique described in Patent Document 1, for example, as shown in FIG. 6, is a drain extending in the Y direction between two adjacent pixels PXL1, PXL2. A line DL is formed, a gate line GL1 extending in the X direction is formed on the upper side of each pixel PXL1, PXL2, and a gate line GL2 is formed on the lower side in the figure. In the liquid crystal display device having this configuration, the thin film transistors TFT corresponding to the respective pixels PXL1 and PXL2 are formed in the vicinity where the gate lines GL1 and GL2 and the drain line DL intersect. Therefore, the thin film transistors TFT connected to the same drain line DL and corresponding to the pixels PXL1 and PXL2 formed in the same pixel row have a configuration symmetrical with respect to the drain line DL. The thin film transistor TFT having such an arrangement is a thin film transistor due to capacitance variation between the gate and the drain or between the gate and the source due to an interlayer shift caused by alignment accuracy when forming the semiconductor layer and the drain electrode (including the source electrode). It is known that a difference occurs in the driving ability of the TFT, a luminance difference occurs between the pixel PXL1 side and the pixel PXL2 side, and so-called vertical stripes occur.

  In order to reduce the difference in driving capability of the thin film transistor TFT and suppress the occurrence of vertical stripes, as shown in FIG. is there. In the liquid crystal display device shown in FIG. 7, a pair of pixels PX1 and PXL2 formed in the pixel row PL1 and connected to the same drain line DL, and a pair of pixels PXL1 and PXL2 formed in the pixel row PL2 are used. The pixel groups to be arranged are sequentially arranged in the X direction and the Y direction, and the pixels are arranged in a matrix. At this time, the pixels PXL1 and PXL2 of the pixel row PL1 and the pixels PXL1 and PXL2 of the pixel row PL2 are arranged so as to be shifted by a half pitch of the pixels.

  In the liquid crystal display device having the configuration shown in FIG. 7, the change in the driving capability of the thin film transistor TFT due to the misalignment between the semiconductor layer and the drain electrode can be prevented. However, as indicated by a circle C in FIG. The number of intersections between GL1 and GL2 and the drain line DL will be different. For this reason, the gate-drain capacitances of the thin film transistors TFT corresponding to the pixel electrodes PXL1 and PXL2 adjacent to the same pixel rows PL1 and PL2 are different. As a result, the driving capability of the thin film transistors TFT is different. There is a concern that streaks occur and the image quality deteriorates.

  The present invention has been made in view of these problems, and an object of the present invention is to provide two gate lines for one pixel row and one drain line for two pixel columns. It is an object of the present invention to provide a technique capable of preventing the occurrence of vertical streaks and improving the image quality in a liquid crystal display device in which is disposed.

  In order to solve the above problem, the first substrate and the second substrate sandwich a liquid crystal, and a pixel having at least a pixel electrode to which a video signal is supplied is provided on the liquid crystal side surface of the first substrate, A plurality of pixels are arranged along the first direction to constitute a pixel row, a pixel column is constituted along a second direction intersecting the first direction, and a lower pixel row with respect to an upper pixel row Are shifted in the first direction, and are arranged so as to be alternately different for each stage. The first gate line and the second gate line are arranged for one pixel row, and two pixel columns are arranged. A liquid crystal display device in which one drain line is arranged and the drain line intersects the first gate line and the second gate line, and the pixel row is connected to the first gate line. Connected to the first pixel having the first thin film transistor and the second gate line. A second pixel having a second thin film transistor formed in the same direction as the first thin film transistor, wherein the drain line extends in the second direction, and the first gate line and the second thin film transistor A second direction drain line that intersects with each gate line; and a second direction drain line that extends from the second direction drain line in the first direction and that intersects the second gate line and is connected to the drain electrode of the second thin film transistor. The second direction drain line extends in the first direction or the second direction, and extends in the first direction or the second direction. The second direction drain line extends in the first direction or the second direction. 1 is a liquid crystal display device having an additional extension that intersects one gate line.

  According to the present invention, it is possible to prevent the occurrence of vertical stripes in a liquid crystal display device in which two gate lines are arranged for one pixel row and one drain line is arranged for two pixel columns, The image quality can be improved.

  Other effects of the present invention will become apparent from the description of the entire specification.

It is a figure for demonstrating schematic structure of the liquid crystal display device of Embodiment 1 of this invention. It is a top view for demonstrating the pixel structure in the liquid crystal display device of Embodiment 1 of this invention. It is a top view for demonstrating the pixel structure in the liquid crystal display device of Embodiment 2 of this invention. It is a top view for demonstrating the pixel structure in the liquid crystal display device of Embodiment 3 of this invention. It is a top view for demonstrating the pixel structure in the liquid crystal display device of Embodiment 4 of this invention. It is a figure for demonstrating the pixel structure in the conventional liquid crystal display device. It is a figure for demonstrating the pixel structure in the conventional liquid crystal display device.

  Embodiments to which the present invention is applied will be described below with reference to the drawings. However, in the following description, the same components are denoted by the same reference numerals, and repeated description is omitted.

<Embodiment 1>
<overall structure>
FIG. 1 is a diagram for explaining a schematic configuration of a liquid crystal display device according to a first embodiment of the present invention. Hereinafter, an overall configuration of the liquid crystal display device according to the first embodiment will be described with reference to FIG. However, X and Y shown in FIG. 1 indicate the X axis and the Y axis, respectively.

  As shown in FIG. 1, the liquid crystal display device of Embodiment 1 includes a first substrate SUB1 on which a pixel electrode PX and a thin film transistor TFT are formed, and a common electrode, a color filter, and the like that are disposed to face the first substrate SUB1. A liquid crystal display panel PNL composed of a second substrate SUB2 and a liquid crystal layer (not shown) sandwiched between the first substrate SUB1 and the second substrate SUB2, and serves as a light source of the liquid crystal display panel PNL (not shown) A liquid crystal display device is configured by combining with a backlight unit (backlight device). The first substrate SUB1 and the second substrate SUB2 are fixed and the liquid crystal is sealed with a sealing material SL applied to the periphery of the second substrate in an annular shape, and the liquid crystal is also sealed. However, in the liquid crystal display device according to the first embodiment, a region in which display pixels (hereinafter abbreviated as pixels) are formed in a region in which liquid crystal is sealed becomes a display region AR. Therefore, even in the region where the liquid crystal is sealed, a region where pixels are not formed and which is not involved in display is not the display region AR.

  Further, the second substrate SUB2 has a smaller area than the first substrate SUB1, and the lower side of the first substrate SUB1 in the drawing is exposed. A drive circuit DR composed of a semiconductor chip is mounted on the side of the first substrate SUB1. The drive circuit DR drives each pixel arranged in the display area AR. In the following description, the liquid crystal display panel PNL may also be described as a liquid crystal display device.

  As the first substrate SUB1 and the second substrate SUB2, for example, a well-known glass substrate is generally used as a base material, but is not limited to a glass substrate, and is not limited to quartz glass or plastic (resin). Any other insulating substrate may be used.

  In the liquid crystal display device according to the first embodiment, the surface of the first substrate SUB1 on the liquid crystal side and in the display area AR extends in the X direction in FIG. 1 and is juxtaposed in the Y direction, and a scanning signal from the drive circuit DR. Is formed as a scanning signal line (gate line) GL. Further, a video signal line (drain line) DL is formed which extends in the Y direction in FIG. 1 and is juxtaposed in the X direction and is supplied with a video signal (grayscale signal) from the drive circuit. At this time, in the liquid crystal display device of Embodiment 1, as will be described in detail later, one drain line DL is arranged in parallel in the Y direction for every two pixels adjacent in the X direction, that is, in two pixel columns. On the other hand, one drain line DL is arranged in parallel in the Y direction. Accordingly, two drains arranged in the same pixel row are connected to one drain line DL. At this time, a video signal corresponding to two adjacent pixels is sequentially output to each drain line DL. In the liquid crystal display device according to the first embodiment, as will be described in detail later, two gate lines GL are formed for one pixel row, and a pixel (between the two gate lines GL forming a pair is formed. Pixel line) is formed, and a different gate line GL is connected to each pixel to which each drain line DL is connected.

  For example, as shown in an equivalent circuit diagram A ′ of a circle A in FIG. 1, each pixel includes a thin film transistor TFT that is turned on / off by a scanning signal from the gate line GL, and a drain line through the turned on thin film transistor TFT. A pixel electrode PX to which a video signal from DL is supplied and a common electrode CT to which a common signal having a reference potential with respect to the potential of the video signal is supplied via a common line CL. However, the thin film transistor TFT is a thin film transistor having a so-called reverse stagger structure, and is driven so that the drain electrode and the source electrode are switched by application of a bias. However, in this specification, for convenience, the side connected to the drain line DL Is the drain electrode DT, and the side connected to the pixel electrode PX is the source electrode ST.

  Between the first substrate SUB1 on which the pixel electrode PX is formed and the second substrate SUB2 on which the common electrode CT is formed, an electric field perpendicular to the main surfaces of the first substrate SUB1 and the second substrate SUB2 disposed to face each other is present. When applied, this electric field drives the molecules of the liquid crystal. Such a liquid crystal display device is a VA mode or TN mode liquid crystal display device that is known as a so-called wide viewing angle display.

  Each drain line DL and each gate line GL extend beyond the sealing material SL at their ends, and based on an input signal input from an external system through the flexible printed circuit board FPC, a video signal, a scanning signal, etc. Is connected to a drive circuit DR that generates a drive signal. However, in the liquid crystal display device of the first embodiment, the drive circuit DR is formed of a semiconductor chip and mounted on the first substrate SUB1, but the video signal drive circuit that outputs the video signal and the scan signal drive that outputs the scan signal are used. One or both of the drive circuits may be mounted on the flexible printed circuit board FPC by a tape carrier method or a COF (Chip On Film) method and connected to the first substrate SUB1.

<Pixel configuration>
FIG. 2 is a plan view for explaining a pixel configuration in the liquid crystal display device according to the first embodiment of the present invention. In particular, FIG. 2 is a plan view of the first substrate SUB1. However, in the pixel arrangement shown in FIG. 2, the upper row is an odd row of pixel rows, the lower row is an even row of pixel rows, the left column of each row is an odd row of pixel rows, and the right row is a pixel row. The case of even-numbered columns will be described. In the following description, since each thin film layer can be formed by a well-known photolithography technique, details of the forming method and the like are omitted. Furthermore, in the liquid crystal display device of Embodiment 1, the second substrate SUB2 includes a black matrix, R (red), G (green), B (blue) color filters, and a common electrode CT corresponding to the edge of each pixel. Thus, the black matrix is configured to prevent light leakage from between adjacent pixels.

  As shown in FIG. 2, the liquid crystal display device of Embodiment 1 has a drain line DL extending in the Y direction (second direction) and arranged in parallel in the X direction (first direction). One drain line DL is connected to pixels PXL1 and PXL2 of two adjacent pixel columns among the pixels arranged in the same pixel row (scanning line) PL1 and PL2. Further, it has two gate lines (first gate lines) GL1 and gate lines (second gate lines) GL2 that extend in the Y direction and are arranged in parallel in the X direction, and are arranged in parallel in the X direction. A pixel (first pixel) PXL1 and a pixel (second pixel) PX2 in the same pixel row are arranged between the two gate lines GL1 and GL2.

  In all the pixels PXL1 and PXL2, the direction of the thin film transistor TFT is the same. In particular, in the first embodiment, the thin film transistors TFT1 and TFT2 are formed on the left side in the drawing in the pixel region of each pixel PXL1 and PXL2, and the drain electrode DT is formed on the left side in the drawing of each thin film transistor TFT1 and TFT2. A source electrode ST is formed on the substrate. The pad portion PAD electrically connected to the source electrode ST is disposed on the right side of the thin film transistors TFT1 and TFT2. That is, as will be described in detail later, the thin film transistors TFT1 and TFT2 of the first embodiment are connected to a drain electrode DT having an extending portion JC extending from the left side in the drawing and forming a concave surface on the right side in the drawing, ST is disposed to face the concave surface of the drain electrode DT.

  In order to achieve such a configuration, in the liquid crystal display device of Embodiment 1, in the pixel PXL1 of the pixel row PL1, the thin film transistor TFT1 is disposed in the upper left region of the pixel region in which the gate line GL1 is disposed. In the pixel PXL2, the thin film transistor TFT2 is disposed in the lower left region of the pixel region in which the gate line GL2 is disposed. Similarly, in the pixel PXL1 of the pixel row PL2, the thin film transistor TFT1 is disposed in the lower left region of the pixel region in which the gate line GL1 is disposed, and in the pixel PXL2, the pixel region in which the gate line GL2 is disposed. The thin film transistor TFT2 is arranged in the upper left region in the figure.

  At this time, for example, in the pixel PXL1 of the pixel row PL1, as shown in an enlarged view B ′ of a circle B, the pixel PXL1 protrudes downward from the gate line GL1 in the drawing and functions as the gate electrode GT of the thin film transistor TFT1. ing. An insulating film (gate insulating film) (not shown) that covers the gate line GL is formed on the surface of the gate electrode GT, and an island shape made of, for example, amorphous silicon is formed on a portion overlapping the gate electrode GT on the insulating film. A semicircular semiconductor layer AS is formed. The semiconductor layer AS becomes a semiconductor layer of the thin film transistor TFT1.

  The drain electrode DT has a curved shape along the semicircular semiconductor layer AS, and is formed simultaneously with the formation of the drain line DL, and is formed by an extension portion JC formed by extending part of the drain line DL. The drain line DL and the drain electrode DT are electrically connected. Further, the source electrode ST is formed simultaneously with the formation of the drain electrode DT, and a pad portion PD extending from the source electrode ST is also formed. In the first embodiment, the drain electrode DT has a curved pattern along the semicircular semiconductor layer AS, and the source electrode ST is disposed to face the concave surface of the drain electrode DT. Thus, the channel width of the thin film transistor TFT1 can be increased.

  A protective film (not shown) that covers the thin film transistor TFT1 and the drain line DL and the like is formed on the upper surface of the pad portion PD, and a flat pixel electrode PX is formed on the upper surface of the protective film PAS. A part of the pad overlaps with the pad part PAD. The pixel electrode PX is connected to the pad portion PD through a contact hole (not shown) formed in the protective film in the upper layer portion of the pad portion PAD, and the pixel electrode PX is electrically connected to the source electrode ST of the thin film transistor TFT. The pixel electrode PX is made of a translucent conductive film made of, for example, ITO (Indium Tin Oxide), but a ZnO (zinc oxide) based transparent conductive film may be used.

  In the liquid crystal display device according to the first embodiment, two pixels PXL1 and PXL2 are adjacently arranged in the X direction adjacent to the odd-numbered pixel row PL1, and the even-numbered pixel row PL2 is connected to the pixel row PL2 via the drain line DL. The two pixels PXL1 and PXL2 are juxtaposed in the X direction. A pixel group consisting of a total of four pixels PXL1 and PXL consisting of a pair of pixels PXL1 and PXL2 arranged in each of the two pixel rows PL1 and PL2 is arranged in a matrix in the display area AR, and image display is performed. It has a configuration. At this time, with respect to the pixels PXL1 and PXL2 in the upper pixel row PL1, the pixels PXL1 and PXL2 in the lower pixel row PL2 are arranged along the X direction by a half pitch (half the pixel width in the X direction). The pixels PXL1 and PXL2 are arranged in such a manner that the shift directions are alternately changed (for example, left and right in the drawing) every time the stage is lowered. However, the shift amount of each pixel PXL1, PXL2 is not limited to a half pitch.

  In such a pixel arrangement, the two gate lines GL1 and GL2 arranged in each pixel column are arranged at the ends in the Y direction of the respective pixels PXL1 and PXL2, and therefore the pixel row PL1 and the pixel row Two gate lines GL are arranged between PL2. At this time, in the first embodiment, in the odd-numbered row (pixel row PL1) and the even-numbered row (pixel row PL2), the configuration of the pixels PXL1 and PLX2 is such that the arrangement of the other constituent members excluding the drain line DL is in the Y direction ( The positional relationship is reversed in the vertical direction. Therefore, between the pixels adjacent in the Y direction, the two gate lines GL1 or the two gate lines GL2 are close to each other and extend in the X direction, and are arranged in parallel in the Y direction. Further, each of two pixels arranged in the same pixel column and connected to the same drain line DL is connected to two different gate lines GL1 and GL2, and the drain line DL and the gate line GL1. , GL2 are formed in the vicinity where the thin film transistors TFT1 and TFT2 corresponding to the respective pixels PXL1 and PXL2 are formed. For example, in the pixel row PL1, the thin film transistor TFT1 of the pixel PXL1 connected to the same drain line DL is connected to the gate line GL1 arranged on the upper end side in the drawing, and the thin film transistor TFT2 of the pixel PXL2 is arranged on the lower end side in the drawing. Connected to the gate line GL2. Similarly, in the pixel row PL2, the thin film transistor TFT2 of the pixel PXL2 connected to the drain line DL is connected to the gate line GL2, and the thin film transistor TFT2 of the pixel PXL1 is connected to the gate line GL1.

  Further, the drain line DL extending in the Y direction includes a Y direction wiring portion (second direction drain line) extending in the longitudinal direction of the pixels PXL1 and PXL2, that is, the Y direction, and two adjacent gate lines GL1 and GL2. From the X direction wiring portion (first direction drain line) extending in the short direction of the pixels PXL1 and PXL2, that is, extending in the X direction and having an end connected to the drain electrode DT of the thin film transistors TFT1 and TFT2. Become.

  At this time, in the pixel row PL1, the Y-direction wiring portion of the drain line DL extends in the Y direction along the left side edge portion of the pixel PXL1 in the drawing, and in this case, as indicated by a circle C, It intersects with the gate lines GL1 and GL2 once each. The Y-direction wiring portion has an extending portion JC that is formed so as to partially extend in the Y direction, and an end thereof is connected to the drain electrode DT of the thin film transistor TFT1 of the pixel PXL1. On the other hand, the X-direction wiring portion extends in the X direction between the two gate lines GL2 from the lower end of the Y-direction wiring portion along the lower side of the pixel PXL1 in the figure, and is indicated by a circle C. Then, after intersecting with one gate line GL2 (gate line GL2 corresponding to the pixel row PL1), the end thereof is connected to the drain electrode DT of the thin film transistor TFT2 of the pixel PXL2.

  In the pixel row PL2, the Y-direction wiring portion of the drain line DL extends in the Y direction between the pixel PXL1 and the pixel PXL2, and intersects the gate lines GL1 and GL2 once each. The X-direction wiring portion extends from the lower end of the Y-direction wiring portion to the lower side of the pixel PXL1 in the figure and extends between two gate lines GL1 including a gate line GL1 of the next stage (not shown) and the gate line GL1. After extending in the X direction and intersecting one gate line GL1 (gate line GL1 corresponding to the pixel row PL2), the end thereof is connected to the drain electrode DT of the thin film transistor TFT1 of the pixel PXL1.

  Furthermore, in the liquid crystal display device according to the first embodiment, in the pixel row PL1, the X-direction wiring portion of the drain line DL formed at the upper end portion of the pixel PXL1 is connected to the thin film transistor TFT1 of the pixel PXL1. It has a configuration having an additional extension AD1 that intersects with the line GL1 (the gate line GL1 corresponding to the pixel row PL1). That is, the X-direction wiring portion of the drain line DL according to the first embodiment extends along the upper side of the pixel PXL1 in the drawing and extends between two gate lines GL1 (not shown) in the X direction. The other end portion in the short side direction of the pixel PXL1 shown in D is bent in the formation direction of the pixels PXL1 and PXL2, and has an additional extension portion AD1 intersecting with the gate line GL1. At this time, the additional extension part AD1 is formed using the same thin film material as the drain line DL, and the wiring width is also the same wiring width as the drain line DL.

  In particular, in the liquid crystal display device of the first embodiment, the additional extension part AD1 is formed in the same process as the process of forming the drain line DL. Accordingly, it is possible to form the same crossing capacitance as other crossing portions without adding a manufacturing process accompanying the formation of the additional extension portion AD1.

  As a result, the number of intersections between the gate line GL1 connected to the gate electrode GT of the thin film transistor TFT1 of the pixel PXL1 and the drain line DL arranged in the pixel row PL1 and connected to the same drain line DL, and the thin film transistor of the pixel PXL2 It is possible to make the number of intersections between the gate line GL2 connected to the gate electrode GT of the TFT2 and the drain line DL the same.

  Similarly, in the pixel row PL2, the X-direction wiring part of the drain line DL formed at the upper end of the pixels PXL1 and PXL2 is added to intersect with one gate line GL2 connected to the thin film transistor TFT2 of the pixel PXL2. It has the structure which has extension part AD2. That is, after extending in the X direction between the two gate lines GL1 along the upper side of the pixel PXL1, the other end of the pixel PXL1 in the lateral direction is formed in the direction in which the pixel PXL1 is formed. The structure has an additional extension part AD2 that is bent and intersects the gate line GL2.

  Accordingly, also in the pixel row PL2, the number of intersections between the gate line GL1 connected to the gate electrode GT of the thin film transistor TFT1 and the drain line DL, which are connected to the drain line DL, and the gate connected to the gate electrode GT of the thin film transistor TFT2. It is possible to make the number of intersections between the line GL2 and the drain line DL the same.

  As described above, in the liquid crystal display device according to the first embodiment, the gate lines GL1 and GL2 are arranged for one pixel row, and one drain line DL is arranged for two pixel columns. A configuration in which a first pixel PXL1 having a thin film transistor TFT1 connected to the gate line GL1 and a second pixel PXL2 having a thin film transistor TFT2 connected to the gate line GL2 and formed in the same direction as the thin film transistor TFT1 are arranged in a row. It has become. At this time, the drain line DL extends in the Y direction, which is the second direction, and intersects with the gate lines DL1 and DL2, respectively, and a Y direction wiring line (second direction drain line). After extending in the direction and intersecting the gate line GL2, the X direction wiring portion (first direction drain line) connected to the drain electrode DT of the thin film transistor TFT2 of the pixel PXL2 is formed. Furthermore, the Y-direction wiring part of the drain line DL is arranged with an extension part JC connected to the drain electrode DT of the adjacent thin film transistors TFT1 and TFT2, and the thin film transistors TFT1 and TFT2 to which the extension part JC is connected. The extension portions AD1 and AD2 extending along the X direction from the first side to the other end side and intersecting the gate lines GL1 and GL2 connected to the thin film transistors TFT1 and TFT2 to which the extension portion JC is connected, respectively. Since each has a configuration, it is possible to make the same capacitance between the gate and drain of the thin film transistors TFT1 and TFT2 of the pixel rows PL1 and PL2 connected to the same drain line DL, which causes vertical streaks. The thin film transistors TFT1 and TFT2 that drive adjacent pixels are set to have the same driving capability. It is possible. Therefore, it is possible to prevent the occurrence of vertical stripes and improve the image quality.

<Embodiment 2>
FIG. 3 is a plan view for explaining the pixel configuration of the liquid crystal display device according to the second embodiment of the present invention. In particular, the pixel configuration when the present invention is applied to a multi-domain IPS liquid crystal display device will be described. FIG. However, the liquid crystal display device of the second embodiment is the same as that of the first embodiment except for the formation positions of the gate lines GL1 and GL2, the thin film transistors TFT1 and TFT2, and the electrode configuration in the pixels PXL1 and PXL2. Therefore, in the following description, the configuration of the additional extending portions AD1 and AD2 due to different formation positions of the gate lines GL1 and GL2 and the thin film transistors TFT1 and TFT2 will be described in detail. In the IPS liquid crystal display device according to the second embodiment, a case where a linear pixel electrode is formed on the liquid crystal side of the flat common electrode via an insulating film will be described. The electrode may be formed in the same layer, and a linear common electrode may be formed on the liquid crystal side of the pixel electrode via an insulating film. Furthermore, in the liquid crystal display device according to the second embodiment, a black matrix and R (red), G (green), and B (blue) color filters corresponding to the edge of each pixel are formed on a second substrate (not shown). Thus, the light leakage from pixels adjacent to the black matrix is prevented.

  In Embodiment 2, each pixel PXL1, PXL2 has a protective film (not shown) formed on the upper layer of the thin film transistors TFT1, TFT2, a flat common electrode is formed on the upper surface thereof, and an insulating film is formed on the upper layer thereof in the Y direction. A pixel electrode PX having a slit SLT extending in the region is formed, and a linear electrode is formed in a region overlapping with the common electrode CT. At this time, in the second embodiment, the gate lines GL1 and GL2 and the thin film transistors TFT1 and TFT2 are formed in the intermediate region in the Y direction of the pixels PX11 and PXL2. In the upper region (first region) of the intermediate region in the figure, the slit SLT is formed so as to be inclined from the Y direction to the right side of the drawing (plus direction, first inclination angle). In the region (second region), the slit SLT is formed so as to be inclined from the Y direction to the left side in the drawing (minus direction, second inclination angle), and has a so-called vertical multi-domain electrode configuration. ing.

  The liquid crystal display device according to the second embodiment having this pixel configuration also has drain lines DL extending in the Y direction and arranged in parallel in the X direction, and one drain line DL has the same pixel row PL1, Of the pixels arranged in PL2, they are connected to the pixels PXL1 and PXL2 of two adjacent pixel columns, respectively. In addition, it has two gate lines GL1 and GL2 that extend in the Y direction and are arranged in parallel in the X direction. In particular, in the pixels PXL1 and PXL2 in the same pixel row, the first region, the second region, Two gate lines GL1 and GL2 arranged in parallel in the X direction are arranged in a region between them (intermediate region). In this intermediate region, thin film transistors TFT1 and TFT2 corresponding to the respective pixels PXL1 and PX2 are also arranged, and these thin film transistors TFT1 and TFT2 are arranged between the gate lines GL1 and GL2 and have the same orientation. However, as in the first embodiment, in the pixel row PL1 and the pixel row PL2, the configurations of the pixels PXL1 and PLX2 are positions where the arrangement of the other constituent members excluding the drain line DL is inverted in the Y direction (vertical direction). It has become a relationship.

  In addition, the pixels PXL1 and PXL2 of the pixel row PL2, which is the lower pixel row, are shifted in the X direction by a half pitch (half the pixel width in the X direction) with respect to the pixels PXL1, PXL2 of the upper pixel row PL1. Are arranged. Accordingly, only the drain line DL is formed between the pixels PXL1 and PXL2 adjacent in the X direction and the Y direction.

  For example, in the pixel row PL1, the thin film transistor TFT1 of the pixel PXL1 connected to the drain line DL is connected to the gate line GL1 arranged on the upper side (upper side of the thin film transistors TFT1 and TFT2) in the center region, and the thin film transistor of the pixel PXL2 The TFT 2 is connected to a gate line GL 2 arranged on the lower side (lower side of the thin film transistors TFT 1 and TFT 2) in the center region. Similarly, in the pixel row PL2, the thin film transistor TFT2 of the pixel PXL2 connected to the drain line DL is connected to the gate line GL2, and the thin film transistor TFT2 of the pixel PXL1 is connected to the gate line GL1.

  Further, the drain line DL extending in the Y direction includes Y direction wiring portions (second direction drain lines) extending in the longitudinal direction of the pixels PXL1 and PXL2, that is, the Y direction, and pixels PXL1 and PXL2 adjacent in the Y direction. And an X direction wiring portion (first direction drain line) extending in the lateral direction of the pixels PXL1 and PXL2, that is, extending in the X direction and having an end connected to the drain electrode DT of the thin film transistors TFT1 and TFT2. Consists of.

  At this time, in the pixel row PL1, the Y-direction wiring portion of the drain line DL extends in the Y direction along the left side edge portion of the pixel PXL1 in the drawing, and in this case, as indicated by a circle C, It intersects with the gate lines GL1 and GL2 once each. The Y-direction wiring portion has an extending portion JC that is formed so as to partially extend in the Y direction, and an end thereof is connected to the drain electrode DT of the thin film transistor TFT1 of the pixel PXL1. On the other hand, the X-direction wiring portion extends from the lower end of the Y-direction wiring portion along the lower side of the pixel PXL1 in the drawing, extends in the X direction between adjacent pixels, and then extends in the Y direction (upward in the drawing). After extending and intersecting the gate line GL2 corresponding to the pixel row PL1 at a position indicated by a circle C, the end thereof is connected to the drain electrode DT of the thin film transistor TFT2 of the pixel PXL2.

  In the pixel row PL2, the Y-direction wiring portion of the drain line DL extends in the Y direction between the pixel PXL1 and the pixel PXL2, and intersects the gate lines GL1 and GL2 once each. A part thereof extends in the Y direction to form an extension part JC, and an end part thereof is connected to the drain electrode DT of the thin film transistor TFT2 of the pixel PXL2. Further, the X-direction wiring portion extends from the lower end of the Y-direction wiring portion along the lower side of the pixel PXL1 in the figure, and extends in the X direction between the next pixel (not shown) and the pixel PXL1. Extending in the direction (upward in the figure) and intersecting with the gate line GL1 corresponding to the pixel row PL2 at the position indicated by the circle C, the end thereof is connected to the drain electrode DT of the thin film transistor TFT1 of the pixel PXL1 Is done.

At this time, in the liquid crystal display device of Embodiment 2, in the pixel row PL1, the X-direction wiring portion of the drain line DL formed along the lower side edge portion of the pixel PXL1 is connected to the thin film transistor TFT2 of the pixel PXL2. Is done. Thereafter, the additional extension portion AD1 of the drain line DL extends between the pixel PXL1 and the pixel PXL2 in the gate line GL direction (upward direction), and 1 corresponding to the pixel row PL1 at the intersection indicated by a circle D. Similarly, in the pixel row PL2, the X-direction wiring portion of the drain line DL formed along the lower side edge of the pixel PXL1 is also a thin film transistor of the pixel PXL1. Connected to TFT1.

Thereafter, the additional extension AD2 of the drain line DL extends in the direction of the gate line GL (upward direction) between the pixel PXL1 and a pixel (not shown) in the previous stage in the X direction. The configuration intersects with one gate line GL2 corresponding to the row PL1.

  As described above, also in the pixel rows PL1 and PL2, the additional extending portions AD1 and AD2 respectively intersect with one gate line GL1 and GL2, and the gate line GL1 of the X-ray direction wiring portion of the drain line DL is formed. , GL2 can be made to have the same number of intersections as that of the Y-direction wiring portion, so that the same effect as in the first embodiment can be obtained. In the second embodiment, the additional extending portions AD1 and AD2 are formed using the same thin film material as the drain line DL, and the wiring width is also the same as that of the drain line DL.

  In the liquid crystal display device of the second embodiment, the case where the present invention is applied to a multi-domain IPS liquid crystal display device has been described. However, a single-domain IPS in which all linear electrodes are formed in the same direction. It can also be applied to a liquid crystal display device.

  Further, the formation positions of the gate lines GL1 and GL2 and the thin film transistors TFT1 and TFT2 are also applicable to the IPS liquid crystal display device arranged at the end in the Y direction of the pixels PXL1 and PXL2, as in the first embodiment. . However, in this case, the formation positions and shapes of the gate lines GL1 and GL2 and the additional extending portions AD1 and AD2 are the same as those in the first embodiment.

<Embodiment 3>
FIG. 4 is a plan view for explaining a pixel configuration in the liquid crystal display device according to the third embodiment of the present invention. However, the liquid crystal display device of the third embodiment is the same as that of the first embodiment except for the configuration of the additional extending portions AD11 and AD21. Therefore, in the following description, the configuration of the additional extension parts AD11 and AD21 will be described in detail.

  As shown in FIG. 4, in the liquid crystal display device of the third embodiment, in the pixel row PL1, the X-direction wiring portion of the drain line DL formed at the upper end portion of the pixel PXL1 is connected to the thin film transistor TFT1 of the pixel PXL1. After the intersection with the gate line GL1, the additional extension part AD11 extending in the Y direction is further provided. That is, the additional extension part AD11 of the drain line DL according to the third embodiment extends in the X direction between two gate lines GL1 (not shown) along the upper side in the drawing of the pixel PXL1 from the X direction wiring part. After that, the other end portion in the short direction of the pixel PXL1 indicated by the circle D is bent in the formation direction (downward direction in the drawing) of the pixels PXL1 and PXL2. Thereafter, after crossing the gate line GL1, the region between the adjacent pixels PXL1 and PXL2 is extended to the vicinity of the formation region of the thin film transistor TFT2 of the pixel PXL2.

  Similarly, also in the pixel row PL2, after the X-direction wiring portion of the drain line DL formed at the upper end portion of the pixels PXL1 and PXL2 intersects with one gate line GL2 connected to the thin film transistor TFT2 of the pixel PXL2. In addition, the configuration further includes an additional extension part AD21 extending in the Y direction. That is, the additional extension portion AD21 extends in the X direction between the two gate lines GL1 along the upper side of the pixel PXL1 of the pixel row PL2 in the figure, and then the pixel PXL1 indicated by the circle D Is bent in the direction in which the pixel PXL1 is formed (downward in the figure) at the other end in the short direction. After this, after crossing the gate line GL2, the region between the adjacent pixel (not shown) and the pixel PXL1 is extended to the vicinity of the formation region of the thin film transistor TFT1 of the pixel PXL1.

  That is, in the liquid crystal display device according to the third embodiment, since the open ends of the additional extending portions AD11 and AD21 are extended to the vicinity of the thin film transistors TFT1 and TFT2, in addition to the effects of the first embodiment described above. The pixels PXL1 and PXL2 can be separated by the black matrix formed on the second substrate and the additional extending portions AD11 and AD21, and light leakage between the pixels can be reduced. Furthermore, a margin for color mixing between adjacent pixels can be improved, and a special effect that image quality can be improved can be obtained. In particular, since the additional extending portions AD11 and AD21 are formed on the first substrate SUB1 side on which the pixel electrode is formed, light leakage between the pixels when the display image is observed from an oblique direction of the main surface of the liquid crystal display device. It is possible to obtain a great effect in reducing and improving the margin for color mixing.

<Embodiment 4>
FIG. 5 is a plan view for explaining a pixel configuration in the liquid crystal display device according to the fourth embodiment of the present invention. However, the configuration of the liquid crystal display device of the fourth embodiment is the same as that of the second embodiment except for the configuration of the additional extending portions AD11 and AD21. Therefore, in the following description, the configuration of the additional extension parts AD11 and AD21 will be described in detail.

  As shown in FIG. 5, also in the liquid crystal display device of the fourth embodiment, in the pixel row PL1, the X-direction wiring portion of the drain line DL formed along the lower side edge portion of the pixel PXL1 is the thin film transistor of the pixel PXL2. Connected to TFT2. Thereafter, an additional extension AD11 extending from the X-direction wiring portion of the drain line DL extends between the pixel PXL1 and the pixel PXL2 in the gate line GL direction (upward direction), and at an intersection indicated by a circle D Even after intersecting with one gate line GL1 corresponding to the pixel row PL1, the region between the pixel PXL1 and the pixel PXL2 is further extended to the end thereof.

  Also in the pixel row PL2, the X-direction wiring portion of the drain line DL formed along the lower side edge portion of the pixel PXL1 is connected to the thin film transistor TFT2 of the pixel PXL2. Thereafter, an additional extension AD21 extending from the X-direction wiring portion of the drain line DL extends along the edge shape between the pixel PXL1 and the preceding pixel PXL (not shown), and is shown by a circle D. Even after intersecting with one gate line GL2 corresponding to the pixel row PL1 in the portion, the region between the pixel PXL1 and the pixel PXL2 is further extended to the end thereof.

  As described above, in the liquid crystal display device according to the fourth embodiment, the open ends of the additional extending portions AD11 and AD21 intersect with the gate lines GL1 and GL2, and then extend to the opposite ends of the pixels PXL1 and PXL2. Since it is configured, the effect of the third embodiment can be obtained in addition to the effect of the first embodiment described above.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment of the invention. However, the invention is not limited to the embodiment of the invention, and various modifications can be made without departing from the scope of the invention. It can be changed.

PNL: Liquid crystal display panel, FPC: Flexible printed circuit board, AR: Display area CT: Common electrode, PX: Pixel electrode, SL: Seal material, DL: Drain line CL ... Common line, GL, GL1, GL2 ... Gate line, ST ... Source electrode TFT, TFT1, TFT2 ... Thin film transistor, SUB1 ... First substrate SUB2 ... Second substrate, DR ... Drive circuit, AS ... Semiconductor layer, JC ... Extension part PAD ... Pad part, PXL1, PXL2 ... Pixel, SLT ... Slit AD1, AD2, AD11, AD21 ... Additional extension part

Claims (6)

A first substrate and a second substrate sandwich a liquid crystal, and a pixel having at least a pixel electrode to which a video signal is supplied is provided on the liquid crystal side surface of the first substrate;
A plurality of the pixels are arranged along a first direction to form a pixel row, a pixel column is formed along a second direction intersecting the first direction, and a lower row with respect to the upper pixel row. The pixel rows are arranged in a shifted manner in the first direction, and are arranged to be alternately different for each stage.
A first gate line and a second gate line are disposed for one pixel row, a drain line is disposed for two pixel columns, and the drain line is the first gate line and the second gate. A liquid crystal display device crossing a line,
The pixel row includes a first pixel having a first thin film transistor connected to the first gate line and a second thin film transistor connected to a second gate line and formed in the same direction as the first thin film transistor. A pixel, and
The drain line extends in the second direction, intersects with the first gate line and the second gate line, respectively, and from the second direction drain line to the first direction. A first direction drain line that is extended and connected to the drain electrode of the second thin film transistor after intersecting the second gate line,
The second direction drain line includes an extension connected to the drain electrode of the first thin film transistor, and an additional extension extending in the first direction or the second direction and intersecting the first gate line. A liquid crystal display device.   The pixel row includes a first pixel row in which the second direction drain line is disposed along one edge side of the first pixel, and the second pixel is close to the other edge side; The liquid crystal display device according to claim 1, further comprising: a second pixel row in which the second direction drain line is disposed between the first pixel and the second pixel.   2. The liquid crystal device according to claim 1, further comprising a common electrode disposed on the liquid crystal side of the first substrate and superimposed on the pixel electrode via an insulating film, and the side disposed on the liquid crystal side is a linear electrode. Or a liquid crystal display device according to 2;   The electrode disposed on the liquid crystal side includes a first region where a linear electrode having a first inclination angle is formed and a second region where a linear electrode having a second inclination angle is formed. The liquid crystal display device according to claim 3.   5. The liquid crystal display device according to claim 4, wherein the first and second gate lines and the first and second thin film transistors are disposed between the first region and the second region. 6.   The liquid crystal display device according to claim 1, wherein the second substrate includes a common electrode to which a common signal serving as a reference potential of the video signal is input.

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