JP2012080218A - Amplifying circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an amplifying circuit by which changes in a gain and a passing phase between a high-output period and a low-output period are small or suppressed.SOLUTION: An amplifying circuit has a power division circuit, a power synthesis circuit, and a control circuit. In the power division circuit, a voltage division circuit dividing a voltage of an input signal into a plurality of voltages and a current division circuit dividing a current of the input signal into a plurality of currents are connected in a cascade manner. The input signal before division is input to a pre-stage voltage or the current division circuit, and a divided input signal is output from a post-stage current or the voltage division circuit. In the power synthesis circuit, a voltage synthesis circuit and a current synthesis circuit are connected in a cascade manner so that any one of them is arranged as a pre-stage. A divided output signal is input to a pre-stage current or the voltage synthesis circuit, and an output signal after synthesis is output from a post-stage voltage or the current synthesis circuit. Further, while keeping a ratio M/N of the number of voltage division M and the number of current division N and a ratio K/L of the number of voltage synthesis K and the number of current synthesis L constant, the control circuit changes the numbers of division M and N and the numbers of synthesis K and L, and controls an amplifier to which a signal is distributed to be in an operational state and controls an amplifier to which no signal is distributed to be in a non-operational state.

Description

  The present invention relates to an amplifier circuit.

  The amplifier circuit amplifies the input signal and outputs an amplified output signal. An amplifier circuit that performs power amplification is known as a power amplifier provided at the final stage of a transmission circuit of a communication device, for example. Among communication devices, mobile communication devices such as mobile phones, for example, have a long time in a low output state in which the output power is low, such as in a standby state, so that power efficiency in the low output state is practically important. In other words, it is required to suppress current consumption in a low output state as much as possible.

  As a measure for improving the power efficiency in the low output state, it is general that current consumption occurs only in a part of the amplifier circuit and current consumption does not occur in the remaining part. For example, multiple sets of amplifiers or amplification transistors are provided, all amplifiers or amplification transistors are operated in a high output state with high output power, and only a part of the amplifiers or amplification transistors are operated in a low output state. Reduce current. Such an amplifier circuit is described in Patent Documents 1-6.

JP-A-10-126164 Japanese Patent Laid-Open No. 2002-100935 JP 2002-1335060 A JP 2002-271152 A JP 2001-292033 A JP 2006-333060 A

  In a conventional amplifier circuit, an amplifier or an amplification transistor to be operated is switched by a switch to control to a low power consumption state or a high power consumption state. Therefore, the input / output impedance of the amplifier circuit changes at the time of switching, the gain of the amplifier circuit changes, and the passing phase of the amplifier circuit changes. It has been proposed that a conventional amplifier circuit is provided with a variable matching circuit to perform input / output impedance matching (Patent Document 2, etc.). However, in such a case, by providing a variable matching circuit, the gain and pass phase of the entire amplifier circuit change at the time of switching, resulting in deterioration of communication quality. In particular, the change in the passing phase at the amplifier leads to a serious deterioration in communication quality in the case of a communication system in which transmission information is carried on the phase of the output signal.

  Accordingly, an object of the present invention is to provide an amplifier circuit that suppresses power consumption at the time of low output and has little or suppressed change in gain and change in passing phase between high output and low output.

The first aspect of the amplifier circuit includes a power distribution circuit that distributes the power of the input signal before distribution and outputs a plurality of distribution input signals;
A plurality of amplifiers each amplifying the distributed input signal;
A power combining circuit for combining the power of the distributed output signals of each of the plurality of amplifiers and outputting the combined output signal;
The power distribution circuit includes a voltage distribution circuit that distributes the voltage of the input signal to a plurality of voltages and a current distribution circuit that distributes the current of the input signal to a plurality of currents, one of which is connected in cascade, The pre-distribution input signal is input to the voltage or current distribution circuit of the current stage, and the subsequent current or voltage distribution circuit outputs the distribution input signal,
The power combining circuit is configured by cascading a voltage combining circuit for combining the voltages of a plurality of input signals and a current combining circuit for combining the currents of the plurality of input signals, one of which is a previous stage, and combining the current or voltage of the previous stage. The distribution output signal is input to the circuit, and the subsequent voltage or current synthesis circuit outputs the synthesized output signal,
Further, the ratio M / N of the voltage distribution number M of the voltage distribution circuit and the current distribution number N of the current distribution circuit, and the ratio K of the voltage synthesis number K of the voltage synthesis circuit and the current synthesis number L of the current synthesis circuit. The distribution numbers M and N and the combined numbers K and L are changed while maintaining / L constant, and the amplifier to which the signal is distributed is controlled to be in an operating state, and the amplifier that is not distributed is controlled to be in a non-operating state. A control circuit.

  According to the first aspect, since the input / output impedance, gain, and passing phase can be kept constant while being variably controlled between the high output state and the low output state, the communication quality deteriorates when used in the power amplifier of the communication device. The power consumption in the low output state can be reduced while suppressing the above.

It is a whole block diagram of the amplifier circuit in this Embodiment. It is a block diagram of the power distribution circuit in this Embodiment. It is a block diagram of the power combiner circuit in this Embodiment. 1 is a circuit diagram of a voltage distribution circuit 10 in the present embodiment. It is a circuit diagram of the current distribution circuit 12 in the present embodiment. It is a circuit diagram of the voltage synthesis circuit 22 in the present embodiment. It is a circuit diagram of the current synthesis circuit 20 in the present embodiment. It is a circuit diagram of the 1st specific example of the amplifier circuit in this Embodiment. It is a figure which shows the specific example of the 1st-4th switch in this Embodiment. It is a circuit diagram which shows the high output state and low output state of the amplifier circuit of FIG. It is a circuit diagram which shows the high output state and low output state of the amplifier circuit of FIG. It is a figure explaining Formula (8). It is a figure explaining Formula (8). It is a block diagram of the 1st specific example in this Embodiment. It is a block diagram of the 2nd specific example in this Embodiment. It is a block diagram of the 3rd specific example in this Embodiment. It is a block diagram of the 4th specific example in this Embodiment. It is a block diagram of the 5th specific example in this Embodiment.

  FIG. 1 is an overall configuration diagram of an amplifier circuit according to the present embodiment. The amplifier circuit distributes the power of the pre-distribution input signal IN and outputs a plurality of distributed input signals In_1 to In_n, a plurality of amplifiers amplifying each of the distributed input signals In_1 to In_n, and a plurality of amplifiers The control signal CNT is sent to the power combining circuit 2, the power distribution circuit 1, the plurality of amplifiers amp, and the power combining circuit 2 that combine the power of the distribution output signals Out_1 to Out_n of each amp and output the combined output signal OUT. And a control circuit 3 for controlling to a desired circuit configuration.

  The power distribution circuit 1 distributes the power of the input signal IN before distribution to a desired number corresponding to the control signal CNT, and outputs the desired number of distributed input signals In_1 to In_n. The amplifier amp amplifies a desired number of distribution input signals In_1 to In_n, respectively, and outputs distribution output signals Out_1 to Out_n. The power combining circuit 2 combines the powers of the desired number of distributed output signals Out_1 to Out_n amplified by the amplifiers amp and outputs the combined output signal OUT. In the power distribution circuit 1 and the power combining circuit 2, the number of distributions and the number of combination are controlled according to the control signal CNT. At the same time, of the plurality of amplifiers amp, only the desired number of amplifiers amp is controlled to be in operation according to the control signal CNT, and the remaining amplifiers are controlled to be inactive.

  When the amplifier is controlled to be in an operating state, for example, a bias voltage or a bias current is appropriately supplied to the amplification transistor to amplify a high frequency input signal. Further, when the amplifier is controlled to the non-operating state, for example, the supply of the bias voltage and the bias current to the amplifying transistor is stopped, the amplifying operation is not performed, and the consumption current is reduced to zero or suppressed.

  The amplifier circuit of FIG. 1 has a high output state and a low output state. In other words, the power distribution number and the power combination number are increased, and the number of amplifiers in the operating state is controlled to increase accordingly. By controlling the number of amplifiers to be reduced accordingly, the low output state is controlled.

  In the high output state, for example, the gain is 30 dB, the pre-distribution input signal IN is 0 dBm, and the post-synthesis output signal OUT is +30 dBm. Many amplifiers amp are supplied with a bias and are in an operating state. On the other hand, in the low output state, for example, the gain is 30 dB, the pre-distribution input signal IN is −30 dBm, and the combined output signal OUT is 0 dBm. As described above, the control of the output power of the power amplifier is mainly performed by controlling the power of the input signal IN.

  However, in the present embodiment, the number of amplifiers amp in the operating state in the low output state is reduced to reduce the current consumption, thereby improving the power efficiency in this state. Then, control is performed so that the gains are matched between the high output state and the low output state, and the passing phases of the amplifier circuits are matched.

  FIG. 2 is a configuration diagram of the power distribution circuit in the present embodiment. FIG. 2 shows the configuration methods (A) and (B). In the configuration method (A), the power distribution circuit 1 includes a voltage distribution circuit 10 that distributes the voltage of the pre-distribution input signal IN to a plurality of voltages IN_1 to IN_i, and a plurality of signals IN_1 to IN_I from the voltage distribution circuit 10, respectively. A current distribution circuit 12 that distributes the current of the input signal to a plurality of currents In_1 to In_n is connected in cascade, the pre-distribution input signal IN is input to the voltage distribution circuit 10 at the front stage, and the current distribution circuit 12 at the rear stage is the distribution input signal. In_1 to In_n are output.

  In the configuration method (B), the power distribution circuit 1 includes a current distribution circuit 12 that distributes the current of the input signal IN before distribution to a plurality of currents IN_1 to IN_i, and a plurality of signals IN_1 to IN_I from the current distribution circuit 12, respectively. A voltage distribution circuit 10 that distributes the voltage of the input signal to a plurality of voltages In_1 to In_n is connected in cascade, the pre-distribution input signal IN is input to the current distribution circuit 12 in the previous stage, and the voltage distribution circuit 10 in the subsequent stage is the distribution input signal. In_1 to In_n are output.

  That is, any of the cascade connection of the voltage distribution circuit 10 and the current distribution circuit 12 may be in the preceding stage. Specific examples of the voltage distribution circuit and the current distribution circuit will be described later.

  FIG. 3 is a configuration diagram of the power combining circuit according to the present embodiment. FIG. 3 also shows the configuration methods (A) and (B). In the configuration method (A), the power combining circuit 2 includes a current combining circuit 20 that combines the currents of the plurality of distributed output signals Out_1 to Out_n output from the amplifier, and the voltages of the plurality of signals OUT_1 to OUT_j from the current combining circuit 20. Are connected in cascade, the distributed output signals Out_1 to Out_n are input to the current synthesis circuit 20 at the previous stage, and the voltage synthesis circuit 22 at the subsequent stage outputs the synthesized output signal OUT.

  In the configuration method (B), the power combining circuit 2 includes a voltage combining circuit 22 that combines the voltages of the plurality of distributed output signals Out_1 to Out_n output from the amplifier, and currents of the plurality of signals OUT_1 to OUT_j from the voltage combining circuit 22. Are connected in cascade, and the distributed output signals Out_1 to Out_n are input to the preceding voltage combining circuit 22, and the subsequent current combining circuit 20 outputs the combined output signal OUT.

  Also in the power combiner circuit 2, any one of the cascade connection of the current combiner circuit 20 and the voltage combiner circuit 22 may be in the preceding stage. However, the power distribution circuit and the power combining circuit in FIGS. 2 and 3 are connected to the amplifier amp by a combination of the configuration method (A) or a combination of the configuration method (B).

  FIG. 4 is a circuit diagram of the voltage distribution circuit 10 in the present embodiment. In the voltage distribution circuit 10, primary coils of a plurality of transformers TS1 to TSi are connected in series between an input terminal and a reference voltage (for example, GND), and a plurality of transformers are connected between the plurality of output terminals and the reference voltage GND. Secondary coils of the transformers TS1 to TSi are provided in parallel, and first switches SW1 and SW2 are provided between a connection point of the primary coil and the reference voltage GND, respectively.

  For example, when all the first switches SW1, SW2˜ are turned off, i primary transformer coils are connected in series between the input terminal and the reference voltage GND. Therefore, the voltage Vin / i obtained by dividing the input voltage Vin by i is applied to each primary coil, and the input current Iin flows. For the sake of simplicity, assuming that the transformer ratio (turn ratio) of each transformer TS is 1: 1, the voltage of the secondary coil is Vin / i, and the current is Iin. That is, the voltage distribution circuit 10 divides the input voltage Vin into i and outputs it as an output voltage.

  By selecting the first switches SW1, SW2 to be turned on by the control signal CNT, the number of voltage distribution can be selected. When the transformer ratio (turn ratio) of each transformer is 1: n1, the secondary coil voltage is proportional to the turn ratio (n1) * Vin / i, and the current is opposite to the turn ratio. Proportionally Iin / n1.

  FIG. 5 is a circuit diagram of the current distribution circuit 12 in the present embodiment. In the current distribution circuit 12, second switches SW11 to SW1i are provided between the input terminal and the plurality of output terminals, respectively. When all the second switches SW11 to SW1i are turned on, the input current Iin is equally divided into i and distributed. And there is no change in voltage. Therefore, by controlling the number of second switches that are turned on by the control signal CNT, the number of current distribution can be variably controlled.

  FIG. 6 is a circuit diagram of the voltage synthesis circuit 22 in the present embodiment. In the voltage synthesis circuit 22, primary coils of a plurality of transformers TS11 to TS1j are respectively provided in parallel between a plurality of input terminals and a reference voltage (for example, ground GND), and a plurality of transformers are provided between the output terminal and the reference voltage GND. Secondary coils of the transformers TS11 to TS1j are connected in series, and third switches SW21 and SW22 are provided between the connection point of the secondary coil and the reference voltage, respectively.

  The same input voltage Vin and input current Iin are input to multiple inputs, and if the transformer ratio (turn ratio) of each transformer is 1: 1, voltage Vin and current Iin are generated in each of the j secondary coils. To do. As a result, voltage j * Vin and current Iin are output to an output terminal to which a plurality of secondary coils are connected in series. That is, j input voltages Vin are synthesized into j * Vin.

  By selecting the third switches SW21, SW22, which are turned on by the control signal CNT, the number of voltage synthesis can be controlled. When the transformer transformation ratio (turn ratio) is 1: n2, the secondary coil voltage is proportional to the turn ratio (n2) * Vin, and the current is inversely proportional to the turn ratio. Iin / n2.

  FIG. 7 is a circuit diagram of the current synthesis circuit 20 in the present embodiment. In the current synthesis circuit 20, fourth switches SW31, SW32 to SW3j are provided between a plurality of input terminals and output terminals, respectively. When all the fourth switches are turned on, the input current Iin is multiplied by j and synthesized. There is no change in voltage. Therefore, by controlling the number of fourth switches that are turned on by the control signal CNT, the number of current synthesis can be variably controlled.

  As shown in FIGS. 4 and 6, in this embodiment, for example, the transformer ratios of the voltage distribution circuit 10 and the voltage synthesis circuit 22 are all set to be the same, the voltages are evenly distributed, and the same voltage is synthesized. Is done. Accordingly, the operational amplifier amp performs an amplification operation on the same input voltage and current and outputs an equivalent output voltage and current.

  FIG. 8 is a circuit diagram of a first specific example of the amplifier circuit according to the present embodiment. The amplifier circuit of FIG. 8 has four amplifiers amp1 to amp4. The voltage distribution circuit 10 distributes the pre-distribution input signal IN to two or one and outputs signals IN_1 and IN_2, and the two sets of current distribution circuits 12 distribute the signals IN_1 and IN_2 to two or one, respectively. Distribution input signals In_1 to In_4 are output. These distribution numbers are controlled by controlling the conduction state of the first switch sw1 and the second switches sw3 to sw9 by the control signal CNT from the control circuit 3.

  The four amplifiers amp1 to amp4 are controlled in the operating state by the number of distribution input signals In_1 to In_4 generated according to the number of distributions. The remaining amplifiers are controlled in a non-operating state to save power.

  Then, the distribution output signals Out_1 to Out_4 amplified by the amplifiers amp1 to amp4 are combined by the two current combining circuits 20 to output the output signals OUT_1 and OUT_2, which are combined by the voltage combining circuit 22 and combined. Output signal OUT is output. These composite numbers are controlled by controlling the conduction states of the third switches sw4 to sw10 and the fourth switch sw2 by the control signal CNT from the control circuit 3.

  Note that the transformation ratios of the transformers of the voltage distribution circuit 10 and the voltage synthesis circuit 22 are generally 1: n1 and 1: n2, respectively.

  For example, when the distribution side distribution number is set to voltage distribution 2 and current distribution 2, 2 × 2 = 4 amplifiers amp1 to amp4 are controlled to be in an operating state, and the combined number on the synthesis side is current synthesis 2 and voltage synthesis. 2 is controlled. Further, when the number of distributions on the distribution side is set to voltage distribution 1 and current distribution 1, only 1 × 1 = 1 amplifier amp1 is controlled to be in an operating state, and the remaining amplifiers amp2 to amp4 are controlled to be in an inactive state. The number of synthesis is controlled by current synthesis 1 and voltage synthesis 1. This example will be described later.

  FIG. 9 is a diagram illustrating a specific example of the first to fourth switches in the present embodiment. FIG. 9 shows a specific example of three switches. In the (A) pass gate switch, the source and drain of an N-channel MOS transistor MOSTR are input / output terminals, and the control terminal is supplied with a control signal CNT at its gate. When the control signal CNT becomes H level, the transistor MOSTR becomes conductive, and when the control signal CNT becomes L level, the transistor MOSTR becomes non-conductive. Since this configuration is based on only transistors, it is effective when the area needs to be reduced. However, in the case of a high-frequency signal, the parasitic capacitance C0 between the source and drain of the transistor MOSTR may cause a short-circuit state with respect to the high-frequency component and cannot be completely turned off.

  The switch using the LC resonance of (B) has an N-channel MOS transistor MOSTR, capacitors C1 and C12, and an inductor L1. Capacitors and inductances of the capacitors C1 and C12 and the inductor L1 are set so as to resonate with a high frequency signal.

  Therefore, when the transistor MOSTR is on, the resonance circuit of the capacitors C1 and C12 and the inductor L1 resonates the high-frequency signal, and the high-frequency signal is prevented from passing through, so that the high-frequency signal is substantially switched off.

  On the other hand, when the transistor MOSTR is off, a high-frequency signal is transmitted through the inductor L1 and the switch is turned on substantially.

  In the (C) MEMS (Micro-Electro-Mechanical-Systems) switch, for example, two electrodes P1 and P2 connected to an input / output terminal are provided at a predetermined distance. Then, one of the electrodes P1 is moved by the voltage applied between the electrodes P1 and P2, and the contact state and the non-contact state with the other electrode P2 can be switched. Therefore, in the non-contact state, the switch is turned off with respect to the high frequency signal. On the other hand, in the contact state, the switch is turned on with respect to the high frequency signal. In the case of a MEMS switch, the off-state capacitance C2 is small compared to (A).

  10 and 11 are circuit diagrams showing a high output state and a low output state of the amplifier circuit of FIG. In the high output state of FIG. 10, the distribution number on the distribution side is set to voltage distribution 2 and current distribution 2, and 2 × 2 = 4 amplifiers amp1 to amp4 are controlled to be in an operating state. , Voltage synthesis 2 is controlled. That is, the switches sw1 and sw2 are turned off, the switches sw3 to sw9 are all turned on, the switches sw4 to sw10 are all turned on, and the biases are turned on so that all the four amplifiers amp1 to amp4 are in an operating state. Yes.

  On the other hand, in the low output state of FIG. 11, the distribution number on the distribution side is set to voltage distribution 1 and current distribution 1, only 1 × 1 = 1 amplifier amp1 is controlled to operate, and the remaining amplifiers amp2 to amp4 are not operated. The number of synthesis on the synthesis side is controlled to current synthesis 1 and voltage synthesis 1. That is, the switches sw1 and sw2 are turned on, only the switch sw3 is turned on, only the switch sw4 is turned on, the bias is turned on so that only one amplifier amp1 is in operation, and the remaining amplifiers are not operating. The bias is turned off to be in the state.

  In the example of the high output state of FIG. 10, the ratio of the distribution numbers of the voltage distribution circuit 10 and the current distribution circuit 12 of the power distribution circuit is 2: 2, and the voltage synthesis circuit 22 and the current synthesis circuit 20 of the power synthesis circuit are respectively. The ratio of the number of synthesis is also 2: 2. On the other hand, in the example of the low output state of FIG. 11, the ratio of the distribution numbers of the voltage distribution circuit 10 and the current distribution circuit 12 of the power distribution circuit is 1: 1, the voltage synthesis circuit 22 of the power synthesis circuit and the current. The ratio of the number of synthesis of the synthesis circuit 20 is also 1: 1. That is, comparing the high output state of FIG. 10 with the low output state of FIG. 11, the distribution ratio is 1: 1 and the synthesis ratio is also kept 1: 1. In this way, the input impedance Zin and the output impedance Zout of the amplifier circuit are kept constant in the high output state and the low output state by variably controlling the number of operating the amplifier amp while keeping the distribution ratio and the synthesis ratio constant. In addition, the voltage gain from the pre-distribution input signal IN to the post-synthesis output signal OUT of the amplifier circuit can be kept constant, and the passing phase can be kept constant.

  In the high output state of FIG. 10, the switches sw1 and sw2 are opened, and the switches sw3, sw4, sw5, sw6, sw7, sw8, sw9, and sw10 are controlled to be conductive. In addition, the four amplifiers amp1, amp2, amp3, and amp4 are controlled to be in an operating state. As a result, the voltage distribution number, current distribution number, voltage synthesis number, and current synthesis number in this state are all 2.

  In FIG. 10, the voltage at the input terminal IN is Vin, the current is Iin, the voltage at the output terminal OUT is Vout, the current is Iout, and the voltages at points a, b, c, and d are Va, Vb, Vc, Vd, current are Ia, Ib, Ic, Id, input impedance of each amplifier amp is Zain, output impedance is Zaout, and each amplifier amp has its output voltage to input voltage ratio Av. Here, Av is a complex number for the high-frequency signal, the absolute value of Av is the gain of the entire amplifier circuit, and the deviation angle of Av is the passing phase.

If the transformation ratio of the input transformer is 1: n1 and the transformation ratio of the output transformer is 1: n2, the following is obtained for the input transformer.
Vin = 1 / n1 * Va + 1 / n1 * Vc (1)
Iin = n1 * Ia = n1 * Ic (2)
Here, in the two sets of current distribution circuits 12, Va, Ia and Vc, Ic are divided into two currents and input to the two amplifiers amp, respectively.
Va / Ia = Vc / Ic = Zain / 2 (3)
On the other hand, the output transformer is as follows.
Vout = n2 * Vb + n2 * Vd (4)
Iout = 1 / n2 * Ib = 1 / n2 * Id (5)
Here, in the two sets of current synthesis circuits 20, Vb, Ib and Vd, Id are generated by current synthesis of the outputs of the two amplifiers, respectively.
Vb / Ib = Vd / Id = Zaout / 2 (6)
Since the ratio between the output voltage and the input voltage of each amplifier amp is Av, it is as follows.
Vb / Va = Vd / Vc = Av (7)
From the above, the relationship is as follows.
Input impedance of the entire amplifier circuit Zin = Vin / Iin = 1 / n1 ² * Zain (8)
Output impedance of the entire amplifier circuit Zout = Vout / Iout = n2 ² * Zaout (9)
Voltage gain of the entire amplifier circuit | Vout / Vin | = n1 * n2 * | Av | (10)
Passing phase of entire amplifier circuit arg (Vout / Vin) = arg (Av) (11)
Next, in the low output state of FIG. 11, the switches sw5, sw6, sw7, sw8, sw9, sw10 are opened, and the switches sw1, sw2, sw3, sw4 are turned on. Then, only the amplifier amp1 is operated and the remaining amplifiers amp2, amp3, amp4 are deactivated and the current consumption is reduced to reduce the power consumption of the entire amplifier circuit to about one quarter, realizing high-efficiency operation. is doing.

  Low output voltage distribution number M, current distribution number N, voltage synthesis number K, current synthesis number L are all 1, and the ratio 2: 2 of high output voltage distribution number 2 and current distribution number 2 is low output. The ratio of the voltage distribution number 1 in the state and the current distribution number 1 is equal to 1: 1, and the ratio of the voltage synthesis number 2 in the high output state and the current synthesis number 2 is 2: 2 in the low power state. It is equal to the ratio of the composite number 1 to 1: 1.

At this time, if the voltage at the input terminal in FIG. 11 is Vin2, the current is Iin2, the voltage at the output terminal is Vout2, the current is Iout2, the voltages at points e and f are Ve, Vf, and the current is Ie, If. For the input side,
Vin2 = 1 / n1 * Ve
Iin2 = n1 * Ie
Since switch sw5 is off and sw3 is on,
Ve / Ie = Zain
For the output side,
Vout2 = n2 * Vf
Iout2 = 1 / n2 * If
Because switch sw6 is off and sw4 is on,
Vf / If = Zaout
From these, the following relationship is derived.
Input impedance of the entire amplifier circuit Zin = Vin2 / Iin2 = 1 / n1 ² * Zain (8A)
Output impedance of the entire amplifier circuit Zout = Vout2 / Iout2 = n2 ² * Zaout (9A)
Voltage gain of the entire amplifier circuit | Vout2 / Vin2 | = n1 * n2 * | Av | (10A)
Passing phase of the entire amplifier circuit arg (Vout2 / Vin2) = arg (Av) (11A)
12 and 13 are diagrams for explaining the above equations (8) and (8A). FIG. 12 shows a voltage distribution circuit, where the pre-distribution input signals Vin and Iin, the voltage distribution number M, and the input impedance Zin viewed from the input terminal, the transformer secondary coil when the transformer transformation ratio is 1: n1. Since the voltage of n1 * Vin / M and the current is Iin / n1, assuming that the input impedance to the amplifier amp is Zain, the following relationship holds:
Zain = n1 ² * Vin / M * Iin
And since the input impedance Zin from the input terminal is Vin / Iin,
Zin = Vin / Iin = 1 / n1 ² * M * Zain (12)
It becomes.

FIG. 13 shows a current distribution circuit, which is an example of the number N of current distribution. The current after distribution is Iin / N, the voltage is Vin, and the input impedance of the amplifier amp is Zain.
Zain = N * Vin / Iin
And since the input impedance Zin seen from the input terminal is Vin / Iin,
Zin = Vin / Iin = Zain / N (13)
Therefore, when the voltage distribution circuit and the current distribution circuit are connected in cascade, the following equations (12) and (13) are obtained.
Zin = 1 / n1 ² * (M / N) * Zain (8B)
In the case of current synthesis circuit and voltage synthesis circuit,
Zout = n2 ² * (K / L) * Zaout (9B)
In addition, regarding the voltage gain and passing phase of the entire amplifier using these circuits,
| Vout / Vin | = n1 * n2 * M / K * | Av | (10B)
arg (Vout / Vin) = arg (Av) (10B)
Since all the distributed signals are combined, MN = KL, M / K is constant, and the voltage gain and passing phase are constant.

  In the above formulas (8B), (9B), (10B), and (11B), substituting the voltage distribution number M = 2, the current distribution number N = 2, the voltage composition number K = 2, and the current composition number L = 2 in FIG. It can be understood that (8), (9), (10), and (11) are derived.

  When the voltage distribution number M = 1, the current distribution number N = 1, the voltage composition number K = 1, and the current composition number L = 1 in FIG. 11 are substituted, the above equations (8A), (9A), (10A), and (11A) ) Can be understood.

  Therefore, the input / output impedances Zin, Zout, gain, and passing phase as seen from the input and output are the same in the high output state and the low output state, and only the number of amplifiers in the operating state is different. Therefore, even if the output state of the power amplifier circuit is switched between the high output and the low output by the control signal CNT, the input / output impedances Zin, Zout, the gain, and the passing phase are kept constant. It is possible to prevent deterioration in communication quality.

  FIG. 14 is a configuration diagram of a first specific example in the present embodiment. The first specific example is the same as FIG. 8, FIG. 10 and FIG. 11, and the voltage distribution circuit 10 with the maximum distribution number 2 and the current distribution circuit 12 with the maximum distribution number 2 are cascaded on the input side. An amplifier amp is provided, and a current synthesis circuit 20 with a maximum synthesis number 2 and a voltage synthesis circuit 22 with a maximum synthesis number 2 are cascaded on the output side. FIG. 14 shows the number of voltage distributions M, the number of current distributions N, their ratio M / N, the number of current synthesis L, the number of voltage synthesis K, and the ratio K / L for states 1 and 2, respectively. Has been. State 1 is a high output state, state 2 is a low output state, and there is no change in M / N and K / L between both states, so the input / output impedances Zin, Zout, gain, and passing phase are kept constant. .

  FIG. 15 is a configuration diagram of a second specific example of the present embodiment. The second specific example is different from FIG. 14 in that the current distribution circuit 12 is provided in the front stage on the input side, the voltage distribution circuit 10 is provided in the rear stage, the voltage synthesis circuit 22 is provided in the front stage on the output side, and the current synthesis circuit 20 is provided in the rear stage. Only thing is different. Other than that, the configuration is the same. Also in this case, state 1 is a high output state, state 2 is a low output state, and there is no change in M / N and K / L between both states, so input / output impedances Zin, Zout, gain, and passing phase are constant. To be kept.

  FIG. 16 is a configuration diagram of a third specific example of the present embodiment. In the third specific example, a voltage distribution circuit 10 having a maximum distribution number 2 and a current distribution circuit 12 having a maximum distribution number 4 are cascaded on the input side, eight amplifiers amp are provided, and a maximum composite number 4 is provided on the output side. Current synthesis circuit 20 and voltage synthesis circuit 22 having a maximum synthesis number of 2 are connected in cascade. And since there is no change to M / N = 1/2 and K / L = 1/2 between the high output state of state 1 and the low output state of state 2, the input / output impedances Zin, Zout, gain, and passing phase are Kept constant.

  In the third specific example, even if the input side voltage distribution circuit and the current distribution circuit are connected in reverse, and the output side current synthesis circuit and the voltage synthesis circuit are connected in reverse, the high output in the state 1 is similarly obtained. The input / output impedances Zin, Zout, gain, and passing phase are kept constant between the state and the state 2 low output state.

  FIG. 17 is a configuration diagram of a fourth specific example of the present embodiment. In the fourth specific example, a voltage distribution circuit 10 having a maximum distribution number 3 and a current distribution circuit 12 having a maximum distribution number 3 are connected in cascade on the input side, nine amplifiers amp are provided, and a maximum composite number 3 is provided on the output side. Current synthesis circuit 20 and voltage synthesis circuit 22 having a maximum synthesis number of 3 are connected in cascade. Since there is no change in M / N = 1 and K / L = 1 between the high output state of state 1, the medium output state of state 2, and the low output state of state 3, the input / output impedances Zin, Zout, Gain and passing phase are kept constant. In the case of states 1, 2, and 3, the number of operational amplifiers amp is nine, four, and one.

  In the fourth specific example, even if the input side voltage distribution circuit and the current distribution circuit are connected in reverse and the output side current synthesis circuit and the voltage synthesis circuit are connected in reverse, the high output of the state 1 is similarly obtained. By keeping M / N = 1 and K / L = 1 between the state, the medium output state of state 2 and the low output state of state 3, the input / output impedances Zin, Zout, gain and pass phase are constant. Kept.

  FIG. 18 is a configuration diagram of a fifth specific example of the present embodiment. In the fifth specific example, a voltage distribution circuit 10 having a maximum distribution number 4 and a current distribution circuit 12 having a maximum distribution number 4 are cascaded on the input side, 16 amplifiers amps are provided, and a maximum composite number 4 is provided on the output side. Current synthesis circuit 20 and voltage synthesis circuit 22 having a maximum synthesis number of 4 are connected in cascade. Since there is no change in M / N = 1 and K / L = 1 between states 1, 2, 3, and 4, input / output impedances Zin, Zout, gain, and passing phase are kept constant. In the case of states 1, 2, 3, and 4, the number of operational amplifiers amp is 16, 9, 4, and 1.

  In the fifth specific example, even if the input side voltage distribution circuit and the current distribution circuit are connected in reverse and the output side current synthesis circuit and the voltage synthesis circuit are connected in reverse, the states 1, 2, By maintaining M / N = 1 and K / L = 1 between 3 and 4, the input / output impedances Zin, Zout, gain, and passing phase are kept constant.

  As is clear from the above specific examples, the number of distributions and the number of synthesis are controlled by the control signal CNT so as to keep the distribution ratio M / N and the synthesis ratio K / L constant, and the amplifier amp that operates correspondingly By controlling the number, the input / output impedance, gain, and passing phase are kept constant even when switching between the high output state and the low output state. Therefore, it is possible to increase power efficiency in a low output state while suppressing deterioration in communication quality.

  When controlling to the maximum output state, it is desirable to control the distribution number and the combination number to the maximum distribution number and the maximum combination number, and to control all the amplifiers amp to the operating state.

  In the above embodiment, the voltage distribution circuit and the voltage synthesis circuit are realized by a plurality of transformers. However, in the case of other voltage synthesis circuits and voltage distribution circuits, the high output state and the low output state are similarly set. Even when switching between, the input / output impedance, the gain, and the passing phase are kept constant, and the power efficiency in the low output state can be increased while suppressing the deterioration of the communication quality. Similar effects can be obtained.

  Furthermore, although the current distribution circuit and the current synthesis circuit are realized by parallel connection, the same effect can be obtained even with other current synthesis circuits and current distribution circuits.

  The above embodiment is summarized as follows.

(Appendix 1)
A power distribution circuit that distributes the power of the input signal before distribution and outputs a plurality of distribution input signals;
A plurality of amplifiers each amplifying the distributed input signal;
A power combining circuit for combining the power of the distributed output signals of each of the plurality of amplifiers and outputting the combined output signal;
The power distribution circuit includes a voltage distribution circuit that distributes the voltage of the input signal to a plurality of voltages and a current distribution circuit that distributes the current of the input signal to a plurality of currents, one of which is connected in cascade, The pre-distribution input signal is input to the voltage or current distribution circuit of the current stage, and the subsequent current or voltage distribution circuit outputs the distribution input signal,
The power combining circuit is configured by cascading a voltage combining circuit for combining the voltages of a plurality of input signals and a current combining circuit for combining the currents of the plurality of input signals, one of which is a previous stage, and combining the current or voltage of the previous stage. The distribution output signal is input to the circuit, and the subsequent voltage or current synthesis circuit outputs the synthesized output signal,
Further, the ratio M / N of the voltage distribution number M of the voltage distribution circuit and the current distribution number N of the current distribution circuit, and the ratio K of the voltage synthesis number K of the voltage synthesis circuit and the current synthesis number L of the current synthesis circuit. The distribution numbers M and N and the combined numbers K and L are changed while maintaining / L constant, and the amplifier to which the signal is distributed is controlled to be in an operating state, and the amplifier that is not distributed is controlled to be in a non-operating state. An amplifying circuit having a control circuit.

(Appendix 2)
In Appendix 1,
In the voltage distribution circuit, primary coils of a plurality of transformers are connected in series between an input terminal and a reference voltage, and secondary coils of the plurality of transformers are respectively connected between a plurality of output terminals and the reference voltage. Are provided in parallel, and a first switch is provided between the connection point of the primary coil and the reference voltage,
In the current distribution circuit, a second switch is provided between the input terminal and the plurality of output terminals,
In the voltage synthesis circuit, primary coils of a plurality of transformers are respectively provided in parallel between a plurality of input terminals and a reference voltage, and secondary coils of the plurality of transformers are provided between an output terminal and the reference voltage. Are connected in series, and a third switch is provided between the connection point of the secondary coil and the reference voltage,
In the current synthesis circuit, a fourth switch is provided between each of the plurality of input terminals and the output terminal,
An amplifier circuit in which the first, second, third and fourth switches are on / off controlled in accordance with a control signal from the control circuit.

(Appendix 3)
In Appendix 1 or 2,
Each of the plurality of amplifiers includes an amplification transistor;
The control circuit is an amplifier circuit that turns on a bias to an amplifier transistor of the amplifier to turn on the amplifier, turns off the bias, and puts the amplifier into a non-operational state.

(Appendix 4)
In any one of appendices 1 to 3,
In the first power output, the control circuit increases the distribution numbers M and N and the combined numbers K and L more than in the second power output in which the output power is lower than that in the first power output. An amplifier circuit for controlling and increasing the number of the plurality of amplifiers controlled to the operation state.

(Appendix 5)
In Appendix 4,
The control circuit controls the distribution numbers M and N and the combined numbers K and L to a maximum number at the time of maximum power output, and an amplification for controlling the number of the plurality of amplifiers controlled to the operation state to the maximum number. circuit.

(Appendix 6)
In Appendix 2,
The turns ratio of the primary side coils and the secondary side coils of the plurality of transformers of the voltage distribution circuit is the same, and the turns ratio of the primary side coils and the secondary side coils of the transformers of the voltage synthesis circuit are also the same. An amplifier circuit.

(Appendix 7)
In any one of appendices 1 to 3,
The first to fourth switches are amplifier circuits each having a MOS transistor having a source and a drain connected between input and output terminals.

(Appendix 8)
In any one of appendices 1 to 3,
The first to fourth switches connect a MOS transistor and a capacitor in series between input and output terminals, and connect an inductance in parallel to the series circuit of the MOS transistor and capacitor between the input and output terminals. An amplifying circuit in which a high-frequency signal inputted when the MOS transistor is turned on undergoes LC resonance.

(Appendix 9)
In any one of appendices 1 to 3,
The amplification circuit is a MEMS switch in which the first to fourth switches are in a contact state between the input / output terminals when turned on and are in a non-contact state between the input / output terminals when turned off.

1: Power distribution circuit 2: Power synthesis circuit 3: Control circuit amp: Amplifier

Claims (5)

A power distribution circuit that distributes the power of the input signal before distribution and outputs a plurality of distribution input signals;
A plurality of amplifiers each amplifying the distributed input signal;
A power combining circuit for combining the power of the distributed output signals of each of the plurality of amplifiers and outputting the combined output signal;
The power distribution circuit includes a voltage distribution circuit that distributes the voltage of the input signal to a plurality of voltages and a current distribution circuit that distributes the current of the input signal to a plurality of currents, one of which is connected in cascade, The pre-distribution input signal is input to the voltage or current distribution circuit of the current stage, and the subsequent current or voltage distribution circuit outputs the distribution input signal,
The power combining circuit is configured by cascading a voltage combining circuit for combining the voltages of a plurality of input signals and a current combining circuit for combining the currents of the plurality of input signals, one of which is a previous stage, and combining the current or voltage of the previous stage. The distribution output signal is input to the circuit, and the subsequent voltage or current synthesis circuit outputs the synthesized output signal,
Further, the ratio M / N of the voltage distribution number M of the voltage distribution circuit and the current distribution number N of the current distribution circuit, and the ratio K of the voltage synthesis number K of the voltage synthesis circuit and the current synthesis number L of the current synthesis circuit. The distribution numbers M and N and the combined numbers K and L are changed while maintaining / L constant, and the amplifier to which the signal is distributed is controlled to be in an operating state, and the amplifier that is not distributed is controlled to be in a non-operating state. An amplifying circuit having a control circuit. In claim 1,
In the voltage distribution circuit, primary coils of a plurality of transformers are connected in series between an input terminal and a reference voltage, and secondary coils of the plurality of transformers are respectively connected between a plurality of output terminals and the reference voltage. Are provided in parallel, and a first switch is provided between the connection point of the primary coil and the reference voltage,
In the current distribution circuit, a second switch is provided between the input terminal and the plurality of output terminals,
In the voltage synthesis circuit, primary coils of a plurality of transformers are respectively provided in parallel between a plurality of input terminals and a reference voltage, and secondary coils of the plurality of transformers are provided between an output terminal and the reference voltage. Are connected in series, and a third switch is provided between the connection point of the secondary coil and the reference voltage,
In the current synthesis circuit, a fourth switch is provided between each of the plurality of input terminals and the output terminal,
An amplifier circuit in which the first, second, third and fourth switches are on / off controlled in accordance with a control signal from the control circuit. In claim 1 or 2,
Each of the plurality of amplifiers includes an amplification transistor;
The control circuit is an amplifier circuit that turns on a bias to an amplifier transistor of the amplifier to turn on the amplifier, turns off the bias, and puts the amplifier into a non-operational state. In any one of Claims 1 thru | or 3,
In the first power output, the control circuit increases the distribution numbers M and N and the combined numbers K and L more than in the second power output in which the output power is lower than that in the first power output. An amplifier circuit for controlling and increasing the number of the plurality of amplifiers controlled to the operation state. In claim 2,
The turns ratio of the primary side coils and the secondary side coils of the plurality of transformers of the voltage distribution circuit is the same, and the turns ratio of the primary side coils and the secondary side coils of the transformers of the voltage synthesis circuit are also the same. An amplifier circuit.

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