JP2012080156A - Signal transmission circuit, switching element drive circuit and power conversion apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To optionally check whether a transmitting side is in a normal operating state, for example, for a transmitting side anomaly or noise contamination, and reliably prevent a wrong operation due to a fluctuation in reference potential at switching.SOLUTION: A signal transmission circuit includes a complementary signal drive circuit for outputting positive logic and negative logic complementary signals based on a transmission signal, a complementary signal transmission path for transmitting the complementary signals in respective independent channels, and a complementary signal determination circuit for receiving the signals on the complementary signal transmission path and determining whether or not both are complementary signals on the basis of the exclusive disjunction of both, and regards the conjunction of an output signal of the complementary signal determination circuit and the transmission signal as a received signal.

Description

  The present invention relates to a signal transmission circuit and a power conversion device including an insulation transmission circuit used in a power conversion device, a semiconductor switching element drive circuit, an inverter device, and the like using the signal transmission circuit.

In a power converter such as an inverter, a power switching element for driving a load is connected in series between main power supply terminals.
An example is shown in FIG.
The low-side power switching element S1 (hereinafter referred to as the lower arm switching element) and the high-side power switching element S2 (hereinafter referred to as the upper arm switching element) are respectively input signals of the lower arm switching element, These are turned on and off by drivers 105 and 106 driven by input signals of the upper arm switching elements, and a load 108 is connected to a middle point 107 of these switching elements.

In such a device, the reference potential of the lower arm switching element S1 basically does not vary depending on the on / off state of the upper and lower arms, but the reference potential of the upper arm switching element S2 varies and floats in potential. It will be in the state of.
In such a device, since a very high voltage HV is applied to the load 108, the reference potentials of the lower arm switching element 1 and the upper arm switching element 2 are floated in terms of potential, and the railway vehicle It is necessary to reliably prevent a high voltage electric shock or the like in the case of being mounted on a battery.
Therefore, an input signal for driving the upper arm switching element S2 whose reference potential is a floating potential needs to be electrically insulated at any location. That is, an input signal for driving the lower arm switching element S1 and the upper arm switching element S2 whose reference potential is a floating potential needs to be electrically insulated at any location.
As described above, in railway vehicles and the like that require high voltage insulation, insulating elements such as pulse transformers and photocouplers have been used, as can be seen in Patent Document 1 below.
As shown in this document, the conventional insulating means for driving the switching element is composed of one channel per arm.

  Further, in such a power conversion device such as an inverter, it is necessary to prevent the upper and lower arm switching elements S1 and S2 from being simultaneously turned on by a signal system error such as a transmission circuit that transmits a control signal to each switching element. It is necessary to always confirm safety whether or not the drive command signals of S1 and S2 are complementary without being affected by abnormality or noise on the transmission side or the transmission circuit.

  In Patent Document 2 below, for the purpose of multiplexing a data signal and a clock signal, a signal obtained by taking an exclusive OR of the data signal and the clock signal is differentiated and transmitted. It is shown that the clock signal and the data signal are separated by taking the exclusive OR of the differential outputs.

JP 2008-270548 A JP 2009-186502 A

  By the way, in recent years, isolator ICs using magnetic coupling or capacitive coupling for the insulation of input signals described above have been commercialized, and application to power converters for railway vehicles and wind power generation has been promoted. In an isolator IC using magnetic coupling or capacitive coupling, since there is a parasitic capacitance between the primary side and the secondary side of insulation, a malfunction due to fluctuations in the reference potential at the time of switching, so-called dV / dt. It becomes a problem. An isolator IC using magnetic coupling or capacitive coupling has a dV / dt resistance of only about several tens of kV / μs, and thus cannot be used in a field requiring a high dV / dt resistance exceeding 100 kV / μs, for example.

However, conventionally, as shown in the above-mentioned Patent Document 1, one channel of insulation means is used per arm. However, if the isolator IC using the magnetic coupling or capacitive coupling described above is adopted, it is included in one package. It is very easy to mount a plurality of channels.
Therefore, in the present invention, attention is paid to the fact that, by utilizing the isolator IC as described above, for example, two channels of drive control signals can be realized without causing a significant increase in cost. Using two channels for one transmission signal, the drive signal is transmitted as a complementary signal of positive logic and negative logic, and on the receiving side, an exclusive OR of positive logic and negative logic is taken, so that the reception signal is abnormal. It is possible to confirm at any time whether the transmission side operation state is safe, such as noise contamination, and to reliably prevent malfunctions due to fluctuations in the reference potential during switching.

In the present invention, in order to solve the above-described problem, if the received positive logic and negative logic are complementary signals, it is assumed that the drive control signal has been normally received, and the switching element is controlled to be in the ON state. If the signals are not signals but both have the same level, it is determined that there is some abnormality and the control signal to the switching element is cut off. More specifically, the signal transmission circuit of the present invention is configured as follows.
(1) Based on a transmission signal, a complementary signal driving circuit that outputs complementary signals of positive logic and negative logic, a complementary signal transmission path that transmits the complementary signals through independent channels, a complementary signal transmission path, A complementary signal determination circuit that receives a signal of the complementary signal transmission path and determines whether or not both are complementary signals based on the exclusive OR of the both; and at least one signal of the complementary signal transmission path In the signal transmission circuit having a receiving circuit that receives the signal and determines the signal, the logical product of the output signal of the complementary signal determining circuit and the output transmission signal of the receiving circuit is used as a received signal.

(2) In the signal transmission circuit described above, an AND circuit that outputs a logical product of both the complementary signal and the enable signal is provided in the preceding stage of the complementary signal drive circuit, and when the signal is disabled, the output of both the complementary signal drive circuits is provided. Output signals of the same level.

(3) In the above signal transmission circuit, the differential signal output circuit that outputs a differential signal to the differential signal transmission line based on the transmission signal, and the differential signal from the differential signal transmission line are respectively positive and negative. A pair of comparison circuits that are input in reverse and operate when the input potential difference is greater than or equal to a predetermined value;
An exclusive OR circuit that outputs an exclusive OR of the output signals of the pair of comparison circuits, and a logical product of one of the pair of comparison circuits and the output of the exclusive OR circuit as a reception signal .

(4) In the signal transmission circuit described above, a low-pass filter having a time constant for masking glitch is provided at the subsequent stage of the exclusive OR circuit, and the output signal of the low-pass filter and any of the pair of comparison circuits The logical product of these signals is used as a received signal.

The drive circuit of the present invention is configured as follows.
(5) In the drive circuit in which the input side of the drive control signal and the output side of the drive control signal are insulated by the isolator IC, the signal transmission circuit until the drive control signal reaches the isolator IC as the transmission signal is The signal transmission circuit of 1) to (3) was used.

Furthermore, the power conversion device of the present invention is configured as follows.
(6) A lower arm switching element and an upper arm switching element connected in series between main power supply terminals, a drive circuit board for controlling on / off of each of the lower arm switching element and the upper arm switching element, and the driving In a power converter having a higher-order logic control unit that transmits a drive control signal to a circuit board, a lower-arm switching element drive signal input from the higher-order logic control unit to the drive circuit board, an upper arm switching element drive signal, An exclusive OR circuit that determines whether the relationship between the lower arm switching element driving signal and the upper arm switching element driving signal is a complementary signal based on the exclusive OR of Output of exclusive OR circuit and signal for driving lower arm switching element or upper arm switching element The logical product, and to control to turn on each of the lower arm switching element or the upper arm switching element.

(7) In the above power conversion device, there are a plurality of pairs of the lower arm switching element and the upper arm switching element, and for each pair, a drive circuit board for controlling on / off of each arm switching element and the drive circuit An interface board is provided between the upper logic control unit that transmits the drive control signal to the board, and a plurality of drive control signals for controlling the lower arm switching element and the upper arm switching element of each pair from the upper logic unit are parallel signals. Each pair of switching elements is controlled by an interface board having serial / parallel conversion means for converting serial signals to parallel signals. Divided into drive control signals, It was set to be transmitted to the substrate.

  According to the signal transmission circuit of the present invention, the complementary signal transmission path for transmitting the complementary signals of the positive logic and the negative logic through independent channels is provided, and whether the transmission side is normal on the reception side based on the exclusive OR of both. In addition, it is possible to reliably detect the presence of noise in the transmission line, and it is possible to reliably prevent malfunction caused by fluctuations in the reference potential during switching.

  In addition, according to the drive circuit of the present invention, when the above-described abnormality occurs in the signal transmission circuit up to the isolator IC, this can be reliably detected to prevent malfunction, and lower arm switching. It is possible to reliably prevent an abnormality in which the element driving signal and the upper arm switching element driving signal are simultaneously turned on.

It is a block diagram of the signal transmission circuit of Example 1 of this invention. It is an image figure of the operation | movement waveform of the signal transmission circuit of FIG. It is a block diagram of the signal transmission circuit of Example 2 of this invention. It is a conceptual diagram of the gate drive circuit of the simultaneous ON prevention function of Example 3 of the present invention. It is a block diagram of the signal transmission circuit which provided the insulation means of Example 4 of this invention in a pair. It is a block diagram of the conventional three-phase inverter drive circuit. It is a block diagram of the three-phase inverter drive circuit shown in Example 5 of this invention. It is a block diagram of the conventional power converter.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[Example 1]
FIG. 1 shows a signal transmission circuit according to a first embodiment of the present invention. The signal A is a transmission signal, and a complementary signal composed of a positive logic signal C and a negative logic signal D is generated by a complementary signal generation circuit 11 composed of inverting circuits 1 to 4. Reference numeral 20 denotes a transmission line, which is preferably twisted to make it less susceptible to common mode noise.
On the receiving side, the inverting circuits 5 and 6 receive positive logic and negative logic, respectively, and output inverted signals. Reference numeral 10 denotes a complementary signal determination circuit for determining whether or not the signal is a complementary signal, which can be constituted by, for example, an exclusive OR circuit.
That is, the complementary signal determination circuit 10 inputs a positive logic output and a negative logic output via the inverting circuits 5 and 6 and determines whether or not these are complementary signals. If it is a phase signal, “Lo” is output. This signal can be used as a safety signal for determining whether the transmission side is operating normally or whether there is a defect in the transmission path or the reception circuit.

By the way, there is a period in which the positive logic and the negative logic output the same signal at the transition of the transmission signal.
If an LPF (low-pass filter) having a desired time constant for masking such a slight glitch at the time of transition is provided in the output stage, the glitch at the time of signal transition can be masked. Thus, by taking the logical product of the positive logic output and the complementary signal determination circuit output, the signal transmitted normally can be reproduced and the reliability can be ensured.
If the transmission side is disabled or the transmission line is abnormal, the complementary signal determination circuit outputs “Lo” level, and it can be determined that the signal transmission is not normal. In this case, control is performed so that the controlled object operates in a fail-safe manner.

In FIG. 2, signal changes (from Hi to Lo or from Lo to Hi) in Example 1 from point A to G in the signal transmission circuit of FIG. 1 are shown in time series.
For example, a signal as shown in FIG. 2A is input to the point A as a control signal for controlling a power converter such as an inverter. A signal obtained by inverting A by the inverting circuit 1 is input to the point B. Is entered. Similarly, the point C is inverted again by the inversion circuit 3, and eventually a signal having the same phase as the point A is output.

On the other hand, a signal having a phase inverted with respect to the point A is output to the point D through the inverting circuits 1, 2, and 4. The signals at points C and D are input to the inverting circuits 5 and 6 through the twisted transmission line 20 respectively.
Here, when there is no abnormality in the transmission line 20, for example, the output of the complementary signal determination circuit 10 that outputs the exclusive OR of the inverting circuits 5 and 6, as shown in FIG. Although the signal at point D becomes Lo only at the moment when it becomes Hi or Lo at the same time, this momentary Lo is excluded by the LPF, so the logical product with the signal at point F via the inverting circuits 5 and 7 Is output from the AND circuit 8. The output from the AND circuit 8 eventually has the same phase as the signal at point A, and is used as a control signal for the power conversion device or the like.

However, for example, noise is taken in any part of the transmission line 20, Hi is output for a predetermined period or longer during a period in which Lo should be continued, and the outputs at points C and D that should be in the inverted phase are: Both become Hi for a predetermined period or more, and the exclusive OR output from the complementary signal determination circuit 10 becomes Lo for a predetermined period or more.
In addition, when an abnormality occurs on the transmission side or when any one of the twisted transmission lines 20 is disconnected, the Lo output is continued for a predetermined period or longer. Similarly, the exclusive OR output from the complementary signal determination circuit 10 becomes Lo for a predetermined period or longer.
When this happens, the output of the LPF at point E becomes Lo, the output of the AND circuit 8 becomes Lo, and the control signal of the power converter or the like becomes Lo, and is shut off.

[Example 2]
FIG. 3 shows a signal transmission circuit according to a second embodiment of the present invention. The signal A is a transmission signal, and the differential signal output circuit 31 outputs the differential signal to the differential signal transmission line 20d. On the receiving side, a differential receiving circuit 32a and 32b having an input offset is provided in pairs so as to operate only when there is an input potential difference of a predetermined level or higher.
The pair of differential receiving circuits 32a outputs positive logic, 32b outputs negative logic, and each input terminal is connected to one transmission line of the differential signal transmission line 20d and the other transmission circuit, + input terminal, -The input terminals are reversed and connected by so-called hooking.

Reference numeral 10 denotes a complementary signal determination circuit for determining whether the output of the pair of differential reception circuits 32a and 32b is a complementary signal. As in the first embodiment, the transmission side is operating normally, It can be used as a safety signal for judging whether or not the receiving circuit has a problem.
In this embodiment as well, there is a period in which the positive logic and the negative logic output the same signal at the transition of the transmission signal. Therefore, if a low pass filter (LPF) having a desired time constant for masking such a slight glitch at the time of transition is provided in the output stage, the glitch at the time of signal transition can be masked. Thus, by taking the logical product of the positive logic output and the complementary signal determination circuit output, the signal transmitted normally can be reproduced and the reliability can be ensured.

[Example 3]
FIG. 4 shows a signal transmission circuit according to a third embodiment of the present invention. This embodiment relates to the function of preventing the upper and lower arms from being turned on simultaneously on the drive substrate side using the exclusive OR of the upper and lower arm drive control signals. A_U is an upper arm drive command signal, A_L is a lower arm drive command signal, and 51 a and 51 b are drive circuits for transmitting signals to the drive circuit unit via the transmission line 20.
The exclusive OR circuit 50 determines whether or not the drive command signals for the upper and lower arms are complementary signals on the drive substrate side.

This exclusive OR circuit 50 outputs a “Lo” level when the drive command is switched, but an AND circuit that expands the width of the “Lo” pulse so that a desired dead time is reached by a pulse stretch circuit 54 in the subsequent stage. 53a and 53b take the logical product with the drive command signal of each arm to generate the drive control signals G_U and G_L of each arm.
According to the present embodiment, even if the dead time at the time of switching between upper and lower arm driving is shortened due to noise or the like during signal transmission, it becomes possible to ensure a dead time longer than a desired time on the drive circuit board side.

[Example 4]
FIG. 5 shows an insulated signal transmission circuit according to a fourth embodiment of the present invention. This embodiment is based on the first embodiment, and only differences will be described.
The complementary signal generation circuit 11 is provided with AND circuits 41 and 42 at its output stage, and controls the output by an enable signal (EN), and controls both to “Lo” when disabled.
In place of the transmission line 20 of this embodiment, digital isolators 61 and 62 which are digital signal insulating means are provided for insulation. The complementary signal determination circuit 10 determines whether or not the received complementary signal is normal. If it is abnormal, the AND circuit 8 controls the output G to “Lo”.
According to the present invention, it is possible to prevent erroneous ON (which is erroneously controlled to ON) due to a malfunction due to common mode noise in the digital isolator section.

[Example 5]
FIG. 6 shows a gate drive topology of a conventional three-phase inverter. The upper logical control unit 70 and the drive command signals for the upper and lower arms of the three phases (U, V, W) are connected to the gate drivers (71a to 71f) of each arm through the transmission path 20 using optical fibers. FIG. 7 shows the topology of the gate drive of the three-phase inverter of the present invention. An interface board 75 is provided between the upper logic control unit 76 and the gate drivers (72a to 72f) of each arm. The drive command signal for each arm from the upper logic control unit 76 is converted into a serial signal by the parallel / serial conversion circuit 73 and transmitted to the serial / parallel conversion circuit 74 of the interface board 75 via the transmission line 22. The drive command signal of each arm converted into the parallel signal by the serial / parallel conversion circuit 74 is transmitted from the interface board 75 to the gate driver (72a to 72f) of each arm via the insulated transmission path 23.
The signal transmission reliability can be improved by using the signal transmission circuit shown in the first embodiment for the transmission line 22 of the present embodiment. Further, the reliability of signal transmission can be improved by using the insulated transmission means shown in the fourth embodiment for the insulated transmission path.

  As described above, according to the present invention, a complementary signal transmission path for transmitting positive and negative complementary signals through independent channels is provided, and the transmission side is normal on the reception side based on the exclusive OR of both. For example, if an isolator IC or the like is used, it is possible to reliably detect the presence of noise in the transmission line or the like in various fields such as a power converter without causing a significant cost increase. Therefore, it can be expected to be widely used as a means of drastically increasing the reliability of signal transmission.

1 to 7: Inversion circuit (NOT circuit)
8, 41, 42: logical product circuit 10: exclusive OR circuit 31: differential drive circuit 32: differential reception circuit 61 with offset, 62: isolator 70, 76: upper logical control unit 71, 72: driver 75: Interface circuits 73 and 74: serial / parallel conversion circuits.

Claims (7)

A complementary signal driving circuit that outputs complementary signals of positive logic and negative logic based on the transmission signal;
A complementary signal transmission path for transmitting the complementary signals through independent channels;
A complementary signal determination circuit that receives the signal of the complementary signal transmission path and determines whether or not both are complementary signals based on the exclusive OR of the two;
A signal transmission circuit comprising: a logical product of an output signal of the complementary signal determination circuit and the transmission signal as a reception signal. The signal transmission circuit according to claim 1,
An AND circuit that outputs a logical product of both the complementary signal and the enable signal is provided in the preceding stage of the complementary signal drive circuit, and when disabled, both complementary signal drive circuits output the same level signal. A characteristic signal transmission circuit. A differential signal output circuit for outputting a differential signal to the differential signal transmission line based on the transmission signal;
A differential signal from the differential signal transmission line is input with the polarity reversed, and a pair of comparison circuits that operate when the input potential difference is greater than or equal to a predetermined value,
An exclusive OR circuit that outputs an exclusive OR of the output signals of the pair of comparison circuits;
A signal transmission circuit using a logical product of one of the pair of comparison circuits and the output of the exclusive OR circuit as a reception signal.   A low-pass filter having a time constant for masking glitch is provided after the exclusive OR circuit, and a logical product of the output signal of the low-pass filter and one of the pair of comparison circuits is received signal. The signal transmission circuit according to claim 1, wherein: In the drive circuit in which the input side of the drive control signal and the output side of the drive control signal are insulated by the isolator IC,
4. A drive circuit using the signal transmission circuit according to claim 1 as a signal transmission circuit until a drive control signal reaches the isolator IC as the transmission signal. A lower arm switching element and an upper arm switching element connected in series between main power supply terminals, a drive circuit board for controlling on / off of each of the lower arm switching element and the upper arm switching element, and the drive circuit board In a power converter having a higher-order logic control unit that transmits a drive control signal,
Based on the exclusive OR of the lower arm switching element driving signal and the upper arm switching element driving signal input to the driving circuit board from the upper logic control unit, the lower arm switching element driving signal and the upper arm switching element driving signal An exclusive OR circuit that determines whether the relationship between the arm switching element driving signal and the arm switching element driving signal is a complementary signal; the output of the exclusive OR circuit and the lower arm switching element driving signal or upper arm switching Each of the lower arm switching element or the upper arm switching element is controlled to be turned on by a logical product with the element. The power conversion device according to claim 6, wherein
There are a plurality of pairs of the lower arm switching element and the upper arm switching element, and for each pair, a driving circuit board that controls on / off of each arm switching element and a higher-level logic control that transmits a driving control signal to the driving circuit board Parallel / serial conversion means for converting a plurality of drive control signals for controlling the lower arm switching element and the upper arm switching element of each pair from the higher-order logic unit from a parallel signal to a serial signal by providing an interface board between them The drive board is divided into drive control signals for controlling each pair of switching elements by an interface board having serial / parallel conversion means for converting from serial signals to parallel signals. Power transmission characterized by Apparatus.

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