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- JP2012065310A5 JP2012065310A5 JP2011167881A JP2011167881A JP2012065310A5 JP 2012065310 A5 JP2012065310 A5 JP 2012065310A5 JP 2011167881 A JP2011167881 A JP 2011167881A JP 2011167881 A JP2011167881 A JP 2011167881A JP 2012065310 A5 JP2012065310 A5 JP 2012065310A5
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また図1において、6は読出垂直転送駆動部(V−TG)で、9はEM−CCDで18はIT−CCD等のCCD撮像素子で、9と18は光学系2から入射した光を電気信号に変換する。12はAFE(Analog Front End)であり、EM−CCDまたはCCD撮像素子から出力された信号から雑音を除去するCDSと、暗電流補正と信号の利得を調整するAGCと、デジタル映像信号Viに変換するADCと、水平同期発生部(Timing-Generator:TG)からなる。但し、AGCやTGがAFEに含まれない構成を用いてもよい。さらに15はCMG駆動部で、16は冷却部で、17は冷却駆動部であり、19は水平転送駆動部(H−TG)で、20はリセット付CDSである。さらに、7は温度センサ、M9は暗電流画面メモリ、8はD/Aであり、温度センサ7の検出したCCDの温度に基づき、暗電流画面メモリM9から全画素の暗電流補正値を発生し、D/A8経由でリセット付CDS20において暗電流を補正する。画素加算時も、CCDの温度に基づき全画素の暗電流をリセット付CDS20で暗電流を補正してから画素加算する。
また図1において、5は奇数画素加算色分離部と多画素輪郭補正部とを含む映像信号処理部であり、AFE12から出力された信号に種々の映像処理を施し、NTSC(National-Television-System-Committee)方式またはPAL(Phase-Alternating-by-Line)方式の複合映像信号(Video-Burst-Sync以下VBS)またはSDI(Serial-Digital-Interface)映像信号、あるいはHDTVのSDI(HD−SDI)等の所定方式の映像信号に変換して出力する。なお、リセット付CDS20で暗電流を補正しない場合は、映像信号処理部5で、温度センサ7の検出したCCDの温度に基づき、全画素の暗電流補正値を発生し、AFE12内のAGC分を補正した後、画素加算分暗電流補正値を加算してから映像信号を補正することにより、全画素の暗電流を補正してから画素加算することと等価の補正を行う。
In Figure 1, the read vertical transfer driving unit 6 (V-TG), 9 is a CCD image sensor 18 such as IT-CCD with EM-CCD, 9 and 1 8 of the light incident from the optical system 2 Convert to electrical signal. 12 is a AFE (Analog Front End), the conversion and the CDS for removing noise from a signal output from the EM-CCD or CCD image sensor, an AGC for adjusting the gain of the dark current correction signal, the digital video signal Vi and ADC to a horizontal synchronizing generator (Timing-generator: TG) Ru Tona. However, a configuration in which AGC and TG are not included in the AFE may be used. Further, 15 is a CMG drive unit , 16 is a cooling unit , 17 is a cooling drive unit, 19 is a horizontal transfer drive unit (H-TG), and 20 is a CDS with reset. Further, 7 is a temperature sensor, M9 is a dark current screen memory, and 8 is a D / A. Based on the CCD temperature detected by the temperature sensor 7, a dark current correction value for all pixels is generated from the dark current screen memory M9. The dark current is corrected in the reset CDS 20 via the D / A 8. Also at the time of pixel addition, the dark current of all the pixels is corrected by the CDS 20 with reset based on the temperature of the CCD, and then the pixels are added.
In FIG. 1, 5 is a video signal processing unit including an odd pixel addition color separation unit and the multi-pixel contour correcting unit, performs various image processing on the signal output from the AFE 12, NTSC (National-Television- System-Committee) or PAL (Phase-Alternating-by-Line) composite video signal (Video-Burst-Sync) (VBS) or SDI (Serial-Digital-Interface) video signal, or HDTV SDI (HD-SDI) ) outputs the converted video signal of a predetermined method such as. When the dark current is not corrected by the reset CDS 20, the video signal processing unit 5 generates a dark current correction value for all the pixels based on the CCD temperature detected by the temperature sensor 7, and calculates the AGC amount in the AFE 12. After the correction, a correction equivalent to adding the pixels after correcting the dark current of all the pixels is performed by correcting the video signal after adding the dark current correction value corresponding to the pixel addition.
本例の映像信号処理部の奇数画素加算対応の色分離部を示すブロック図の図2Aと、本例の水平3画素加算動作を示す模式図の図3Aとにおいて、Nとmとを0以上の整数とすると、垂直加算されるm−3とm−2の走査線では水平位置がN+1,N+2,N+3の画素の信号電荷を水平3画素加算し、垂直加算されるm−1とmの走査線ではN+2,N+3,N+4の画素の信号電荷を水平3画素加算し、垂直加算されるm+1とm+2の走査線ではN+3,N+4,N+5の画素の信号電荷を水平3画素加算する。
H−TGを非加算の通常水平転送駆動の一つにして、高速論理ICでリセットパルスを間引いて水平3画素の信号電荷を加算しても良い。
In FIG. 2A of the block diagram showing the color separation unit corresponding to the odd pixel addition of the video signal processing unit of this example , and in FIG. 3A of the schematic diagram showing the horizontal three pixel addition operation of this example , N and m are 0 or more. integers and then, N +1 is the horizontal position in the scan line of the m-3 and m-2 to be vertically added, N +2, the signal charges of the pixels of the N +3 horizontally three-pixel addition, m-1 to be vertically added and N +2 in scanning lines m, N +3, the signal charges of the pixels of the N +4 horizontally three-pixel addition, m + 1 and m + a second scan line N +3 is vertical addition, N +4, the signal charges of the pixels of the N +5 Are added by three horizontal pixels.
H-TG may be one of non-addition normal horizontal transfer drives, and signal charges of three horizontal pixels may be added by thinning out reset pulses with a high-speed logic IC.
図2Bは、本発明の1実施例の多画素輪郭補正部26のブロック図である。27は映像レベル判定器、28は画素遅延22ヶ部、51〜58は加算器、59は小振幅大振幅の圧縮制限器、60は正負と増幅度を可変する掛け算器、29と30は輪郭信号生成部、M1〜M6はラインメモリ部、N0〜N6は負の掛け算器、P3は正の掛け算器である。
補正前信号は、ラインメモリ部M1〜M7で走査線(H)期間遅延し0Hから6Hの合計7Hの信号となる。3H信号は、さらに画素遅延22ヶ部28で画素時間つまりCCDクロック時間遅延し合計23組の遅延信号となる。合計7Hの信号と合計23組の遅延信号はそれぞれ、輪郭信号生成部29と30に入り、垂直輪郭信号と水平輪郭信号とになり、加算器57で加算され、小振幅大振幅圧縮制限部59で小振幅と大振幅が圧縮制限され、3H11画素遅延信号を入力した映像レベル判定部27の制御を受ける正負掛算器60で輪郭補正信号となり、3H11画素遅延信号に加算されて、補正後信号となる。水平3画素加算なら画素遅延22ヶ部28の画素遅延は10ヶ以上で良く、5画素加算なら最低16以上で良く、7画素加算なら22ヶ以上で良い。3H11画素遅延信号は、遅延の中央の信号を選択すれば良い。
2B is Ru Oh block diagram of a multi-pixel edge corrector 26 of an embodiment of the present invention. 27 video level determiner, 28-pixel delay 22 months unit, 51 to 58 adders, 59 is small amplitude large amplitude compression limiter, 60 multiplier for varying the polarity and the amplification degree, 29 and 30 outline Signal generators M1 to M6 are line memory units, N0 to N6 are negative multipliers, and P3 is a positive multiplier.
Before correction signal comprises a line memory unit M1~M7 scanning line (H) and time delay 0H and signal total 7H of 6H. 3H signals will be more pixel time pixel delay 22 months 28 That CCD clock time delay and a total of 23 sets of delayed signal. A total of 7H signals and a total of 23 sets of delayed signals enter the contour signal generation units 29 and 30 , respectively , to become a vertical contour signal and a horizontal contour signal, which are added by the adder 57, and the small amplitude large amplitude compression limiting unit 5 9, the small amplitude and the large amplitude are compression-limited, and a contour correction signal is generated by the positive / negative multiplier 60 under the control of the video level determination unit 27 to which the 3H11 pixel delay signal is input. It becomes. Pixel delay in the horizontal three-pixel addition of al picture element delay 22 months 28 may at 10 months or more, well 5 pixel addition of al minimum 16 or more, or 7 or pixel addition of et 2 2 months or more. As the 3H11 pixel delay signal, a signal at the center of the delay may be selected.
その結果、本例の多画素輪郭補正部26の動作図である図3Dの(a)低周波数から低い変調度の補正前信号のように低周波数から変調度が低下していても、(b)輪郭補正7画素成分、(c)輪郭補正5画素成分、或いは(d)輪郭補正3画素成分のような信号を合成することで、(e)本発明補正後信号のように、輪郭が補正できる。 As a result, even if the degree of modulation of low frequency such pre-correction signal a low modulation degree from Figure 3D of (a) low-frequency is an operational view of a multi-pixel edge corrector 26 of the present embodiment is reduced, (b ) contour correction 7 pixel components, (c) contour correction 5 pixel components, or (d) by combining signals such as contour correction 3 pixel components, (e) as in the present invention the corrected signal, contour correction it can.
Claims (7)
3以上の奇数の水平画素信号電荷を加算し、1または複数の走査線の単位で水平画素信号電荷加算の組み合わせを正の順番に変えていき、アナログーデジタル変換後に、画素信号の左右加算で疑似輝度信号を算出し、画素信号の正の順番方向の上下の斜め減算で疑似色差信号を算出し、
前記疑似輝度信号の高周波数成分を上下走査線の前記疑似輝度信号の高周波数成分で補間することと、
前記疑似輝度信号と前記疑似色差信号との演算により、輝度信号と色差信号とを算出し、前記輝度信号の高周波数成分を上下走査線の前記輝度信号の高周波数成分で補間することと、の少なくとも一方を行うことを特徴とする撮像方法。 In an imaging method using one solid-state imaging device having an on-chip color filter and alternately arranging a first scanning line composed of a cyan pixel and a yellow pixel and a second scanning line composed of a magenta pixel and a green pixel ,
Add odd number of horizontal pixel signal charges of 3 or more, change the combination of horizontal pixel signal charges in the order of one or more scanning lines in the positive order, and add the left and right pixel signals after analog-digital conversion Calculate the pseudo luminance signal, calculate the pseudo color difference signal by diagonally subtracting up and down in the positive order direction of the pixel signal,
Interpolating the high frequency component of the pseudo luminance signal with the high frequency component of the pseudo luminance signal of the upper and lower scanning lines;
Calculating a luminance signal and a color difference signal by calculating the pseudo luminance signal and the pseudo color difference signal, and interpolating a high frequency component of the luminance signal with a high frequency component of the luminance signal of the upper and lower scanning lines; An imaging method characterized by performing at least one.
前記3以上の奇数の水平画素信号電荷の加算は、前記第1走査線と第2走査線についてまとめて行い、垂直2画素加算された画素信号を前記アナログーデジタル変換の対象とすることを特徴とする請求項1乃至5記載の撮像方法。The addition of the odd number of horizontal pixel signal charges of 3 or more is performed for the first scanning line and the second scanning line together, and a pixel signal obtained by adding two vertical pixels is the target of the analog-digital conversion. The imaging method according to claim 1.
上記IT−CCD撮像素子の信号電荷を入力され、クランプ機能、サンプルホールド(セット)機能及びリセット機能を有する相関二重サンプリングホールド手段(Correlated Double Sampling-hold:CDS)と、3以上の奇数の水平画素電荷信号を加算する手段と、アナログーデジタル変換する手段と、該デジタル変換した信号を水平周期遅延する手段と、該デジタル変換した信号を画素単位で遅延する手段と、該デジタル変換した信号を加算する手段と、該デジタル変換した信号を減算する手段とを有し、
上記CDSにおいて連続する3以上の奇数の水平画素信号電荷を加算し、
上記アナログーデジタル変換する手段におけるアナログーデジタル変換後に、前記水平周期遅延する手段と前記画素単位で遅延する手段と前記加算する手段と前記減算する手段とを用いて、該デジタル変換した画素信号の左右加算で疑似輝度信号を算出し、該デジタル変換した画素信号の順番方向と正負の斜め減算で疑似色差信号を算出することを特徴とするカラー固体撮像装置。 In a color solid-state imaging device having an on-chip color filter and using one IT-CCD imaging device in which scanning lines consisting of cyan and yellow pixels and scanning lines consisting of magenta and green pixels are alternately arranged ,
Correlated Double Sampling-hold (CDS) having a clamp function, a sample hold (set) function, and a reset function, and an odd horizontal number of 3 or more. Means for adding a pixel charge signal; means for analog-to-digital conversion; means for delaying the digitally converted signal in a horizontal period; means for delaying the digitally converted signal in units of pixels; and Means for adding, and means for subtracting the digitally converted signal;
Add three or more consecutive horizontal pixel signal charges of 3 or more consecutive in the CDS,
After you Keru analog-digital converter to means for converting said analog-to-digital, using said horizontal period delay to means and said means for means and said subtraction to said adder and means for delaying a pixel unit, and the digital conversion pixel A color solid-state imaging device characterized in that a pseudo luminance signal is calculated by left-right addition of signals, and a pseudo color difference signal is calculated by a diagonal subtraction of positive and negative with the order direction of the digitally converted pixel signals.
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