JP2012060049A - Electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component in which adverse effect of the mounting gap to a circuit board on the surrounding electronic components can be prevented while minimizing increase in stray capacitance occurring between a coil and an external electrode.SOLUTION: A laminate 12 is a rectangular parallelepiped and has a mounting surface (lower surface S2). A coil is built in the laminate 12 and has a coil axis extending along the lower surface S2. External electrodes 14a and 14b are connected, respectively, with both ends of the coil and provided side by side in the extending direction of the coil axis. The external electrodes 14a and 14b are provided, respectively, on the side surfaces S5 and S6 in the end faces S3 and S4 and the side surfaces S5 and S6 of the laminate 12 adjoining the lower surface S2 not intersecting the coil axis, and on the lower surface S2.

Description

  The present invention relates to an electronic component, and more particularly to an electronic component having a built-in coil.

  As a conventional electronic component, for example, a multilayer chip inductor described in Patent Document 1 is known. 4 and 5 are external perspective views of the multilayer chip inductors 500 and 600 described in Patent Document 1. FIG.

  As shown in FIG. 4, the multilayer chip inductor 500 includes a chip 502, a coil 504, and external terminal electrodes 506a and 506b. The chip 502 is configured by laminating a plurality of insulating material sheets, and has a rectangular parallelepiped shape. The coil 504 is formed so that its center line extends in the stacking direction of the chips 502. The external terminal electrodes 506a and 506b are connected to both ends of the coil 504, and are provided so as to cover a part of the end surfaces at both ends in the stacking direction and a part of the surface (side surface, mounting surface, etc.) adjacent to the end surfaces. .

  According to the multilayer chip inductor 500, mounting displacement hardly occurs in a reflow process when mounting on a circuit board. More specifically, when the multilayer chip inductor 500 is mounted on the circuit board, the external terminal electrodes 506a and 506b and the land of the circuit board are connected by solder. In the reflow process, the solder wets up to the portions (hereinafter referred to as side portions) formed on the side surfaces of the external terminal electrodes 506a and 506b due to surface tension. That is, a fillet is formed. Such a fillet presses the multilayer chip inductor 500 against the circuit board due to surface tension, and generates a force that pulls the multilayer chip inductor 500 in the normal direction of the side surface portion. Then, the forces acting on the two side surface portions of the external terminal electrode 506a are balanced, and the forces acting on the two side surface portions of the external terminal electrode 506b are balanced, so that the multilayer chip inductor 500 is not mounted on the land of the circuit board. It is implemented without generating.

  However, the multilayer chip inductor 500 has a problem that a large stray capacitance is generated between the coil 504 and the external terminal electrodes 506a and 506b. In the multilayer chip inductor 500, the external terminal electrodes 506a and 506b are provided on the end face of the chip 502 and a part of the surface adjacent to the end face. Therefore, the area where the coil 504 and the external terminal electrodes 506a and 506b face each other is relatively large. Therefore, a relatively large stray capacitance is generated between the coil 504 and the external terminal electrodes 506a and 506b.

  As a multilayer chip inductor that can solve such a problem, for example, a multilayer chip inductor 600 shown in FIG. 5 is known. In the multilayer chip inductor 600, the external terminal electrodes 606a and 606b are provided only on the mounting surface. Therefore, the area where the external terminal electrodes 606a and 606b face the coil 604 in the multilayer chip inductor 600 is smaller than the area where the external terminal electrodes 506a and 506b face the coil 504 in the multilayer chip inductor 500. As a result, in the multilayer chip inductor 600, stray capacitance generated between the external terminal electrodes 606a and 606b and the coil 604 is reduced.

  However, the multilayer chip inductor 600 has a problem that mounting displacement is likely to occur when mounted on a circuit board because the external terminal electrodes 606a and 606b do not have side portions. When mounting deviation occurs, the direction of the magnetic flux generated by the multilayer chip inductor 600 on the circuit board changes, so that the influence of the magnetic flux on the electronic components arranged around the multilayer chip inductor 600 changes. As a result, the characteristics of the electronic components arranged around the multilayer chip inductor 600 may vary.

Japanese Patent Laid-Open No. 11-317308 (FIGS. 1 and 3)

  SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic component that can suppress an adverse effect on surrounding electronic components due to mounting displacement on a circuit board while suppressing an increase in stray capacitance generated between a coil and an external electrode. It is.

  An electronic component according to an aspect of the present invention has a rectangular parallelepiped shape, a main body having a mounting surface, and a coil shaft that is built in the main body and extends along the mounting surface. A coil, and a first external electrode and a second external electrode that are electrically connected to each of both ends of the coil and are arranged in a direction in which the coil axis extends. The first external electrode and the second external electrode are each of two surfaces of the four surfaces of the main body adjacent to the mounting surface that do not intersect the coil axis, and the mounting surface It is characterized by being provided in.

  ADVANTAGE OF THE INVENTION According to this invention, the bad influence to the surrounding electronic component by the mounting shift | offset | difference to a circuit board can be suppressed, suppressing the increase in the stray capacitance which generate | occur | produces between a coil and an external electrode.

1 is an external perspective view of an electronic component according to an embodiment of the present invention. It is an exploded view of the laminated body of the electronic component of FIG. FIG. 3A is a diagram illustrating a state in which the multilayer chip inductor is mounted on the circuit board in a state where mounting displacement has occurred. FIG. 3B is a diagram showing a state in which the electronic component is mounted on the circuit board in a state where mounting displacement has occurred. 1 is an external perspective view of a multilayer chip inductor described in Patent Document 1. FIG. 1 is an external perspective view of a multilayer chip inductor described in Patent Document 1. FIG.

(Configuration of electronic parts)
A configuration of an electronic component according to an embodiment of the present invention will be described. FIG. 1 is an external perspective view of an electronic component 10 according to an embodiment of the present invention. FIG. 2 is an exploded view of the laminate 12 of the electronic component 10 of FIG.

  Hereinafter, the stacking direction of the electronic component 10 is defined as the y-axis direction, and the directions along the two sides of the negative-side surface of the electronic component 10 are defined as the x-axis direction and the z-axis direction. The x-axis direction, the y-axis direction, and the z-axis direction are orthogonal to each other.

  As shown in FIGS. 1 and 2, the electronic component 10 includes a multilayer body 12, external electrodes 14 (14 a and 14 b), connection portions 19 and 21, and a coil L (see FIG. 2).

  The laminate 12 has a rectangular parallelepiped shape, and has a mounting surface that faces the circuit board when the electronic component 10 is mounted on the circuit board. Hereinafter, the surface on the positive direction side in the z-axis direction of the stacked body 12 is referred to as an upper surface S1, and the surface on the negative direction side in the z-axis direction of the stacked body 12 is referred to as a lower surface S2. The lower surface S2 is the mounting surface. Further, the four surfaces adjacent to the lower surface S2 of the laminate 12 are referred to as end surfaces S3 and S4 and side surfaces S5 and S6. The end surface S3 is located on the positive side in the y-axis direction, the end surface S4 is located on the negative direction side in the y-axis direction, the side surface S5 is located on the positive direction side in the x-axis direction, and the side surface S6 is negative in the x-axis direction. Located on the direction side.

  As illustrated in FIG. 2, the stacked body 12 is configured by stacking the insulator layers 16 (16 a to 16 j) in this order from the negative direction side in the y-axis direction to the positive direction side. Therefore, the lower surface S2 that is the mounting surface is configured by a continuous outer edge (side on the negative side in the z-axis direction) of the insulating layer 16. The insulator layer 16 is a rectangular layer made of a magnetic material. The magnetic material means a material that functions as a magnetic material in a temperature range of −55 ° C. or higher and + 125 ° C. or lower. Hereinafter, the surface on the negative direction side in the y-axis direction of the insulator layer 16 is referred to as a front surface, and the surface on the positive direction side in the y-axis direction of the insulator layer 16 is referred to as a back surface.

  The coil L is built in the multilayer body 12 and includes coil conductors 18 (18a to 18d) and via-hole conductors v3 to v5 as shown in FIG. The coil L is configured to have a spiral shape by connecting the coil conductors 18a to 18d and the via-hole conductors v3 to v5, and has a coil axis extending along the lower surface S2. In the electronic component 10, the coil axis extends in the y-axis direction.

  As shown in FIG. 2, the coil conductors 18 a to 18 d are provided on the surfaces of the insulator layers 16 d to 16 g, and are U-shaped that rotate clockwise when viewed from the negative side in the y-axis direction. This is a linear conductor layer of a mold. That is, the coil conductors 18a to 18d have a number of turns of 3/4, and are along the three sides of the insulator layers 16d to 16g. The number of turns of the coil conductor 18 is not limited to 3/4 turns. Therefore, the number of turns of the coil conductor 18 may be, for example, 1/2 turn or 7/8 turn.

  In the following, when the coil conductor 18 is viewed in plan from the negative side in the y-axis direction, the clockwise upstream end is defined as the upstream end, and the clockwise downstream end is defined as the downstream end.

  As shown in FIG. 2, the via-hole conductors v <b> 3 to v <b> 5 are provided so as to penetrate the insulating layers 16 d to 16 f in the y-axis direction. The via-hole conductor v3 penetrates the insulator layer 16d in the y-axis direction and is connected to the downstream end of the coil conductor 18a and the upstream end of the coil conductor 18b. The via-hole conductor v4 penetrates the insulator layer 16e in the y-axis direction, and is connected to the downstream end of the coil conductor 18b and the upstream end of the coil conductor 18c. The via-hole conductor v5 penetrates the insulator layer 16f in the y-axis direction, and is connected to the downstream end of the coil conductor 18c and the upstream end of the coil conductor 18d.

  As shown in FIG. 2, the coil L configured as described above has a structure that advances from the negative direction side to the positive direction side in the y-axis direction while turning clockwise.

  The external electrodes 14a and 14b are electrically connected to both ends of the coil L, respectively, and are provided on part of the lower surface S2 and the side surfaces S5 and S6 of the multilayer body 12. The side surfaces S5 and S6 are surfaces that do not intersect the coil axis among the four surfaces of the main body 12 adjacent to the lower surface S2. The external electrodes 14a and 14b are arranged in the direction in which the coil axis extends (that is, the y-axis direction).

  As shown in FIG. 2, the connection part 19 includes connection conductors 20 (20a, 20b) and via-hole conductors v1, v2, and connects the end of the coil on the negative side in the y-axis direction to the external electrode 14a. is doing. The connecting conductors 20a and 20b are provided on the surfaces of the insulator layers 16b and 16c, respectively, and are strip-shaped conductors provided along the negative side of the insulator layers 16b and 16c in the z-axis direction. is there. The end portions on the negative direction side in the x-axis direction and the end portions on the positive direction side in the x-axis direction of the connection conductors 20a and 20b are respectively the sides on the negative direction side in the x-axis direction and the x-axis direction of the insulator layers 16b and 16c. Is in contact with the positive side. Thereby, the connection conductors 20a and 20b are exposed from between the insulator layers 16 on the lower surface S2 and the side surfaces S5 and S6 of the multilayer body 12. Thereby, the connection conductors 20a and 20b are in contact with the external electrode 14a.

  The via-hole conductors v1 and v2 are provided so as to penetrate the insulating layers 16b and 16c in the y-axis direction, respectively. The via-hole conductor v1 connects the connection conductor 20a and the connection conductor 20b. The via-hole conductor v2 connects the connection conductor 20b and the upstream end of the coil conductor 18a.

  As shown in FIG. 2, the connecting portion 21 includes connecting conductors 22 (22a, 22b) and via-hole conductors v6, v7, and connects the end of the coil on the positive side in the y-axis direction to the external electrode 14b. is doing. The connection conductors 22a and 22b are provided on the surfaces of the insulator layers 16h and 16i, respectively, and are strip-shaped conductors provided along the negative side of the insulator layers 16h and 16i in the z-axis direction. is there. The end portions on the negative direction side in the x-axis direction and the end portions on the positive direction side in the x-axis direction of the connection conductors 22a and 22b are respectively the sides on the negative direction side in the x-axis direction and the x-axis direction of the insulator layers 16h and 16i. Is in contact with the positive side. Thereby, the connection conductors 22a and 22b are exposed from between the insulator layers 16 on the lower surface S2 and the side surfaces S5 and S6 of the multilayer body 12. Thereby, the connection conductors 22a and 22b are in contact with the external electrode 14b.

  The via-hole conductors v6 and v7 are provided so as to penetrate the insulating layers 16g and 16h in the y-axis direction, respectively. The via-hole conductor v6 connects the downstream end of the coil conductor 18d and the connection conductor 22a. The via-hole conductor v7 connects the connection conductor 22a and the connection conductor 22b.

(Method for manufacturing electronic parts)
Below, the manufacturing method of the electronic component 10 is demonstrated, referring drawings.

First, a ceramic green sheet to be the insulator layer 16 is prepared. Specifically, ferric oxide (Fe ₂ O ₃ ), zinc oxide (ZnO), nickel oxide (NiO), and copper oxide (CuO) were weighed at a predetermined ratio, and each material was put into a ball mill as a raw material. Wet preparation. The obtained mixture is dried and pulverized, and the obtained powder is calcined at 800 ° C. for 1 hour. The obtained calcined powder is wet pulverized by a ball mill, dried and then crushed to obtain a ferrite ceramic powder.

  To this ferrite ceramic powder, a binder (vinyl acetate, water-soluble acrylic, etc.), a plasticizer, a wetting material and a dispersing agent are added and mixed with a ball mill, and then defoamed under reduced pressure. The obtained ceramic slurry is formed into a sheet on a carrier sheet by a doctor blade method and dried to produce a ceramic green sheet.

  Next, via-hole conductors v1 to v7 are formed in the ceramic green sheets to be the insulator layers 16b to 16h, respectively. Specifically, a via hole is formed by irradiating a ceramic green sheet with a laser beam. Further, the via hole conductors v1 to v7 are formed by filling the via hole with a paste made of a conductive material such as Ag, Pd, Cu, Au or an alloy thereof by a method such as printing.

  Next, by applying a paste made of a conductive material on the ceramic green sheets to be the insulator layers 16b to 16i by a method such as a screen printing method or a photolithography method, the coil conductors 18 (18a to 18d) and Connection conductors 20 (20a, 20b) and 22 (22a, 22b) are formed. The paste made of a conductive material is obtained by adding varnish and a solvent to Ag, for example.

  In addition, the process which forms the coil conductor 18 (18a-18d) and the connection conductor 20 (20a, 20b), 22 (22a, 22b) and the paste which consists of an electroconductive material (Ag or Ag-Pt) are filled with respect to a via hole. You may perform the process to perform in the same process.

  Next, ceramic green sheets to be the insulator layers 16a to 16j are stacked and pressure-bonded so as to be arranged in this order from the negative direction side in the y-axis direction to the positive direction side to obtain an unfired mother stacked body. Specifically, ceramic green sheets are laminated and temporarily pressed one by one. Then, this press-bonding is performed on the unfired mother laminate by an isostatic press. The conditions of the hydrostatic press are a pressure of 100 MPa and a temperature of 45 ° C.

  Next, the unfired mother laminate is cut to obtain individual unfired laminates 12. Furthermore, the surface of the laminated body 12 is subjected to barrel polishing to chamfer. Thereafter, the unfired laminate 12 is subjected to binder removal processing and firing. The binder removal treatment is performed, for example, in a low oxygen atmosphere at about 500 ° C. for 2 hours. Firing is performed, for example, at 870 ° C. to 900 ° C. for 2.5 hours.

  Next, the external electrodes 14 (14a, 14b) are formed by a plating method. In the present embodiment, the external electrode 14 (14a, 14b) is formed by two steps of a strike plating method and a thick plating method.

  The strike plating method is to perform plating for a short time for the purpose of improving the adhesion of plating or improving the covering power. In the strike plating method, the laminate 12 is put into a barrel in which a conductive medium is placed. Then, the barrel is immersed in the plating solution and rotated only for a predetermined time. As a result, the conductive media comes into contact with the portions where the connection conductors 20 and 22 are exposed from the multilayer body 12, and power is supplied.

  In the thick plating method, the laminate 12 is put into a barrel in which a conductive medium is placed. Then, the barrel is immersed in the plating solution and rotated only for a predetermined time. As a result, the conductive media comes into contact with the portions where the connection conductors 20 and 22 are exposed from the multilayer body 12, and power is supplied.

  Here, the connection conductors 20 and 22 are exposed from the multilayer body 12 at portions of the lower surface S2 and the side surfaces S5 and S6, respectively. Therefore, the external electrode 14 is formed so as to cover the portion where the connection conductors 20 and 22 are exposed from the multilayer body 12. As a result, the external electrode 14 is formed across a part of the lower surface S2 and the side surfaces S5 and S6. The electronic component 10 is completed through the above steps.

(effect)
According to the electronic component 10 as described above, as described below, while suppressing an increase in stray capacitance generated between the coil L and the external electrode 14, surrounding electronic components due to mounting displacement on the circuit board are suppressed. The adverse effect on can be suppressed. FIG. 3A is a diagram illustrating a state in which the multilayer chip inductor 600 is mounted on the circuit board 100 in a state where mounting displacement has occurred. FIG. 3B is a diagram illustrating a state in which the electronic component 10 is mounted on the circuit board 100 in a state where mounting displacement has occurred. In FIGS. 3A and 3B, the dotted line is a diagram illustrating a state in which the multilayer chip inductor 600 and the electronic component 10 are mounted on the circuit board 100 without causing a mounting shift.

  In the multilayer chip inductor 600 of FIG. 5 described in Patent Document 1, external terminal electrodes 606 a and 606 b are provided only on the mounting surface of the chip 602. Therefore, in the reflow process, the multilayer chip inductor 600 may rotate around the normal direction of the circuit board 100 as shown in FIG. In this case, the magnetic flux φ1 generated by the multilayer chip inductor 600 also rotates together with the multilayer chip inductor 600. As a result, the magnetic flux φ1 generated by the multilayer chip inductor 600 that does not cause mounting deviation passes through the electronic components 102a and 102b, whereas the magnetic flux φ1 that is generated by the multilayer chip inductor 600 that causes mounting deviation is Then, the electronic components 102c and 102d pass. That is, the electronic component through which the magnetic flux φ1 passes changes due to mounting deviation. Here, when the circuit board 100 is designed, it is assumed that the magnetic flux φ1 passes through the electronic components 102a and 102b, and an electronic component having a small variation in characteristics due to the magnetic flux is often selected. On the other hand, since it is not assumed that the magnetic flux φ1 passes through the electronic components 102c and 102d, an electronic component whose characteristic variation due to the magnetic flux is small is not selected. Therefore, when mounting deviation occurs in the multilayer chip inductor 600, the magnetic flux φ1 passes through the electronic components 102c and 102d, and the characteristics of the electronic components 102c and 102d greatly vary.

  On the other hand, in the electronic component 10, external electrodes 14a and 14b are provided on a part of the lower surface S2 and the side surfaces S5 and S6 of the multilayer body 12. Therefore, the electronic component 10 is prevented from rotating around the normal direction of the circuit board 100. However, since the external electrodes 14a and 14b are not provided on the end faces S3 and S4, as shown in FIG. 3B, the electronic component 10 has a direction in which the coil axis extends (FIG. 3B ) In the left-right direction). However, both the magnetic flux φ2 generated by the electronic component 10 that does not cause mounting deviation and the magnetic flux φ2 generated by the electronic component 10 that causes mounting deviation pass through the electronic components 102a and 102b. That is, in the electronic component 10, the electronic component through which the magnetic flux φ2 passes does not change due to the mounting deviation. Therefore, in the electronic component 10, the characteristics of the electronic components 102c and 102d do not vary greatly. As described above, in the electronic component 10, adverse effects on the surrounding electronic components due to mounting displacement on the circuit board 100 can be suppressed.

  In the electronic component 10, the external electrodes 14a and 14b are provided on the lower surface S2 and the side surfaces S5 and S6 of the multilayer body 12. That is, the external electrodes 14a and 14b of the electronic component 10 are larger than the external terminal electrodes 606a and 606b of the multilayer chip inductor 600 by the area of the portions provided on the side surfaces S5 and S6 of the multilayer body 12. Therefore, the stray capacitance generated between the coil L and the external electrodes 14a and 14b in the electronic component 10 is larger than the stray capacitance generated between the coil 604 of the multilayer chip inductor 600 and the external terminal electrodes 606a and 606b. End up. However, as shown in FIG. 2, the external electrodes 14a and 14b are opposed to the side surfaces of the coil conductor 18 instead of the main surface of the coil conductor 18 at the side surfaces S5 and S6. Are facing each other. Therefore, the increase amount of the stray capacitance of the electronic component 10 with respect to the stray capacitance of the multilayer chip inductor 600 is slight. As described above, in the electronic component 10, even if the adverse effect on the surrounding electronic components due to the mounting deviation on the circuit board 100 is suppressed, an increase in stray capacitance generated between the coil L and the external electrode 14 can be suppressed.

  As described above, the present invention is useful for electronic components. In particular, while suppressing an increase in stray capacitance generated between the coil and the external electrode, the present invention can be applied to surrounding electronic components due to mounting displacement on the circuit board. It is excellent in that adverse effects can be suppressed.

L coil S1 upper surface S2 lower surface S3, S4 end surface S5, S6 side surface v1-v7 via-hole conductor 10 electronic component 12 laminated body 14a, 14b external electrode 16a-16j insulator layer 18a-18d coil conductor 19, 21 connecting portion 20a, 20b, 22a, 22b Connecting conductor

Claims (4)

A main body having a rectangular parallelepiped shape and a mounting surface;
A coil having a coil axis built in the main body and extending along the mounting surface;
A first external electrode and a second external electrode that are electrically connected to both ends of the coil and are arranged in a direction in which the coil axis extends;
With
The first external electrode and the second external electrode are respectively provided on two surfaces of the four surfaces of the main body adjacent to the mounting surface that do not intersect the coil axis and on the mounting surface. Being
Electronic parts characterized by The main body is configured by laminating a plurality of insulator layers,
The coil is spirally connected with a plurality of coil conductors provided on the insulator layer,
The mounting surface is a surface formed by connecting outer edges of the plurality of insulator layers;
The electronic component according to claim 1. A first connecting portion including a first connecting conductor provided on the insulator layer, the first connecting portion connecting one end of the coil and the first external electrode;
In addition,
The first connection conductor is in contact with the first external electrode by being exposed from the insulator layer on the mounting surface;
The electronic component according to claim 2. The first external electrode is formed by a plating method;
The electronic component according to claim 3.

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