JP2012028585A - Solid state image sensor and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce color unevenness on the periphery in a pixel region.SOLUTION: A solid state image sensor is manufactured which comprises: a pixel region 10 where multiple pixels are arranged two-dimensionally; and a peripheral region 50 arranged on the periphery of the pixel region 10 in which the pixel region 10 and the peripheral region 50 include a plurality of wiring layers 36-38 and an insulating film 35 is arranged on the uppermost layer 38 out of the wiring layers 36-38. The manufacturing method includes a first step of forming the insulating film 35 on the pixel region 10 and the peripheral region 50, a second step of lowering the height of a part of the insulating film 35 formed in the peripheral region 50 selectively, and a third step of planarizing the insulating film 35 by performing CMP polishing of the insulating film 35 entirely over the pixel region 10 and peripheral region 50.

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof.

  In a solid-state imaging device such as a CCD type or a CMOS type, a multilayer wiring technique is used, and a pixel region and a peripheral region (including a peripheral circuit) include a plurality of wiring layers. When the multilayer wiring technique is used, there arises a problem that a step occurs and a microlens or a color filter cannot be formed normally. For this reason, the insulating film provided on the wiring layer or on the uppermost wiring layer is flattened by CMP (Chemical Mechanical Polishing).

  In such a solid-state imaging device, a passivation film (protective film) made of a SiN film (silicon nitride film) having a refractive index higher than that of the refractive index is formed on the insulating film on the uppermost wiring layer. Yes. For this reason, the light reflected at the interface between the light receiving portion of the photoelectric conversion portion of the pixel and the insulating film on the light receiving portion is reflected again at the interface between the passivation film and the insulating film on the uppermost wiring layer, to the light receiving portion. Incident light interferes.

  By the way, when the insulating layer provided on the uppermost wiring layer is planarized by CMP, the polishing rate of CMP differs depending on the unevenness distribution state of the insulating layer before planarization. As a result, due to the difference in wiring density and the like, the polishing rate is relatively high in the pixel region, and the polishing rate is relatively low in the peripheral region. For this reason, even after planarization by CMP, the insulating film in the peripheral region and pixels close thereto (pixels disposed in the peripheral portion in the pixel region) is thicker than the insulating film in the pixel in the central portion of the pixel region. .

  Therefore, the degree of interference differs between the central portion and the peripheral portion in the pixel region. For this reason, color unevenness occurs in the peripheral portion in the pixel region, and the image quality is degraded.

  Therefore, in the solid-state imaging device disclosed in Patent Document 1 below, while accepting a difference between the thickness of the insulating film at the central portion in the pixel region and the thickness of the insulating film at the peripheral portion in the pixel region. By forming antireflection films on the upper and lower surfaces of the passivation film, the interference light is reduced to reduce the color unevenness.

JP 2007-242697 A

  However, in the conventional solid-state imaging device, the color unevenness cannot always be sufficiently reduced.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a solid-state imaging device and a method for manufacturing the same that can further reduce color unevenness in a peripheral portion in a pixel region.

  The following aspects are presented as means for solving the problems. The method for manufacturing a solid-state imaging device according to the first aspect is a method for manufacturing a solid-state imaging device having a pixel region in which a plurality of pixels are two-dimensionally arranged and a peripheral region arranged around the pixel region. A first step of forming a wiring layer in the pixel region and the peripheral region, a second step of forming an insulating film on the wiring layer formed in the first step, and the second step A third step of reducing the height of the portion formed in the peripheral region in the insulating film formed by the step, a fourth step of flattening the surface of the insulating film, and the fourth step. And a fifth step of forming a passivation film on the insulating film whose surface has been flattened.

  In the method of manufacturing a solid-state imaging device according to the second aspect, in the first aspect, the third step is a step of etching a portion formed in the peripheral region of the insulating film, and the fourth step The step is a step of planarizing the surface of the insulating film by polishing.

  In the method for manufacturing a solid-state imaging device according to the third aspect, in the first or second aspect, the first film is formed on the insulating film between the fourth process and the fifth process. The refractive index of the first film is lower than the refractive index of the passivation film and higher than the refractive index of the insulating film.

  According to a fourth aspect of the method for manufacturing a solid-state imaging device, in the third aspect, the first film has a refractive index gradient in which the refractive index decreases from the passivation film side to the insulating film side. It is what you have.

  A method for manufacturing a solid-state imaging device according to a fifth aspect includes the step of forming a second film on the passivation film formed by the fifth step in any of the first to fourth aspects. Forming a planarizing film on the second film, and the refractive index of the second film is lower than the refractive index of the passivation film and is higher than the refractive index of the predetermined film. It is expensive.

  In the method for manufacturing a solid-state imaging device according to a sixth aspect, in any one of the first to fifth aspects, each of the pixels has a photoelectric conversion unit disposed on a semiconductor substrate. Before, a step of forming an antireflection film on the semiconductor substrate so as to cover the photoelectric conversion part is provided.

  A solid-state imaging device according to a seventh aspect includes a pixel region in which a plurality of pixels having a photoelectric conversion unit disposed on a semiconductor substrate are two-dimensionally disposed, and a peripheral region disposed around the pixel region. A solid-state imaging device, formed on the wiring layer, an antireflection film formed on the semiconductor substrate so as to cover the photoelectric conversion unit, a wiring layer formed in the pixel region and the peripheral region, and An insulating film having a planarized surface, a passivation film formed on the insulating film, and formed between the insulating film and the passivation film, and having a lower refractive index than the passivation film and the insulating film And a first film having a refractive index higher than that of the first film.

  In the solid-state imaging device according to an eighth aspect, in the seventh aspect, the surface of the insulating film is flattened by etching and polishing.

  The solid-state imaging device according to a ninth aspect is the solid-state imaging device according to the eighth aspect, wherein the first film has a refractive index gradient in which a refractive index decreases from the passivation film side to the insulating film side. is there.

  A solid-state imaging device according to a tenth aspect is formed in any one of the seventh to ninth aspects, between a planarization film formed on the passivation film, and between the passivation film and the planarization film. And a second film having a refractive index lower than the refractive index of the passivation film and higher than the refractive index of the predetermined film.

  ADVANTAGE OF THE INVENTION According to this invention, the solid-state image sensor which can reduce the color nonuniformity in the peripheral part in a pixel area | region, and its manufacturing method can be provided.

It is a schematic block diagram which shows the solid-state image sensor by one embodiment of this invention. It is a circuit diagram which shows the pixel in FIG. It is a schematic sectional drawing which shows typically the pixel in FIG. It is a schematic sectional drawing which shows typically each process of the manufacturing method of the solid-state image sensor shown in FIG. 1 as a solid-state image sensor manufacturing method by one embodiment of this invention. FIG. 5 is a schematic cross-sectional view schematically showing a step that follows the step shown in FIG. 4. FIG. 6 is a schematic cross-sectional view schematically showing a step that follows the step shown in FIG. 5. FIG. 7 is a schematic cross-sectional view schematically showing a step that follows the step shown in FIG. 6. FIG. 8 is a schematic cross-sectional view schematically showing a step that follows the step shown in FIG. 7. FIG. 9 is a schematic cross-sectional view schematically showing a step that follows the step shown in FIG. 8. FIG. 10 is a schematic cross-sectional view schematically showing each step subsequent to the step shown in FIG. 9. It is a schematic sectional drawing which shows typically the main processes of the solid-state image sensor manufacturing method by a comparative example.

  Hereinafter, a solid-state imaging device and a manufacturing method thereof according to the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic configuration diagram showing a solid-state imaging device 1 according to an embodiment of the present invention. The solid-state image sensor 1 is configured as a CMOS solid-state image sensor. However, the present invention can also be applied to other solid-state imaging devices such as other amplification types and CCD types.

  As shown in FIG. 1, the solid-state imaging device 1 according to the present embodiment has a vertical scanning circuit 2, a horizontal scanning circuit 3, and a plurality of two-dimensionally arranged like a general CMOS type solid-state imaging device. Pixel 4, a readout circuit 5 including a known CDS circuit and the like, and an output amplifier 6. An electric signal output from a photodiode 15 (not shown in FIG. 1; see FIG. 2) of each pixel 4 is taken out by the vertical scanning circuit 2 to the reading circuit 5 in a row unit, and output by the horizontal scanning circuit 3 in a column unit. 6 is output to the output terminal 7 as an image signal. Thus, the vertical scanning circuit 2 and the horizontal scanning circuit 3 constitute a circuit for driving the pixel 4.

  A region where the pixels 4 are two-dimensionally arranged is a pixel region 10. In the solid-state imaging device 1, the vertical scanning circuit 2, the horizontal scanning circuit 3, the readout circuit 5, and the output amplifier 6 constitute a peripheral circuit. In the peripheral region 50 (not shown in FIG. 1; see FIG. 5B, which will be described later) disposed around the pixel region 10, the peripheral circuit is disposed. In the peripheral region 50, semiconductor elements such as CMOS transistors are arranged at a high density, and accordingly, the wiring density of the peripheral region 50 is higher than the wiring density of the pixel region 10. In order to prevent the peripheral circuit transistor from malfunctioning due to carriers excited by light incident on the peripheral circuit transistor and the like, a third-layer wiring layer 38 that also serves as a light-shielding film, which will be described later, is provided in a large part of the peripheral region 50. It is formed in the area. The peripheral region 50 may be disposed only on the two adjacent sides of the pixel region 10 (for example, the upper side and the left side), or may be disposed on the upper, lower, left, and right sides of the pixel region 10 as a center.

  FIG. 2 is a circuit diagram showing the pixel 4 in FIG. As shown in FIG. 2, each pixel 4 includes a selection transistor 11, a source follower amplification transistor 12, a reset transistor 13, a transfer transistor 14, and a photodiode 15 as a photoelectric conversion unit. In FIG. 2, Vcc is a power source.

  As shown in FIGS. 1 and 2, the gate of the selection transistor 11 of the pixel 4 is commonly connected to the selection line 20 for each row. The gate of the reset transistor 13 of the pixel 4 is commonly connected to the reset line 21 for each row. The gate of the transfer transistor 14 of the pixel 4 is commonly connected to the transfer line 22 for each row. The source of the selection transistor 11 of the pixel 4 is commonly connected to the vertical signal line 23 for each column. The selection line 20, the reset line 21 and the transfer line 22 are connected to the vertical scanning circuit 2. The vertical signal line 23 is connected to the readout circuit 5.

  FIG. 3 is a schematic cross-sectional view schematically showing one pixel 4 of the solid-state imaging device 1 shown in FIG. FIG. 3 schematically shows only the main part of the pixel 4 in a simplified manner.

In the solid-state imaging device 1 according to the present embodiment, as shown in FIG. 3, in each pixel 4, a photodiode 15 is provided on a silicon substrate 31 as a semiconductor substrate. On the silicon substrate 31, interlayer insulating films 32 to 35 made of, for example, a SiO ₂ layer (silicon oxide layer) are sequentially formed from the lower side (substrate 31 side). Further, as shown in FIG. 3, a first wiring layer 36, a second wiring layer 37, and a third wiring layer 38 are formed, and thereby the wiring of the circuit shown in FIGS. 1 and 2 is made. . As these wiring layers 36-38, metal layers, such as an aluminum layer, are used, for example. The uppermost wiring layer 38 also serves as a light shielding film that covers the area other than the light receiving area of each pixel 4. Although not shown in the drawing, the circuit shown in FIG. 2 of each pixel 4 and other circuits in FIG. 1 are also mounted on the silicon substrate 31.

In the solid-state imaging device 1 according to the present embodiment, as shown in FIG. 3, the antireflection film 39 is formed on the silicon substrate 31 so as to cover the photodiode 15 in each pixel 4. The antireflection film 39 is covered with the interlayer insulating film 32. The antireflection film 39 has a film configuration (number of layers, material of each layer, thickness of each layer, etc.) according to the wavelength of incident light. For example, the antireflection film 39 can be configured by a three-layer film including a SiO ₂ layer, a SiN layer (silicon nitride layer), and a SiO ₂ layer that are sequentially stacked from the substrate 31 side. Alternatively, for example, the antireflection film 39 can be formed of a five-layer film including a SiO ₂ layer, a SiN layer, a SiO ₂ layer, a SiN layer, and a SiO ₂ layer that are sequentially stacked from the substrate 31 side.

  Further, in the solid-state imaging device 1 according to the present embodiment, as shown in FIG. 3, a passivation film (protective film) 41, in order from the lower side, is formed on the interlayer insulating film 35 disposed on the uppermost wiring layer 38. A planarizing film 43, a color filter layer 44, a planarizing film 45, and a microlens 46 that collects incident light on the photodiode 15 are provided. As the color filter layer 44, for example, a color filter layer of any one of red, green, and blue is arranged for each pixel 4 according to the Bayer arrangement. A micro lens 46 is also formed for each pixel 4.

In the solid-state imaging device 1 according to the present embodiment, the first film 40 is formed on the interlayer insulating film 35 as shown in FIG. The first film 40 is located between the interlayer insulating film 35 and the passivation film 41. A second film 42 is formed on the passivation film 41. The second film 42 is positioned between the passivation film 41 and the planarization film 43 made of, for example, an organic material formed on the passivation film 41. The refractive index of the first film 40 is lower than the refractive index of the passivation film 41 and higher than the refractive index of the interlayer insulating film 35. The refractive index of the second film 42 is lower than the refractive index of the passivation film 41 and higher than the refractive index of the planarizing film 43. For example, a SiN film (silicon nitride film) having a refractive index of 2.0 is used as the passivation film 41, a SiO ₂ film having a refractive index of 1.46 is used as the interlayer insulating film 35, and a refractive index of 1.55 is used as the planarizing film 43. A resin layer can be used. In order to reduce the absorption loss of incident light, it is preferable to use a film having a zero extinction coefficient k (for example, a SiN film with k = 0) as the passivation film 41.

  The refractive index of the first film 40 may be uniform everywhere in the thickness direction, but has a refractive index gradient that decreases from the passivation film 41 side to the interlayer insulating film 35 side. The refractive index gradient may be stepped or continuous. The refractive index gradient of the first film 40 can be realized, for example, by using a SiON film as the first film 40 and changing the film formation conditions stepwise or continuously.

  Similarly, the refractive index of the second film 42 may be uniform everywhere in the thickness direction, but has a refractive index gradient that decreases from the passivation film 41 side to the planarization film 43 side. . The refractive index gradient may be stepped or continuous. The refractive index gradient of the second film 42 can be realized, for example, by using a SiON film as the second film 42 and changing the film formation conditions stepwise or continuously.

  In the configuration of the solid-state imaging device shown in FIG. 3, in the conventional solid-state imaging device that does not employ the antireflection film 39, the first film 40, and the second film 42, the incident light is incident from above in FIG. 3. A part of the light is reflected on the upper surface of the silicon substrate 31 and then reaches the lower surface of the passivation film 41, and is reflected on the interface of the passivation film 41 due to the refractive index difference between the insulating film 35 and the passivation film 41. The diode 15 is reached. As a result, the light reflected at the lower interface of the passivation film 41 (hereinafter referred to as “lower surface reflected light”) interferes with the incident light (this interference is hereinafter referred to as “lower surface reflected interference”). Further, part of the incident light reflected on the upper surface of the silicon substrate 31 reaches the upper surface of the passivation film 41 and is reflected on the interface of the passivation film 41 due to the difference in refractive index between the passivation film 41 and the planarizing film 43. Then, it reaches the photodiode 15. The light reflected at the upper interface of the passivation film 41 (hereinafter referred to as “upper surface reflected light”) and the incident light interfere (this interference is hereinafter referred to as “upper surface reflection interference”). Furthermore, interference of incident light, lower surface reflected light, and upper surface reflected light may also occur.

  In the solid-state imaging device 1 according to the present embodiment, as described above, the antireflection film 39 is formed on the silicon substrate 31 so as to cover the photodiode 15. Therefore, since reflection of incident light on the upper surface of the silicon substrate 31 can be reduced, reflected light reaching the passivation film 41 is reduced as compared with the case where the antireflection film 39 is not formed. For this reason, the interference between the incident light and the reflected light reflected at the interface between the passivation film 41 is suppressed. As a result, in the solid-state imaging device 1 according to the present embodiment, between the upper surface of the silicon substrate 31 and the upper surface of the interlayer insulating film 35 between the central pixel 4 in the pixel region 10 and the peripheral pixel 4 in the pixel region 10. The anti-reflection film 39 is formed even when the distance d0 from the upper surface of the silicon substrate 31 to the lower surface of the passivation film 41 and the distance d2 from the upper surface of the silicon substrate 31 to the upper surface of the passivation film 41 vary. Compared with the case where it is not performed, the color unevenness in the peripheral portion in the pixel region 10 is reduced.

  In the solid-state imaging device 1 according to the present embodiment, as described above, the first film 40 is formed between the interlayer insulating film 35 and the passivation film 41. Therefore, the lower surface reflected light is reduced and the lower surface reflection interference is suppressed due to the antireflection effect of the first film 40 as compared with the case where the first film 40 is not formed. As a result, in the solid-state imaging device 1 according to the present embodiment, even if the distance d0 varies and the distance d1 varies between the central pixel 4 in the pixel region 10 and the peripheral pixel 4 in the pixel region 10, Compared with the case where the first film 40 is not formed, the color unevenness in the peripheral portion in the pixel region 10 is reduced. In addition, when the first film 40 has the refractive index gradient as described above, the lower surface reflected light is more than in the case where the refractive index of the first film 40 is uniform in various portions in the thickness direction. Since it is reduced, it is more preferable.

  Furthermore, in the solid-state imaging device 1 according to the present embodiment, as described above, the second film 42 is formed between the passivation film 41 and the planarization film 43. Therefore, due to the antireflection effect of the second film 42, the upper surface reflected light is reduced and the upper surface reflection interference is suppressed as compared with the case where the second film 42 is not formed. As a result, in the solid-state imaging device 1 according to the present embodiment, even if the distance d0 varies and the distance d2 varies between the central pixel 4 in the pixel region 10 and the peripheral pixel 4 in the pixel region 10, Compared with the case where the second film 42 is not formed, the color unevenness in the peripheral portion in the pixel region 10 is reduced. In addition, when the second film 42 has a refractive index gradient as described above, the upper surface reflected light is more than in the case where the refractive index of the second film 42 is uniform in various places in the thickness direction. Since it is reduced, it is more preferable.

  Next, as a manufacturing method according to an embodiment of the present invention, an example of a manufacturing method for manufacturing the solid-state imaging device 1 according to the above-described embodiment will be described with reference to FIGS. 4 to 10 are schematic cross sections schematically showing main steps of the manufacturing method according to the present embodiment. 4 (a), 4 (b), 5 (a), 6 (a), 7a), 8 (a), 9 (a), 10 (a), and 10 (b). ) Corresponds to FIG. 3 showing a schematic cross section of one pixel 4. 5B, FIG. 6B, FIG. 7B, FIG. 8B, and FIG. 9B correspond to the overall schematic cross section of the solid-state imaging device 1, and each wiring layer 36 is shown in FIG. The distribution situation of -38 is shown typically. 5 (a) and FIG. 5 (b), FIG. 6 (a) and FIG. 6 (b), FIG. 7 (a) and FIG. 7 (b), FIG. 8 (a), FIG. (A) and FIG.9 (b) have each shown the same process. In the following description, only main manufacturing steps will be described.

  First, an element such as a photodiode 15 or a transistor is formed on the silicon substrate 31 using a known semiconductor process (FIG. 4A). Next, an antireflection film 39 is formed on the silicon substrate 31 by film formation and photolithography (FIG. 4B).

  Next, an interlayer insulating film 32 is formed and planarized by CMP. Next, after forming a metal film and patterning it to form the first wiring layer 36, an interlayer insulating film 33 is formed and planarized by CMP. Subsequently, after forming a second wiring layer 37 by forming a metal film and patterning it, an interlayer insulating film 34 is formed and planarized by CMP. Thereafter, a metal film is formed and patterned to form a third wiring layer 38. FIG. 5A and FIG. 5B show this state. In FIG. 5B, the upper surfaces of the interlayer insulating films 32 to 34 are shown to have the same height in the pixel region 10 and the peripheral region 50 by the CMP described above. In practice, however, the heights of the upper surfaces may be different between the pixel region 10 and the peripheral region 50 due to the influence of the density of the wiring layers 36 and 37 and the like.

  As shown in FIG. 5B, the wiring density of the peripheral region 50 is higher than the wiring density of the pixel region 10. The third wiring layer 38 also serving as a light shielding film is formed in a region other than the light receiving region of each pixel 4 in the pixel region 10, but is formed in the most region in the peripheral region 50.

  Subsequently, an interlayer insulating film 35 is formed (FIGS. 6A and 6B). Thereafter, a step of selectively reducing the height of the portion formed in the peripheral region 50 in the interlayer insulating film 35 is performed. In this embodiment, in this step, a mask 100 such as a resist is selectively formed in the pixel region 10 on the interlayer insulating film 35 (FIGS. 7A and 7B), and then the interlayer insulating film 35 is formed. The height of the portion formed in the peripheral region 50 is reduced (the thickness of the interlayer insulating film 35 on the peripheral region 50 is made smaller than the thickness of the interlayer insulating film 35 on the pixel region). Then, the portion is selectively etched, and the mask 100 is removed (FIGS. 8A and 8B). This etching may be dry etching or wet etching.

  Next, the interlayer insulating film 35 is polished by CMP over the entire pixel region 10 and the peripheral region 50 to planarize the interlayer insulating film 35 (FIGS. 9A and 9B). .

  Next, after forming the first film 40 on the interlayer insulating film 35, a passivation film 41 is formed on the first film 40 (FIG. 10A).

  Subsequently, a second film 42 is formed on the passivation film 41, a planarizing film 43 is formed on the second film 42, and then a color filter layer 44 is formed on the planarizing film 43 (FIG. 10 ( b)). Thereafter, a planarizing film 45 made of a resin layer or the like is formed on the color filter layer 44, and further, a microlens 46 is formed on the planarizing film 45 by a known method, and then the substrate is separated into chips. Thereby, the solid-state imaging device 1 according to the present embodiment is completed (FIG. 3).

  Here, the comparative example compared with the manufacturing method by this Embodiment is demonstrated. The manufacturing method according to this comparative example is different from the manufacturing method according to the present embodiment in that the portion formed in the peripheral region 50 in the interlayer insulating film 35 after the steps shown in FIGS. 6A and 6B. Without performing the step of selectively reducing the height, the interlayer insulating film 35 is immediately polished by CMP over the entire pixel region 10 and the peripheral region 50 to flatten the interlayer insulating film 35. It is only a point to do. FIG. 11 shows a state after the planarization of the interlayer insulating film 35 by this CMP, and corresponds to FIG. 9B.

  When polishing is performed on the interlayer insulating film 35 over the entire pixel region 10 and the peripheral region 50 by CMP, the polishing rate of CMP varies depending on the unevenness distribution state of the insulating layer before planarization. Then, the polishing rate is relatively high and the polishing rate in the peripheral region 50 is relatively low. Therefore, in this comparative example, the interlayer insulating film 35 is polished by CMP immediately after the steps shown in FIGS. 6A and 6B, so that the planarization is performed by CMP as shown in FIG. Even after this, the height of the upper surface of the interlayer insulating film 35 in the peripheral region 50 and the pixels 4 close thereto (the pixels 4 arranged in the peripheral portion in the pixel region 10) is the interlayer in the pixel 4 in the central portion of the pixel region 10. The height of the upper surface of the insulating film 35 becomes higher, and the difference between the heights becomes relatively large.

  On the other hand, in the manufacturing method according to the above-described embodiment, after the steps shown in FIGS. 6A and 6B, the portion formed in the peripheral region 50 in the interlayer insulating film 35 is selectively high. Since the step of reducing the thickness is performed and then the CMP is performed on the interlayer insulating film 35, the amount of reduction in the height in the step of reducing (the etching amount in the present embodiment) is appropriately set. As a result, as shown in FIG. 9B, the difference in height of the upper surface of the interlayer insulating film 35 can be reduced and uniformized. In the present embodiment, the amount by which the height is lowered is the height of the upper surface of the interlayer insulating film 35 in the central pixel 4 in the pixel region 10 and the peripheral portion in the pixel region 10 after the CMP of the interlayer insulating film 35. What is necessary is just to set so that the absolute value of the difference with the height of the upper surface of the interlayer insulation film 35 in the pixel 4 may become smaller than the absolute value of those height differences in the case of the comparative example shown in FIG. However, it is preferable to set the former absolute value and the latter absolute value as close as possible.

  Therefore, if the solid-state imaging device 1 is manufactured by the manufacturing method according to the present embodiment, the central pixel 4 in the pixel region 10 is compared with the case where the solid-state imaging device 1 is manufactured by the manufacturing method according to the comparative example. The difference (variation) between the distance d0 (see FIG. 3) and the distance d0 between the peripheral pixels 4 in the pixel region 10 is reduced. Therefore, if the solid-state imaging device 1 is manufactured by the manufacturing method according to the present embodiment, the central pixel 4 in the pixel region 10 is compared with the case where the solid-state imaging device 1 is manufactured by the manufacturing method according to the comparative example. The difference in the degree of the lower surface reflection interference and the difference in the degree of the upper surface reflection interference with the peripheral pixel 4 in the pixel region 10 is reduced, and as a result, the color unevenness in the peripheral part in the pixel region 10 is further reduced. Is done. However, the solid-state imaging device 1 according to the present invention may be the solid-state imaging device 1 manufactured according to the comparative example.

  The solid-state imaging device 1 according to one embodiment of the present invention and the solid-state imaging device manufacturing method according to one embodiment of the present invention have been described above, but the present invention is not limited to these embodiments.

  For example, in the solid-state imaging device manufacturing method according to the present invention, the solid-state imaging is obtained by removing at least one of the antireflection film 39, the first film 40, and the second film 42 from the solid-state imaging device 1. It is good also as an element, and it is good also as what removed the formation process of the film | membrane removed in the solid-state image sensor manufacturing method by the said embodiment.

  In addition, the solid-state imaging device according to the present invention can sufficiently reduce color unevenness by combining the antireflection film 39 and the first film 40 in the solid-state imaging device 1 according to the above-described embodiment. By combining the second film 42 with the antireflection film 39 and the first film 40, color unevenness can be further reduced. Therefore, the second film 42 may be provided as necessary.

DESCRIPTION OF SYMBOLS 1 Solid-state image sensor 10 Pixel area 31 Silicon substrate 35 Interlayer insulation film 38 Top wiring layer 39 Antireflection film 40 First film 41 Passivation film 42 Second film 43 Planarization film (predetermined film)
50 Peripheral area 100 Mask

Claims (10)

A method for manufacturing a solid-state imaging device having a pixel region in which a plurality of pixels are two-dimensionally arranged, and a peripheral region arranged around the pixel region,
A first step of forming a wiring layer in the pixel region and the peripheral region;
A second step of forming an insulating film on the wiring layer formed by the first step;
A third step of reducing the height of the portion formed in the peripheral region in the insulating film formed in the second step;
A fourth step of planarizing the surface of the insulating film;
A fifth step of forming a passivation film on the insulating film whose surface has been planarized by the fourth step;
A method for manufacturing a solid-state imaging device. The third step is a step of etching a portion formed in the peripheral region in the insulating film,
The fourth step is a step of planarizing the surface of the insulating film by polishing.
The method for manufacturing a solid-state imaging device according to claim 1. A step of forming a first film on the insulating film between the fourth step and the fifth step;
3. The method of manufacturing a solid-state imaging device according to claim 1, wherein a refractive index of the first film is lower than a refractive index of the passivation film and higher than a refractive index of the insulating film.   4. The method of manufacturing a solid-state imaging device according to claim 3, wherein the first film has a refractive index gradient in which a refractive index decreases from a side of the passivation film to a side of the insulating film. Forming a second film on the passivation film formed by the fifth process;
Forming a planarization film on the second film;
With
5. The solid-state imaging device according to claim 1, wherein a refractive index of the second film is lower than a refractive index of the passivation film and higher than a refractive index of the predetermined film. Manufacturing method. Each of the pixels has a photoelectric conversion unit disposed on a semiconductor substrate,
6. The solid according to claim 1, further comprising a step of forming an antireflection film on the semiconductor substrate so as to cover the photoelectric conversion unit before the first step. Manufacturing method of imaging device. A solid-state imaging device having a pixel region in which a plurality of pixels each having a photoelectric conversion unit disposed on a semiconductor substrate are two-dimensionally disposed, and a peripheral region disposed around the pixel region,
An antireflection film formed on the semiconductor substrate so as to cover the photoelectric conversion unit;
A wiring layer formed in the pixel region and the peripheral region;
An insulating film formed on the wiring layer and having a planarized surface;
A passivation film formed on the insulating film;
A first film formed between the insulating film and the passivation film and having a refractive index lower than a refractive index of the passivation film and higher than a refractive index of the insulating film;
A solid-state imaging device comprising:   The solid-state imaging device according to claim 7, wherein a surface of the insulating film is flattened by etching and polishing.   9. The solid-state imaging device according to claim 8, wherein the first film has a refractive index gradient in which a refractive index decreases from a side of the passivation film to a side of the insulating film. A planarization film formed on the passivation film;
A second film formed between the passivation film and the planarization film and having a refractive index lower than the refractive index of the passivation film and higher than the refractive index of the predetermined film;
The solid-state imaging device according to claim 7, further comprising:

Images