JP5518231B2 - Method for manufacturing solid-state imaging device - Google Patents

Description

The present invention relates to a method for manufacturing a solid-state imaging device.

  2. Description of the Related Art Amplification type solid-state imaging devices (hereinafter referred to as CMOS image sensors) using CMOS technology in recent years have made remarkable progress by incorporating miniaturization technology. In order to further improve the characteristics of such a solid-state imaging device, the following points have been studied.

  The first point is to reduce the dark current that is based on a normal logic process, and the second point is to improve noise such as 1 / f noise by including an amplifying circuit using a MOS transistor.

  On the other hand, the dark current is reduced and the 1 / f noise is reduced by performing hydrogen treatment on the substrate on which the light receiving portion is formed. As the most effective method, there is a heat treatment after depositing a film containing a large amount of hydrogen. Examples of the film containing a large amount of hydrogen include a silicon nitride (plasma SiN) film deposited by a plasma CVD method. Such a method has been tried a lot with conventional CCDs (Patent Document 1). Further, hydrogen treatment in a CMOS image sensor has been studied (Patent Document 2). When hydrogen treatment is applied to a CMOS image sensor, several problems occur due to the flattening variation of the interlayer film. The flattening variation of the interlayer film will be briefly described.

In a CMOS image sensor, at least two wiring layers are generally used.
In order to finely arrange the plurality of wiring layers, a planarization technique represented by CMP (Chemical Mechanical Polishing) or the like is used. However, although this flattening is flat when viewed microscopically (several μm to several tens of μm), when viewed macroscopically (several mm to several tens of mm), the film thickness varies depending on the location. Currently.

  For example, the thickness of the interlayer insulating film when polished by the CMP method is affected by the arrangement density of the MOS transistors. That is, the height is different between the peripheral circuit portion having a high MOS transistor arrangement density and the pixel portion having a low MOS transistor arrangement density. Since the film thickness gradually changes at the boundary, the film thickness also changes in the effective pixel region. Even when the etch-back method is used, film thickness unevenness occurs due to the large in-plane dependency in the apparatus.

  Next, problems that occur when a film containing a large amount of hydrogen and a plasma SiN film are deposited in order to perform hydrogen treatment in a CMOS image sensor will be described in detail.

  The first problem is color unevenness. This is a phenomenon in which when a uniform white luminance surface is photographed, the photographed image is slightly greenish or reddish depending on the location. This is mainly due to interference caused by reflection at the interface between the light receiving surface of the substrate and the interlayer insulating film on the light receiving surface, and at the interface between the plasma SiN film and the interlayer insulating film. This will be described in detail with reference to FIG.

  FIG. 7 is a schematic cross-sectional view of a conventional CMOS image sensor. 701 is a silicon substrate, 702 is a buried type photodiode that serves as a light receiving portion, 703, 705, and 707 are interlayer insulating films, 704, 706, and 708 are wiring layers, and a passivation for reducing dark current on the uppermost wiring layer 708 A plasma SiN film 709 is deposited as a layer, 710 is a color filter, and 711 is a microlens. Here, an example of the refractive index of each layer is shown below.

      Substrate (Si): nSi = 3.5 to 5.2, interlayer insulating film (SiO2): nSio = 1.4 to 1.5, passivation film (SiN): nSiN = 2.0, color filter: ncf = 1 .58, microlens: nml = 1.58.

  In this case, reflection at the interface between the substrate 701 and the interlayer insulating film 703 and at the interface between the interlayer insulating film 707 and SiN 709 is large, and interference is generated by the reflected light (ref1 and ref2 in FIG. 7). In particular, interference becomes obvious with light on the long wavelength side, and large ripples are generated. As long as the film thickness is uniform, there is no problem. However, if the film thickness varies macroscopically as described above, the position of the ripple shifts depending on the location, so that it appears as color unevenness, which is a serious problem.

  The cause of this problem occurs because it uses a material having a higher refractive index than the surrounding film such as SiN, and the other is that the interlayer insulation film thickness of the CMOS image sensor is as thick as 3 to 5 μm. Film thickness unevenness due to a planarization process typified by CMP used in a CMOS image sensor is a major cause. Therefore, even if an SiN film is used as a passivation film in a solid-state imaging device such as a CCD having a thin interlayer insulating film and no flattening process, it does not cause a big problem. That is, this color unevenness can be said to be a particularly serious problem in the CMOS image sensor in which the interlayer insulating film is flattened. More specifically, assuming that the interlayer insulating film thickness is L and the amount of reflected light ref2 is I_ref2, the wavelength to be strengthened is 2 × L × nSi = kλ (k is an integer). If L = 3.5 μm, then λ = 609 nm when k = 17, and λ = 576 nm when k = 18. When L = about 1.0 μm, λ = 592 nm at k = 5, λ = 493 nm at k = 6, and a gradual ripple. It can be seen that when the interlayer insulating film is thinned from 3.5 to 1.0 μm, the spectral characteristics are smoothed, so that it is reduced to about 1/3.

  In order to improve such a problem, it is conceivable to use an antireflection film used in an intralayer lens of a CCD. Specifically, it is disclosed in Patent Document 3. FIG. 9 is a representative drawing. According to the disclosed technology, SiON films (refractive index nSiON = 1.7 to 1.9) are arranged above and below the SiN layer, which is an in-layer lens, so that reflection at the interface between the SiN layer and the interlayer insulating film is achieved. Is reduced.

  This technique can reduce reflected light by about 30%. However, although the amplitude of the ripple is reduced, a small ripple starts to appear in a region having a shorter wavelength. Also, only the intra-layer lens structure is disclosed in the prior art, and many steps are required to make such a structure, resulting in an expensive solid-state imaging device.

  Patent Document 4 discloses a configuration in which a SiN film is disposed on the uppermost wiring as a passivation film for improving barrier properties against impurities such as moisture resistance, chemical resistance, Na ions, oxygen, and metals. As described above, a film having a refractive index different from that of a general interlayer insulating film, such as a SiN film, may be used as the passivation film.

Japanese Patent Laid-Open No. 10-256518 JP 2001-267547 A Japanese Patent Laid-Open No. 11-103037 Japanese Patent Laid-Open No. 2001-284666

  As described above, in the above-mentioned patent document, when an insulating film as a passivation film having a refractive index different from that of the surrounding film is used, there is a technical problem of reflected light at the passivation interface and ripple due to reflected light at the surface of the light receiving unit. Was not found.

  In particular, the configuration of Patent Document 4 discloses a configuration in which a passivation film is flattened against a problem that incident light is refracted in an unexpected direction due to a step of an SiN film that is a passivation film formed on a wiring. However, the problem of ripple caused by reflected light at the interface and reflected light at the surface of the light receiving part due to the refractive index of the passivation film being different from that of the interlayer insulating film has not been recognized. Will occur.

In view of the above problems, the present invention is a method of manufacturing a solid-state imaging device, the step of forming a first antireflection film on a light receiving portion provided on a semiconductor substrate, and on the antireflection film, A step of forming a plurality of wiring layers and a plurality of interlayer insulating films including a planarized uppermost interlayer insulating film; and a step of forming the plurality of wiring layers and the plurality of interlayer insulating films, After the step of forming the second antireflection film and the step of forming the second antireflection film, the method includes a step of forming a first insulating film having a refractive index higher than that of the uppermost interlayer insulating film. . According to another aspect of the present invention, there is provided a method for manufacturing a solid-state imaging device, the step of forming a first silicon oxide film and a first silicon nitride film on a light receiving portion provided on a semiconductor substrate; Forming a plurality of wiring layers and a plurality of interlayer insulating films including a flattened uppermost interlayer insulating film on the silicon nitride film, the plurality of wiring layers and the plurality of interlayer insulations After the step of forming the film, there is a step of forming a silicon oxynitride film and a step of forming a second silicon nitride film after the step of forming the silicon oxynitride film.

  According to the present invention, it is possible to reduce the ripple caused by the reflected light at the interface between the interlayer insulating film and the insulating film having a different refractive index formed on the wiring and the reflected light at the light receiving surface. It is possible to reduce color unevenness unique to the image sensor.

It is a cross-section figure of one embodiment of a CMOS image sensor of the present invention. It is a comparison figure of the transmittance | permeability of the antireflection structure arrange | positioned on the light-receiving surface used by this invention. It is a cross-section figure of one embodiment of a CMOS image sensor of the present invention. It is a cross-section figure of one embodiment of a CMOS image sensor of the present invention. It is the cross-sectional shape of the passivation film provided on a wiring layer and wiring used for this invention. It is a cross-sectional structure diagram for explaining a problem in which a gap is formed between wiring patterns. It is an equivalent circuit schematic of the pixel part of a CMOS image sensor. It is a cross-section figure of the CMOS image sensor using a prior art. This is an anti-reflection structure for an in-layer lens used in a conventional CCD. It is a system diagram at the time of applying the solid-state imaging device of the present invention to an imaging system.

  The present invention will be described in detail. FIG. 1 is a cross-sectional structure diagram that best represents the features of the present invention. 101 is a silicon substrate, 102 is a buried type photodiode that serves as a light receiving portion, 103, 105, and 107 are interlayer insulating films, 104, 106, and 108 are wiring layers, and the uppermost wiring layer is hydrogen for reducing dark current. A plasma SiN film 109 serving as a supply source is deposited, 110 is a color filter, and 111 is a microlens. Since the plasma SiN 109 also functions as a passivation film, it is preferably provided over the entire surface of the substrate.

  In such a structure, a refractive index different from that of the interlayer insulating film formed on the wiring for a desired purpose is formed by forming a structure having a portion having a refractive index different in the film thickness direction on at least a part of the light receiving surface. In the structure in which an insulating film having a thickness is formed, color unevenness and a decrease in sensitivity, which are problems inherent in a CMOS image sensor, are suppressed. That is, it is possible to prevent reflection on the light receiving surface by a structure having a portion having a different refractive index in the film thickness direction in at least part of the light receiving surface. Here, a structure using a plasma SiN film containing a large amount of hydrogen as a passivation layer is preferable because it can reduce dark current, 1 / f noise, and the like to satisfy a desired purpose.

  The antireflection structure on the light receiving surface is composed of 112 SiO 2 film and 113 SiN film, for example, as shown in FIG. When the thickness of SiO2 is 2.5 nm and the thickness of SiN is 70 nm, the transmittance at each wavelength is as shown in FIG. The broken line A in the figure is a structure without an antireflection structure, and B in the figure is a structure having an antireflection structure with the above-described film thickness.

  In the figure, for example, at a wavelength of 600 nm, the transmittance of A, that is, the light taken into silicon as a substrate is 78% of the entire incident light. This means that 22% is reflected light ref1. On the other hand, according to B which is the structure of this invention, it turns out that reflected light has decreased to 6%. That is, since the reflected light ref1 that causes the ripple is reduced to 6% / 22% = 0.27, the ripple in question can be reduced to 1/3 or less at the same rate.

  In the CMOS image sensor, the antireflection structure on the light receiving surface is more effective for ripples than the antireflection structure on the plasma SiN film as the arrangement position of the antireflection structure. Unlike the structure used in CCDs, the anti-reflection structure on the light-receiving surface and the plasma SiN film containing a large amount of hydrogen are stacked as a passivation film. Has been found to be an optimum structure for a CMOS image sensor. Here, the antireflection structure is a structure inserted in order to reduce reflection of incident light at the interface between two films (parts).

  If an antireflection structure is added to the plasma SiN film of the passivation film in such a structure, it becomes possible to further suppress the color unevenness, and the ripple is smaller than that without the antireflection structure. Can be reduced to 1/5 or less at the maximum.

  Such a configuration is shown in FIG. Parts having the same functions as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. 114 is the antireflection structure of the plasma SiN film. A film having an intermediate refractive index, for example, a SiON film, is provided between the interlayer insulating film and the SiN film that is a passivation film. This antireflection structure is different between the light receiving part and the passivation part. For example, a SiON film of about 100 nm is deposited, and the SiN film is set to 400 nm. A film thickness of 100 nm, 300 nm, 500 nm, or the like is suitable for suppressing light in the vicinity of a wavelength = 500 to 600 nm in which a ripple is likely to be noticeable in a SiON film, but 300 nm rather than 100 nm suppresses ripple, that is, color It is suitable for suppressing unevenness. However, 100 nm is effective if the above-mentioned refraction of light rays is taken into consideration.

  When the film thickness of the antireflection structure on the light receiving surface is 112 nm and the film thickness of 113 is 45 nm, the reflectance at a wavelength of 600 nm increases to about 10%, but the passivation film has a SiN film. By adopting the antireflection structure, the degree of unevenness can be suppressed to about と お り as in the previous example. This is shown in FIG. It can be seen that with such a structure, the sensitivity of the photoelectric conversion element can be improved even when the wavelength of incident light is 550 nm or less. In addition, since the distance between the microlens 111 and the light receiving surface is longer than the conventional one, considering the problem that the condensing ability of the microlens deteriorates, the SiON film should be thinner than the thickness of the uppermost wiring layer (light shielding film). . Considering these several characteristics, for example, about 100 nm is suitable.

  Thus, by selecting a combination of the antireflection structure on the light receiving portion and the antireflection structure provided on the plasma SiN film, it is possible to achieve both reduction in color unevenness and improvement in sensitivity to a desired incident light wavelength. It becomes possible.

  Furthermore, it is also effective to provide a film having an intermediate refractive index between the passivation film and the color filter film.

  In the intralayer lens disclosed as the prior art, the reflection on the curved surface side does not greatly affect the interference. The reason is that the distance between the reflecting surface and the light receiving surface takes various values, so that a certain phase shift that causes interference does not occur. On the other hand, when a SiN film having a higher refractive index than the surrounding film is used as the passivation film, the reflection between the SiN film as the passivation film and the color filter film has the same distance between the reflecting surface and the light receiving surface. For this reason, interference is caused and color unevenness is caused. That is, when the SiN film is used as the passivation film, the color unevenness is worse than in the case of the conventional intralayer lens. As described above, it has been described that the antireflection structure on both sides of the SiN film is effective as a passivation film. However, since the improvement amount is about 30%, it can be suppressed to about half.

  Therefore, a new color unevenness countermeasure structure is required, and the problem is solved by arranging an antireflection structure on the light receiving portion.

  Furthermore, by adding a structure in which the uppermost wiring layer (light shielding layer) on which the plasma SiN is deposited has a trapezoidal shape as shown in FIG. 4 to the above structure, an unexpected direction due to the plasma SiN film on the uppermost wiring layer It has been found that the refraction can be reduced. This solves the decrease in effective opening area caused by the SiN film disclosed in Patent Document 3.

  This will be described with reference to FIG. 8. This is because the light beam L 1 that has passed through the microlens is refracted in an unexpected direction by the SiN film covering the step of the uppermost wiring layer 708. That is, the light beam incident from the color filter is incident on the plasma SiN film having a higher refractive index, so that the light beam is bent outward. On the other hand, when the opening is widened, color mixing and stray light occur. In order to reduce such problems, the light shielding position is determined by the bottom surface of the light shielding film, and the position is maintained according to the optimized design. It has been found that it is optimal to widen the opening. That is, the cross-sectional shape of the light shielding film is made trapezoidal (the wiring end is tapered). As a result, it is possible to reduce refraction in an unexpected direction without changing the light shielding position as in the case of the light beam shown in FIG.

  If the end of the wiring has at least a taper, the effect is obtained, but if the angle is small, the effect is more effective. In order to sufficiently suppress the refraction component, the following equation is satisfied. It is desirable. FIG. 5 shows a cross-sectional view of the wiring and the passivation film.

If the thickness of the passivation is Tpv and the thickness of the wiring (light-shielding film) is Tm3,
Tm3> Tpv × tan θ
Considering the processing point, a sufficient effect can be obtained even at θ = 70 to 85 degrees. In general, when an SiN film deposited by plasma CVD is deposited on a stepped portion, an overhang shape as shown in FIG. 1 can be formed. When the space of the uppermost layer (light-shielding film) is reduced in such a shape, a portion that is not embedded is formed as shown in FIG. 6, and the chemical solution in the process step remains in this portion, resulting in a reliability problem. In order to reduce such problems, it is necessary to secure a sufficient space. That is, when the SiN film is used as a passivation film, the design rule must be increased.

  On the other hand, in a CMOS image sensor, even though it is a light-shielding film, it is also used as a normal wiring, so increasing the design rule is a great disadvantage. On the other hand, it is preferable that the end portion of the wiring has a tapered shape because a plasma SiN film can be used as a passivation film without changing the design rule.

  The film thickness of the SiN film as the passivation film is preferably 300 nm to 400 nm or more in order to fulfill the function as a protective film, and it is more thick in order to improve the dark current and 1 / f noise reduction effect. It is valid.

  Forming the end of the wiring in a tapered shape has an effect of suppressing refraction of light rays, but also has an effect of depositing a plasma nitride film that is thicker than before in order to reduce dark current and 1 / f noise. Also play. Hereinafter, the present invention will be described in more detail with reference to examples.

  This embodiment will be described based on the cross-sectional structure shown in FIG. The pixel includes a photodiode PD serving as a light receiving element, a transfer switch (Q3) for transferring signal charges from the photodiode to the floating diffusion region, a source follower MOS (Q1) for converting signal charges to charge voltage, and a reset MOS for resetting signal charges. (Q4) includes a selection MOS (Q2) for selecting a pixel. Each element was connected in the equivalent circuit diagram shown in FIG. The photodiode is a so-called embedded photodiode having a small dark current.

  As 111 and 112 serving as antireflection films for reducing the reflection of incident light on the light receiving surface, 111 is formed of silicon oxide (SiO 2) having a thickness of 2.5 nm, and 112 is formed of silicon nitride (SiN) having a thickness of 70 nm. did. 111 is at least partly above the light receiving portion of the photodiode, and after etching the polysilicon serving as the electrode, the film thickness is adjusted to the above value by overetching. Thereafter, SiN to become 112 was deposited by LP-CVD. In addition, the gate insulating film may be removed after the polysilicon etching, and may be newly formed by thermal oxidation, or may be deposited by a CVD method. After depositing SiN, the SiN formed in other regions was removed while leaving the top and the periphery of the photodiode (for example, 400 nm). This is because the process becomes complicated if SiN remains in forming a contact hole connecting the first wiring layer and silicon or polysilicon.

  Further, except for a part of the gate of the transfer switch corresponding to Q3 in FIG. 7, no LP-CVD silicon nitride film is left on the other polysilicon. The reason is that SiN of the LP-CVD method has a characteristic that hydrogen does not easily pass through. This is because the dark current source is the oxide film-substrate interface under the polysilicon wiring on the element isolation region (LOCOS in the present embodiment), and effectively the plasma SiN against the dark current source. This is because dark current is reduced by a film (formed later).

Thereafter, a source / drain region of the MOS transistor was formed using the polysilicon electrode as a mask, a silicon oxide film was deposited, and then a flat interlayer insulating film was formed by CMP. In this case, the film thickness varies depending on the location as viewed macroscopically. Thereafter, a second wiring layer and a third wiring layer were formed. Each wiring layer was flattened by a flattening process. The third wiring layer is an uppermost wiring layer used as a power supply wiring or a light shielding film. After the formation of the third wiring layer, a 600 nm plasma SiN film was deposited as a passivation film, and a heat treatment was performed at 400 ° C. in a hydrogen atmosphere for 120 minutes. In this embodiment, the treatment is performed at 400 ° C., but it is possible to perform the heat treatment up to about 450 ° C. By this step, dark current and 1 / f noise can be greatly reduced. After forming the passivation film, a color filter and a microlens were formed by a color filter process. Compared to the case where plasma SiN is not used for the passivation film, the dark current and 1 / f noise can be reduced to about 50%.
Further, the color unevenness was reduced to about 1/3 as compared with the structure using no antireflection structure on the light receiving surface. The degree of this unevenness is the same as that when a SiON (refractive index = 1.73) film is used as the passivation film.

  In this embodiment, an interlayer insulating film below the uppermost wiring layer and an antireflection film for reducing reflection at the interface of the plasma SiN film are added between the plasma SiN film and the uppermost wiring layer. The configuration. A schematic cross-sectional view is shown in FIG. In the present embodiment, the antireflection film 114 is further added. Specifically, a SiON film having a value between the refractive index of SiO2 that is a plasma SiN film and an interlayer insulating film and having a refractive index of about 1.73 is preferably used.

  According to the configuration of the present embodiment, it is possible to reduce the reflection at the interface between the plasma SiN film and the SiO 2 that is the interlayer insulating film, thereby further reducing the ripple and reducing the color unevenness.

  In the present embodiment, the following points are further modified with respect to the first embodiment. The antireflection structure on the light receiving surface is that 111 is a SiON film having a film thickness of 2.7 nm and 112 is a SiN film having a film thickness of 70 nm. A manufacturing method of this embodiment will be described.

  After etching the polysilicon to be the electrode, the gate insulating film was removed, and a SiON film to be 111 was deposited by CVD. Thereafter, it was produced in the same manner as in Example 1.

  According to such a configuration, the reflected light was reduced to 4% at an incident wavelength = 600 nm, and the color unevenness was reduced to 1/5 or less. Dark current and 1 / f noise can be reduced to substantially the same extent as in the first embodiment. This is because the refractive index of the silicon oxynitride film is closer to the refractive index of silicon serving as the substrate.

  In the present embodiment, the following points are further modified with respect to the first embodiment. The antireflection film structure on the light-receiving surface was 6 nm of SiO 2 as 111 and a 45 nm SiN film as 112. Further, after depositing the SiN film of 112, SiO2 was deposited to 170 nm, and the photoresist was left on the photodiode and the outer periphery thereof at about 400 nm, and an etch-back for forming a sidewall for the LDD structure was performed. That is, 111 and 112 were used as the side walls of the MOS transistor. Thus, a good CMOS image sensor could be created without increasing the process load by combining the formation process of the antireflection structure with the formation process of the LDD structure. In the present embodiment, it is possible to improve the sensitivity at a wavelength of 550 nm or less.

  In the present embodiment, the following configuration is further added to the first embodiment. After depositing a plasma SiN film as a passivation film to 400 nm, a SiON film having a refractive index of about 1.66 was deposited to 100 nm. Thereafter, a color filter was formed in the same manner as in Example 1. As a result, reflection at the color filter interface is reduced and sensitivity at a wavelength of 550 nm or less is improved, and color unevenness can be suppressed to about 1/3 or less.

  In the present embodiment, the following configuration is further added to the configuration of the first embodiment. That is, antireflection films are provided above and below the passivation film. The refractive index of the SiON film under the plasma SiN film to be the passivation film was set to 1.73, and the refractive index of the SiON film on the plasma SiN film was set to 1.66. The film thickness of plasma SiN is 400 nm. As described above, even in the SiON film, reflection on this surface can be suppressed by changing the refractive index of the lower film and the refractive index of the upper film. As a result, the color unevenness can be reduced to about 1/6 or less of the prior art.

  This embodiment improves the sensitivity when the pixel size is further reduced compared to the above-described embodiment. When the pixels are miniaturized, as shown in FIG. 8, the influence of refraction of light rays in an unexpected direction by the plasma SiN film, which is a passivation film, increases. In this embodiment, as shown in FIG. 3, the end of the uppermost wiring layer, which is a light shielding film and power supply wiring, has a tapered shape. The cross-sectional shape is a substantially trapezoidal shape. The film thickness of the uppermost wiring layer was 800 nm, and the taper angle θ was 60 degrees. As a result, 800 nm × tan (90−θ) = 460 nm, and sensitivity deterioration due to refraction can be reduced. Although it is more preferable to have an antireflection structure in the passivation film, it may be only a tapered shape.

  In this example, the taper angle θ of the wiring end in Example 7 was set to 70 degrees. As a result, 800 nm × tan (90−θ) = 290 nm, and the sensitivity can be reduced to about 6%. Compared to Example 6, since the taper angle was increased, the minimum line width could be reduced, and processing up to 800 nm became possible.

In this example, a SiON film having a refractive index of 1.73 was further formed on the plasma SiN film, and a color filter layer was provided thereon. In this example, since antireflection structures were provided above and below the passivation film, it was possible to further suppress color mixing compared to Examples 6 and 7.

  The embodiments described above can be combined as appropriate. A configuration in which the solid-state imaging device described in these embodiments is applied to an imaging system such as a digital camera will be described.

(Application example to imaging system)
FIG. 10 shows an example of a circuit block when the solid-state imaging device according to the present invention is applied to a camera. A shutter 1001 is provided in front of the taking lens 1002 and controls exposure. The amount of light is controlled by the diaphragm 1003 as necessary, and an image is formed on the solid-state imaging device 1004. A signal output from the solid-state imaging device 1004 is processed by a signal processing circuit 1005 and converted from an analog signal to a digital signal by an A / D converter 1006. The output digital signal is further processed by a signal processing unit 1007. The processed digital signal is stored in the memory 1010 or sent to an external device through the external I / F 1013. The solid-state imaging device 1004, the imaging signal processing circuit 1005, the A / D converter 1006, and the signal processing unit 1007 are controlled by a timing generation unit 1008, and the entire system is controlled by an overall control unit / arithmetic unit 1009. In order to record an image on the recording medium 1012, the output digital signal is recorded through a recording medium control I / F unit 1011 controlled by the overall control unit / arithmetic unit.

101, 701 Silicon substrate 102, 702 Light receiving part 103, 105, 107, 703, 705, 707 Interlayer insulating film 104, 106, 108, 704, 706, 708 Wiring layer 109, 709 Insulating film (passivation film)
110, 710 Color filter 111, 711 Micro lens 112, 113, 114 Antireflection film

Claims (17)

A method of manufacturing a solid-state imaging device,
Forming a first antireflection film on a light receiving portion provided on a semiconductor substrate;
Forming a plurality of wiring layers and a plurality of interlayer insulating films including a flattened uppermost interlayer insulating film on the antireflection film;
Forming a second antireflection film on the plurality of wiring layers and the plurality of interlayer insulating films;
A method of manufacturing a solid-state imaging device, comprising: forming a first insulating film having a higher refractive index than the uppermost interlayer insulating film on the second antireflection film. The step of forming the first antireflection film includes a step of forming at least a silicon nitride film,
The method for manufacturing a solid-state imaging device according to claim 1, wherein the step of forming the second antireflection film includes a step of forming at least a silicon oxynitride film. The method of manufacturing a solid-state imaging device according to claim 2, wherein the step of forming the first antireflection film includes a step of forming a silicon oxide film before the step of forming the silicon nitride film. The method of manufacturing a solid-state imaging device according to claim 2, wherein the step of forming the first antireflection film includes a step of forming the silicon nitride film and a step of forming a silicon oxynitride film. 5. The method of manufacturing a solid-state imaging device according to claim 1, wherein the uppermost interlayer insulating film is a silicon oxide film, and the first insulating film is a silicon nitride film. 6. 6. The method for manufacturing a solid-state imaging device according to claim 5, wherein the silicon nitride film of the first insulating film is formed by a plasma CVD method. The method for manufacturing a solid-state imaging device according to claim 1, further comprising a step of forming the third antireflection film on the first insulating film. The method of manufacturing a solid-state imaging device according to claim 7, wherein the step of forming the third antireflection film includes a step of forming a silicon oxynitride film. The method for manufacturing a solid-state imaging device according to claim 8, further comprising a step of forming a color filter film after the step of forming the third antireflection film. A method of manufacturing a solid-state imaging device,
Forming a first silicon oxide film and a first silicon nitride film on a light receiving portion provided on a semiconductor substrate;
Forming a plurality of wiring layers and a plurality of interlayer insulating films including a planarized uppermost interlayer insulating film on the first silicon nitride film;
Forming a silicon oxynitride film on the plurality of wiring layers and the plurality of interlayer insulating films;
A method for manufacturing a solid-state imaging device, including a step of forming a second silicon nitride film on the silicon oxynitride film. The method for manufacturing a solid-state imaging device according to claim 10, wherein the uppermost interlayer insulating film is a silicon oxide film. The method for manufacturing a solid-state imaging device according to claim 10, wherein the second silicon nitride film is formed by a plasma CVD method. 13. The method for manufacturing a solid-state imaging device according to claim 10, further comprising a step of forming a silicon oxynitride film different from the silicon oxynitride film on the second silicon nitride film. The method for manufacturing a solid-state imaging device according to claim 13, further comprising a step of forming a color filter film after the step of forming the another silicon oxynitride film. The method for manufacturing a solid-state imaging device according to claim 1, wherein an uppermost wiring layer among the plurality of wiring layers is disposed on the uppermost interlayer insulating film. The solid-state imaging device manufacturing method according to claim 15, wherein an end portion of the uppermost wiring layer has a tapered shape. In the step of forming the first antireflection film, the semiconductor substrate includes a peripheral circuit portion in which a MOS transistor is disposed, and the light receiving portion, the MOS transistor is disposed, and the MOS transistor is disposed more than the peripheral circuit portion. The manufacturing method of the solid-state imaging device according to claim 1, wherein a pixel portion having a low arrangement density is provided.

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