JP2012018945A - Overcurrent protection element - Google Patents

Overcurrent protection element Download PDF

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JP2012018945A
JP2012018945A JP2010153606A JP2010153606A JP2012018945A JP 2012018945 A JP2012018945 A JP 2012018945A JP 2010153606 A JP2010153606 A JP 2010153606A JP 2010153606 A JP2010153606 A JP 2010153606A JP 2012018945 A JP2012018945 A JP 2012018945A
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substrate
circuit layer
layer
support layer
overcurrent protection
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hong-zhi Qiu
邱鴻智
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QIU HONG ZHI
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QIU HONG ZHI
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Abstract

PROBLEM TO BE SOLVED: To provide a light, thin, and short overcurrent protection element that can prevent arc discharging and that can be applied to a small electrical facility.SOLUTION: The element comprises a first substrate, a support layer, a circuit layer, a second substrate and two electrodes. One surface of the first substrate is an installation surface, and the support layer is laminated on the installation surface. The circuit layer is laminated on the support layer and the second substrate is laminated on the circuit layer. A surface that faces the circuit layer in the second substrate is a bonding surface, and the bonding surface has a secondary concave hole, and the two electrodes are provided on both sides of the first substrate, the support layer, the circuit layer and the second substrate that are laminated, and the two electrodes are electrically connected to the circuit layer.

Description

本発明は過電流保護素子に関し、特に、アーク放電が生じるのを防ぐことができるとともに、軽く、薄く、短く、小さい電気設備に適用することが可能な過電流保護素子に関する。 The present invention relates to an overcurrent protection element, and more particularly to an overcurrent protection element that can prevent arc discharge and can be applied to light, thin, short, and small electrical equipment.

従来のヒューズのほとんどは、二枚の基板を相互に重ね合わせてなり、二枚の基板の間には溶断体が設けられ、二枚の基板の両側にはそれぞれ電極が設けられ、電極は溶断体に電気的に接続される。なお、基板はソリッド体である。 Most conventional fuses are made by stacking two substrates on top of each other. A fusing body is provided between the two substrates, electrodes are provided on both sides of the two substrates, and the electrodes are fused. Electrically connected to the body. The substrate is a solid body.

従来のヒューズは、理想的な状態では、大きすぎる電流が溶断体を通過した時、溶断体が溶断する。しかしながら、実際には、溶断体が溶断する時に生じる圧力が、ソリッド体である基板の制限を受けるため取り除かれず、溶断しなければならない溶断体の一部が溶断されず繋がった状態になり、アーク放電が生じることがある。このため、電気回路の安全が保障されず、電気機器を損傷させたり、危険な事故を発生させたりすることがある。 In a conventional fuse, in an ideal state, when an excessively large current passes through the fusing body, the fusing body is blown out. However, in actuality, the pressure generated when the melted body is melted is not removed because it is limited by the solid substrate, and a part of the melted body that must be melted is connected without being melted. Discharge may occur. For this reason, the safety of the electric circuit is not guaranteed, and the electric equipment may be damaged or a dangerous accident may occur.

そこで、本発明は、アーク放電が生じるのを防ぐことができるとともに、軽く、薄く、短く、小さい電気設備に適用することが可能な過電流保護素子を提供することを目的とする。   Therefore, an object of the present invention is to provide an overcurrent protection element that can prevent arc discharge from occurring and can be applied to a light, thin, short, and small electric facility.

本発明による過電流保護素子は、第一基板と、支持層と、回路層と、第二基板と、二つの電極からなる。第一基板の一面は設置面であり、支持層は、設置面に重ねて設けられ、回路層は、支持層に重ねて設けられ、第二基板は、回路層に重ねて設けられ、第二基板における回路層と対向する面は貼り合わせ面であり、貼り合わせ面は第二凹穴部を備え、二つの電極は、重ねあわされた第一基板と、支持層と、回路層と、第二基板の両側に設けられるとともに、二つの電極は回路層に電気的に接続される。 The overcurrent protection element according to the present invention includes a first substrate, a support layer, a circuit layer, a second substrate, and two electrodes. One surface of the first substrate is an installation surface, the support layer is provided to overlap the installation surface, the circuit layer is provided to overlap the support layer, and the second substrate is provided to overlap the circuit layer, The surface of the substrate facing the circuit layer is a bonding surface, the bonding surface has a second recessed hole, and the two electrodes are a first substrate, a support layer, a circuit layer, a first layer, Provided on both sides of the two substrates, the two electrodes are electrically connected to the circuit layer.

本発明の過電流保護素子の実施例１の外観を示した斜視図である。It is the perspective view which showed the external appearance of Example 1 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例１の一部を示した断面図である。It is sectional drawing which showed a part of Example 1 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例２の一部を示した断面図である。It is sectional drawing which showed a part of Example 2 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例３の一部を示した断面図である。It is sectional drawing which showed a part of Example 3 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例４の一部を示した断面図である。It is sectional drawing which showed a part of Example 4 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例５の一部を示した断面図である。It is sectional drawing which showed a part of Example 5 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例６の一部を示した断面図である。It is sectional drawing which showed a part of Example 6 of the overcurrent protection element of this invention. 本発明の過電流保護素子の実施例７の一部を示した断面図である。It is sectional drawing which showed a part of Example 7 of the overcurrent protection element of this invention.

（実施例１）
図１は本発明の過電流保護素子の実施例１の外観を示した斜視図であり、図２は本発明の過電流保護素子の実施例１の一部を示した断面図である。本発明の実施例１の過電流保護素子は、第一基板１０と第二基板１３とを重ね合わせてなる。第一基板１０と第二基板１３の間には、支持層１１と回路層１２が挟んで設けられる。第一基板１０における支持層１１に対向する面は設置面１００であり、設置面１００は、第一凹穴部１０１を選択的に備える。第一基板１０の他面は表示面１０２であり、表示面１０２には、ラベル１０３が選択的に設けられる。第二基板１３における回路層１２に対向する面は貼り合わせ面１３０であり、貼り合わせ面１３０は第二凹穴部１３１を備えている。また、第二凹穴部１３１の空間は、第一凹穴部１０１の空間より大きい。第二基板１３の他面は表示面１３２であり、表示面１３２にはラベル１３３が選択的に設けられる。なお、ラベル１３３、１０３は、規格か文字の内、いずれか一つである。 Example 1
FIG. 1 is a perspective view showing an appearance of an overcurrent protection element according to a first embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a part of the overcurrent protection element according to the first embodiment of the present invention. The overcurrent protection element according to the first embodiment of the present invention is formed by stacking a first substrate 10 and a second substrate 13. A support layer 11 and a circuit layer 12 are sandwiched between the first substrate 10 and the second substrate 13. The surface facing the support layer 11 in the first substrate 10 is an installation surface 100, and the installation surface 100 is selectively provided with a first recessed hole portion 101. The other surface of the first substrate 10 is a display surface 102, and a label 103 is selectively provided on the display surface 102. A surface of the second substrate 13 facing the circuit layer 12 is a bonding surface 130, and the bonding surface 130 includes a second recessed hole portion 131. Further, the space of the second recessed hole portion 131 is larger than the space of the first recessed hole portion 101. The other surface of the second substrate 13 is a display surface 132, and a label 133 is selectively provided on the display surface 132. The labels 133 and 103 are any one of standards and characters.

重ねあわされた第一基板１０、支持層１１、回路層１２、第二基板１３の両側には、それぞれ電極１４、１５が設けられるとともに、電極１４、１５は回路層１２に電気的に接続される。 Electrodes 14 and 15 are provided on both sides of the overlapped first substrate 10, support layer 11, circuit layer 12, and second substrate 13, respectively, and the electrodes 14 and 15 are electrically connected to the circuit layer 12. The

（実施例２〜５）
図３から図６は、それぞれ、本発明の過電流保護素子の実施例２から実施例５の一部を示した断面図である。第一基板２０、３０、４０、５０と、支持層２１、３１、４１、５１と、回路層２２、３２、４２、５２と、第二基板２３、３３、４３、５３は重ね合わせられる。その重ねあわされた構造の両側には、それぞれ電極２４、２５が設けられ（図３に図示）、第一凹穴部３００、４００、５００内には、第一補助凹穴部３０１、４０１、５０１が設けられ（図４から図６に図示）、第二凹穴部３３０、４３０、５３０内には、第二補助凹穴部３３１、４３１、５３１が設けられ、第一基板２０、３０、４０、５０と第二基板２３、３３、４３、５３の表示面の内のいずれか一つの面或いは二つの面に、ラベルが選択的に設けられる。 (Examples 2 to 5)
FIGS. 3 to 6 are cross-sectional views showing a part of Examples 2 to 5 of the overcurrent protection element of the present invention, respectively. The first substrates 20, 30, 40, 50, the support layers 21, 31, 41, 51, the circuit layers 22, 32, 42, 52, and the second substrates 23, 33, 43, 53 are overlaid. Electrodes 24 and 25 are respectively provided on both sides of the overlapped structure (shown in FIG. 3), and in the first recessed hole portions 300, 400, and 500, first auxiliary recessed hole portions 301, 401, 501 (illustrated in FIGS. 4 to 6), second auxiliary recessed hole portions 331, 431, and 531 are provided in the second recessed hole portions 330, 430, and 530, and the first substrates 20, 30, Labels are selectively provided on any one or two of the display surfaces of 40 and 50 and the second substrates 23, 33, 43 and 53.

図３に示すように、第一凹穴部２００の空間は第二凹穴部２３０に等しい。 As shown in FIG. 3, the space of the first recessed hole portion 200 is equal to the second recessed hole portion 230.

図４に示すように、第一凹穴部３００の空間は第二凹穴部３３０の空間より大きい。 As shown in FIG. 4, the space of the first recessed hole portion 300 is larger than the space of the second recessed hole portion 330.

図５に示すように、第一凹穴部４００の空間は第二凹穴部４３０の空間に等しい。 As shown in FIG. 5, the space of the first recessed hole portion 400 is equal to the space of the second recessed hole portion 430.

図６に示すように、第一凹穴部５００の空間は第二凹穴部４３０の空間より小さい。 As shown in FIG. 6, the space of the first recessed hole portion 500 is smaller than the space of the second recessed hole portion 430.

（実施例６）
図７は、本発明の過電流保護素子の実施例６の一部を示した断面図である。第一基板６０の一面は設置面６００であり、設置面６００は第一凹穴部６０１を備えており、第一支持層６１と第一回路層６２は、設置面６００に順番に重ねられ、中基板６３は第一回路層６２に重ねられ、中基板６３における第一凹穴部６０１と対向する位置には貫孔部６３０が設けられ、第二回路層６４と第二支持層６５は中基板６３に順番に重ねられ、第二基板６６は第二支持層６５に重ねられる。第二基板６６における第二支持層６５と対向する面は貼り合わせ面６６０であり、貼り合わせ面６６０は第二凹穴部６６１を備える。また、第一基板６０と、第一支持層６１と、第一回路層６２と、中基板６３と、第二回路層６４と、第二支持層６５と、第二基板６６とを重ね合わせた構造の両側には、それぞれ電極が設けられ、電極は、第一回路層６２と第二回路層６４に電気的に接続される。 (Example 6)
FIG. 7 is a cross-sectional view showing a part of Example 6 of the overcurrent protection element of the present invention. One surface of the first substrate 60 is an installation surface 600, the installation surface 600 includes a first recessed hole portion 601, and the first support layer 61 and the first circuit layer 62 are sequentially stacked on the installation surface 600, The middle substrate 63 is overlaid on the first circuit layer 62, and a through hole portion 630 is provided at a position facing the first recessed hole portion 601 in the middle substrate 63, and the second circuit layer 64 and the second support layer 65 are located in the middle substrate 63. The second substrate 66 is stacked on the second support layer 65 in this order. The surface of the second substrate 66 that faces the second support layer 65 is a bonding surface 660, and the bonding surface 660 includes a second recessed hole portion 661. In addition, the first substrate 60, the first support layer 61, the first circuit layer 62, the intermediate substrate 63, the second circuit layer 64, the second support layer 65, and the second substrate 66 are overlaid. Electrodes are provided on both sides of the structure, and the electrodes are electrically connected to the first circuit layer 62 and the second circuit layer 64.

（実施例７）
図８は、本発明の過電流保護素子の実施例７の一部を示した断面図である。本発明の実施例７の過電流保護素子は、第一基板７０に、第一支持層７１と、第一回路層７２と、第一中基板７３と、第二支持層７４と、第二回路層７５と、第二中基板７６と、第三回路層７７と、第三支持層７８と、第二基板７９とを順番に重ね合わせてなる。第二回路層７５は導電柱７５０を備えており、、導電柱７５０が第二支持層７４と第一中基板７３を貫通することにより、第一回路層７２と第二回路層７５は相互に電気的に接続される。また、第三回路層７７は導電柱７７０を備えており、導電柱７７０が第二中基板７６を貫通することにより、第三回路層７７は第二回路層７５に電気的に接続される。第一中基板７３内には第一貫孔部７３０が設けられているとともに、第二中基板７６内には第二貫孔部７６０が設けられており、各基板や各層を重ね合わせた構造の両側には、二つの電極（図示せず）がそれぞれ設けられており、その内一つの電極は第一回路層７２と電気的に接続され、もう一方の電極は第三回路層７７と電気的に接続される。 (Example 7)
FIG. 8 is a sectional view showing a part of an embodiment 7 of the overcurrent protection element of the present invention. The overcurrent protection element according to Example 7 of the present invention includes a first substrate 70, a first support layer 71, a first circuit layer 72, a first intermediate substrate 73, a second support layer 74, and a second circuit. The layer 75, the second intermediate substrate 76, the third circuit layer 77, the third support layer 78, and the second substrate 79 are sequentially stacked. The second circuit layer 75 includes a conductive column 750, and the first circuit layer 72 and the second circuit layer 75 are mutually connected by the conductive column 750 penetrating the second support layer 74 and the first intermediate substrate 73. Electrically connected. Further, the third circuit layer 77 includes a conductive column 770, and the third circuit layer 77 is electrically connected to the second circuit layer 75 when the conductive column 770 passes through the second middle substrate 76. The first middle substrate 73 is provided with a first consistent hole portion 730, and the second middle substrate 76 is provided with a second through-hole portion 760, and each substrate and each layer are stacked. Two electrodes (not shown) are provided on both sides of the first electrode, one of which is electrically connected to the first circuit layer 72 and the other electrode is electrically connected to the third circuit layer 77. Connected.

上述した各実施例における基板は、セラミックからなる。回路層と導電柱は、導電性をもつ合金、或いは導電性をもつ合成材料からなる。また、第一基板と第二基板の他面は表示面にすることができ、表示面にはラベルを設けることができる。 The board | substrate in each Example mentioned above consists of ceramics. The circuit layer and the conductive column are made of a conductive alloy or a synthetic material having conductivity. Moreover, the other surface of the first substrate and the second substrate can be a display surface, and a label can be provided on the display surface.

本発明では、凹穴部、補助凹穴部、及び貫孔部を設けることにより、回路層に流れる電流が大きすぎて溶断が生じた時、回路層が、凹穴部、補助凹穴部或いは貫孔部の方向へ溶断するため、回路層は完全に切断され、アーク放電が生じるのを防ぐことができる。また、凹穴部、補助凹穴部、或いは貫孔部は、回路層が溶断する際に生じる圧力を取り除くことができる。 In the present invention, by providing the recessed hole portion, the auxiliary recessed hole portion, and the through-hole portion, when the current flowing through the circuit layer is too large and fusing occurs, the circuit layer becomes the recessed hole portion, the auxiliary recessed hole portion, or Since fusing in the direction of the through-hole portion, the circuit layer is completely cut and arc discharge can be prevented from occurring. Moreover, the concave hole part, the auxiliary concave hole part, or the through-hole part can remove pressure generated when the circuit layer is melted.

１０、２０、３０、４０、５０ 第一基板
１００ 設置面
１０１、２００、３００、４００、５００ 第一凹穴部
１０２ 表示面
１０３ ラベル
１１、２１、３１、４１、５１ 支持層
１２、２２、３２、４２、５２ 回路層
１３、２３、３３、４３、５３ 第二基板
１３０ 貼り合わせ面
１３１、２３０、３３０、４３０、５３０ 第二凹穴部
１３２ 表示面
１３３ ラベル
１４、１５ 電極
３０１、４０１、５０１ 第一補助凹穴部
３３１、４３１、５３１ 第二補助凹穴部
６０ 第一基板
６００ 設置面
６０１ 第一凹穴部
６１ 第一支持層
６２ 第一回路層
６３ 中基板
６３０ 貫孔部
６４ 第二回路層
６５ 第二支持層
６６ 第二基板
６６０ 貼り合わせ面
６６１ 第二凹穴部
７０ 第一基板
７１ 第一支持層
７２ 第一回路層
７３ 第一中基板
７３０ 第一貫孔部
７４ 第二支持層
７５ 第二回路層
７５０ 導電柱
７６ 第二中基板
７６０ 第二貫孔部
７７ 第三回路層
７７０ 導電柱
７８ 第三支持層
７９ 第二基板 10, 20, 30, 40, 50 First substrate 100 Installation surface 101, 200, 300, 400, 500 First concave hole portion 102 Display surface 103 Label 11, 21, 31, 41, 51 Support layers 12, 22, 32 , 42, 52 Circuit layers 13, 23, 33, 43, 53 Second substrate 130 Bonding surfaces 131, 230, 330, 430, 530 Second concave hole 132 Display surface 133 Label 14, 15 Electrodes 301, 401, 501 First auxiliary concave hole portions 331, 431, 531 Second auxiliary concave hole portion 60 First substrate 600 Installation surface 601 First concave hole portion 61 First support layer 62 First circuit layer 63 Middle substrate 630 Through hole portion 64 Second Circuit layer 65 Second support layer 66 Second substrate 660 Bonding surface 661 Second concave hole portion 70 First substrate 71 First support layer 72 First circuit layer 73 First intermediate substrate 730 First integrated hole portion 74 Second support Layer 75 second circuit layer 750 conductive pillars 76 second in the substrate 760 second consistency hole 77 third circuit layer 770 conductive pillars 78 third supporting layer 79 second substrate

Claims (10)

第一基板と、支持層と、回路層と、第二基板と、二つの電極からなる過電流保護素子において、
第一基板の一面は設置面であり、
支持層は、設置面に重ねて設けられ、
回路層は、支持層に重ねて設けられ、
第二基板は、回路層に重ねて設けられ、第二基板における回路層と対向する面は貼り合わせ面であり、貼り合わせ面は第二凹穴部を備え、
二つの電極は、重ねあわされた第一基板と、支持層と、回路層と、第二基板の両側に設けられるとともに、二つの電極は回路層に電気的に接続されることを特徴とする、過電流保護素子。 In the overcurrent protection element comprising the first substrate, the support layer, the circuit layer, the second substrate, and two electrodes,
One side of the first substrate is the installation surface,
The support layer is provided over the installation surface,
The circuit layer is provided over the support layer,
The second substrate is provided so as to overlap the circuit layer, the surface facing the circuit layer in the second substrate is a bonding surface, the bonding surface includes a second recessed hole portion,
The two electrodes are provided on both sides of the stacked first substrate, support layer, circuit layer, and second substrate, and the two electrodes are electrically connected to the circuit layer. , Overcurrent protection element. 該設置面は第一凹穴部を備えることを特徴とする、請求項１に記載の過電流保護素子。 The overcurrent protection element according to claim 1, wherein the installation surface includes a first recessed hole portion. 該第一凹穴部内には第一補助凹穴部が設けられ、第一補助凹穴部は該第一凹穴部と連通し、該第二凹穴部内には第二補助凹穴部が設けられ、第二補助凹穴部は該第二凹穴部と連通することを特徴とする、請求項２に記載の過電流保護素子。 A first auxiliary recessed hole is provided in the first recessed hole, the first auxiliary recessed hole communicates with the first recessed hole, and a second auxiliary recessed hole is formed in the second recessed hole. The overcurrent protection element according to claim 2, wherein the second auxiliary recessed hole portion is provided and communicates with the second recessed hole portion. 該第一凹穴部の空間は、該第二凹穴部の空間より小さいか、或いは大きいか、或いは等しいことを特徴とする、請求項２または請求項３に記載の過電流保護素子。 4. The overcurrent protection element according to claim 2, wherein the space of the first recessed hole portion is smaller than, larger than, or equal to the space of the second recessed hole portion. 5. 該第一基板と第二基板はセラミックからなり、該回路層は、導電性をもつ合金、或いは導電性をもつ合成材料からなり、該第一基板の他面は表示面であり、該第二基板の他面は表示面であり、それら表示面の内の少なくとも一つにはラベルが設けられ、ラベルは、規格か文字の内のいずれか一つであることを特徴とする、請求項２または請求項３に記載の過電流保護素子。 The first substrate and the second substrate are made of ceramic, the circuit layer is made of a conductive alloy or a conductive synthetic material, and the other surface of the first substrate is a display surface. The other surface of the substrate is a display surface, and at least one of the display surfaces is provided with a label, and the label is any one of a standard and a character. Or the overcurrent protection element of Claim 3. 第一基板と、第一支持層と、第一回路層と、中基板と、第二回路層と、第二支持層と、第二基板と、二つの電極からなる過電流保護素子において、
第一基板の一面は設置面であり、
第一支持層は、設置面に重ねて設けられ、
第一回路層は、第一支持層に重ねて設けられ、
中基板は、第一回路層に重ねて設けられるとともに、貫孔部を備え、
第二回路層は、中基板に重ねて設けられ、
第二支持層は、第二回路層に重ねて設けられ、
第二基板は、第二支持層に重ねて設けられるとともに、第二基板における第二支持層と対向する面は貼り合わせ面であり、
二つの電極は、重ねあわされた第一基板と、第一支持層と、第一回路層と、中基板と、第二回路層と、第二支持層と、第二基板の両側に設けられるとともに、二つの電極は第一回路層と第二回路層にそれぞれ電気的に接続されることを特徴とする、過電流保護素子。 In the overcurrent protection element comprising the first substrate, the first support layer, the first circuit layer, the middle substrate, the second circuit layer, the second support layer, the second substrate, and two electrodes,
One side of the first substrate is the installation surface,
The first support layer is provided to overlap the installation surface,
The first circuit layer is provided to overlap the first support layer,
The middle substrate is provided so as to overlap the first circuit layer, and includes a through hole portion.
The second circuit layer is provided on the middle substrate,
The second support layer is provided to overlap the second circuit layer,
The second substrate is provided so as to overlap the second support layer, and the surface of the second substrate that faces the second support layer is a bonding surface.
The two electrodes are provided on both sides of the first substrate, the first support layer, the first circuit layer, the middle substrate, the second circuit layer, the second support layer, and the second substrate that are overlapped. In addition, the overcurrent protection element is characterized in that the two electrodes are electrically connected to the first circuit layer and the second circuit layer, respectively. 該設置面は第一凹穴部を備え、該貼り合わせ面は第二凹穴部を備えることを特徴とする、請求項６に記載の過電流保護素子。 The overcurrent protection element according to claim 6, wherein the installation surface includes a first concave hole portion, and the bonding surface includes a second concave hole portion. 該第一基板と、該中基板と、該第二基板は、酸化アルミニウムセラミックからなり、該第一回路層と該第二回路層は、導電性をもつ合金、或いは導電性をもつ合成材料からなり、該第一基板の他面は表示面であり、該第二基板の他面は表示面であり、それらの表示面の内の少なくとも一つにはラベルが設けられ、ラベルは、規格か文字の内のいずれか一つであることを特徴とする、請求項６または請求項７に記載の過電流保護素子。 The first substrate, the middle substrate, and the second substrate are made of an aluminum oxide ceramic, and the first circuit layer and the second circuit layer are made of a conductive alloy or a conductive synthetic material. The other surface of the first substrate is a display surface, the other surface of the second substrate is a display surface, and at least one of the display surfaces is provided with a label. The overcurrent protection element according to claim 6, wherein the overcurrent protection element is any one of characters. 第一基板と、第一支持層と、第一回路層と、第一中基板と、第二支持層と、第二回路層と、第二中基板と、第三回路層と、第三支持層と、第二基板と、二つの電極からなる過電流保護素子において、
第一支持層は、第一基板に重ねて設けられ、
第一回路層は、第一支持層に重ねて設けられ、
第一中基板は、第一回路層に重ねて設けられるとともに、第一貫孔部を備え、
第二支持層は、第一中基板に重ねて設けられ、
第二回路層は、第二支持層に重ねて設けられるとともに、導電柱を備え、導電柱は第二支持層と第二中基板を貫通し、それにより第二回路層は第一回路層に電気的に接続され、
第二中基板は、第二回路層に重ねて設けられるとともに、第二貫孔部を備え、
第三回路層は、第二中基板に重ねて設けられるとともに、導電柱を備え、導電柱は第二中基板を貫通し、それにより第三回路層は第二回路層に電気的に接続され、
第三支持層は、第三回路層に重ねて設けられ、
第二基板は、第三支持層に重ねて設けられ、
二つの電極は、重ねあわされた第一基板と、第一支持層と、第一回路層と、第一中基板と、第二支持層と、第二回路層と、第二中基板と、第三回路層と、第三支持層と、第二基板の両側に設けられるとともに、電極の内の一つは第三回路層に電気的に接続され、電極の内のもう一つは第一回路層に電気的に接続されることを特徴とする、過電流保護素子。 A first substrate, a first support layer, a first circuit layer, a first intermediate substrate, a second support layer, a second circuit layer, a second intermediate substrate, a third circuit layer, and a third support. In an overcurrent protection element composed of a layer, a second substrate, and two electrodes,
The first support layer is provided so as to overlap the first substrate,
The first circuit layer is provided to overlap the first support layer,
The first intermediate substrate is provided so as to overlap the first circuit layer, and includes a first consistent hole,
The second support layer is provided to overlap the first middle substrate,
The second circuit layer is provided so as to overlap the second support layer, and includes a conductive column, and the conductive column penetrates the second support layer and the second intermediate substrate, whereby the second circuit layer becomes the first circuit layer. Electrically connected,
The second intermediate substrate is provided so as to overlap the second circuit layer, and includes a second through hole portion,
The third circuit layer is provided so as to overlap the second middle substrate and includes a conductive column, and the conductive column penetrates the second middle substrate, whereby the third circuit layer is electrically connected to the second circuit layer. ,
The third support layer is provided over the third circuit layer,
The second substrate is provided on the third support layer,
The two electrodes are the first substrate, the first support layer, the first circuit layer, the first intermediate substrate, the second support layer, the second circuit layer, the second intermediate substrate, The third circuit layer, the third support layer, and the second substrate are provided on both sides, and one of the electrodes is electrically connected to the third circuit layer, and the other of the electrodes is the first. An overcurrent protection element, wherein the overcurrent protection element is electrically connected to a circuit layer. 該第一基板と、該第一中基板と、第二中基板と、第二基板はセラミックからなり、該第一回路層と、該第二回路層と、該第三回路層と、該導電柱は、導電性をもつ合金、或いは導電性をもつ合成材料からなり、該第一基板の他面は表示面であり、該第二基板の他面は表示面であり、それらの表示面の内の少なくとも一つにはラベルが設けられ、ラベルは、規格か文字の内のいずれか一つであることを特徴とする、請求項９に記載の過電流保護素子。 The first substrate, the first intermediate substrate, the second intermediate substrate, and the second substrate are made of ceramic, the first circuit layer, the second circuit layer, the third circuit layer, and the conductive layer. The pillar is made of a conductive alloy or a conductive synthetic material. The other surface of the first substrate is a display surface, and the other surface of the second substrate is a display surface. The overcurrent protection device according to claim 9, wherein at least one of the labels is provided with a label, and the label is one of a standard and a letter.
JP2010153606A 2010-07-06 2010-07-06 Overcurrent protection element Pending JP2012018945A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5446354A (en) * 1977-09-20 1979-04-12 Mitsubishi Electric Corp Narrow gap type current limiting fuse
JPS5787457U (en) * 1980-11-19 1982-05-29
JPH0935614A (en) * 1995-07-19 1997-02-07 Hitachi Chem Co Ltd Chip fuse and manufacture of it
JP2001338802A (en) * 2000-05-26 2001-12-07 Ngk Insulators Ltd Resettable fuse element and its manufacturing method
JP2003086074A (en) * 2001-09-13 2003-03-20 Sumitomo Wiring Syst Ltd Fuse box
JP4460647B1 (en) * 2009-03-30 2010-05-12 釜屋電機株式会社 Chip-type fuse and manufacturing method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5446354A (en) * 1977-09-20 1979-04-12 Mitsubishi Electric Corp Narrow gap type current limiting fuse
JPS5787457U (en) * 1980-11-19 1982-05-29
JPH0935614A (en) * 1995-07-19 1997-02-07 Hitachi Chem Co Ltd Chip fuse and manufacture of it
JP2001338802A (en) * 2000-05-26 2001-12-07 Ngk Insulators Ltd Resettable fuse element and its manufacturing method
JP2003086074A (en) * 2001-09-13 2003-03-20 Sumitomo Wiring Syst Ltd Fuse box
JP4460647B1 (en) * 2009-03-30 2010-05-12 釜屋電機株式会社 Chip-type fuse and manufacturing method thereof

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