JP2012004211A - Semiconductor device, heat radiation panel, and method of manufacturing semiconductor device - Google Patents

Semiconductor device, heat radiation panel, and method of manufacturing semiconductor device Download PDF

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JP2012004211A
JP2012004211A JP2010136043A JP2010136043A JP2012004211A JP 2012004211 A JP2012004211 A JP 2012004211A JP 2010136043 A JP2010136043 A JP 2010136043A JP 2010136043 A JP2010136043 A JP 2010136043A JP 2012004211 A JP2012004211 A JP 2012004211A
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wiring board
heat sink
semiconductor device
chamfered
semiconductor chip
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Kobo Minami
弘法 南
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Renesas Electronics Corp
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Renesas Electronics Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent warpage of a wiring board caused by the difference in a heat expansion coefficient of the wiring board from that of a heat radiation plate while making a semiconductor device compact.SOLUTION: The semiconductor device comprises a rectangular wiring board 10 having four chamfered corners, a semiconductor chip 20 mounted on the wiring board 10, and a rectangular heat radiation plate 40 having a planar shape where four corners are chamfered and attached to the wiring board 10 to cover the semiconductor chip 20. The heat radiation plate 40 has a protrusion 90 protruding from the chamfered part of the heat radiation plate 40 to the wiring board 10 side along a surface of the wiring board 10 formed by chamfering, and the chamfer width of the heat radiation plate 40 is narrower than the chamfer width of the wiring board 10.

Description

本発明は、半導体装置、放熱板、及び半導体装置の製造方法に関する。   The present invention relates to a semiconductor device, a heat sink, and a method for manufacturing a semiconductor device.

半導体装置において、熱放散や耐湿性の向上、半導体チップの保護等の目的から、半導体チップ上面に金属板を取り付ける場合がある。特許文献１に記載の技術は、金属缶によりＬＳＩチップを気密封止することで、放熱特性、耐湿信頼性、及び温度サイクル特性等の向上を図るというものである。   In a semiconductor device, a metal plate may be attached to the upper surface of the semiconductor chip for the purpose of improving heat dissipation, moisture resistance, protecting the semiconductor chip, and the like. The technique described in Patent Document 1 is intended to improve heat dissipation characteristics, moisture resistance reliability, temperature cycle characteristics, and the like by hermetically sealing an LSI chip with a metal can.

特許文献２及び３には、半導体装置の耐湿性を向上させるため、半導体チップを樹脂により封止した後、配線基板の上面全体を金属キャップにより被覆するという技術が開示されている。また特許文献４に記載の技術では、半導体チップを搭載する配線基板がプリント基板に搭載され、樹脂により封止され、かつ金属キャップにより覆われており、さらに配線基板の表面及び裏面側にリード端子を形成するというものである。これにより多ピン、かつ低熱抵抗の半導体装置を提供できると記載されている。   Patent Documents 2 and 3 disclose a technique in which a semiconductor chip is sealed with a resin and then the entire upper surface of the wiring substrate is covered with a metal cap in order to improve the moisture resistance of the semiconductor device. In the technique described in Patent Document 4, a wiring board on which a semiconductor chip is mounted is mounted on a printed board, sealed with resin, and covered with a metal cap, and lead terminals are provided on the front and back sides of the wiring board. Is to form. Thus, it is described that a semiconductor device having a multi-pin and low thermal resistance can be provided.

特許文献５に記載の技術は、半導体チップを覆う金属製のカバープレートについて、配線基板に接着固定するための部分を分割して設けるというものである。これによって温度の変化により発生するカバープレートの機械的な応力が配線基板に作用し、配線基板に反りが生じることを抑制することができると記載されている。   The technique described in Patent Document 5 is to divide and provide a portion for bonding and fixing to a wiring board on a metal cover plate that covers a semiconductor chip. It is described that the mechanical stress of the cover plate generated by the change of temperature acts on the wiring board, thereby preventing the wiring board from warping.

特開２０００−０９１４６６号公報JP 2000-091466 A 特開平０２−１２９９３７号公報Japanese Patent Laid-Open No. 02-129937 特開昭６３−２４８１５３号公報Japanese Patent Laid-Open No. 63-248153 特開平０７−１０６４７１号公報Japanese Patent Application Laid-Open No. 07-106471 特開平１１−１６３１８６号公報JP-A-11-163186

放熱板を配線基板に装着する場合、放熱板の固定には接着剤を用いることが多い。そして接着剤を硬化するために、キュア工程において長時間の加熱を行う場合がある。この場合放熱板と配線基板の熱膨張係数の差により、配線基板に反りが生じてしまう可能性がある。従って放熱板を、接着剤を用いずに配線基板に固定することが望ましい。さらには半導体装置の小型化を図ることも望まれる。   When attaching a heat sink to a wiring board, an adhesive is often used to fix the heat sink. In order to cure the adhesive, heating may be performed for a long time in the curing process. In this case, the wiring board may be warped due to the difference in thermal expansion coefficient between the heat sink and the wiring board. Therefore, it is desirable to fix the heat sink to the wiring board without using an adhesive. It is also desired to reduce the size of the semiconductor device.

本発明によれば、四隅を面取りした矩形の配線基板と、
前記配線基板に実装されている半導体チップと、
前記半導体チップを覆うように前記配線基板に装着されている、平面形状が四隅を面取りした矩形である放熱板と、
を備え、
前記放熱板は、前記配線基板の面取りにより形成された面に沿うように、前記放熱板の面取り部から前記配線基板側に突出した凸部を有しており、
前記放熱板の面取り幅は、前記配線基板の面取り幅よりも狭い半導体装置が提供される。 According to the present invention, a rectangular wiring board with four corners chamfered, and
A semiconductor chip mounted on the wiring board;
A heat sink that is mounted on the wiring board so as to cover the semiconductor chip, and whose planar shape is a rectangle with four corners chamfered, and
With
The heat sink has a convex portion protruding from the chamfered portion of the heat sink toward the wiring board so as to be along a surface formed by chamfering of the wiring board,
A semiconductor device is provided in which the chamfer width of the heat sink is narrower than the chamfer width of the wiring board.

本発明によれば、放熱板は、配線基板の面取りにより形成された面に沿うように放熱板の面取り部から配線基板側に突出した凸部によって配線基板に固定されている。このため接着剤を用いずに放熱板を配線基板に固定することができる。また放熱板の面取り幅は、配線基板の面取り幅よりも狭い。よって放熱板の面取り部以外の部分を、平面視において配線基板の内側に位置できる。従って半導体装置の小型化を図りつつ、放熱板との熱膨張係数の差によって生じる配線基板の反りを防止することができる。   According to the present invention, the heat radiating plate is fixed to the wiring board by the convex portion protruding from the chamfered portion of the heat radiating plate to the wiring board side along the surface formed by chamfering the wiring board. For this reason, a heat sink can be fixed to a wiring board, without using an adhesive agent. Further, the chamfer width of the heat sink is narrower than the chamfer width of the wiring board. Therefore, portions other than the chamfered portion of the heat sink can be located inside the wiring board in a plan view. Therefore, it is possible to prevent the wiring board from being warped due to the difference in thermal expansion coefficient from the heat sink while reducing the size of the semiconductor device.

本発明によれば、平面形状が四隅を面取りした矩形である放熱板であって、面取り部から突出した凸部を備えており、前記凸部は、四隅を面取りした配線基板への装着面側において、前記配線基板の面取りされた面に沿うように突出しており、面取り幅は、前記配線基板の面取り幅よりも狭い放熱板が提供される。   According to the present invention, the planar shape is a heat sink that is a rectangle with chamfered corners, and includes a convex portion that protrudes from the chamfered portion, and the convex portion is on the mounting surface side of the wiring board with the chamfered corner In this case, a heat dissipation plate is provided that protrudes along the chamfered surface of the wiring board, the chamfering width being narrower than the chamfering width of the wiring board.

本発明によれば、四隅を面取りした矩形の配線基板と、前記配線基板に実装されている半導体チップと、前記半導体チップを覆うように前記配線基板に装着されている、平面形状が四隅を面取りした矩形である放熱板と、を備え、前記放熱板は、前記配線基板の面取りにより形成された面に沿うように、前記放熱板の面取り部から前記配線基板側に突出した凸部を有しており、前記放熱板の面取り幅は、前記配線基板の面取り幅よりも狭い半導体装置の製造方法であって、前記半導体チップを、能動面を介して前記配線基板に実装する工程と、前記放熱板の前記凸部が前記配線基板の面取りにより形成された前記面に沿う位置に位置しないように、前記配線基板に前記放熱板を載せる工程と、前記放熱板の前記凸部が前記配線基板の面取りにより形成された前記面に沿う位置まで、前記放熱板を前記配線基板の前記半導体チップを実装する面において回転させる工程と、を備える半導体装置の製造方法が提供される。   According to the present invention, a rectangular wiring board having four corners chamfered, a semiconductor chip mounted on the wiring board, and a planar shape mounted on the wiring board so as to cover the semiconductor chip are chamfered at the four corners. A heat sink that is rectangular, and the heat sink has a protrusion protruding from the chamfered portion of the heat sink toward the wiring board so as to be along a surface formed by chamfering the wiring board. The heat radiation plate has a chamfered width that is narrower than the chamfered width of the wiring board, wherein the semiconductor chip is mounted on the wiring board through an active surface; Placing the heat sink on the wiring board so that the convex part of the plate is not located at a position along the surface formed by chamfering the wiring board; and For chamfering To a position along the surface formed Ri, a method of manufacturing a semiconductor device and a step of rotating the plane of mounting the semiconductor chip of the wiring substrate the heat radiating plate is provided.

本発明によれば、半導体装置の小型化を図りつつ、放熱板との熱膨張係数の差によって生じる配線基板の反りを防止することができる。   ADVANTAGE OF THE INVENTION According to this invention, the curvature of the wiring board produced by the difference in a thermal expansion coefficient with a heat sink can be prevented, aiming at size reduction of a semiconductor device.

第１の実施形態に係る半導体装置を示す断面図である。1 is a cross-sectional view showing a semiconductor device according to a first embodiment. 図１に示す半導体装置を示す平面図である。FIG. 2 is a plan view showing the semiconductor device shown in FIG. 1. 図１に示す半導体装置の製造方法を示す平面図である。It is a top view which shows the manufacturing method of the semiconductor device shown in FIG. 第２の実施形態に係る半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device which concerns on 2nd Embodiment. 比較例に係る半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device which concerns on a comparative example.

以下、本発明の実施の形態について、図面を用いて説明する。尚、すべての図面において、同様な構成要素には同様の符号を付し、適宜説明を省略する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

図１は、第１の実施形態に係る半導体装置を示す断面図であって、後述する図２のＡ−Ａ'断面を示す。本実施形態に係る半導体装置１００は、配線基板１０と、半導体チップ２０と、放熱板４０を備える。半導体チップ２０は、配線基板１０に実装されている。放熱板４０は、半導体チップ２０を覆うように配線基板１０に装着されている。また放熱板４０は、凸部９０を有する。   FIG. 1 is a cross-sectional view showing the semiconductor device according to the first embodiment, and shows a cross section taken along the line AA ′ of FIG. 2 to be described later. The semiconductor device 100 according to this embodiment includes a wiring board 10, a semiconductor chip 20, and a heat sink 40. The semiconductor chip 20 is mounted on the wiring board 10. The heat sink 40 is mounted on the wiring board 10 so as to cover the semiconductor chip 20. The heat sink 40 has a convex portion 90.

図２は、図１に示す半導体装置１００を示す平面図である。配線基板１０は、四隅を面取りした矩形を有している。放熱板４０は、四隅を面取りした矩形を有している。放熱板４０の面取り幅αは、配線基板１０の面取り幅βよりも狭い。凸部９０は、放熱板４０の面取り部から突出しており、かつ配線基板１０の面取りにより形成された面（以下面取り面）に沿う。   FIG. 2 is a plan view showing the semiconductor device 100 shown in FIG. The wiring board 10 has a rectangle with four corners chamfered. The heat sink 40 has a rectangular shape with four chamfered corners. The chamfering width α of the heat sink 40 is narrower than the chamfering width β of the wiring board 10. The convex portion 90 protrudes from the chamfered portion of the heat sink 40 and is along a surface (hereinafter, chamfered surface) formed by chamfering the wiring board 10.

図１及び図２を用いて、本実施形態に係る半導体装置の構成を詳細に説明する。図１に示すように、配線基板１０は、半導体チップ２０を実装する面とは反対面に複数の外部接続端子５０を有する。配線基板１０は、例えば樹脂材料により構成される。外部接続端子５０は、例えばはんだボールにより構成される。半導体チップ２０は、バンプ７０を介して配線基板１０にフリップチップ実装している。   The configuration of the semiconductor device according to the present embodiment will be described in detail with reference to FIGS. As shown in FIG. 1, the wiring substrate 10 has a plurality of external connection terminals 50 on the surface opposite to the surface on which the semiconductor chip 20 is mounted. The wiring board 10 is made of, for example, a resin material. The external connection terminal 50 is composed of, for example, a solder ball. The semiconductor chip 20 is flip-chip mounted on the wiring substrate 10 via bumps 70.

図１に示すように、半導体チップ２０には、配線基板１０への実装面とは反対の面において熱伝導性ペースト３０が塗布されている。放熱板４０は、熱伝導性ペースト３０を介して半導体チップ２０と接している。熱伝導性ペースト３０は、例えばシリコングリスのように、熱硬化性を有しない材料により構成される。また熱伝導性ペースト３０は、例えば熱硬化性を有する材料により構成することもできる。この場合熱伝導性ペースト３０は、硬化後においても放熱板４０を容易に取り外すことができる程度の熱硬化性を有する。   As shown in FIG. 1, a heat conductive paste 30 is applied to the semiconductor chip 20 on the surface opposite to the mounting surface on the wiring substrate 10. The heat sink 40 is in contact with the semiconductor chip 20 via the heat conductive paste 30. The thermally conductive paste 30 is made of a material that does not have thermosetting properties, such as silicon grease. Moreover, the heat conductive paste 30 can also be comprised with the material which has thermosetting, for example. In this case, the heat conductive paste 30 has such a thermosetting property that the heat radiating plate 40 can be easily removed even after curing.

図１に示すように、放熱板４０は、配線基板１０と反対側に、半導体チップ２０の高さ幅よりも深い凹部８０を形成している。平面視において、凹部８０の底面は半導体チップ２０よりも大きい。半導体チップ２０及び熱伝導性ペースト３０は、凹部８０内に位置している。放熱板４０は、凹部８０の底面において半導体チップ２０と接している。また放熱板４０は、凹部８０の周辺部の平坦部４２において配線基板１０と接している。図２に示すように、放熱板４０の面取り部以外の部分は、平面視において配線基板１０の内側に位置する。   As shown in FIG. 1, the heat sink 40 has a recess 80 deeper than the height of the semiconductor chip 20 on the side opposite to the wiring board 10. In the plan view, the bottom surface of the recess 80 is larger than the semiconductor chip 20. The semiconductor chip 20 and the heat conductive paste 30 are located in the recess 80. The heat sink 40 is in contact with the semiconductor chip 20 on the bottom surface of the recess 80. Further, the heat radiating plate 40 is in contact with the wiring substrate 10 at the flat portion 42 around the concave portion 80. As shown in FIG. 2, the portion other than the chamfered portion of the heat radiating plate 40 is located inside the wiring board 10 in a plan view.

次に図２及び図３を用いて、本実施形態に係る半導体装置の製造方法を説明する。まず半導体チップ２０を、配線基板１０に実装する（図示せず）。次いで、半導体チップ２０の配線基板１０への実装面とは反対の面上に、熱伝導性ペースト３０を塗布する（図示せず）。そして図３に示すように放熱板４０を、配線基板１０に載せる。ここで凸部９０は、配線基板１０の面取り面に沿う位置に位置しない。   Next, a method for manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS. First, the semiconductor chip 20 is mounted on the wiring board 10 (not shown). Next, a heat conductive paste 30 is applied on the surface opposite to the surface on which the semiconductor chip 20 is mounted on the wiring substrate 10 (not shown). Then, as shown in FIG. 3, the heat sink 40 is placed on the wiring board 10. Here, the convex portion 90 is not located at a position along the chamfered surface of the wiring board 10.

そして図２に示すように放熱板４０を、凸部９０が配線基板１０の面取り面に沿う位置まで、配線基板１０の半導体チップ２０を搭載する面において回転させる。これにより放熱板４０は配線基板１０に固定される。また固定された位置から回転させることで、放熱板４０を配線基板１０から容易に外すことができる。   Then, as shown in FIG. 2, the heat radiating plate 40 is rotated on the surface on which the semiconductor chip 20 of the wiring substrate 10 is mounted until the convex portion 90 is positioned along the chamfered surface of the wiring substrate 10. Thereby, the heat sink 40 is fixed to the wiring board 10. Moreover, the heat sink 40 can be easily removed from the wiring board 10 by rotating from the fixed position.

次に本実施形態の効果を説明する。図５は、比較例に係る半導体装置を示す断面図である。比較例に係る半導体装置では図５に示すように、接着剤６０を用いて放熱板４０を配線基板１０に固定している。これに対し本実施形態によれば、放熱板４０は、放熱板４０の面取り部から配線基板１０側に突出した４つの凸部９０によって配線基板１０を挟むことにより、配線基板１０に固定されている。このため接着剤を用いずに放熱板４０を配線基板１０に固定することができる。よって放熱板との熱膨張係数の差によって生じる配線基板の反りを防止することができる。また半導体装置の製造コストを低減することもできる。   Next, the effect of this embodiment will be described. FIG. 5 is a cross-sectional view showing a semiconductor device according to a comparative example. In the semiconductor device according to the comparative example, as shown in FIG. 5, the heat sink 40 is fixed to the wiring board 10 using an adhesive 60. On the other hand, according to the present embodiment, the heat radiating plate 40 is fixed to the wiring substrate 10 by sandwiching the wiring substrate 10 by the four convex portions 90 protruding from the chamfered portion of the heat radiating plate 40 to the wiring substrate 10 side. Yes. For this reason, the heat sink 40 can be fixed to the wiring board 10 without using an adhesive. Therefore, it is possible to prevent the wiring board from being warped due to a difference in thermal expansion coefficient from the heat sink. In addition, the manufacturing cost of the semiconductor device can be reduced.

また放熱板４０の面取り幅αは、配線基板１０の面取り幅βよりも狭い。よって放熱板４０は平面視において面取りをしていないとみなした場合における配線基板１０の内側に位置できる。従って上記の効果に加え、半導体装置の小型化を図ることができる。また凸部９０は配線基板１０の面取り部の内側に位置する。従って、凸部によって他の隣り合う半導体装置にキズを発生させることを防止することができる。   Further, the chamfering width α of the heat sink 40 is narrower than the chamfering width β of the wiring board 10. Therefore, the heat sink 40 can be positioned inside the wiring board 10 when it is considered that the chamfering is not performed in a plan view. Therefore, in addition to the above effects, the semiconductor device can be reduced in size. The convex portion 90 is located inside the chamfered portion of the wiring board 10. Therefore, it is possible to prevent the adjacent convex portion from being damaged by the convex portion.

さらに配線基板１０へ固定した放熱板４０は、配線基板１０の半導体チップ２０を搭載する面において回転させることで、容易に配線基板１０から外すことができる。従って、放熱板を配線基板へ固定した後においても、不具合品の不良解析が容易となる。   Furthermore, the heat sink 40 fixed to the wiring board 10 can be easily detached from the wiring board 10 by rotating on the surface of the wiring board 10 on which the semiconductor chip 20 is mounted. Therefore, even after the heat sink is fixed to the wiring board, failure analysis of defective products becomes easy.

図４は、第２の実施形態に係る半導体装置１１０を示す断面図であり、第１の実施形態における図１に対応している。本実施形態に係る半導体装置１１０は図４に示すように、配線基板１０の面取り面が、半導体チップ２０を搭載する面から反対面に向けて内側に傾斜していることを除いて、第１の実施形態に係る半導体装置１００と同様である。   FIG. 4 is a cross-sectional view showing the semiconductor device 110 according to the second embodiment, and corresponds to FIG. 1 in the first embodiment. As shown in FIG. 4, the semiconductor device 110 according to the present embodiment is the first except that the chamfered surface of the wiring substrate 10 is inclined inward from the surface on which the semiconductor chip 20 is mounted toward the opposite surface. This is the same as the semiconductor device 100 according to the embodiment.

本実施形態によっても、第１の実施形態と同様の効果を得ることができる。また配線基板１０の面取り面が、半導体チップ２０を搭載する面から反対面に向けて内側に傾斜している。従って第１の実施形態と比較して、より強固に放熱板を配線基板に固定することができる。   Also according to this embodiment, the same effect as that of the first embodiment can be obtained. Further, the chamfered surface of the wiring substrate 10 is inclined inward from the surface on which the semiconductor chip 20 is mounted toward the opposite surface. Therefore, compared with the first embodiment, the heat sink can be more firmly fixed to the wiring board.

以上、図面を参照して本発明の実施形態について述べたが、これらは本発明の例示であり、上記以外の様々な構成を採用することもできる。   As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

１０ 配線基板
２０ 半導体チップ
３０ 熱伝導性ペースト
４０ 放熱板
４２ 平坦部
５０ 外部接続端子
６０ 接着剤
７０ バンプ
８０ 凹部
９０ 凸部
１００ 半導体装置
１１０ 半導体装置
α 面取り幅
β 面取り幅 DESCRIPTION OF SYMBOLS 10 Wiring board 20 Semiconductor chip 30 Thermally conductive paste 40 Heat sink 42 Flat part 50 External connection terminal 60 Adhesive 70 Bump 80 Recess 90 Protrusion 100 Semiconductor device 110 Semiconductor device α Chamfer width β Chamfer width

Claims (5)

四隅を面取りした矩形の配線基板と、
前記配線基板に実装されている半導体チップと、
前記半導体チップを覆うように前記配線基板に装着されている、平面形状が四隅を面取りした矩形である放熱板と、
を備え、
前記放熱板は、前記配線基板の面取りにより形成された面に沿うように、前記放熱板の面取り部から前記配線基板側に突出した凸部を有しており、
前記放熱板の面取り幅は、前記配線基板の面取り幅よりも狭い半導体装置。 A rectangular circuit board with chamfered corners;
A semiconductor chip mounted on the wiring board;
A heat sink that is mounted on the wiring board so as to cover the semiconductor chip, and whose planar shape is a rectangle with four corners chamfered, and
With
The heat sink has a convex portion protruding from the chamfered portion of the heat sink toward the wiring board so as to be along a surface formed by chamfering of the wiring board,
A semiconductor device in which a chamfering width of the heat radiating plate is narrower than a chamfering width of the wiring board. 請求項１に記載の半導体装置において、
前記放熱板は、前記半導体チップ上に形成された熱伝導性ペーストを介して前記半導体チップと接している半導体装置。 The semiconductor device according to claim 1,
The said heat sink is a semiconductor device which is in contact with the said semiconductor chip through the heat conductive paste formed on the said semiconductor chip. 請求項１または２に記載の半導体装置において、
前記配線基板の面取りにより形成された前記面は、前記半導体チップを搭載する面から反対面にむけて内側に傾斜している半導体装置。 The semiconductor device according to claim 1 or 2,
The semiconductor device, wherein the surface formed by chamfering the wiring board is inclined inward from the surface on which the semiconductor chip is mounted toward the opposite surface. 平面形状が四隅を面取りした矩形である放熱板であって、
面取り部から突出した凸部を備えており、
前記凸部は、四隅を面取りした配線基板への装着面側において、前記配線基板の面取りされた面に沿うように突出しており、
面取り幅は、前記配線基板の面取り幅よりも狭い放熱板。 The heat sink is a rectangular shape whose plane shape is chamfered at four corners,
It has a convex part protruding from the chamfered part,
The convex portion protrudes along the chamfered surface of the wiring board on the mounting surface side to the wiring board chamfered at the four corners,
A heat radiation plate whose chamfer width is narrower than the chamfer width of the wiring board. 四隅を面取りした矩形の配線基板と、
前記配線基板に実装されている半導体チップと、
前記半導体チップを覆うように前記配線基板に装着されている、平面形状が四隅を面取りした矩形である放熱板と、
を備え、
前記放熱板は、前記配線基板の面取りにより形成された面に沿うように、前記放熱板の面取り部から前記配線基板側に突出した凸部を有しており、
前記放熱板の面取り幅は、前記配線基板の面取り幅よりも狭い半導体装置の製造方法であって、
前記半導体チップを、能動面を介して前記配線基板に実装する工程と、
前記凸部が前記配線基板の面取りにより形成された前記面に沿う位置に位置しないように、前記配線基板に前記放熱板を載せる工程と、
前記凸部が前記配線基板の面取りにより形成された前記面に沿う位置まで、前記放熱板を前記配線基板の前記半導体チップを実装する面において回転させる工程と、
を備える半導体装置の製造方法。
A rectangular circuit board with chamfered corners;
A semiconductor chip mounted on the wiring board;
A heat sink that is mounted on the wiring board so as to cover the semiconductor chip, and whose planar shape is a rectangle with four corners chamfered, and
With
The heat sink has a convex portion protruding from the chamfered portion of the heat sink toward the wiring board so as to be along a surface formed by chamfering of the wiring board,
The chamfer width of the heat sink is a method for manufacturing a semiconductor device that is narrower than the chamfer width of the wiring board,
Mounting the semiconductor chip on the wiring board via an active surface;
Placing the heat sink on the wiring board so that the convex portion is not located at a position along the surface formed by chamfering the wiring board;
Rotating the heat sink on the surface of the wiring substrate on which the semiconductor chip is mounted, until the convex portion is positioned along the surface formed by chamfering the wiring substrate;
A method for manufacturing a semiconductor device comprising:
JP2010136043A 2010-06-15 2010-06-15 Semiconductor device, heat radiation panel, and method of manufacturing semiconductor device Pending JP2012004211A (en)

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