JP2011511436A5 - - Google Patents
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- Publication number
- JP2011511436A5 JP2011511436A5 JP2010543474A JP2010543474A JP2011511436A5 JP 2011511436 A5 JP2011511436 A5 JP 2011511436A5 JP 2010543474 A JP2010543474 A JP 2010543474A JP 2010543474 A JP2010543474 A JP 2010543474A JP 2011511436 A5 JP2011511436 A5 JP 2011511436A5
- Authority
- JP
- Japan
- Prior art keywords
- disk
- suppression
- substrate
- restraining
- generating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001629 suppression Effects 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 7
- 230000000452 restraining Effects 0.000 claims 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 3
- 229910052802 copper Inorganic materials 0.000 claims 3
- 239000010949 copper Substances 0.000 claims 3
- 239000011347 resin Substances 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 238000003475 lamination Methods 0.000 claims 1
Claims (12)
前記基板は、
各ビアがランド内に配置された複数の積層されたビアと、
前記複数の積層されたビアの少なくとも一つを取り巻く少なくとも一つの抑制ディスクであって、前記基板ビア構造体の面内変形を抑制する、前記抑制ディスクとを含み、
前記抑制ディスクと前記ビアとの間に絶縁ギャップを含む、基板ビア構造体。 A substrate via structure including a substrate,
The substrate is
A plurality of stacked vias, each via located in the land;
Wherein a plurality of at least one of suppression disk surrounding at least one of the stacked vias, suppresses plane deformation of the front Stories substrate via structure, and a said suppression disc,
A substrate via structure including an insulating gap between the suppression disk and the via .
基板中に、各ビアがランド内に配置されたビア積層を生成するステップと、
抑制ディスクを生成するステップと、
前記ビア積層の面内変形を抑制するため、前記ビアのランドを取り巻くように、前記抑制ディスクを組み込むステップとを含み、
前記組み込むステップは、前記抑制ディスクの内径と前記ビアのランドとの間に絶縁ギャップを生成するステップを含む、方法。 A method for suppressing in-plane deformation of via lamination,
Creating a via stack in the substrate with each via disposed within the land;
Generating a suppression disk; and
To suppress the in-plane deformation of the via stack, so as to surround the land pre SL via, seen including a step of incorporating the suppression disc,
The incorporating step includes creating an insulating gap between an inner diameter of the constraining disk and a land of the via .
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/020,561 US20090189289A1 (en) | 2008-01-27 | 2008-01-27 | Embedded constrainer discs for reliable stacked vias in electronic substrates |
| US12/020,561 | 2008-01-27 | ||
| PCT/EP2009/050585 WO2009124785A1 (en) | 2008-01-27 | 2009-01-20 | Embedded constrainer discs for reliable stacked vias in electronic substrates |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011511436A JP2011511436A (en) | 2011-04-07 |
| JP2011511436A5 true JP2011511436A5 (en) | 2012-08-23 |
| JP5182827B2 JP5182827B2 (en) | 2013-04-17 |
Family
ID=40898382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010543474A Expired - Fee Related JP5182827B2 (en) | 2008-01-27 | 2009-01-20 | Built-in suppression disk for reliable stacked vias in electronic substrates |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20090189289A1 (en) |
| EP (1) | EP2238620B1 (en) |
| JP (1) | JP5182827B2 (en) |
| KR (1) | KR101285030B1 (en) |
| CN (1) | CN101926000A (en) |
| AT (1) | ATE521989T1 (en) |
| TW (1) | TW200947657A (en) |
| WO (1) | WO2009124785A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI449152B (en) * | 2011-12-21 | 2014-08-11 | Ind Tech Res Inst | Semiconductor device stacked structure |
| US11270955B2 (en) * | 2018-11-30 | 2022-03-08 | Texas Instruments Incorporated | Package substrate with CTE matching barrier ring around microvias |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08172264A (en) * | 1994-12-20 | 1996-07-02 | Hitachi Chem Co Ltd | Multilayer wiring board and manufacture of metal-foil-clad laminated board |
| JP4204150B2 (en) * | 1998-10-16 | 2009-01-07 | パナソニック株式会社 | Multilayer circuit board |
| TW430935B (en) * | 1999-03-19 | 2001-04-21 | Ind Tech Res Inst | Frame type bonding pad structure having a low parasitic capacitance |
| JP4052434B2 (en) * | 2001-02-05 | 2008-02-27 | Ｔｄｋ株式会社 | Multilayer substrate and manufacturing method thereof |
| JP2003163453A (en) * | 2001-11-27 | 2003-06-06 | Matsushita Electric Works Ltd | Multilayer wiring board and method for manufacturing the same |
| JP2005011883A (en) | 2003-06-17 | 2005-01-13 | Shinko Electric Ind Co Ltd | Wiring board, manufacturing method thereof and semiconductor device |
| JP2005019730A (en) * | 2003-06-26 | 2005-01-20 | Kyocera Corp | Wiring substrate and electronic device using it |
| KR20050072881A (en) * | 2004-01-07 | 2005-07-12 | 삼성전자주식회사 | Multi layer substrate with impedance matched via hole |
| JP2005251792A (en) * | 2004-03-01 | 2005-09-15 | Fujitsu Ltd | Wiring board and its manufacturing method |
| US7523545B2 (en) | 2006-04-19 | 2009-04-28 | Dynamic Details, Inc. | Methods of manufacturing printed circuit boards with stacked micro vias |
| JP2008124398A (en) * | 2006-11-15 | 2008-05-29 | Shinko Electric Ind Co Ltd | Semiconductor package and its manufacturing method |
-
2008
- 2008-01-27 US US12/020,561 patent/US20090189289A1/en not_active Abandoned
-
2009
- 2009-01-05 TW TW098100116A patent/TW200947657A/en unknown
- 2009-01-20 AT AT09731078T patent/ATE521989T1/en not_active IP Right Cessation
- 2009-01-20 CN CN2009801029748A patent/CN101926000A/en active Pending
- 2009-01-20 WO PCT/EP2009/050585 patent/WO2009124785A1/en active Application Filing
- 2009-01-20 KR KR1020107016530A patent/KR101285030B1/en not_active IP Right Cessation
- 2009-01-20 EP EP09731078A patent/EP2238620B1/en not_active Not-in-force
- 2009-01-20 JP JP2010543474A patent/JP5182827B2/en not_active Expired - Fee Related
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