JP2011501323A5 - - Google Patents

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Publication number
JP2011501323A5
JP2011501323A5 JP2010531211A JP2010531211A JP2011501323A5 JP 2011501323 A5 JP2011501323 A5 JP 2011501323A5 JP 2010531211 A JP2010531211 A JP 2010531211A JP 2010531211 A JP2010531211 A JP 2010531211A JP 2011501323 A5 JP2011501323 A5 JP 2011501323A5
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JP
Japan
Prior art keywords
thread
coroutine
routine
computer
subsequent
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JP2010531211A
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English (en)
Japanese (ja)
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JP5315354B2 (ja
JP2011501323A (ja
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Priority claimed from US11/977,593 external-priority patent/US8589925B2/en
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Publication of JP2011501323A publication Critical patent/JP2011501323A/ja
Publication of JP2011501323A5 publication Critical patent/JP2011501323A5/ja
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Publication of JP5315354B2 publication Critical patent/JP5315354B2/ja
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JP2010531211A 2007-10-25 2008-10-22 ルーチン内のスレッドを切り替える方法 Active JP5315354B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/977,593 US8589925B2 (en) 2007-10-25 2007-10-25 Techniques for switching threads within routines
US11/977,593 2007-10-25
PCT/US2008/080825 WO2009055494A2 (en) 2007-10-25 2008-10-22 Techniques for switching threads within routines

Publications (3)

Publication Number Publication Date
JP2011501323A JP2011501323A (ja) 2011-01-06
JP2011501323A5 true JP2011501323A5 (enExample) 2011-12-08
JP5315354B2 JP5315354B2 (ja) 2013-10-16

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Family Applications (1)

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JP2010531211A Active JP5315354B2 (ja) 2007-10-25 2008-10-22 ルーチン内のスレッドを切り替える方法

Country Status (5)

Country Link
US (3) US8589925B2 (enExample)
EP (1) EP2217998B1 (enExample)
JP (1) JP5315354B2 (enExample)
TW (2) TWI515655B (enExample)
WO (1) WO2009055494A2 (enExample)

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KR20150019349A (ko) * 2013-08-13 2015-02-25 삼성전자주식회사 다중 쓰레드 실행 프로세서 및 이의 동작 방법
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