JP2011258842A - Charged particle beam exposure apparatus and method of manufacturing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a pattern including an aperiodic part finer than the resolution limit of a UV exposure apparatus efficiently.SOLUTION: An electron beam exposure apparatus 10 comprises: a multi-beam generation system 20a generating a large number of sub-beams 36 of an electron beam; a beam blanking array member 30 in which many rectangular openings 31 irradiated with the sub-beams 36 are formed; a modulator 40 which leads a sub-beam 36 passing through an opening selected from many openings 31 to a wafer W; and a deflection projection system 20b capable of deflecting a sub-beam 36 passed through an opening 31 selected by the modulator 40 at least in the X direction and forming a reduced image of the opening 31 on the surface of the wafer W.

Description

  The present invention relates to a charged particle beam exposure apparatus using a charged particle beam such as an electron beam as an exposure beam, and a device manufacturing method using the charged particle beam exposure apparatus.

  In an exposure apparatus (hereinafter referred to as an ultraviolet light exposure apparatus) that uses ultraviolet light from the far ultraviolet region to the vacuum ultraviolet region as an exposure beam, which is used in a lithography process for manufacturing electronic devices (microdevices) such as semiconductor elements In order to increase the resolution, the exposure wavelength has been shortened, the illumination conditions have been optimized, and the immersion method has been applied to further increase the numerical aperture of the projection optical system. Recently, in order to form a circuit pattern having a finer pitch than the resolution limit of an ultraviolet light exposure apparatus, the wafer has a pitch about the resolution limit using an ultraviolet light exposure apparatus, and the line width is 1 pitch. A double patterning method has been proposed in which a line and space pattern (hereinafter referred to as an L & S pattern) different from / 2 is formed, and then an L & S pattern having a pitch of 1/2 is formed using the L & S pattern.

  The double patterning method is roughly divided into a pitch splitting technique and a spacer pitch doubling (Spacer Pitch Doubling, Spacer transfer or SidewalL transfer) technique (see, for example, Non-Patent Document 1). In the pitch division technique, the process of forming a plurality of line patterns having a line width of 1/4 of the pitch of the pattern to be exposed on the wafer by exposure and development of the L & S pattern is a relative position between the wafer and the pattern to be exposed. Is shifted twice by 1/2 of the pitch of the pattern to be exposed. In the spacer pitch doubling technology, a plurality of line patterns having a line width of 1/4 of the pitch are formed on the wafer by exposure and development of the L & S pattern, and the pattern is formed in the space portion (side wall portion) of each line pattern. After the deposition, for example, an L & S pattern having a pitch of 1/2 is formed using the deposited pattern as a mask.

  Also, in order to form a pattern finer than the resolution limit of the ultraviolet light exposure apparatus, a circular spot of a large number of electron beams that can be turned on / off and is smaller than the resolution limit of the deflectable ultraviolet light exposure apparatus. Has been proposed in which an electron beam exposure apparatus is disposed in a rectangular exposure region, and is turned on / off while scanning a wafer with respect to the exposure region and deflecting a circular spot of the multiple electron beams (for example, Non-patent document 2 and patent document 1 (see Japanese translations of PCT publication No. 2006-504134 corresponding thereto).

Y. K. Choi, et al .: "Sub-20nm CMOS Fin-FET Technologies" IEDM Tech. Dig. No. 19.1, pp. 421-424, Washington D. C., USA (USA), Dec. (2001) E. Slot, et al .: "MAPPER: HIGH THROUGHPUT MASKLESS LITHOGRAPHY" Proc. Of SPIE (USA) Vol. 6921, 69211P (2008)

US Pat. No. 7,173,263

According to the conventional double patterning method, it is possible to form an L & S pattern having a finer pitch than the resolution limit of the ultraviolet light exposure apparatus. However, it is difficult to form a pattern including a non-periodic portion finer than the resolution limit of the ultraviolet light exposure apparatus only by the double patterning method.
In addition, when an electron beam exposure apparatus that turns on / off while deflecting a circular spot of a large number of electron beams is used to perform exposure of the entire pattern including the non-periodic portion, exposure time (drawing) Time) and the throughput (the number of wafers processed per unit time) decreases.

  In view of such circumstances, the present invention provides a device manufacturing method capable of efficiently forming a pattern including an aperiodic portion finer than the resolution limit of an ultraviolet light exposure apparatus, and a charge usable in the device manufacturing method. An object of the present invention is to provide a particle beam exposure apparatus.

  According to the first aspect of the present invention, a charged particle beam exposure apparatus that exposes a target with a charged particle beam is provided. This charged particle beam exposure apparatus is formed such that a beam generation system for generating a plurality of beams composed of the charged particle beam and a plurality of rectangular openings irradiated with the beams are parallel to each other in the longitudinal direction. An array member, a modulator for directing the beam through the aperture selected from the plurality of apertures to the target, and the beam that has passed through the aperture selected by the modulator at least of the aperture of the array member A deflection projection system capable of deflecting in a first direction along a longitudinal direction or a short side direction and forming an image in which the aperture of the array member is reduced by the beam, and an exposure area of the beam by the deflection projection system And a moving mechanism that relatively moves the target in a second direction orthogonal to the first direction.

  Moreover, according to the second aspect of the present invention, the charged particle beam exposure apparatus of the present invention is provided in the step of forming the periodic pattern on the surface of the target, and in the region where the periodic pattern is formed on the surface of the target. And partially removing the periodic pattern by selectively exposing the images of the plurality of apertures of the array member.

  According to the third aspect of the present invention, the periodic pattern is formed on the surface of the target, and the opening is reduced by a beam made of a charged particle beam that has passed through an opening selected from a plurality of rectangular openings. The target is arranged in a region including the exposure region where the image is formed so that the periodic direction of the periodic pattern of the target is parallel to the longitudinal direction of the image of the opening, and the periodic pattern of the target The image formed by the beam of the aperture selected from the plurality of rectangular apertures is deflected at least in a first direction along the longitudinal direction or the transversal direction of the image of the aperture. Expose the target to the exposure area so that the area where the periodic pattern of the target is formed passes through the exposure area. The periodic pattern using a mask pattern which is relatively moved in a second direction orthogonal to one direction and is exposed to an area where the periodic pattern of the target is formed by an image of an aperture selected from the plurality of apertures A device manufacturing method is provided that partially removes.

  According to the device manufacturing method of the present invention, for example, a periodic pattern is formed using an ultraviolet light exposure apparatus, and then formed by a beam of charged particle beams that pass through an opening selected from a plurality of rectangular openings. An image of the rectangular aperture or any larger on the periodic pattern by deflecting the image of the aperture at least in the first direction and moving the target relative to the exposure area of the beam in the second direction A non-periodic pattern image can be exposed. Therefore, a pattern including an aperiodic portion finer than the resolution limit of the ultraviolet light exposure apparatus can be efficiently formed.

  Moreover, the charged particle beam exposure apparatus of the present invention can be used for carrying out the device manufacturing method of the present invention.

1 is a partially cutaway view showing an electron beam exposure apparatus 10 according to an example of an embodiment. (A) is a plan view showing the beam blanking array member 30 in FIG. 1, (B) is an enlarged view showing a portion B in FIG. 2 (A), and (C) is an opening 31 of FIG. 2 (B). It is an enlarged view which shows the deflector 54 formed in the vicinity. 1A is an enlarged view showing an exposure region 52 of the small beam 36 by the projection lens array 35 in FIG. 1, FIG. 3B is an enlarged view of a portion B in FIG. 3A, and FIG. It is a top view which shows an example of the locus | trajectory of relative movement with. It is an enlarged view which shows a part of circuit pattern of a certain layer of the electronic device manufactured in embodiment. (A) is an enlarged sectional view showing a part of a wafer for electronic devices, (B) is a view showing a light amount distribution of a pattern exposed on the wafer, and (C) is a state after exposure and development of the wafer. (D) is an enlarged cross-sectional view showing a state after etching of the wafer, (E) is an enlarged cross-sectional view showing a state in which the resist is peeled off from the wafer, and (F) is a view of FIG. It is an enlarged plan view which shows the pattern of the surface of a wafer. 5A is an enlarged cross-sectional view showing a state where a spacer layer is deposited on the surface of the wafer in FIG. 5E, and FIG. 5B is an enlarged cross-sectional view showing a state after anisotropic etching is performed on the spacer layer of the wafer. (C) is an enlarged sectional view showing the state after removing the intermediate layer from the wafer, (D) is an enlarged sectional view showing the state after etching the device layer of the wafer, (E) is FIG. 7 is an enlarged plan view showing a part of an L & S pattern on the surface of the wafer in FIG. 6A is an enlarged plan view showing a pattern exposed to the resist layer on the surface of the wafer of FIG. 6E by an electron beam exposure apparatus, and FIG. 7B is a pattern obtained after development of the resist of FIG. It is an enlarged plan view shown. It is a flowchart which shows an example of the pattern formation method of embodiment. It is a flowchart which shows an example of the manufacturing process of an electronic device. (A) is a top view which shows the beam blanking array member of a modification, (B) is an enlarged view of the B section of FIG. 10 (A). (A) is an enlarged plan view showing an exposure area of a modification, and (B) is an enlarged view of a portion B in FIG. 11 (A).

An example of an embodiment of the present invention will be described with reference to FIGS.
First, the configuration and operation of an electron beam exposure apparatus as a charged particle beam exposure apparatus used in a lithography process for manufacturing semiconductor elements and the like in the present embodiment will be described.
FIG. 1 is a diagram schematically showing an overall configuration of a maskless electron beam exposure apparatus 10 according to the present embodiment. In FIG. 1, an electron beam exposure apparatus 10 includes an electron beam optical system 20 that exposes a wafer W (target) in an exposure region 52 in which a large number of small beams 36 made of individually deflectable electron beams are arranged, A modulation device 40 that individually turns on and off the small beam 36, a wafer stage WST that holds the wafer W by electrostatic adsorption or the like, and scans (moves) the wafer W in a predetermined direction with respect to the exposure region 52; A main control system 12 composed of a computer for overall control of the operation of the entire apparatus, and other control systems are provided. Electron beam optical system 20 and wafer stage WST are housed in a vacuum chamber (not shown). Hereinafter, the Z-axis is taken in parallel to the optical axis of the electron beam optical system 20, and the X-axis is perpendicular to the plane of FIG. 1 within a plane perpendicular to the Z-axis (substantially a horizontal plane in the present embodiment). A description will be given taking the Y axis parallel to the paper surface. In the present embodiment, the surface of the wafer W being exposed is substantially parallel to the XY plane.

  The wafer W is obtained by applying an electron beam resist (photosensitive material) to the surface of a disk-shaped substrate made of, for example, silicon. The position of wafer stage WST in the X and Y directions and the rotation angle around the axis parallel to the Z axis (θz direction) are measured by a multi-axis laser interferometer in stage control system 14. Based on this measurement value and the control information from the main control system 12, the stage control system 14 uses the drive mechanism (not shown) such as a linear motor, for example, the position and speed in the X and Y directions of the wafer stage WST, In addition, the rotation angle in the θz direction is controlled.

  As shown in FIG. 3A, an exposure region 52 on the surface of the wafer W is a rectangular shape elongated in the X direction with a width LX in the X direction of, for example, 26 mm and a width LY in the Y direction of, for example, about 10 mm. It is an area. The surface of the wafer W being exposed is scanned in the Y direction (+ Y direction or −Y direction) with respect to the exposure region 52 by the wafer stage WST. Therefore, the Y direction is the mechanical scanning direction SDY of the wafer W. The electron beam exposure apparatus 10 also includes a wafer alignment system (not shown) that detects the position of alignment marks formed on each shot area (die) of the wafer W.

  In FIG. 1, the electron beam optical system 20 includes a multi-beam generation system 20a that generates a large number of small beams 36 made of an electron beam EB substantially parallel to the Z axis. The multi-beam generation system 20a includes an electron beam generator 22 that generates an electron beam EB, a collimator lens system 24 that includes an electrostatic lens that converts the electron beam EB into a substantially parallel beam, and an electron beam EB that is converted into a substantially parallel beam. It has an aperture array member 26 in which a large number of apertures 27 to be irradiated are formed in a predetermined arrangement, and a condenser lens array 28 composed of a large number of electrostatic lenses that focus small beams 36 emitted from the multiple apertures 27.

  Further, the electron beam optical system 20 includes a beam blanking array member 30 in which a large number of openings 31 to which the small beams 36 are irradiated are formed in the same arrangement as the openings 27, and a large number of openings 33 in the same arrangement as the openings 31. A beam stop array for stopping the small beams 36 formed and passed by the electric field between the electrode films 48 and 50 that are a part of the modulation device 40 among the small beams 36 that have passed through the multiple openings 31 as described later. A member 32 and a deflection projection system 20b are provided. The deflection projection system 20b includes a beam deflector array 34 composed of a number of electrostatic deflectors capable of individually deflecting the small beams 36 that have passed through the beam stop array member 32 in a predetermined range in the X direction and the Y direction, and beam deflection. A projection lens array 35 made up of a number of electrostatic lenses that respectively reduce the number of small beams 36 that have passed through the instrument array 34 to form beam spots 38 (images of the apertures 31). The operation of the beam deflector array 34 is controlled by the control system 18 of the electron beam optical system under the control of the main control system 12.

  With respect to each electrostatic lens constituting the projection lens array 35, the formation surface of the opening 31 of the beam blanking array member 30 and the surface of the wafer W are conjugate, and the image of each opening 31 of the beam blanking array member 30 is projected. The magnification β is a reduction magnification of about 1/50 to 1/200, for example. In the following, it is assumed that the projection magnification β is about 1/100 as an example. In this embodiment, the arrangement of the openings 27 of the aperture array member 26, the arrangement of the openings 31 of the beam blanking array member 30, the arrangement of the openings 33 of the beam stop array member 32, and the deflection by the beam deflector array 34 are not present. The arrangement of the beam spots 38 in the exposure region 52 (see FIG. 3A) is equal to each other.

  2A schematically shows an arrangement of a large number of openings 31 of the beam blanking array member 30 in FIG. 1, and FIG. 2B is an enlarged view of a portion B in FIG. 2A. . 2A, the thin plate-shaped beam blanking array member 30 made of an insulator such as silicon and elongated in the X direction has substantially the same shape as the exposure region 52 of FIG. 3A on the surface of the wafer W. The rectangular pattern formation region 52A has a width LX in the X direction and a width LY in the Y direction. In the pattern formation region 52A, a large number of rows Ai (i = 1 to I: I is an integer) each composed of a large number of openings 31 arranged at a pitch SX in the X direction are arranged at intervals SY in the Y direction. Yes. As an example, the pitch SX and the interval SY are approximately 150 μm as follows. Note that the values of the pitch SX and the interval SY are arbitrary.

SX = SY = 150 (μm) (1)
As shown in an enlarged view in FIG. 2B, each opening 31 in each row Ai is a rectangle in which the width a1 in the X direction is larger than the width b1 in the Y direction. Further, with respect to the series of openings 31 in each row Ai, the position of the series of openings 31 in the row A (i + 1) adjacent thereto is gradually shifted by δ in the X direction.

An image obtained by reducing the multiple apertures 31 of the beam blanking array member 30 in FIG. 2A by the projection lens array 35 at the projection magnification β (an image without deflection by the beam deflector array 34) is projected onto the surface of the wafer W. What is a beam spot 38 by a large number of small beams 36 in the exposure region 52 of FIG. FIG. 3B is an enlarged view of a portion B in FIG.
3A, the arrangement of the multiple beam spots 38 in the exposure area 52 is the same as the arrangement of the multiple apertures 31 in FIG. 2 (A9). A number of rows Bi (i = 1 to I: I is an integer) composed of a number of beam spots 38 arranged at a pitch SX are arranged at intervals SY in the Y direction. It is represented by (1).

  As shown in FIG. 3B, each beam spot 38 in each row Bi is a rectangle having a width a2 in the X direction larger than a width b2 in the Y direction (mechanical scanning direction SDY). In FIG. 3B, the size (width a2 and b2) of each beam spot 38 is drawn about 1000 times larger than the pitch SX and the interval SY of the array. Using the projection magnification β of the projection lens array 35, the widths a2 and b2 of the beam spot 38 are β times (in this case, for example, 1/100 times) the widths a1 and b1 of the opening 31 in FIG. ).

a2 = β · a1 (2A), b2 = β · b1 (2B)
In this embodiment, since the wafer W is exposed using the beam spot 38, the resolution limit in the X direction of the electron beam exposure apparatus 10 is the width a2, and the resolution limit in the Y direction is the width b2. The width a2 and the width b2 can take arbitrary values under the condition that the width a2 is wider than the width b2 as long as the resolution limit of the electron beam is larger than the width.

  Further, as one application, the electron beam exposure apparatus 10 arranges line patterns 72 having a line width d formed on the wafer W in the previous process on the wafer W in the X direction at a pitch 2d, as shown in FIG. It can be used to partially remove the line pattern 72 of the line and space pattern (hereinafter referred to as L & S pattern) 73. That is, the electron beam exposure apparatus 10 is used to expose a portion of the electron beam resist applied so as to cover the L & S pattern 73 from which the line pattern 72 is removed (details will be described later). Note that the X direction and the Y direction in FIG. 4 indicate directions when the wafer on which the pattern in FIG. 4 is formed is loaded on the wafer stage WST in FIG.

  In this case, the periodic direction (X direction in FIG. 4) of the L & S pattern 73 is set parallel to the longitudinal direction of the beam spot 38, and n (n is an integer of 2 or more) line patterns by one irradiation of the beam spot 38. It is assumed that exposure is performed so as to cover 72. At this time, the length a2 in the X direction of the beam spot 38 is the shortest (2n−1) d when the beam spot 38 has a dotted line shape 38S, and is the longest when the beam spot 38 has a dotted line shape 38L. Long (2n + 1) d. That is, the range of the length a2 in the X direction (longitudinal direction) of the beam spot 38 is as follows using the pitch 2d of the L & S pattern 73.

(N−1 / 2) 2d ≦ a2 ≦ (n + 1/2) 2d (3)
Therefore, when the length a2 in the longitudinal direction of the beam spot 38 (image of the opening 31) satisfies the condition of the expression (3), n line patterns of the L & S pattern 73 with the pitch 2d are irradiated by the beam spot 38 once. The exposure for partially removing 72 can be performed efficiently. Furthermore, the control of the beam deflector array 34, the wafer stage WST, and the like is easier than in the case where the wafer W is exposed with a minute circular spot light of an electron beam.

  Further, since the minimum value of the width in the Y direction of the separation portion 74 where the line pattern 72 is partially removed in the L & S pattern 73 is about the line width d of the line pattern 72, the width of the separation portion 74 in the Y direction ( As a result, the minimum value of the line width d) can be regarded as being equal to the line width b2 of the beam spot 38 in the Y direction. At this time, the following condition is obtained by setting 2 · b2 instead of the pitch 2d in the expression (3).

(2n−1) b2 ≦ a2 ≦ (2n + 1) b2 (4)
Accordingly, a preferable value of the line width a2 in the X direction (longitudinal direction) of the beam spot 38 (image of the opening 31) is the median value of the equation (4) (2n times the line width b2) as follows.
a2 = 2n · b2 (5)
Further, the line width b2 of the beam spot 38 in the Y direction (short side direction) is set to 20 nm, which is the minimum line width that can be manufactured by, for example, double patterning at present, and the line pattern 72 irradiated with the beam spot 38 at a time is used. When the number n is 4, which is the minimum value of the normal process, the width a2 in the X direction of the beam spot 38 in Expression (5) is 160 nm.

Further, when the line width b2 is, for example, 15 to 25 nm, assuming that n = 4, the line width a2 in the longitudinal direction may be within the following range from the equation (5).
120 (nm) ≦ a2 ≦ 200 (nm) (6)
Next, as in the arrangement of the openings 31 of the beam blanking array member 30 in FIG. 2B, the arrangement of the beam spots 38 in the exposure region 52 is a series of columns Bi as shown in FIG. The position of a series of beam spots 38 in the row B (i + 1) adjacent thereto is gradually shifted by δ in the X direction. In the present embodiment, the positional deviation amount δ in the X direction of the beam spot 38 in each row Bi is the electronic scanning direction SDX of each beam spot 38 (small beam 36) by the beam deflector array 34 in FIG. It is set equal to the maximum value δ of the deflection amount in the ± X direction. The beam deflector array 34 can deflect each beam spot 38 in the ± Y direction so that the maximum value is δ. The maximum deflection amount in the X direction of each beam spot 38 by the beam deflector array 34 may be ± δ / 2.

  Specifically, the positional deviation amount δ (maximum deflection amount) is set to about 2 μm as an example. Further, the number I of the row Bi of the series of beam spots 38 is set to be equal to or larger than the value obtained by dividing the pitch SX of the arrangement of the beam spots 38 in the X direction by the positional deviation amount δ. Thus, when the wafer W is moved in the Y direction with respect to the exposure region 52, even if the maximum deflection amount in the X direction by the beam deflector array 34 of each beam spot 38 in the exposure region 52 is δ, Any point on the surface of the wafer W can be exposed with any beam spot 38 in any row Bi. Therefore, it is possible to expose an arbitrary circuit pattern having a size larger than the beam spot 38 on the surface of the wafer W.

  In the present embodiment, since the pitch SX is approximately 150 μm and the positional deviation amount δ is approximately 2 μm, the number I of the rows Bi of the beam spots 38 may be approximately 75. At this time, since the interval SY in the Y direction of the column Bi is approximately 150 μm, the width LY in the Y direction of the exposure region 52 is approximately 150 × 74 (μm) = 11.25 (mm). Further, since the width LX in the X direction of the exposure region 52 is 26 mm, the number of beam spots 38 in each row Bi is approximately 26 / 0.15 (mm) ≈173. Accordingly, the number NBS of beam spots 38 (that is, the number of openings 31 of the beam blanking array member 30) when all the beam spots 38 arranged in the exposure region 52 are turned on is approximately 13000 as follows. Become.

NBS = 173 × 75 = 112975≈13000 (7)
In the present embodiment, all the beam spots 38 in the exposure region 52 can be deflected within the range of ± δ in the X direction and the Y direction by the beam deflector array 34 independently of each other. Further, all the beam spots 38 can be turned on / off independently of each other by the modulation device 40 of FIG.

  In FIG. 1, the modulation device 40 selectively selects, for example, from the visible region to the near infrared region at the incident ends of the same number of optical fibers as the NBS beam spots 38 (apertures 31) according to the control information from the main control system 12. Optical fiber selection device 16 for supplying the illumination light and the selection illumination systems 41A and 41B for irradiating the beam blanking array member 30 with the illumination lights ILA and ILB selectively supplied thereto. A large number of optical fibers in the optical fiber selector 16 are branched into a first set of optical fiber cables 42A and a second set of optical fiber cables 42B. The selection irradiation systems 41A and 41B have flexible optical fiber cables 42A and 42B, and multiple optical fiber exit ends 44Aa and 44Ba of the optical fiber cables 42A and 42B. Optical fiber arrays 44A and 44B arranged and fixed corresponding to the arrangement of 31, and illumination light ILA and ILB emitted from the optical fiber arrays 44A and 44B, the photo diode 60 in the vicinity of the corresponding opening 31 of the beam blanking array member 30. (See FIG. 2C) lens systems 46A and 46B.

  The optical fiber selector 16 can supply illumination light selectively to all optical fibers individually even in a very short time. Such an optical fiber selection device 16 can be easily manufactured using optical communication technology. The illumination lights ILA and ILB from the optical fiber arrays 44A and 44B illuminate different regions of the beam blanking array member 30. As an example, the illumination lights ILA and ILB illuminate a half region on the + X direction side and the −X direction side with respect to the center of the beam blanking array member 30 in FIG. The exit ends 44Aa and 44Ba of the optical fiber arrays 44A and 44B are optically conjugate with the photo diode 60 near the different openings 31 of the beam blanking array member 30 with respect to the lens systems 46A and 46B. The exit surfaces of the optical fiber arrays 44A and 44B and the beam blanking array member 30 may be arranged so as to satisfy the so-called Scheinproof condition for the lens systems 46A and 46B. Further, a large number of optical fibers in the optical fiber selection device 16 may be branched into three or more sets of optical fiber cables, and different regions of the beam blanking array member 30 may be illuminated with illumination light from the exit ends of these optical fiber cables.

  Further, the modulator 40 includes a deflector 54 (see FIG. 2C) including electrode films 48 and 50 provided so as to sandwich each opening 31 in a corresponding region of the beam blanking array member 30 in the Y direction. ) And a beam stop array member 32. FIG. 2C shows the deflectors 54 provided in the vicinity of the openings 31 in the beam blanking array member 30 in two rows in the X direction and two columns in the Y direction.

  In FIG. 2C, a ground level (0V) ground line 55 is formed on the surface of the beam blanking array member 30 so that a plurality of openings 31 elongated in the X direction and arranged in the Y direction are sandwiched in the X direction. For example, a power supply line 56 to which a voltage VC of about +10 to 15 V is applied is provided. In addition, on the surface of the beam blanking array member 30, rectangular conductive electrode films 48 and 50 are provided so as to sandwich each opening 31 in the Y direction and along the side surface in the longitudinal direction (X direction) of each opening 51. One electrode film 48 is connected to the ground line 55, and the other electrode film 50 is connected to the power supply line 56 via the resistor 58.

  Also, for example, a PIN type photodiode 60 is fixed in the vicinity of each opening 31 on the surface of the beam blanking array member 30, and an amplification FET type transistor 62 is fixed between the photodiode 60 and the electrode film 50. ing. The photodiode 60 is connected to the power supply line 56 and the ground line 55 via resistors 64 and 66, for example, with a reverse bias, and the source of the transistor 62 is connected to the ground line 55 via a resistor 68 for adjustment. Are connected to the electrode film 50. Further, the connecting portion of the photodiode 60 and the resistor 66 is connected to the gate of the transistor 62. A deflector 54 is constituted by the electrode films 48 and 50, the photodiode 60, the transistor 62, the resistors 58 and 64 to 68, and a signal line connecting them. The deflector 54 can also be manufactured using, for example, MEMS (Microelectromechanical Systems) technology.

  For example, the illumination light is not irradiated to the photo diode 60 of the deflector 54 corresponding to the openings 31 at the positions P4 and P5. In this case, since the electrode film 50 adjacent to the openings 31 at the positions P4 and P5 is almost at the voltage VC, an electric field EY is generated between the electrode film 50 and the grounded electrode film 48, and the opening 31 is opened by the electric field EY. The passing small beam 36 is deflected in the + Y direction and shielded by the beam stop array member 32 in FIG. 1, and the small beam 36 (beam spot 38) is turned off in the exposure region 52. In the present embodiment, the rectangular electrode films 48 and 50 are arranged along the longitudinal sides of the opening 31, and the distance between the electrode films 48 and 50 can be minimized, so that a relatively low voltage is applied to the electrode film 50. The small beam 36 that passes through the aperture 31 can be turned off by simply applying it.

  On the other hand, the illumination light ILA is irradiated to the regions P31 and P61 including the photodiode 60 adjacent to the openings 31 at the positions P3 and P6. In this case, a current flows through the photodiode 60 in the regions P31 and P61, and the voltage of the electrode film 50 adjacent to the openings 31 at the positions P3 and P6 is reduced to the ground level. Accordingly, since the electric field between the electrode films 48 and 50 hardly acts on the openings 31 at the positions P3 and P6, the small beam 36 passes through the opening 31 as it is and is irradiated to the exposure region 52 on the surface of the wafer W. The beam spot 38 is turned on. At this time, since the change in the voltage applied to the electrode film 50 is relatively small, the small beam 36 can be turned on / off at high speed even if the photodiode 60 near the opening 31 is downsized.

  Therefore, in FIG. 1, by using the modulation device 40, the opening 31 at the position P <b> 2 is used in a period in which the illumination light ILA (or ILB) is not irradiated on the photo diode near the arbitrary opening 31 of the beam blanking array member 30. As shown, the small beam 36 passing through the opening 31 is deflected in the Y direction and shielded by the beam stop array member 32. Accordingly, the beam spot 38, which is an image of the opening 31 at the position P2, is turned off. On the other hand, during the period in which the illumination light ILA (or ILB) is irradiated to the photo diode near the arbitrary opening 31, the small beam 36 passing through the opening 31 is deflected as indicated by the opening 31 at the position P1. And is not shielded by the beam stop array member 32. Accordingly, the beam spot 38, which is an image of the opening 31 at the position P1, is turned on.

  As shown in FIG. 3B, when the width b2 of the beam spot 38 in the Y direction is, for example, 20 nm, the maximum deflection amount ± δ of the beam spot 38 in the Y direction by the beam deflector array 34 is, for example, ± 2 μm, which is about 200 times the width b 2 of the beam spot 38. Therefore, when a certain point on the wafer W is exposed by the beam spot 38, for example, the beam spot 38 (which is OFF in this state) is moved in the Y direction in synchronization with the wafer W by the beam deflector array 34. During this period, it is only necessary to irradiate the photo diode near the corresponding opening 31 with the illumination light and turn on the beam spot 38 for a necessary exposure time. When the exposure to that point is completed, as an example, the beam spot 38 is returned to the end in the Y direction (end in the direction opposite to the mechanical scanning direction SDY) in an off state. When the intensity of the small beam 36 is high, the deflection amount of the beam spot 38 in the Y direction by the beam deflector array 34 may be narrow.

  As described above, according to the electron beam exposure apparatus 10 of the present embodiment, the small beam 36 that passes through the arbitrary opening 31 of the beam blanking array member 30 can be individually turned on or off by the modulation device 40. Further, among the small beams 36 that have passed through the multiple apertures 31 of the beam blanking array member 30, the small beams 36 (beam spots 38) that are turned on are individually deflected in the X and Y directions by the beam deflector array 34. At the same time, as shown in FIG. 3C, the wafer W is scanned in the Y direction by the wafer stage WST with respect to the exposure area 52 irradiated with the beam spot 38, so that the entire shot area (die) of the wafer W is obtained. ) In SAj (j = 1 to J: J is an integer representing the number of shot areas), it is possible to almost continuously expose a circuit pattern obtained by arbitrarily combining a large number of patterns each having an arbitrary shape larger than the beam spot 38. .

  Next, an example of a device manufacturing method using the electron beam exposure apparatus 10 in the present embodiment will be described. Here, it is assumed that the number of beam spots 38 irradiated to the exposure region 52 of the electron beam exposure apparatus 10 is 20 nm in the width b2 in the Y direction and 160 nm in the width a2 in the X direction. The circuit pattern of the semiconductor element to be manufactured in the present embodiment is a circuit pattern 70 for an SRAM (Static RAM) gate cell, as shown in the partially enlarged view of FIG. The circuit pattern 70 is formed by removing a plurality of line patterns 72 with a width d in the Y direction from a L & S pattern 73 in which line patterns 72 having a line width d are arranged at a pitch 2d in the X direction. (Non-periodic part) is formed. As an example, the line width d is 22 nm. In FIG. 4, for the sake of convenience of explanation, the width in the X direction of the separation portion 74 is a width including two line patterns 72, but the width in the X direction of the separation portion 74 actually includes four line patterns 72. It is assumed that the width is (3 × 2 + 1) d = 154 nm. In this case, since the size of the beam spot 38 in FIG. 2B is assumed to be 20 nm × 160 nm, the width in the X direction of the beam spot 38 is slightly smaller than that of the separation portion 74 as shown by a dotted line in FIG. The width of the beam spot 38 in the Y direction is slightly narrower than that of the separation portion 74.

  Further, an immersion method such as that disclosed in, for example, US Patent Application Publication No. 2005/259234 is used for an exposure apparatus (ultraviolet light exposure apparatus) that uses ArF excimer laser light (wavelength 193 nm) or the like as an existing exposure beam. The resolution limit is about 44 nm in terms of the line width even when applying. Therefore, the circuit pattern 70 is an example of a pattern including an aperiodic portion (a separation portion 74) that is finer than the resolution limit of the ultraviolet light exposure apparatus.

  Hereinafter, an example of a method of forming the circuit pattern 70 of FIG. 4 in each shot region on the surface of the wafer using the electron beam exposure apparatus 10 in the lithography process will be described with reference to the flowchart of FIG. In this embodiment, as a first step, an L & S pattern having a line width d and a pitch 2d is formed in each shot region on the surface of the wafer by a double patterning method using a spacer pitch doubling (Spacer Pitch Doubling, Spacer transfer or Sidewal L transfer) technique. 73 is formed. Then, as a second step, the line pattern 72 is partially removed from the L & S pattern 73 by exposure and etching by the electron beam exposure apparatus 10 in each shot area.

  First, as the first stage described above, in step 102 of FIG. 8, as shown in the enlarged sectional view of FIG. 5A, the device layer is formed on the surface of the substrate 71 such as silicon of the wafer in the processing apparatus (not shown). 76 and an intermediate layer 78 are formed, and a positive photoresist layer 80 is formed on the surface of the intermediate layer 78 of the wafer by a coater / developer (not shown). 5A to 7B, the periodic direction of the pattern to be formed is the X direction, and the direction orthogonal to the periodic direction is the Y direction. In the next step 104, an ultraviolet exposure apparatus (not shown) that is immersion type and uses ArF excimer laser light as an exposure beam as described above is prepared, and the illumination condition is set to, for example, bipolar illumination in the X direction. . Then, as shown by the enlarged light quantity distribution 82D of the projected image in FIG. 5B, the ultraviolet light exposure apparatus is used to double the line pattern 72 to be finally formed on the photoresist layer 80 of the wafer. An image 82 (see FIG. 5A), which is an L & S pattern having a double line width, that is, a line width 2d and a pitch 4d in the X direction, is exposed with a predetermined exposure amount. Its line width 2d is 44 nm. The predetermined exposure amount is an exposure amount at which the width in the X direction of the portion exceeding the photosensitive level after development in the image 82 for one pitch is 3d.

  In the next step 106, a coater / developer (not shown) develops the photoresist layer 80 of the wafer, thereby forming a resist pattern 80A having a line width d in the X direction as shown in FIG. 5C. An L & S pattern arranged in 4d is formed. Thereafter, in an etching apparatus (not shown), as shown in FIG. 5D, the intermediate layer 78 is etched using the resist pattern 80A as a mask, and then the resist pattern 80A is peeled off. As a result, as shown in the enlarged plan views of FIGS. 5E and 5F, the line pattern 78A having the line width d of the intermediate layer 78 is formed on the surface of the device layer 76 of the wafer with a pitch 4d in the X direction. The L & S pattern 79 arranged in the above is formed.

  In the next step 108, as shown in FIG. 6A, a spacer layer 84 is deposited so as to cover the intermediate layer 76 and the line pattern 78A of the wafer in a processing apparatus (not shown). An L & S pattern is formed in which the width in the X direction is 3d and the width of the concave portion in the X direction is d. In step 110, anisotropic etching is performed in a direction perpendicular to the surface of the spacer layer 84 of the wafer in an etching apparatus (not shown) as shown in FIG. 6B. As a result, spacer portions 84A (line patterns) having a line width d of the spacer layer 84 are left at both ends in the X direction of the line pattern 78A of the intermediate layer having the line width d. Thereafter, in a processing apparatus (not shown), by removing the line pattern 78A of the intermediate layer of the wafer, as shown in FIG. 6C, a spacer portion 84A having a line width d is formed on the surface of the device layer 76 in the X direction. L & S patterns arranged at a pitch of 2d are formed. In the next step 112, the device layer 76 is etched in an etching apparatus (not shown) using the L & S pattern made of the spacer portion 84A of the wafer line width d as a mask. As a result, as shown in the enlarged plan views of FIGS. 6D and 6E, the line pattern 76A having the line width d of the device layer 76 is arranged at the pitch 2d in the X direction on the surface of the substrate 71 of the wafer. The L & S pattern 73 thus formed is formed. The line pattern 76A corresponds to the line pattern 72 of FIG. An alignment mark (not shown) is also formed along with the L & S pattern 73.

  Next, as the second stage described above, in step 114, a coater / developer (not shown) forms a positive type on the surface of the L & S pattern 73 having the line width d (pitch 2d) of the device layer of the wafer in FIG. Apply electron beam resist. Thereafter, the wafer (referred to as wafer W) is loaded onto wafer stage WST of electron beam exposure apparatus 10 in FIG. 1, and wafer W is aligned using a wafer alignment system (not shown). As a result, as shown in FIG. 7A, the periodic direction of the L & S pattern 73 (the electron beam resist PR is applied so as to cover it) formed on the wafer W is the same as that of the electron beam exposure apparatus 10. The rotation angle of the wafer W is adjusted so as to be parallel to the longitudinal direction (X direction) of each beam spot 38.

  Next, the process proceeds to step 116, where the electron beam exposure apparatus 10 starts moving the wafer W in the Y direction with respect to the exposure region 52 of the electron beam via the wafer stage WST. As shown in FIG. 3C, when exposure is performed on a row of shot areas including the shot area SA1 of the wafer W, the wafer W moves in the + Y direction with respect to the exposure area 52 (the exposure area 52 is relative to the wafer W). Relatively move in the -Y direction). Thereafter, in step 118, the selective irradiation is applied to the photo diode near the opening 31 of the corresponding beam blanking array member 30 in the portion corresponding to the separation portion 74 of the L & S pattern 73 in FIG. Illumination light is irradiated from the systems 41A and 41B (modulator 40), and the small beam 36 passing through the opening 31 is turned on. Further, in step 120, the plurality of small beams 36 (beam spots 38) that are turned on are deflected by the beam deflector array 34 in the X direction and the Y direction, respectively, and a plurality of portions corresponding to the separation portions 74 of the L & S pattern 73. The exposed portion 86 is exposed.

  Specifically, in FIG. 7A, the width a2 in the X direction of each beam spot 38 is 160 nm, the width b2 in the Y direction is 20 nm, and the line width d of the line pattern 76A (and thus the Y direction of the exposed portion 86). ) Is 22 nm. Furthermore, since the exposed portion 86 is actually an area covering the four line patterns 76A, considering the alignment error, the width a3 in the X direction of the exposed portion 86 is 176 (= 8 ×) as an example. 22) It should be nm. Therefore, in order to expose the exposed part 86, the beam deflector array 34 deflects the beam spot 38 in the ± X direction by 8 (= (a3-a2) / 2) nm, respectively, and moves the wafer stage WST in the Y direction. The beam spot 38 may be shifted in the Y direction by 2 (= d−b2) nm within a period in which the beam spot 38 is moved in the Y direction by the beam deflector array 34 in synchronization with the movement. When the deflection amount of the beam spot 38 in the Y direction is small, the beam spot 38 is within a period in which the wafer W moves by 2 nm by the wafer stage WST with respect to the beam spot 38 that is substantially stationary in the Y direction. May be turned on. Steps 118 and 120 are repeated at portions corresponding to the separation portions 74 in each shot region of the wafer W, respectively.

  Thereafter, in step 122, as shown in FIG. 3C, when the exposure of one row of shot areas including the shot area SA1 of the wafer W is completed, it is determined whether or not the exposure of the wafer W is completed. Here, since the exposure is not completed, the operation shifts to step 124, and the next row of shot areas of the wafer W becomes Y in the exposure area 52 by step movement of the wafer W in the X direction by the wafer stage WST. Move to the front of the direction. Then, movement in the −Y direction opposite to the time of the first scanning exposure of wafer stage WST is started. Thereafter, steps 118 to 124 are repeated. In this way, by repeating the scanning exposure and step movement of the wafer W, the exposure of all the shot areas SAj (j = 1 to J) of the wafer W is completed.

  Thereafter, the operation proceeds from step 122 to step 126, and wafer W is unloaded from wafer stage WST. Thereafter, in step 128, the coater / developer (not shown) develops the electron beam resist on the wafer W, so that, as shown in FIG. 7B, the electron beam resist PR covering the line pattern 76A is exposed. A portion corresponding to the portion 86 becomes the opening 86A. 4 is completed by etching the line pattern 76A (72) of the device layer 76 using the electron beam resist PR in which the opening 86A is formed as a mask in an etching apparatus (not shown).

According to the present embodiment, after forming the fine L & S pattern 73 using the double patterning method in the first stage, the non-periodic portion is exposed using the electron beam exposure apparatus 10 in the second stage, The circuit pattern 70 including the non-periodic portion (the separation portion 74) finer than the resolution limit of the ultraviolet light exposure apparatus can be efficiently formed.
At this time, the exposed portion 86 corresponding to the separation portion 74 of the circuit pattern 70 of FIG. 4 can be efficiently exposed only by slightly deflecting the beam spot 38 of the electron beam exposure apparatus 10 at least slightly in the X direction. The on / off control of each small beam 36 (beam spot 38) is easy, and the control of the beam deflector array 34 is also easy.

  Further, when a semiconductor device (electronic device) such as an SRAM is manufactured using the pattern forming method described above, the semiconductor device has a function / performance design step 221 of the semiconductor device, as shown in FIG. Step 222 for producing a mask (reticle) based on the above and exposure pattern data for the electron beam exposure apparatus 10, step 223 for producing a substrate (wafer) for a semiconductor device, substrate processing step 224, device assembly step (dicing process, (Including processing processes such as a bonding process and a packaging process) 225, an inspection step 226, and the like. The substrate processing step 224 includes a step of exposing the reticle pattern to the substrate with an ultraviolet light exposure apparatus, a step of exposing the exposure pattern to the substrate with the electron beam exposure apparatus 10, a step of developing the exposed substrate, and a development process. And a process of heating (curing) and etching the substrate.

According to this device manufacturing method, a semiconductor device including a circuit pattern including an aperiodic portion finer than the resolution limit of the ultraviolet light exposure apparatus can be efficiently manufactured.
The effects and the like of this embodiment are as follows.
(1) The electron beam exposure apparatus 10 of this embodiment is an exposure apparatus that exposes a wafer W (target) with an electron beam. The electron beam exposure apparatus 10 includes a multi-beam generation system 20a that generates a large number (small) of small beams 36 (beams) composed of electron beams substantially in parallel, and a large number of rectangular openings 31 to which the small beams 36 are respectively irradiated. A beam blanking array member 30 (array member) formed so that the longitudinal directions thereof are parallel to each other; a modulation device 40 for guiding a small beam 36 passing through an opening 31 selected from a large number of openings 31 to the wafer W; It has.

Furthermore, the electron beam exposure apparatus 10 can deflect the small beam 36 that has passed through the opening 31 selected by the modulation device 40 in at least the X direction (first direction) along the longitudinal direction of the opening 31, and the small beam A deflection projection system 20b that forms a beam spot 38 (image) in which the opening 31 is reduced by the beam 36, and a Y direction (second second) perpendicular to the X direction with respect to the exposure region 52 of the small beam 36 by the deflection projection system 20b. Wafer stage WST (moving mechanism) that relatively moves in the direction).
As an example, the small beam 36 can substantially cover one of the multiple openings 31 formed in the beam blanking array member 30 and simultaneously covers two adjacent openings 31. Any electron beam having a cross-sectional area that is not irradiated can be used.

  Further, in the device manufacturing method using the electron beam exposure apparatus 10, steps 102 to 112 for forming the L & S pattern 73 (periodic pattern) on the surface of the wafer W (target), and the region where the L & S pattern 73 of the wafer W is formed. In addition, the electron beam exposure apparatus 10 is used to selectively expose the images (beam spots 38) of the multiple apertures 31 of the beam blanking array member 30, thereby partially forming the line pattern 76A in the L & S pattern 73. Removing steps 114-128.

According to the present embodiment, by using the electron beam exposure apparatus 10, it is possible to efficiently form a circuit pattern 70 including an aperiodic portion (a separation portion 74) that is finer than the resolution limit of the ultraviolet light exposure apparatus. .
(2) Further, the multiple openings 31 formed in the beam blanking array member 30 are arranged along the X direction and the substantially Y direction, and the multiple openings 31 arranged along the almost Y direction are The wafers W are arranged so as to gradually shift in the X direction with the same positional deviation amount δ as the maximum deflection amount of the small beam 36 by the beam deflector array 34 on the wafer W. Accordingly, the wafer W is scanned in the Y direction by the wafer stage WST with respect to the exposure region 52 in which the beam spots 38 that are images of a large number of openings 31 are arranged, and any point on the surface of the wafer W is selected. The image of the aperture 31 (beam spot 38) can be exposed.

  (3) The modulation device 40 is provided corresponding to the electrode films 48 and 50 (electrode members) provided in the vicinity of the multiple openings 31 of the beam blanking array member 30 and the multiple openings 31, respectively. A large number of photodiodes 60 (photoelectric conversion elements) that control the voltage applied to the electrode film 50 and a pattern exposed to the wafer W are selectively irradiated with illumination light ILA and ILB. Openings 33 are formed at positions corresponding to the multiple irradiation openings 31 of the selection irradiation systems 41A and 41B and the beam blanking array member 30, and the electrode films 48, A beam stop array member 32 (stop array member) for stopping the small beam 36 deflected by the electric field generated by That.

According to the modulation device 40, a large number of small beams 36 (beam spots 38) irradiated in the exposure region 52 can be switched on / off at high speed. Further, since the illumination lights ILA and ILB are irradiated at the time of switching, the small beam 36 passing through the other opening 31 is not affected.
(4) Since the electrode films 48 and 50 are provided along the longitudinal direction of each opening 31, even when the potential difference between the electrode films 48 and 50 is small, the on / off switching of the small beam 36 is performed at high speed. It can be carried out.

  (5) Steps 114 to 128 for partially removing the line pattern 76A include applying the electron beam resist PR (photosensitive material) to the region of the wafer W where the L & S pattern 73 is formed, and the electron beam resist PR. Step 120 includes exposure with electron beam exposure apparatus 10, step 128 for developing electron beam resist PR, and step 128 for etching L & S pattern 73 using the developed electron beam resist as a mask.

Thereby, only the line pattern 76A of the portion exposed by the electron beam exposure apparatus 10 can be accurately removed.
(6) Further, in the device manufacturing method using the electron beam exposure apparatus 10 of the present embodiment, steps 102 to 112 for forming the L & S pattern 73 (periodic pattern) on the surface of the wafer W (target), and a large number (plural). The image of the aperture 31 is formed in a region including an exposure region 52 where a reduced image (beam spot 38) of the aperture 31 is formed by the small beam 36 (electron beam) that has passed through the aperture selected from the rectangular aperture 31 of FIG. And step 114 of placing the wafer W on the wafer stage WST so that the periodic direction of the L & S pattern 73 of the wafer W is parallel to the longitudinal direction (X direction). Further, in the device manufacturing method, in the region where the L & S pattern 73 of the wafer W is formed, an image formed by the small beam 36 of the aperture selected from the multiple apertures 31 is at least along the longitudinal direction of the image of the aperture 31. The step 120 for exposing the wafer W by deflecting in the X direction (first direction) and the wafer W with respect to the exposure region 52 so that the region where the L & S pattern 73 of the wafer W is formed pass through the exposure region 52. And a mask pattern (exposed portion 86 to be exposed) on a region where the L & S pattern 73 of the wafer W is formed by an image of an opening selected from a large number of openings 31. ) To partially remove the L & S pattern 73.

According to the present embodiment, by exposing an area where the L & S pattern 73 of the wafer W is formed with images (beam spots 38) of a large number of rectangular openings 31 by the small beams 36 of the electron beam, the ultraviolet light exposure apparatus is configured. The circuit pattern 70 including the non-periodic portion (the separation portion 74) finer than the resolution limit can be efficiently formed.
(7) Further, in steps 102 to 112 for forming the L & S pattern 73, an L & S pattern 79 having a periodicity in the periodic direction (X direction) of the L & S pattern 73 on the surface of the wafer W using the ultraviolet light exposure apparatus (first The L & S pattern 73 (second pattern) having a 1/2 pitch with respect to the pitch (4d) of the L & S pattern 79 in the X direction is formed based on the steps 102 to 106 and the L & S pattern 79. Steps 108-112.

By using the double patterning method in this way, a periodic pattern having a finer pitch than the resolution limit of the ultraviolet light exposure apparatus can be formed using the ultraviolet light exposure apparatus.
Instead of forming an L & S pattern having a pitch of 1/2 from the L & S pattern 79, an L & S pattern having a pitch of 1 / (2k) (k is an integer of 1 or more) with respect to this pitch is formed from the L & S pattern. It is also possible. In this case, exposure may be performed using the electron beam exposure apparatus 10 in order to remove a part of the finally formed L & S pattern.

Next, the following modifications can be made to the above embodiment.
(1) In the above embodiment, as shown in FIG. 2B, the longitudinal direction of the rectangular opening 31 of the beam blanking array member 30 is at least deflected by the beam deflector array 34 (electronic scanning). It is parallel to the X direction (first direction) which is the direction SDX).
On the other hand, a large number of rectangular openings 31A arranged in the X direction and the Y direction in the pattern formation region 52A of the beam blanking array member 30A in FIG. 10A are as shown in FIG. 10B. The short direction of the opening 31A is parallel to the X direction (first direction) which is at least the direction deflected by the beam deflector array 34 of FIG. 1 (electronic scanning direction SDX). That is, the width b1 in the X direction of the opening 31A is smaller than the width a1 in the Y direction. Further, the positions of the openings 31A in adjacent rows are gradually shifted by δ in the X direction. Further, the pair of rectangular electrode films 48 and 50 for turning off the small beam 36 passing through the opening 31A is along the longitudinal direction (Y direction) of the opening 31A so as to sandwich the opening 31A in the X direction. The voltage of the electrode film 50 is controlled by a photodiode (not shown). The beam blanking array member 30A can be arranged in the electron beam optical system 20 by replacing the beam blanking array member 30 in FIG. When the beam blanking array member 30A is used in this way, the opening array member 26 may be replaced with an opening array member in which an opening having a shape obtained by rotating the opening 27 by 90 ° is formed.

  When the beam blanking array member 30A is arranged in the electron beam optical system 20, as shown in FIG. 11A, a beam which is an image of the small beams 36 of a large number of openings 31A in the exposure region 52 on the surface of the wafer W. The spot 38A is irradiated. As shown in FIG. 11B, the shape of the beam spot 38A is a rectangle having a width b2 in the X direction and a width a2 in the Y direction, that is, a shape obtained by rotating the beam spot 38 in FIG. 3B by 90 °. In FIG. 11B, each beam spot 38A can be individually turned on or off by the modulation device 40 of FIG. 1, and ± in the X direction (electronic scanning direction SDX) by the beam deflector array 34. Deflection is possible in the δ and Y directions within a range of ± δ. The deflection amount in the Y direction may be narrower than this.

When exposure is performed to remove a part of the L & S pattern 73 of FIG. 6E using the beam spot 38A, the wafer on which the L & S pattern 73 is formed has a periodic direction of the L & S pattern 73. What is necessary is just to mount on wafer stage WST so that it may become parallel to the Y direction which is a longitudinal direction of beam spot 38A (image of opening 31A) of FIG. 11 (B).
(2) In the above embodiment, the spacer pitch doubling technique is used as the double patterning method for forming the L & S pattern 73. However, as the double patterning method, other arbitrary methods, for example, a double patterning method in which the step of forming an L & S pattern with a line width d and a pitch 4d using an ultraviolet light exposure apparatus is repeated twice with a phase shift of 180 °, etc. Can be used.

Further, when the L & S pattern 73 is formed by a normal lithography process using an ultraviolet light exposure apparatus, or EUV exposure using EUV light (Extreme Ultraviolet Light) having a wavelength of about several nanometers to several tens of nanometers using the L & S pattern 73 as an exposure beam. Even in the case of forming using an apparatus or the like, the above-described embodiment and its modifications can be applied.
(3) In the above embodiment, the modulation device 40 selects the opening 31 of the beam blanking array member 30 using the selection irradiation systems 41A and 41B. In addition, similarly to the liquid crystal display element, for example, the electric field in the opening 31 may be switched using selection lines arranged in a matrix.

In the above-described embodiment, the electron beam exposure apparatus 10 that uses an electron beam as a charged particle beam is used. However, the above-described embodiment and its modifications are also applied to an exposure apparatus that uses an ion beam or the like as a charged particle beam for exposure. An example can be applied.
In addition, this invention is not limited to the above-mentioned embodiment, A various structure can be taken in the range which does not deviate from the summary of this invention.

  DESCRIPTION OF SYMBOLS 10 ... Electron beam exposure apparatus, W ... Wafer, WST ... Wafer stage, 12 ... Main control system, 20a ... Multi-beam generation system, 20b ... Deflection projection system, 22 ... Electron beam generation apparatus, 30 ... Beam blanking array member, 32 ... Beam stop array member, 34 ... Beam deflector array, 35 ... Projection lens array, 40 ... Modulator, 41A, 41B ... Irradiation system for selection, 44A, 44B ... Optical fiber array, 48, 50 ... Electrode film, 73 ... L & S pattern, 74 ... spaced portion

Claims (16)

A charged particle beam exposure apparatus that exposes a target with a charged particle beam,
A beam generation system for generating a plurality of beams composed of the charged particle beam;
An array member formed such that a plurality of rectangular openings irradiated with the beams are parallel to each other in the longitudinal direction;
A modulator for directing the beam passing through an aperture selected from the plurality of apertures to the target;
The beam that has passed through the opening selected by the modulation device can be deflected at least in a first direction along the longitudinal direction or the short side direction of the opening, and an image in which the opening is reduced is formed by the beam. A deflection projection system;
A moving mechanism for relatively moving the target in a second direction orthogonal to the first direction with respect to an exposure area of the beam by the deflection projection system;
A charged particle beam exposure apparatus comprising: The plurality of openings formed in the array member are arranged substantially along the first direction and the second direction,
The plurality of openings arranged substantially along the second direction are gradually shifted in the first direction at intervals corresponding to the maximum deflection amount of the beam by the deflection projection system on the target. The charged particle beam exposure apparatus according to claim 1.   The charged particle beam exposure apparatus according to claim 1, wherein a longitudinal direction of the plurality of rectangular openings of the array member is parallel to the first direction.   3. The charged particle beam exposure apparatus according to claim 1, wherein a short direction of the plurality of rectangular openings of the array member is parallel to the first direction. 4.   The image size of the plurality of rectangular openings of the array member by the deflection projection system has a width in the short direction of 15 to 25 nm and a width in the long direction of 120 to 200 nm. Charged particle beam exposure apparatus as described in any one of 1-4. The modulator is
Electrode members respectively provided in the vicinity of the plurality of openings of the array member;
A plurality of photoelectric conversion elements that are provided in the array member corresponding to the plurality of openings and that control a voltage applied to the electrode member provided in the vicinity of the openings;
An irradiation system that selectively irradiates light to the plurality of photoelectric conversion elements according to a pattern exposed to the target;
Openings are respectively formed at positions corresponding to the plurality of openings of the array member, and among the beams that have passed through the openings of the array member, the beams deflected by an electric field generated by the electrode member An array member for stopping,
The charged particle beam exposure apparatus according to claim 1, comprising:   The charged particle beam exposure apparatus according to claim 6, wherein each of the electrode members is provided along a longitudinal direction of the rectangular opening of the array member. Forming a periodic pattern on the surface of the target;
The image of the plurality of openings of the array member is selected using the charged particle beam exposure apparatus according to any one of claims 1 to 7 in a region where the periodic pattern of the target is formed. Partially removing the periodic pattern by periodically exposing;
A device manufacturing method comprising: Forming the periodic pattern comprises:
Forming a first pattern having periodicity in a periodic direction of the periodic pattern on a surface of the target;
Based on the first pattern, a second pattern is formed as the periodic pattern having a pitch of 1 / (2k) (k is an integer of 1 or more) with respect to the pitch of the first pattern in the periodic direction. The device manufacturing method according to claim 8, further comprising: a process. In the step of partially removing the periodic pattern,
The target is loaded on the charged particle beam exposure apparatus such that the periodic direction of the periodic pattern is parallel to the longitudinal direction of the images of the plurality of openings of the array member of the charged particle beam exposure apparatus. The device manufacturing method according to claim 8 or 9, characterized in that In the step of partially removing the periodic pattern,
The length in the longitudinal direction of the image of the plurality of apertures of the array member of the charged particle beam exposure apparatus is (n−½) times to (n + ½) times (n is a pitch of the periodic pattern) The device manufacturing method according to claim 9, wherein the device manufacturing method is an integer of 2 or more. Partially removing the periodic pattern comprises:
Applying a photosensitive material sensitive to a charged particle beam in an area where the periodic pattern of the target is formed;
Exposing the photosensitive material with the charged particle beam exposure apparatus;
Developing the photosensitive material;
Etching the periodic pattern using the photosensitive material after development as a mask;
The device manufacturing method according to claim 8, comprising: Forming a periodic pattern on the surface of the target,
A region including an exposure region where a reduced image of the aperture is formed by a beam of charged particle beams that have passed through an aperture selected from a plurality of rectangular apertures, and the target of the target in the longitudinal direction of the image of the aperture Arrange the target so that the periodic direction of the periodic pattern is parallel,
In the region where the periodic pattern of the target is formed, an image formed by the beam of an aperture selected from the plurality of rectangular apertures is at least along a longitudinal direction or a lateral direction of the aperture image. Exposing the target with deflection in one direction,
Moving the target relative to the exposure region in a second direction orthogonal to the first direction so that the region where the periodic pattern of the target is formed passes through the exposure region;
Partially removing the periodic pattern using a mask pattern exposed to an area where the periodic pattern of the target is formed by an image of an opening selected from the plurality of openings;
A device manufacturing method. When forming the periodic pattern,
Forming a first pattern having periodicity in the periodic direction of the periodic pattern on the surface of the target;
Based on the first pattern, a second pattern is formed as the periodic pattern having a pitch of 1 / (2k) (k is an integer of 1 or more) with respect to the pitch of the first pattern in the periodic direction. The device manufacturing method according to claim 13.   The length in the longitudinal direction of the image of the opening is (n−½) to (n + ½) times (n is an integer of 2 or more) times the pitch of the periodic pattern. Item 15. A device manufacturing method according to Item 13 or 14. When deflecting an image of an opening selected from the plurality of rectangular openings in at least the first direction in an area where the periodic pattern of the target is formed,
In order to control the voltage applied to the electrode plate provided in the vicinity of the plurality of openings, light is selectively irradiated to the photoelectric conversion elements respectively provided corresponding to the plurality of openings. The device manufacturing method according to any one of claims 13 to 15.

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