JP2011249711A - Wiring board and mounting structure thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board along with its mounting structure, capable of responding to the request for improved connection reliability with an electronic component.SOLUTION: A wiring board 3 includes a base body 11, a plurality of insulating layers 14 stacked only on the upper surface side of the base body 11, a first connection pad 7a formed partially on the lower surface of the base body 11, a first conductive layer 10a formed partially between the base body 11 and the insulating layer 14 adjoining the base body 11, a second conductive layer 10b formed partially between the adjoining insulating layers 14, and a second connection pad 7b formed partially on the upper surface of the insulating layer 14 positioned at the top layer. The coefficient of thermal expansion of the base body 11 and the insulating layer 14 in planar direction is lower than that of the first connection pad 7a, the first conductive layer 10a, the second conductive layer 10b, and the second connection pad 7b in planar direction. The coefficient of thermal expansion of the insulating layer 14 in planar direction is lower than that of the base body 11 in planar direction.

Description

  The present invention relates to a wiring board used for electronic devices (for example, various audiovisual devices, home appliances, communication devices, computer devices and peripheral devices thereof), and a mounting structure thereof.

  Conventionally, as an electronic device used for an electronic device, a mounting structure in which an electronic component is mounted on a wiring board is used.

  Patent Document 1 describes a single-area layer wiring board that includes a core substrate and a buildup layer that is formed only on one main surface of the core substrate and includes a plurality of insulator layers and wiring layers. Yes.

  By the way, if the thermal expansion coefficient in the planar direction of the single area layer wiring board is large, the difference in thermal expansion amount between the single area layer wiring board and the electronic component in the planar direction becomes large when heat is applied to the single area layer wiring board. The stress is easily applied to the connection portion between the single area layer wiring board and the electronic component.

  Also, if the coefficients of thermal expansion of the core substrate and build-up layer are different, when heat is applied to the single area layer wiring board, the single area layer wiring board is likely to warp, and the connection between the single area layer wiring board and the electronic component is likely to occur. Stress is easily applied to the part.

  As a result, the connection reliability between the single-area layer wiring board and the electronic component tends to be lowered, and the electrical reliability of the mounting structure is likely to be lowered.

JP 2004-341077 A

  The present invention provides a wiring board and a mounting structure thereof that meet the demand for improving the connection reliability with electronic components.

  A wiring board according to an embodiment of the present invention includes a base, a plurality of insulating layers stacked only on the upper surface side of the base, a first connection pad partially formed on the lower surface of the base, the base, The first conductive layer partially formed between the insulating layers adjacent to the base, the second conductive layer partially formed between the adjacent insulating layers, and the uppermost layer. A second connection pad partially formed on the upper surface of the insulating layer, and the coefficient of thermal expansion in the planar direction of the base and the insulating layer is the first connection pad, the first conductive layer, the first The thermal expansion coefficient in the planar direction of the two conductive layers and the second connection pad is smaller, and the thermal expansion coefficient in the planar direction of the insulating layer is smaller than the thermal expansion coefficient in the planar direction of the substrate.

  A mounting structure according to an aspect of the present invention includes the wiring board and an electronic component mounted on the wiring board and electrically connected to the second connection pad.

  According to the wiring board and the mounting structure thereof according to one aspect of the present invention, the thermal expansion coefficient in the planar direction of the base body and the insulating layer has the first connection pad, the first conductive layer, the second conductive layer, and the second connection pad. Therefore, the thermal expansion coefficient in the planar direction of the wiring board can be reduced, and the thermal expansion coefficient in the planar direction of the insulating layer is smaller than the thermal expansion coefficient in the planar direction of the substrate. Therefore, the difference in the thermal expansion coefficient in the planar direction between the insulating layer side region and the substrate side region in the wiring board can be reduced, and the warping of the wiring board can be reduced. Therefore, it is possible to obtain a wiring board having excellent connection reliability with electronic components.

FIG. 1 is a cross-sectional view along the thickness direction of a mounting structure according to an embodiment of the present invention. FIG. 2 is a cross-sectional view taken along the plane I-I in FIG. FIG. 3 is a cross-sectional view taken along the line II-II in FIG. FIG. 4 is a cross-sectional view taken along the line III-III in FIG. FIG. 5 is a cross-sectional view taken along the line IV-IV in FIG. FIG. 6 is a cross-sectional view taken along the thickness direction for explaining the manufacturing process of the mounting structure shown in FIG. FIG. 7 is a cross-sectional view taken along the thickness direction for explaining the manufacturing process of the mounting structure shown in FIG.

  Hereinafter, a mounting structure including a wiring board according to an embodiment of the present invention will be described in detail based on the drawings.

  The mounting structure 1 shown in FIGS. 1 to 5 is used for electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices or peripheral devices thereof. The mounting structure 1 includes an electronic component 2, a wiring substrate 3 on which the electronic component 2 is flip-chip mounted, a bump 4 interposed between the electronic component 2 and the wiring substrate 3, a wiring substrate 3 and an external And solder balls 5 for connecting to a motherboard which is a circuit.

  The electronic component 2 has an electrode electrically connected to the bump 4 and is, for example, a semiconductor element such as an IC or LSI, and the base material is, for example, silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or carbonized carbide. It is made of a semiconductor material such as silicon. The electronic component 2 has a thickness set to, for example, 0.1 mm to 1 mm, and a coefficient of thermal expansion in the plane direction (XY plane direction) and the thickness direction (Z direction) is, for example, 3 ppm / ° C. to 5 ppm / ° C. The Young's modulus is set to, for example, 50 GPa or more and 200 GPa or less.

  The thickness of the electronic component 2 is obtained by cutting the electronic component 2 along the thickness direction, observing the polished surface or the fracture surface with a scanning electron microscope, and calculating the average value of the length along the thickness direction. Measured by Moreover, the thermal expansion coefficient of the electronic component 2 is measured by a measuring method according to JISK7197-1991 using a commercially available TMA apparatus. Moreover, the Young's modulus of the electronic component 2 is measured using Nano Indentor XP / DCM manufactured by MTS Systems. Hereinafter, the thickness, thermal expansion coefficient, and Young's modulus of each member are measured in the same manner as in the electronic component 2 described above.

  The bumps 4 and the solder balls 5 are made of a conductive material such as solder containing lead, tin, silver, gold, copper, zinc, bismuth, indium, aluminum, or the like, and the coefficient of thermal expansion in each direction is, for example, 10 ppm / The Young's modulus is set to 10 GPa or more and 150 GPa or less, for example.

  The wiring substrate 3 includes a core substrate 6, a first connection pad 7a partially formed on the lower surface of the core substrate 6, and a first connection pad partially formed on the lower surface of the core substrate 6 and spaced from the first connection pad 7a. One dummy conductor 8a, a build-up portion 9 formed only on the upper surface of the core substrate 6, a first conductive layer 10a partially formed between the core substrate 6 and the build-up portion 9, and a build-up A second connection pad 7b partially formed on the top surface of the portion 9; and a second dummy conductor 8b partially formed on the top surface of the buildup portion 9 and spaced from the second connection pad 7b. .

  Thus, since the wiring board 3 is a single area layer wiring board having the build-up portion 9 only on one side, the number of insulating layers 14 can be reduced as compared with the double-sided laminated wiring board. Can be made thinner. In addition, since the single-area layer wiring board can stack the insulating layer on the external circuit side on the electronic component side as compared with the double-sided laminated wiring board, it functions as a stress relaxation layer between the base 11 and the electronic component 2. By increasing the number of insulating layers 14 to be connected, the connection reliability with the electronic component 2 can be improved.

  The wiring board 3 has a thickness set to, for example, 0.2 mm to 1.2 mm, a thermal expansion coefficient in the plane direction set to, for example, 8 ppm / ° C. to 13 ppm / ° C., and a thermal expansion coefficient in the thickness direction, eg, 40 ppm / It is set to not less than 60 ° C and not more than 60 ppm / ° C.

  The core substrate 6 increases the rigidity of the wiring substrate 3 and is formed inside the flat substrate 11, the cylindrical through-hole conductor 12 that penetrates the substrate 11 in the thickness direction, and the through-hole conductor 12. A columnar insulator 13.

  The base 11 forms the main part of the core substrate 5 and increases the rigidity. For example, the base 11 includes a resin material, a base material coated with the resin material, and an inorganic insulating filler contained in the resin material. The substrate 11 has a thickness of, for example, 100 μm or more and 400 μm or less, a plane direction thermal expansion coefficient of, for example, 7 ppm / ° C. or more and 11 ppm / ° C. or less, and a thickness direction thermal expansion coefficient of, for example, 30 ppm / ° C. or more and 50 ppm / ° C. The Young's modulus is set to 15 GPa or more and 45 GPa or less, for example.

  The resin material contained in the base body 11 is a main part of the base body 11, and for example, a resin material such as an epoxy resin, a cyanate resin, or a liquid crystal polyester resin can be used. This resin material has a thermal expansion coefficient in each direction set to, for example, 30 ppm / ° C. or more and 60 ppm / ° C. or less, and a Young's modulus, for example, set to 5 GPa or more and 15 GPa or less.

  The base material coated with the resin material is to reduce the thermal expansion coefficient in the plane direction while increasing the rigidity of the base 11, for example, a woven fabric or a non-woven fabric constituted by fibers, or fibers arranged in one direction As this fiber, for example, glass fiber, resin fiber, carbon fiber or metal fiber can be used. In this base material, the thermal expansion coefficient in the plane direction is set to 2 ppm / ° C. or more and 6 ppm / ° C. or less, the thermal expansion coefficient in the thickness direction is set to 2 ppm / ° C. or more and 6 ppm / ° C. or less, and the Young's modulus is 70 GPa, for example. It is set to 85 GPa or less.

  The inorganic insulating filler contained in the resin material reduces the coefficient of thermal expansion of the base 11 and increases the rigidity of the base 11. For example, silicon oxide, aluminum oxide, aluminum nitride, aluminum hydroxide, calcium carbonate, etc. In this case, the particle size is set to 0.5 μm or more and 5.0 μm or less, the coefficient of thermal expansion is set to 0 ppm / ° C. or more and 15 ppm / ° C. or less, and the substrate 11 is used. The content in the resin material is set to 3% by volume or more and 60% by volume or less, for example.

  The particle size of the inorganic insulating filler was measured by observing the polished surface or fractured surface of the substrate 11 with a field emission electron microscope, photographing an enlarged cross-section so as to include 20 to 50 particles, It is measured by measuring the maximum diameter of each particle in the enlarged cross section. In addition, the content (volume%) of the inorganic insulating filler in the resin material of the base 11 is determined by taking an image of the polished surface of the base 11 with a field emission electron microscope and using an image analyzer or the like. It is measured by measuring the area ratio (area%) of the insulating filler at 10 cross-sections, calculating the average value of the measured values, and regarding the content (volume%).

  The through-hole conductor 12 that penetrates the base 11 in the thickness direction electrically connects the first connection pad 7a and the first conductive layer 10a, and uses, for example, one formed of a conductive material such as copper. be able to.

  The insulator 13 formed inside the through-hole conductor 12 supports the first connection pad 7a and the first conductive layer 10a. For example, polyimide resin, acrylic resin, epoxy resin, cyanate resin, fluorine resin, silicon What was formed with resin materials, such as resin, polyphenylene ether resin, or bismaleimide triazine resin, can be used.

  A plurality of first connection pads 7 a are partially formed on the lower surface of the base body 11 to electrically connect the through-hole conductors 12 and the solder balls 5, and the thermal expansion coefficient in the planar direction is larger than that of the base body 11. As such a 1st connection pad 7a, what was formed, for example with electrically conductive materials, such as copper, can be used, for example.

  The first connection pad 7a has a circular shape with a diameter of, for example, 50 μm or more and 150 μm or less in plan view, a thickness of 4 μm or more and 15 μm or less, and a coefficient of thermal expansion in each direction of, for example, 16 ppm / ° C. or more and 19 ppm / ° C. The thermal expansion coefficient in the plane direction is set to 1.5 times or more and 3.0 times or less that of the base 11, the Young's modulus is set to 60 GPa or more and 130 GPa or less, and the Young's modulus is 1.5 times that of the base 11. This is set to 8.0 times or less.

  The plurality of first connection pads 7a are arranged in a grid, for example. That is, the first connection pad 7a is arranged at a position where each line segment constituting the lattice intersects. It is desirable for the lattice to have each line segment orthogonal, and in particular, it is desirable to have a square lattice shape in which the distances between the first connection pads 7a are set to be the same. The plurality of first connection pads 7a may be arranged in a staggered manner.

  The first dummy conductor 8a is partially formed on the lower surface of the base 11, and is separated from the first connection pad 7a. The first dummy conductor 8a can be made of the same conductive material as the first connection pad 7a. The thickness, the thermal expansion coefficient and the Young's modulus in each direction are the same as those of the first connection pad 7a. Is set to

  On the other hand, as described above, the build-up portion 9 is formed on the upper surface of the core substrate 6 and functions as a multilayer wiring portion. The build-up portion 9 includes a plurality of stacked insulating layers 14, a second conductive layer 10b formed between adjacent insulating layers 14, and a second conductive layer 10b penetrating the insulating layer 14 in the thickness direction. Via conductors 15 electrically connected to each other.

  The insulating layer 14 supports the second conductive layer 10 b and suppresses a short circuit between the second conductive layers 10 b, and has a smaller coefficient of thermal expansion in the planar direction than the first connection pad 7 a and the substrate 11. As such a low thermal expansion insulating layer 14, for example, a film-like first resin layer having a low thermal expansion in a planar direction and a second resin layer having a low Young's modulus bonded to the first resin layer, The configured one can be used.

  The insulating layer 14 has a thickness set to, for example, 8 μm to 12 μm, a thermal expansion coefficient in the planar direction set to, for example, −2 ppm / ° C. to 2 ppm / ° C., and a thermal expansion coefficient in the planar direction, for example − The thermal expansion coefficient in the plane direction is set to, for example, -0.1 times to 0.2 times that of the first connection pad 7a, and the thermal expansion coefficient in the thickness direction is For example, it is set to 200 ppm / ° C. or more and 400 ppm / ° C. or less, the Young's modulus is set to, for example, 5 GPa or more and 15 GPa or less, the Young's modulus is set to, for example, 0.1 to 0.7 times that of the substrate 11, For example, it is set to 0.06 times or more and 0.3 times or less of one connection pad 7a. The Young's modulus of the insulating layer 14 may be the same as that of the substrate 11.

  The first resin layer is a main part of the insulating layer 14 and increases the rigidity of the insulating layer 14 while decreasing the coefficient of thermal expansion in the plane direction. The first resin layer has higher rigidity than the second resin layer (Young And the coefficient of thermal expansion in the plane direction is small. Such a first resin layer is a film in which resin molecules are arranged so that the longitudinal direction of the molecular chain of the resin molecules is parallel to the planar direction, and the thermal expansion coefficient in the planar direction is the thickness direction. Those having a coefficient of thermal expansion smaller than that can be used, for example, those formed of a resin material such as polyimide resin can be used. The first resin layer has a thickness set to, for example, 5 μm or more and 15 μm or less, a thermal expansion coefficient in the plane direction set to, for example, −2 ppm / ° C. or more and 2 ppm / ° C. or less, and a thermal expansion coefficient in the thickness direction, for example, 100 ppm / The Young's modulus is set to 4 GPa or more and 12 GPa or less, for example.

  The second resin layer adheres the first resin layers to each other, and has a lower Young's modulus and a higher adhesive strength with other members than the first resin layer. The second resin layer has a larger coefficient of thermal expansion in the plane direction than the first resin layer, but has a much smaller Young's modulus than the first resin layer, so that the insulating layer 14 contributes little to the thermal expansion. In addition, an increase in the thermal expansion coefficient in the planar direction of the insulating layer 14 can be suppressed. As such a second resin layer, one in which resin molecules are randomly arranged so that the longitudinal directions of the molecular chains of the resin molecules are different from each other and having the same thermal expansion coefficient in each direction may be used. For example, what was formed with resin materials, such as an epoxy resin, can be used. The second resin layer has a thickness set to, for example, 3 μm or more and 7 μm or less, a thermal expansion coefficient in each direction is set to, for example, 100 ppm / ° C. or more and 400 ppm / ° C. or less, and the thermal expansion coefficient in the planar direction is the first resin layer. For example, -0.005 times to 0.02 times, Young's modulus is set to, for example, 0.001 GPa to 0.1 GPa, and Young's modulus is 0.00001 times to 0.001 times that of the first resin layer. It is set as follows.

  The second conductive layer 10b is disposed on each insulating layer 14 and is separated from each other in the thickness direction. The second conductive layer 10b can be made of the same conductive material as the first connection pad 7a and the first connection pad 7a described above. The thickness, the thermal expansion coefficient in each direction, and the Young's modulus are The first connection pad 7a is set in the same manner.

  The via conductor 15 that is electrically connected to the second conductive layer 10b connects the second conductive layers 10b that are separated from each other in the thickness direction to each other. For example, the area of the cross section along the plane direction is the core substrate. It is formed in a columnar shape (tapered shape) that decreases toward 6, and for example, a material formed of a conductive material such as copper can be used.

  On the other hand, the first conductive layer 10a is partially formed between the base body 11 and the insulating layer 14, and electrically connects the through-hole conductor 12 and the via conductor 15.

  A plurality of second connection pads 7b are partially formed on the upper surface of the uppermost insulating layer 14, and electrically connect the via conductors 15 and the bumps 4. The planar shape is the first connection pad. It is a circular shape with a smaller area than 7a. Further, the plurality of second connection pads 7b are arranged in a grid, for example, like the first connection pads 7a. It is desirable that the two directions are orthogonal to each other, and it is desirable that the lattice has a square lattice shape. The plurality of second connection pads 7b may be arranged in a staggered manner.

  The second dummy conductor 8b is partially formed on the upper surface of the uppermost insulating layer 14, and is separated from the second connection pad 7b.

  The first conductive layer 10a, the second connection pad 7b, and the second dummy conductor 8b can be formed of the same conductive material as the first connection pad 7a and the first connection pad 7a described above. The thickness, the thermal expansion coefficient in each direction, and the Young's modulus are set similarly to the first connection pad 7a.

  The first connection pad 7a, the through-hole conductor 12, the first conductive layer 10a, the via conductor 15, the second conductive layer 10b, and the second connection pad 7b described above are electrically connected to each other, and a plurality of sets of wiring portions Is configured. The wiring portion includes a first wiring portion L1 that functions as a signal wiring and a second wiring portion L2 that functions as a ground wiring or a power supply wiring. In the wiring portion, the first connection pad 7 a functions as a connection member with an external circuit, and the second connection pad 7 b functions as a connection member with the electronic component 2. The first dummy conductor 8a and the second dummy conductor 8b are not electrically connected to the wiring portion and do not have a function as wiring.

  Moreover, let the volume of each member mentioned later be the total value of the volume of the same member distribute | arranged in the same layer. For example, the volume of the first connection pad 7a is the total value of the volumes of all the first connection pads 7a disposed on the lower surface of the base 11. This volume is calculated by the product of the thickness and the area in plan view.

  Here, in the wiring substrate 4 of the present embodiment, the thermal expansion coefficients in the planar direction of the base 11 and the insulating layer 14 are the first connection pad 7a, the first conductive layer 10a, the second conductive layer 10b, and the second connection pad 7b. It is smaller than the thermal expansion coefficient in the plane direction. Since the thermal expansion coefficient in the planar direction of the wiring board 4 can be reduced by using the base body 11 and the insulating layer 14 having a small thermal expansion coefficient in the planar direction, the planar direction between the wiring board 4 and the electronic component 2 can be reduced. The difference in thermal expansion coefficient between the wiring board 4 and the electronic component 2 can be improved.

  By the way, when such a base | substrate 11 and the insulating layer 14 are used, since the buildup part 9 contains the 2nd conductive layer 10b whose thermal expansion coefficient of a plane direction is larger than the base | substrate 11 and the insulating layer 14 inside. The thermal expansion coefficient in the planar direction of the build-up part 9 tends to be larger than the thermal expansion coefficient in the planar direction of the core substrate 6. That is, in the wiring substrate 4, the thermal expansion coefficient in the planar direction of the region on the insulating layer 14 side tends to be larger than the thermal expansion coefficient in the planar direction of the region on the base 11 side.

  On the other hand, in the wiring board 4 of the present embodiment, the thermal expansion coefficient in the planar direction of the insulating layer 14 is smaller than the thermal expansion coefficient in the planar direction of the base 11. Therefore, in the wiring substrate 4, the difference in the coefficient of thermal expansion in the planar direction between the region on the insulating layer 14 side and the region on the base body 11 side can be reduced. Therefore, when heat is applied to the wiring substrate 4, the wiring The warpage of the substrate 4 can be reduced, and as a result, the connection reliability between the wiring substrate 4 and the electronic component 2 can be increased.

  Further, it is assumed that the thermal expansion coefficient in the planar direction of the insulating layer 14 and the second conductive layer 10 b on the upper surface of the insulating layer 14 (hereinafter referred to as the wiring layer 16) has a thermal expansion coefficient in the planar direction of the substrate 11. If it is larger than the expansion coefficient, when the number of wiring layers 16 is increased in the buildup section 9, the thermal expansion coefficient in the plane direction of the wiring board 4 tends to increase. On the other hand, the wiring board of this embodiment 4, since the thermal expansion coefficient in the planar direction of the insulating layer 14 is smaller than the thermal expansion coefficient in the planar direction of the base body 11, the difference in the thermal expansion coefficient between the wiring layer 16 and the base body 11 is reduced. The number of wiring layers 16 in the buildup portion 9 can be increased while maintaining the thermal expansion coefficient in the planar direction of the wiring board 4.

  By the way, since the first conductive layer 10a is a grounding wiring or a power supply wiring, the first conductive layer 10a is formed in a flat plate shape (solid shape) and its volume tends to increase. The pad 7b is merely a connection member to the electronic component 2 or the mother board, and is formed in a circular shape and its volume is likely to decrease. Therefore, the volume of the first conductive layer 10a tends to be larger than the volume of the first connection pad 7a and the volume of the second connection pad 7b. Accordingly, when heat is applied to the wiring board 4, the first conductive layer 10a is thermally expanded in the plane direction more than the first connection pad 7a and the second connection pad 7b, and thus the core substrate 6 and the buildup part 9 are respectively provided. In this case, the amount of thermal expansion on the first conductive layer 10a side increases, and a stress that warps in the opposite direction is likely to be applied.

  On the other hand, in the wiring board 4 of the present embodiment, the first dummy conductor 8a spaced from the first connection pad 7a is formed on the lower surface of the base 11. As a result, when heat is applied to the wiring substrate 4, the difference in thermal expansion between the first conductive layer 10 a side and the first connection pad 7 a side in the core substrate 6 can be reduced. Therefore, by reducing the warpage of the core substrate 6, it is possible to reduce the peeling at the boundary portion between the core substrate 6 and the buildup portion 9 due to the warpage.

  Further, a second dummy conductor 8b spaced from the second connection pad 7b is formed on the upper surface of the insulating layer 14 positioned at the uppermost layer. As a result, when heat is applied to the wiring board 4, the difference in the amount of thermal expansion between the first conductive layer 10 a side and the second connection pad 7 b side of the buildup portion 9 can be reduced. Therefore, by reducing the warpage of the build-up portion 9, it is possible to reduce peeling at the boundary portion between the core substrate 6 and the build-up portion 9 due to the warpage.

  The total value of the volume of the first dummy conductor 8a and the volume of the first connection pad 7a is preferably smaller than the volume of the first conductive layer 10a. As a result, it is possible to suppress the amount of thermal expansion on the first connection pad 7a side in the core substrate 6 from being larger than that on the first conductive layer 10a side, and to reduce the warping stress applied to the core substrate 6.

  The total value of the volume of the second dummy conductor 8b and the volume of the second connection pad 7b is preferably smaller than the volume of the first conductive layer 10a. As a result, it is possible to reduce the amount of thermal expansion on the second connection pad 7b side of the buildup portion 9 from being larger than that on the first conductive layer 10a side, and to reduce the warping stress applied to the buildup portion 9. it can.

  The total value of the volume of the first dummy conductor 8a, the volume of the first connection pad 7a, the volume of the second dummy conductor 8b, and the volume of the second connection pad 7b is set to be the same as the volume of the first conductive layer 10a. It is desirable that As a result, in the core substrate 6, while reducing the difference in thermal expansion between the first conductive layer 10 a side and the first connection pad 7 a side, the buildup portion 9 has a difference between the first conductive layer 10 a side and the second connection pad 7 b side. The difference in the amount of thermal expansion can be reduced, and consequently, the warping stress applied to both the core substrate 6 and the buildup portion 9 can be reduced. The total value of the volume of the first dummy conductor 8a, the volume of the first connection pad 7a, the volume of the second dummy conductor 8b, and the volume of the second connection pad 7b is, for example, 60% or more of the volume of the first conductive layer 10a. It may be set to 80% or less.

  The total value of the volume of the first dummy conductor 8a and the volume of the first connection pad 7a is preferably larger than the total value of the volume of the second dummy conductor 8b and the volume of the second connection pad 7b. As a result, since the total value of the volume of the first dummy conductor 8a and the volume of the first connection pad 7a is large, by increasing the thermal expansion coefficient in the plane direction locally on the lower surface of the wiring board 3, the wiring board The difference in the thermal expansion coefficient between the mother board and the wiring board 3 having a larger coefficient of thermal expansion in the planar direction than 3 can be locally reduced, and the electrical connection reliability between the mother board and the wiring board 3 can be increased. Further, since the total value of the volume of the second dummy conductor 8b and the volume of the second connection pad 7b is small, the coefficient of thermal expansion in the planar direction is locally reduced on the upper surface of the wiring board 3, whereby the wiring board 3 The electrical connection reliability between the electronic component 2 and the wiring board 3 can be increased by locally reducing the difference in the thermal expansion coefficient between the electronic component 2 and the wiring board 3 having a smaller thermal expansion coefficient in the plane direction. it can. Note that the thermal expansion coefficient in the planar direction of the motherboard is set to, for example, 15 ppm / ° C. or more and 20 ppm / ° C. or less.

  On the other hand, as shown in FIG. 5, the first dummy conductor 8a has a first grid conductor 17a and a first annular conductor 18a surrounding the first grid conductor 17a, and the first connection pad 7a. Are arranged in one grid of the first grid-like conductor 17a.

  The first grid-like conductor 17a includes a plurality of first linear conductors 17a1 whose longitudinal directions are parallel to each other, and a plurality of first linear conductors 17a1 whose longitudinal directions are parallel to each other, the longitudinal directions being different from the longitudinal directions of the first linear conductors 17a1. A second linear conductor 17a2, and the first linear conductor 17a1 and the second linear conductor 17a2 intersect with each other to form a grid, thereby forming the first grid conductor 17a. ing. Since the first lattice conductors 17a distribute the conductor portions of the second dummy conductors 8a more uniformly on the lower surface of the base body 11, the thermal expansion coefficient in the planar direction can be made more uniform on the lower surface of the base body 11. . In addition, either the first linear conductor 17a1 or the second linear conductor 17a2 is parallel to the linear wiring routed from the center of the chip in the first conductive layer 10a or the second conductive layer 10b. Therefore, the conductor portion of the second dummy conductor 8a can be made to correspond to a location where the coefficient of thermal expansion has locally changed due to the straight wiring, thereby reducing the warpage of the wiring board 3. it can.

  Further, the first grid-like conductor 17a is configured to adjust the width or interval of the first linear conductor 17a1 and the second linear conductor 17a2, thereby maintaining the distribution of the conductor portion of the second dummy conductor 8a uniformly. The volume of the second dummy conductor 8a can be easily adjusted.

  Further, the first linear conductor 17a1 and the second linear conductor 17a2 are preferably orthogonal to each other, and in particular, the first grid conductor 17a is preferably a square grid. As a result, the conductor portion of the second dummy conductor 8a can be uniformly distributed on the lower surface of the base 11.

  Further, it is desirable that the first grid-like conductor 17a intersects the grid formed by the first connection pads 7a. As a result, one of the first linear conductor 17a1 and the second linear conductor 17a2 with respect to the linear wiring radially drawn from the center of the chip in the first conductive layer 10a or the second conductive layer 10b. Therefore, the conductor portion of the second dummy conductor 8a can be made to correspond to a location where the coefficient of thermal expansion has locally changed due to the linear wiring. The angle formed by the intersection of the grid formed by the first connection pads 7a and the first grid-like conductor 17a is preferably set to 35 ° or more and 55 ° or less, particularly 45 °. It is desirable that

  The first annular conductor 18a is connected to the end portions of the first linear conductor 17a1 and the second linear conductor 17a2, that is, the end portions of the lattice conductor 17a. As a result, the stress applied to the end portions of the first linear conductor 17a1 and the second linear conductor 17a2 is relieved, and the end portions of the first linear conductor 17a1 and the second linear conductor 17a2 are separated from the lower surface of the base body 14. It can suppress peeling. The line width of the first annular conductor 18a is set to 40 μm or more and 80 μm or less, for example.

  The first annular conductor 18a is preferably rectangular and its corners are curved. As a result, the stress applied to the corner portion of the first annular conductor 18a can be relaxed. In addition, the curvature radius of this corner | angular part is set to 25 micrometers or more and 100 micrometers or less, for example.

  On the other hand, as shown in FIG. 2, the second dummy conductor 8b includes a second grid conductor 17b, a second annular conductor 18b surrounding the second grid conductor 17b, and a third grid shape surrounding the second annular conductor 18b. A conductor 17c and a third annular conductor 18c surrounding the third grid conductor 17c are provided, and the second connection pads 7b are arranged in one grid of the second grid conductor 17b.

  The second grid conductor 17b and the third grid conductor 17c have the same configuration and effects as the first grid conductor 17a.

  Further, the widths of the linear conductors constituting the second grid conductor 17b and the third grid conductor 17c are smaller than the widths of the linear conductors constituting the first grid conductor 17a. As a result, the volume of the second dummy conductor 8b can be easily made smaller than the volume of the first dummy conductor 8a.

  In addition, the width of the linear conductor constituting the second grid conductor 17b is smaller than the width of the linear conductor constituting the third grid conductor 17c. As a result, the coefficient of thermal expansion of the upper surface of the wiring board 3 can be locally reduced in the region immediately below the electronic component 2 having a small coefficient of thermal expansion. As a result, the electrical connection reliability between the wiring board 3 and the electronic component 2 can be reduced. Can be increased.

  The second annular conductor 18b and the third annular conductor 18c have the same configuration and effects as the first annular conductor 18a.

  The second annular conductor 18b is connected to the end portions of the second and third lattice-like conductors 17b and 17c, and the third annular conductor 18c is connected to the end portions of the third and other lattice-like conductors 17c. ing. As a result, the stress applied to the ends of the linear conductors constituting the second grid conductor 17b and the third grid conductor 17c can be relaxed.

  The line width of the second annular conductor 18b and the third annular conductor 18c is preferably smaller than that of the first annular conductor 18a. As a result, the volume of the second dummy conductor 8b can be easily made smaller than the volume of the first dummy conductor 8a. The line width of the second annular conductor 18b is desirably smaller than that of the third annular conductor 18c. As a result, the coefficient of thermal expansion of the upper surface of the wiring board 3 can be locally reduced in the region immediately below the electronic component 2 having a small coefficient of thermal expansion. As a result, the electrical connection reliability between the wiring board 3 and the electronic component 2 can be reduced. Can be increased.

  Thus, the mounting structure 1 described above exhibits a desired function by driving or controlling the electronic component 2 based on the power supply or signal supplied from the external circuit via the wiring board 3.

  Next, a method for manufacturing the mounting structure 1 described above will be described.

  (1) As shown in FIG. 6a, a core substrate 6 on which a first connection pad 7a, a first dummy conductor 8a, and a first conductive layer 10a are formed is prepared. Specifically, this is performed as follows.

  First, for example, a base 11 is produced by laminating a plurality of uncured resin sheets and laminating a copper foil on the outermost layer and curing the laminate by heating and pressing. The uncured state is an A-stage or B-stage according to ISO 472: 1999. Next, a plurality of through holes penetrating the base 11 in the thickness direction are formed by, for example, drilling or laser processing. Next, a cylindrical through-hole conductor 12 is formed by depositing a conductive material on the inner wall of the through-hole by, for example, electroless plating, vapor deposition, CVD, or sputtering. Next, the inside of the cylindrical through-hole conductor 12 is filled with a resin material or the like to form the insulator 13. Next, after depositing a conductive material on the exposed portion of the insulator 13, by patterning the conductive material and the copper foil on the upper and lower surfaces of the base 11 using a conventionally known photolithography technique, etching, or the like, A first connection pad 7a, a first dummy conductor 8a, and a first conductive layer 10a are formed. In this patterning, the first connection pad 7a, the first dummy conductor 8a, and the first conductive layer 10a can be patterned into a desired shape.

  As described above, the core substrate 6 on which the first connection pad 7a, the first dummy conductor 8a, and the first conductive layer 10a are formed can be manufactured.

  (2) As shown in FIG. 6b, the two core substrates 6 are bonded. Specifically, for example, the following is performed.

  First, a temporary fixing member 19 made of a thermoplastic resin or the like is prepared. Next, the first connection pad 7 a side main surface of each of the two core substrates 6 is brought into contact with the temporary fixing member 19 and heated to bond the two core substrates 6 through the temporary fixing member 19. Of the two main surfaces, only the first conductive layer 10a side main surface of the two bonded core substrates 6 is exposed.

  As described above, the two core substrates 6 can be bonded.

  (3) As shown in FIG. 7a, the build-up portion 9, the second connection pad 7b, and the second dummy conductor 8b are formed only on the main surface on the first conductive layer 10a side of each of the two bonded core substrates 6. Thus, two bonded wiring boards 3 are produced. Specifically, for example, it is performed as follows.

  First, after bonding a film-like first resin layer to the first conductive layer 10a side main surface of each of the two bonded core substrates 6 via an uncured second resin layer precursor, the second resin By thermally curing the layer precursor to form the second resin layer, the insulating layer 14 is formed on the first conductive layer 10a side main surface of each of the two core substrates 6. Next, via holes are formed in the insulating layers 14 of the two core substrates 6 using, for example, a YAG laser device or a carbon dioxide laser device, and at least a part of the first conductive layer 10a is exposed in the via holes. Next, the via conductor 13 is formed in the via hole and the second conductive layer 10b is formed on the exposed main surface of the insulating layer 14 by, for example, a semi-additive method, a subtractive method, or a full additive method. The second conductive layer 10b can be formed in a desired shape by using a resist having a desired shape, for example.

  By repeating this process, the build-up part 9 can be formed. The second connection pad 7b and the second dummy conductor 8b can be formed in the same manner as the second conductive layer 10b.

  As described above, two bonded wiring boards 3 can be manufactured.

  (4) As shown in FIG. 7 b, two wiring boards 3 are peeled off from the temporary fixing member 19, and the two bonded wiring boards 3 are peeled off from each other, thereby obtaining two wiring boards 3.

  (5) By forming the solder balls 5 on the first connection pads 7a and forming the bumps 4 on the second connection pads 7b and flip-chip mounting the electronic component 2 on the wiring board 3 via the bumps 4, The mounting structure 1 shown in FIG. 5c is produced.

  As described above, the mounting structure 1 can be manufactured. In the method of manufacturing the wiring board according to the present embodiment, as described above, after the two core substrates 6 are bonded, the build-up portion 9, the second connection pad 7b, and the second dummy conductor are attached to each core substrate 6. Since 8b is formed and the two wiring boards 3 are manufactured, the manufacturing process can be reduced and the production efficiency can be increased.

  The present invention is not limited to the above-described embodiments, and various modifications, improvements, combinations, and the like can be made without departing from the spirit of the present invention.

  For example, in the above-described embodiment, the configuration using a semiconductor element as an electronic component has been described as an example, but a capacitor or the like may be used as the electronic component.

  Further, in the achieved embodiment, the configuration in which the electronic component is flip-chip mounted on the wiring board has been described as an example, but the electronic component may be mounted on the wiring board by wire bonding.

  In the above-described embodiment, the configuration in which the build-up unit includes three insulating layers and two second conductive layers has been described as an example, but the insulating layer and the second conductive layer may have any number of layers.

  In the above-described embodiment, the configuration in which the base includes the base has been described as an example, but the base may not include the base.

  In the above-described embodiment, the structure in which the resin material of the substrate contains the inorganic insulating filler has been described as an example. However, the resin material of the insulating layer may contain the inorganic insulating filler.

  In the above-described embodiment, the second annular conductor has been described as an example of the configuration in which the second annular conductor is connected to the ends of the second and third lattice conductors. However, the second annular conductor is the second lattice conductor. You may connect only to the edge part.

  Hereinafter, the present invention will be described in detail by way of examples. However, the present invention is not limited to the following examples, and all modifications and embodiments without departing from the gist of the present invention are not limited thereto. Included in range.

  Table 1 shows the configuration of each layer of the wiring board of this example in the order of lamination. About this wiring board, the thermal expansion coefficient in the planar direction in the region on the substrate side and the region on the insulating layer side in the wiring substrate is calculated from the thermal expansion coefficient, volume ratio, and Young's modulus in the planar direction of each member. The effect of was examined. Hereinafter, the coefficient of thermal expansion is the coefficient of thermal expansion in the planar direction. Moreover, the remaining copper ratio of each layer calculates the ratio which the sum total of the area of the member which consists of copper with respect to the area of the whole wiring board in each layer.

(Configuration of wiring board)
The first connection pad, the first dummy conductor, the first conductive layer, the second conductive layer, the second connection pad, and the second dummy conductor were made of copper.

  As the substrate, a glass cloth impregnated with a liquid crystal polyester resin was used.

  The insulating layer used consisted of a first resin layer made of a film-like polyimide resin and a second resin layer made of an epoxy resin as an adhesive member. Since the Young's modulus (0.05 GPa) of the second resin layer is extremely smaller than the Young's modulus (8.0 GPa) of the first resin layer, the thermal expansion coefficient of the insulating layer is the thermal expansion coefficient of the first resin layer. Can be considered.

(Calculation of thermal expansion coefficient)
The coefficient of thermal expansion in the planar direction of each of the substrate side region and the insulating layer side region in the wiring board was calculated as follows.

  In addition, the base | substrate side area | region in a wiring board shall consist of the base | substrate side half of a 1st conductive layer, a base | substrate, a 1st connection pad, and a 1st dummy conductor. In addition, the insulating layer side region in the wiring board is composed of the base side half of the first conductive layer, the insulating layer, the second insulating layer first connection pad, and the first dummy conductor.

  First, the volume ratio of each member is calculated by calculating the product of the thickness ratio and the area ratio of each member for the base-side region. Moreover, it calculates similarly about the volume ratio of each member of an insulating layer side area | region. The area ratio of the insulating layer and the base is 100%, and the area ratio of the member made of copper is the remaining copper ratio.

  Next, the Young's modulus of the entire substrate-side region is calculated by calculating the product of the Young's modulus and volume ratio of each member for the substrate-side region and obtaining the total value. The Young's modulus of the entire insulating layer side region is calculated in the same manner.

  Next, for the base-side region, the product of the coefficient of thermal expansion, volume ratio and Young's modulus of each member is calculated to obtain the total value, and the total value is divided by the Young's modulus of the entire insulating layer-side region, The coefficient of thermal expansion of the entire substrate side region is calculated. Moreover, it calculates similarly about the thermal expansion coefficient of the whole insulating layer side area | region.

  As described above, the thermal expansion coefficient in the planar direction of each of the substrate side region and the insulating layer side region was calculated for the wiring board in Table 1. As a result, the thermal expansion coefficient in the planar direction of the substrate side region was 11.47 ppm / The thermal expansion coefficient in the planar direction of the insulating layer side region was 12.08 ppm / ° C.

  Thus, since the difference in the thermal expansion coefficient in the plane direction between the base-side region and the insulating layer-side region is small, the warpage of the wiring board according to the present example is satisfactorily suppressed.

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Electronic component 3 Wiring board 4 Bump 5 Solder ball 6 Core board 7a 1st connection pad 7b 2nd connection pad 8a 1st dummy conductor 8b 2nd dummy conductor 9 Build-up part 10a 1st conductive layer 10b 2nd Conductive layer 11 Base 12 Through-hole conductor 13 Insulator 14 Insulating layer 15 Via conductor 16 Wiring layer L1 First wiring portion L2 Second wiring portion

Claims (9)

Between the base, a plurality of insulating layers laminated only on the upper surface side of the base, a first connection pad partially formed on the lower surface of the base, and the base and the insulating layer adjacent to the base A first conductive layer partially formed on the first conductive layer, a second conductive layer partially formed between the adjacent insulating layers, and a top surface of the insulating layer located on the uppermost layer. A second connection pad,
The thermal expansion coefficient in the planar direction of the substrate and the insulating layer is smaller than the thermal expansion coefficient in the planar direction of the first connection pad, the first conductive layer, the second conductive layer, and the second connection pad,
The wiring board according to claim 1, wherein a thermal expansion coefficient in a planar direction of the insulating layer is smaller than a thermal expansion coefficient in the planar direction of the base. The wiring board according to claim 1,
The volume of the first conductive layer is larger than the total value of the volume of the first connection pad and the volume of the second connection pad,
The Young's modulus of the substrate is larger than the Young's modulus of the insulating layer,
The wiring board further comprising a first dummy conductor partially formed on a lower surface of the base and spaced from the first connection pad. The wiring board according to claim 2,
A wiring board, further comprising: a second dummy conductor partially formed on an upper surface of the insulating layer located in the uppermost layer and spaced from the second connection pad. The wiring board according to claim 3,
The wiring board, wherein a total value of a volume of the first dummy conductor and a volume of the first connection pad is larger than a total value of a volume of the second dummy conductor and a volume of the second connection pad. The wiring board according to claim 2,
The first dummy conductor includes a grid-shaped conductor including a plurality of first linear conductors and a plurality of second linear conductors intersecting the first linear conductor, and an annular conductor surrounding the first grid-shaped conductor 17a. And a wiring board characterized by comprising: The wiring board according to claim 5,
The wiring board, wherein the annular conductor is connected to end portions of the first linear conductor and the second linear conductor. The wiring board according to claim 1,
The wiring board, wherein the first connection pad, the first conductive layer, the second conductive layer, and the second connection pad are made of the same conductive material. The wiring board according to claim 1,
The first connection pad is for being electrically connected to an external circuit,
The wiring board, wherein the second connection pad is for electrical connection to an electronic component. The wiring board according to claim 1;
A mounting structure comprising: an electronic component mounted on the wiring substrate and electrically connected to the second connection pad.