JP2011233749A - Pattern formation method and semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a pattern formation method with which it becomes possible to precisely and simply inspect the quality of a process for patterning a photosensitive resin film using a semiconductor lithography technique.SOLUTION: A pattern formation method includes: a process in which a photosensitive resin film is formed in an inspection target area on a principal plane of a substrate 1; an exposure process in which exposure light passed through a precursor pattern formed for a mask is irradiated to a surface of the photosensitive resin film using a projection optical system; and a development process in which an inspection target pattern 2 corresponding to the precursor pattern is formed by performing development processing on the photosensitive resin film. The inspection target pattern 2 has inclined structures 2sa and 2sb, each of which has a thickness changing along a direction from one end side to the other end side. The precursor pattern has a light transmittance distribution corresponding to a thickness distribution of the inspection target pattern 2.

Description

  The present invention relates to a technique for inspecting the quality of a process for patterning a photosensitive resin film using a semiconductor lithography technique, and particularly to a technique for inspecting the quality of an exposure process and a development process.

  Various inspections are performed in the manufacturing process in order to improve the quality of LSI (Large Scale Integrated Circuit). In general, in the LSI manufacturing process, a plurality of layers of circuit patterns are formed on a semiconductor wafer. Of these layers, a layer having a processing line width close to the resolution limit of a projection exposure apparatus used in a semiconductor lithography process. (Layer) is called a critical layer, and a layer having a larger processing line width than a critical layer is called a rough layer. For the rough layer, a simple visual inspection using, for example, an optical microscope image is generally performed. On the other hand, for a critical layer including a fine structure such as a gate electrode, an inspection using a scanning electron microscope (SEM) image or a transmission electron microscope (TEM) image is performed, for example. Although it is necessary to perform highly accurate management of pattern dimensions, there is a problem that inspection costs increase.

  The accuracy of the processing line width of each layer depends on, for example, the dimensional accuracy of the resist pattern formed in the semiconductor lithography process, but the exposure amount when the mask (reticle) original pattern is transferred to the resist film in the semiconductor lithography process. If the amount deviates from an appropriate amount, or the development is insufficient or excessive (for example, the development time deviates from the appropriate time), a resist pattern having a desired dimensional accuracy cannot be formed, leading to a decrease in LSI yield. For this reason, it is also important to inspect the quality of the exposure process and the development process in the semiconductor lithography process.

  FIG. 1A is a cross-sectional view schematically showing a part of a semiconductor lithography process using a positive resist film. In this semiconductor lithography process, as shown in FIG. 1A, a semiconductor wafer 100 having a coating surface coated with a resist film 101 is placed on a wafer stage (not shown) of a projection exposure apparatus. Above the wafer stage, a mask (reticle) 110 as an original is arranged. The mask 110 includes a quartz substrate 110A and a light shielding film 110B formed on the surface of the quartz substrate 110A. In the exposure step, the original pattern of the mask 110 is transferred to the resist film 101 by irradiating the resist film 101 with exposure light 120 through the mask 110. In the subsequent development process, a resist pattern is formed by dissolving the exposed portion 101e using a developer. If an excessive exposure amount in the exposure step or an excessive development amount in the developing step occurs, the size of the openings 102a and 102b of the formed resist pattern 101P increases as shown in FIG. Wd becomes smaller than the processing line width Wt of the target pattern. On the other hand, when the exposure amount is insufficient or the development is insufficient, as shown in FIG. 1C, the size of the openings 102a and 102b of the formed resist pattern 101P becomes small, and the processing line width Wo becomes the target pattern processing. It becomes larger than the line width Wt. Further, the resist film materials 101a and 101b remain at the bottoms of the openings 102a and 102b, which may cause open defects (wiring disconnection).

  Examples of prior art documents relating to resist pattern quality inspection include, for example, Japanese Patent Application Laid-Open No. 1-129414 (Patent Document 1) and Japanese Patent Application Laid-Open No. 60-140346 (Patent Document 2). Patent Document 1 discloses a technique for forming on a substrate a plurality of inspection photoresist patterns whose line widths gradually narrow at regular intervals in both the vertical and horizontal directions. By checking the state of the resist pattern for inspection remaining after the etching, it can be determined whether or not the exposure amount in the exposure process is appropriate. On the other hand, Patent Document 2 discloses a technique for forming a plurality of square unit patterns (inspection photoresist patterns) having apexes arranged on the same reference line at a predetermined pitch. By visually recognizing the contact and non-contact between the vertices of the unit pattern, it is possible to determine whether or not the exposure time in the exposure process is appropriate.

Japanese Patent Laid-Open No. 1-129414 JP-A-60-140346

  The quality of the resist pattern for the rough layer, that is, the quality of the semiconductor lithography process applied to the rough layer can be determined by a simple inspection comparing the optical microscopic image of the resist pattern with a limit sample (sample showing the limit of quality). However, in this simple inspection, there is a limit to the determination accuracy. For example, even if the inspection resist patterns of Patent Document 1 and Patent Document 2 are used, it is accurately determined based on the optical microscope image whether or not the error of the processing line width with respect to the line width of the target pattern is within an allowable range. There is a problem that it is difficult to do. In addition, it is difficult to find a thin resist film remaining at the bottom of the opening of the resist pattern from the optical microscope image. If it is possible to form a photoresist pattern for inspection having a very thin line width and a high aspect ratio (resist film thickness / pattern line width) using the technique of Patent Document 1, an error in the processing line width is allowed. Although it can be determined whether or not it is within the range, if an actual photoresist pattern for inspection with a high aspect ratio is to be formed, the resist pattern is affected by the development process and drying process performed after the exposure process. There is a problem that falls (resist fall) occurs.

  According to the inspection using the SEM image or TEM image described above, it is possible to accurately determine whether or not the error in the processing line width of the resist pattern is within an allowable range, and the resist film remaining at the bottom of the opening of the resist pattern Can be easily detected, but there is a problem that the inspection cost is greatly increased.

  In view of the above, an object of the present invention is to provide a pattern forming method and a semiconductor device manufacturing method capable of accurately and easily inspecting the quality of a process of patterning a photosensitive resin film using a semiconductor lithography technique. is there.

  The pattern forming method according to the present invention includes a step of forming a photosensitive resin film in a region to be inspected on a main surface of a substrate, and exposure light transmitted through an original pattern formed on a mask using a projection optical system. An exposure step of projecting onto the surface of the photosensitive resin film, and a development step of performing a development process on the photosensitive resin film to form an inspected pattern corresponding to the original pattern. The inspection pattern has an inclined structure in which the thickness changes from one end side to the other end side in a predetermined direction along the main surface, and the original pattern has a light transmittance distribution corresponding to the thickness distribution of the inspection pattern. It is characterized by having.

  A method of manufacturing a semiconductor device according to the present invention includes a step of simultaneously forming a photosensitive resin film in an element formation region and a region to be inspected on a main surface of a semiconductor wafer, and a projection optical system. The exposure light transmitted through the inspection original pattern formed on the mask is projected onto the surface of the photosensitive resin film formed on the inspection area, and at the same time, the exposure light transmitted through the circuit original pattern formed on the mask An exposure step of irradiating light onto the surface of the photosensitive resin film formed in the element formation region, and development processing is performed on the photosensitive resin film to correspond to the inspection original pattern and the circuit original pattern, respectively. A developing step for forming a pattern to be inspected and a pattern for forming a circuit, wherein the pattern to be inspected is one end in a predetermined direction along the main surface of the pattern to be inspected Has a gradient structure in which the thickness is changed toward the other end from the original pattern is characterized by having a light transmittance distribution according to the thickness distribution of the pattern to be inspected.

  According to the present invention, it is possible to accurately detect abnormalities in the exposure process and the development process by observing the appearance of the pattern to be inspected.

It is sectional drawing which shows a part of semiconductor lithography process roughly. It is a figure which shows roughly the to-be-inspected pattern formed with the method of Embodiment 1 which concerns on this invention. It is a top view of a semiconductor wafer (substrate). FIG. 2 is a diagram schematically showing an example of an original pattern for inspection of a mask used for forming an inspection pattern in the semiconductor lithography process of the first embodiment. FIG. 5 is a diagram schematically showing a part of the pattern forming process according to the first embodiment. It is sectional drawing which shows schematically the exposed part and unexposed part which were formed in the photosensitive resin film by the exposure process which concerns on Embodiment 1. FIG. It is sectional drawing which shows roughly an example of the to-be-inspected pattern based on Embodiment 1 formed when the process conditions of a semiconductor lithography process are not appropriate. It is a figure which shows roughly the to-be-inspected pattern and reference | standard pattern formed with the method of Embodiment 2 which concerns on this invention. FIG. 10 is a diagram schematically showing an example of an original pattern of a mask used for forming a pattern to be inspected and a reference pattern in the semiconductor lithography process of the second embodiment. It is sectional drawing which shows schematically the exposed part and unexposed part formed in the photosensitive resin film by the exposure process which concerns on Embodiment 2. FIG. It is sectional drawing which shows roughly an example of the to-be-inspected pattern and reference | standard pattern which concern on Embodiment 2 formed when the process conditions of a semiconductor lithography process are not appropriate. It is sectional drawing which shows roughly the other example of the to-be-inspected pattern and reference | standard pattern which concern on Embodiment 2 formed when the process conditions of a semiconductor lithography process are not appropriate. It is a figure which shows roughly the to-be-inspected pattern formed with the method of Embodiment 3 which concerns on this invention. It is a figure which shows roughly an example of the test | inspection original pattern of the mask used in order to form a to-be-inspected pattern in the semiconductor lithography process of Embodiment 3. FIG. It is sectional drawing which shows schematically the exposure part and unexposed part formed in the photosensitive resin film by the exposure process which concerns on Embodiment 3. FIG. It is sectional drawing which shows roughly an example of the to-be-inspected pattern based on Embodiment 3 formed when the process conditions of a semiconductor lithography process are not appropriate. It is sectional drawing which shows roughly the other example of the to-be-inspected pattern based on Embodiment 3 formed when the process conditions of a semiconductor lithography process are not appropriate.

  Hereinafter, various embodiments according to the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
2A and 2B are diagrams schematically showing an inspection pattern 2 formed by the method according to the first embodiment of the present invention. 2A is a plan view (top view) of the pattern 2 to be inspected as viewed from a direction perpendicular to the main surface of the semiconductor wafer 1. FIG. 2B is a plan view of FIG. It is sectional drawing along the IIb-IIb line | wire of the to-be-inspected pattern 2 shown. The pattern 2 to be inspected is formed on the main surface of a semiconductor wafer or substrate by a semiconductor lithography process (hereinafter simply referred to as “lithography process”) using a mask (reticle) as an original.

  When performing an exposure process in a lithography process using a so-called step-and-scan projection exposure apparatus (stepper), the projection exposure apparatus uses an exposure area (referred to as a shot area) on the main surface of the substrate. While scanning, exposure light is irradiated to each shot region through a mask. 3A is a plan view showing an outline of the shot regions 10, 10,... On the main surface of the semiconductor wafer (substrate) 1. FIG. As shown in FIG. 3B, each shot region 10 can be provided with an element formation region 12 in which one semiconductor chip is formed and a grid line (dicing region) 11. The grid line 11 is a cutting area for separating (dividing into individual pieces) semiconductor chips from the semiconductor wafer 1. The inspection area 13 where the inspection pattern 2 is formed is provided in the grid line 11. In some cases, a plurality of element formation regions 12 are provided in one shot region 10. FIG. 3C is a diagram showing four element formation regions 12, 12, 12, 12 provided in one shot region 10. In this case, the inspected area 13 can be provided in the grid line 11 that forms the peripheral edge of the shot area 10.

  In the lithography process, first, a photosensitive resin film is simultaneously applied to the element formation region 12 and the inspection region 13 in each shot region 10. In the next exposure step, exposure light transmitted through the mask is irradiated onto the photosensitive resin using a projection optical system, so that the circuit original pattern and the inspection original pattern formed on the mask are collectively put on the photosensitive resin film. And transcribe. Here, the exposure light transmitted through the circuit original pattern is irradiated onto the surface of the photosensitive resin film in the element forming region 12, and the exposure light transmitted through the inspection original pattern is applied to the photosensitive resin film in the inspection region 13. Irradiated. In the subsequent development step, the photosensitive resin film is subjected to development processing, whereby a resist pattern or an insulating film pattern is formed in the element formation region 12 and the inspection pattern 2 is formed in the inspection region 13. For example, g-line or i-line can be used as the exposure light, but is not limited to these.

  As shown in FIGS. 2A and 2B, the pattern 2 to be inspected according to the present embodiment has a rectangular bottom surface 2b having a long side having a length L1 and a short side having a width W1. The inclined structures 2sa and 2sb have thicknesses that change from one end side to the other end side in the X-axis direction (predetermined direction along the main surface of the semiconductor wafer 1). The pattern 2 to be inspected includes a first layer 21, a second layer 22, a third layer 23, a fourth layer 24, and a fifth layer 25 that constitute five steps. The first layer 21 that is the lowest layer has side surfaces 21 a and 21 b that rise substantially vertically from both ends in the long side direction of the bottom surface 2 b of the pattern 2 to be inspected. These side surfaces 21a and 21b constitute boundary lines (edges) that can be identified by an optical microscope image as shown in FIG. Similarly, the second layer 22 has side surfaces 22a and 22b, the third layer 23 has side surfaces 23a and 23b, the fourth layer 24 has side surfaces 24a and 24b, and the fifth layer 25 has side surfaces 25a and 23b. 25b, and these side surfaces 22a, 22b, 23a, 23b, 24a, 24b, 25a, and 25b form stepped steps, all of which form a boundary line that is visible in an optical microscope image.

  The side surface interval Ls and the layer interval (step) Hs of the inclined structures 2sa and 2sb can identify the edge patterns of the side surfaces 21a, 21b, 22a, 22b, 23a, 23b, 24a, 24b, 25a, and 25b in the optical microscope image. Any size can be used. For example, the side surface distance Ls can be about 2 μm, and the layer distance (step) Hs of the pattern 2 to be inspected can be about 2 μm, but is not limited thereto.

  4A and 4B are diagrams schematically showing an example of an original pattern for inspection of the mask 3 used for forming the inspection pattern 2 in the lithography process of the present embodiment. 4A is a plan view showing a part of the surface of the mask 3, and FIG. 4B is a cross-sectional view taken along the line IVb-IVb of the mask 3 in FIG. 4A. The mask 3 is formed with a circuit original pattern in addition to the inspection original pattern, but this circuit original pattern is not shown for convenience of explanation. The mask 3 includes a light transmitting substrate 31 such as a glass substrate or a quartz substrate, and a light shielding film pattern (light shielding pattern) 32 formed on one main surface of the light transmitting substrate 31. Examples of the constituent material of the light shielding pattern 32 include, but are not limited to, chromium, chromium oxide, and tantalum.

  The light shielding pattern 32 is formed in a rectangular region on the translucent substrate 31 as shown in FIG. The light shielding pattern 32 has an opening density (roughness) corresponding to the height of the inclined structures 2sa and 2sb of the pattern 2 to be inspected. The opening density is from the center of the region to both ends in the long side direction. It is designed to be lowered step by step as you head. The light shielding pattern 32 has a light transmittance distribution (two-dimensional distribution) corresponding to the thickness distribution of the inclined structures 2sa and 2sb of the pattern 2 to be inspected. The light shielding pattern 32 includes transmission regions 321 a and 321 b having light transmittance corresponding to the height of the first layer 21 of the pattern 2 to be inspected, and a transmission region 322 a having light transmittance corresponding to the height of the second layer 22. , 322b, transmission regions 323a and 323b having light transmittance corresponding to the height of the third layer 23, transmission regions 324a and 324b having light transmittance corresponding to the height of the fourth layer 24, and fifth A transmission region 325 having a light transmittance corresponding to the height of the layer 25.

  In each of the transmission regions 321a to 324a, 325, and 321b to 324b, as shown in FIG. 4A, linear (strip-shaped) light shielding films are periodically arranged. A slit-shaped opening, that is, a light transmission hole is formed between the light shielding film and the light shielding film. In the present embodiment, the shape of the opening formed in the mask 3 is a slit shape, but is not limited to this. For example, the light shielding pattern may be designed so that a dot-shaped opening is formed.

  FIG. 5 schematically shows a part of the lithography process for forming the pattern 2 to be inspected. After applying a positive photosensitive resin film on the main surface of the semiconductor wafer 1, the semiconductor wafer 1 is placed in a projection exposure apparatus. As shown in FIG. 5, in the projection exposure apparatus, exposure light 35 emitted from an exposure light source (not shown) passes through the mask 3 and the projection optical system 4, and is exposed to light on the semiconductor wafer 1 by the projection optical system 4. The surface of the conductive resin film is irradiated. FIG. 6 is a cross-sectional view schematically showing an exposed portion 20e and an unexposed portion 20n of the photosensitive resin film 20. As shown in FIG. Since the photosensitive resin film 20 is exposed to a depth corresponding to the intensity of the exposure light 35, the depth of the soluble region of the photosensitive resin film 20 with respect to the developer changes according to the exposure light intensity. As shown in FIG. 6, the exposure step forms an exposed portion 20 e soluble in the developer and an unexposed portion 20 n having a stepped upper surface in the photosensitive resin film 20. In the subsequent development process, the exposed portion 20e is dissolved in the developer and the unexposed portion 20n is not dissolved. As a result, the inspection pattern 2 having the inclined structures 2sa and 2sb in the inspection region 13 of the semiconductor wafer 1 is obtained. (FIGS. 2A and 2B) are formed.

  When the light shielding pattern 32 is designed, in consideration of the resolution limit of the projection optical system 4, the pattern of the band-shaped light shielding film or the pattern of the slit-shaped opening constituting the light shielding pattern 32 is a photosensitive resin in the exposure process. It is necessary to design so that the film 20 is not completely transferred.

  FIG. 7A is a cross-sectional view schematically showing an example of a pattern 2 to be inspected that is formed when an exposure amount is insufficient and a development is insufficient in a lithography process. As shown in FIG. 6A, the photosensitive resin film 29 other than the pattern to be inspected 2 remains on the main surface of the semiconductor wafer 1 mainly due to insufficient development, and the first layer 21 of the pattern 2 to be inspected. The side surfaces 21 a and 21 b are almost disappeared by the photosensitive resin film 29. In the optical microscope image of the pattern 2 to be inspected, the edges of the side surfaces 22a, 22b, 23a, 23b, 24a, 24b, 25a, and 25b of the upper layers 22 to 25 than the first layer 21 clearly appear. The edges of the side surfaces 21a and 21b of 21 do not appear clearly. In such a case, in the element formation region 12 of the semiconductor wafer 1, it is determined that the photosensitive resin films 101a and 101b remain at the bottoms of the openings 102a and 102b as shown in FIG. it can. Even if the exposure amount is controlled to be approximately an appropriate amount, when insufficient development occurs, the number of layers in which the pattern to be inspected 2 disappears increases as the degree of insufficient development increases. For example, when only the edges of the side surfaces 24a, 24b, 25a, and 25b for two layers are confirmed in the optical microscope image, the development is performed more than when the edges of the side surfaces 22a to 25a and 22b to 25b for four layers are confirmed. It can be determined that the degree of shortage is large.

  On the other hand, FIG. 7B is a cross-sectional view schematically showing an example of a pattern to be inspected 2 formed when excessive exposure and excessive development occur in the lithography process. As shown in FIG. 7B, the number of layers (the number of steps) of the pattern 2 to be inspected is more than the number of layers of the pattern 2 to be inspected in FIG. Is one less. For this reason, the edges of the side surfaces 22a to 25a and 22b to 25b for four layers appear clearly in the optical microscope image of the pattern 2 to be inspected. In such a case, in the element forming region 12 of the semiconductor wafer 1, as shown in FIG. 1B, the sizes of the openings 102a and 102b are large, and the processing line width Wd is smaller than the processing line width Wt of the target pattern. It can be judged. When further overexposure occurs, the number of layers of the pattern 2 to be inspected appearing in the optical microscope image is further reduced. Therefore, by observing the edge of the pattern to be inspected 2 appearing in the optical microscope image, it is possible to easily and accurately determine how much the process conditions of the exposure process and the development process deviate from the appropriate conditions.

  As described above, by visually observing the optical microscope image of the pattern 2 to be inspected according to Embodiment 1, how much the exposure process and development process conditions in the lithography process deviate from the appropriate conditions. Judgment can be made. Based on this determination, it is possible to accurately estimate the dimensional accuracy of the resist pattern or insulating film pattern formed in the element formation region 12 in the lithography process, and whether the process conditions are within an allowable range or whether It can be inspected at low cost whether or not it conforms to. In particular, it is possible to accurately and inexpensively inspect the appearance of the resist pattern and insulating film pattern formed for the rough layer with respect to dimensional accuracy. For example, in a wafer level CSP (Wafer-Level Chip Scale Packaging) manufacturing process, it is possible to inspect at a low cost whether or not the dimensional accuracy of an insulating film pattern for forming a redistribution layer on a semiconductor wafer is low.

  Furthermore, since the pattern 2 to be inspected according to the present embodiment has the inclined structures 2sa and 2sb, compared to the resist pattern group developed in the in-plane direction of the substrate as disclosed in Patent Documents 1 and 2 above. The area of the region where the pattern to be inspected 2 is formed can be reduced, and the degree of freedom in layout design can be improved.

  The inspected pattern 2 of the first embodiment includes the five layers 21 to 25, but the number of steps is not limited to five, and it is sufficient that there are at least two.

Embodiment 2. FIG.
Next, a second embodiment according to the present invention will be described. 8A and 8B are diagrams schematically showing the pattern 5 to be inspected and the reference pattern 6 formed by the method of the second embodiment. FIG. 8A is a plan view (top view) of the pattern 5 to be inspected and the reference pattern 6 as viewed from a direction perpendicular to the main surface of the semiconductor wafer 1, and FIG. FIG. 8A is a cross-sectional view taken along line VIIIb-VIIIb of the reference pattern 6 in FIG. 8A, and FIG. 8C is a cross-sectional view taken along line VIIIc-VIIIc in the pattern 5 to be inspected in FIG. Similar to the pattern 2 to be inspected in the first embodiment, the pattern 5 to be inspected and the reference pattern 6 are formed on the main surface of the semiconductor wafer or substrate by a lithography process using a mask (reticle) as an original plate. Further, the inspected pattern 5 and the reference pattern 6 according to the present embodiment can be formed in the inspected area 13 in the shot area 10 shown in FIG. 3B or 3C.

  As shown in FIGS. 8A and 8C, the pattern 5 to be inspected according to the present embodiment includes a rectangular bottom surface 5b having a long side having a length L2 and a short side having a width W2. And a side surface 5w that rises substantially vertically from one end in the long side direction of the bottom surface 5b. The length L2 of the bottom surface 5b can be set to about 20 μm to 30 μm, for example, and the height Hw of the side surface 5w can be set to about 10 μm, for example. Further, the pattern 5 to be inspected has an inclined structure 5s whose thickness gradually changes from one end side to the other end side in the X-axis direction (a predetermined direction along the main surface of the semiconductor wafer 1). Further, the surface of the inclined structure 5s forms an inclined surface whose height gradually changes from one end side to the other end side. As shown in FIG. 8A, the one end 5g and the side surface 5w of the inclined structure 5s constitute a boundary line (edge) that can be identified by an optical microscope image.

  On the other hand, as shown in FIGS. 8A and 8B, the reference pattern 6 has a rectangular bottom surface 6b having a long side having a length L2 and a short side having a width W2. As shown in FIG. 8A, the reference pattern 6 has both side surfaces 6wa and 6wb that rise substantially perpendicularly from the bottom surface 6b, and these both side surfaces 6wa and 6wb are boundaries that can be identified by an optical microscope image. Configure a line (edge). Further, as shown in FIG. 8B, the cross section of the reference pattern 6 has a rectangular shape having a length L2 and a height Hw. The shape of the bottom surface 6b of the reference pattern 6 is the same as the shape of the bottom surface 5b of the inspection pattern 5, and the height Hw of the reference pattern 6 is the same as the height Hw of the side surface 5w of the inspection pattern 5. One side surface 6wa of the reference pattern 6 and the side surface 5w of the pattern to be inspected 5 are aligned on a straight line, and the other side surface 6wb of the reference pattern 6 and the tip 5g of the pattern to be inspected 5 are also aligned on a straight line. This is for facilitating comparative observation of the pattern 5 to be inspected and the reference pattern 6.

  FIGS. 9A to 9C are diagrams schematically showing an example of an original pattern of a mask 7 used for forming the inspection pattern 5 and the reference pattern 6 in the lithography process of the present embodiment. . FIG. 9A is a plan view showing a part of the surface of the mask 7. 9B is a cross-sectional view taken along the line IXb-IXb of the mask 7 in FIG. 9A, and FIG. 9C is taken along the line IXc-IXc of the mask 7 in FIG. 9A. FIG. The mask 7 is formed with a circuit original pattern in addition to the inspection original pattern, but the circuit original pattern is not shown for convenience of explanation. The mask 7 includes a light transmitting substrate 71 such as a glass substrate or a quartz substrate, and light shielding film patterns (light shielding patterns) 72 and 73 formed on one main surface of the light transmitting substrate 71. One light shielding pattern 72 is a pattern for forming the pattern 5 to be inspected, and the other light shielding pattern 73 is a pattern for forming the reference pattern 6. Examples of the constituent material of the light shielding patterns 72 and 73 include chromium, chromium oxide, and tantalum, but are not limited thereto.

  One light shielding pattern 72 is formed in a rectangular region on the translucent substrate 71 as shown in FIG. The light shielding pattern 72 has an opening density (rough density) corresponding to the height of the inclined structure 5 s of the pattern 5 to be inspected, and this opening density is directed from one end to the other end in the long side direction of the region. It is designed to become gradually lower. The light shielding pattern 72 has a light transmittance distribution (two-dimensional distribution) corresponding to the thickness distribution of the inclined structure 5s of the pattern 5 to be inspected. As shown in FIG. 9A, linear (strip-shaped) light shielding films are arranged along the long side direction of the mask 7 to constitute a light shielding pattern 72. A slit-shaped opening, that is, a light transmission hole is formed between the light shielding film and the light shielding film. In the present embodiment, the shape of the opening formed in the mask 7 is a slit shape. However, the shape is not limited to this. For example, the light shielding pattern may be designed so that a dot-shaped opening is formed.

  The other light shielding pattern 73 has a constant thickness over the entire rectangular region as shown in FIG. 9B in order to form the reference pattern 6.

  The pattern 5 to be inspected and the reference pattern 6 are formed by the same method as the method for forming the pattern 2 to be inspected in the first embodiment. That is, after a positive photosensitive resin film is applied on the main surface of the semiconductor wafer 1, the semiconductor wafer 1 is placed in the projection exposure apparatus. In the projection exposure apparatus, exposure light emitted from an exposure light source (not shown) passes through the light shielding pattern 72 of the mask 7 and the projection optical system, and is irradiated onto the surface of the photosensitive resin film by the projection optical system. FIG. 10 is a cross-sectional view schematically showing an exposed portion 50e and an unexposed portion 50n of the photosensitive resin film 50. As shown in FIG. Since the photosensitive resin film 50 is exposed to a depth corresponding to the intensity of the exposure light, the depth of the soluble region of the photosensitive resin film 50 with respect to the developer changes according to the exposure light intensity. As shown in FIG. 10, the exposure process forms an exposed portion 50e soluble in the developer and an unexposed portion 50n having an inclined structure in the photosensitive resin film 50. In the subsequent development process, the exposed portion 50e is dissolved in the developer, and the unexposed portion 50n is not dissolved. As a result, the inspection pattern 5 and the reference pattern 6 having the inclined structure 5 s are formed in the inspection region 13 of the semiconductor wafer 1.

  When designing the light-shielding pattern 72, in consideration of the resolution limit of the projection optical system, the strip-shaped light-shielding film pattern or the slit-shaped opening pattern constituting the light-shielding pattern 72 is a photosensitive resin film in the exposure process. It is necessary to design so that it is not completely transferred to 50.

  11A and 11B are cross-sectional views schematically showing an example of the pattern 5 to be inspected and the reference pattern 6 formed when at least one of insufficient exposure and insufficient development occurs in the lithography process. is there. As shown in FIGS. 11A and 11B, the photosensitive resin film 59 other than the pattern to be inspected 5 and the reference pattern 6 remains on the main surface of the semiconductor wafer 1. For this reason, the entire length L2a of the pattern to be inspected 5 is shorter than the length L2 (FIG. 8A) when the lithography process is performed under appropriate process conditions. Therefore, by observing the inspection pattern 5 appearing in the optical microscope image, it can be easily determined whether or not the process conditions of the exposure process and the development process are appropriate.

  In addition, it is possible to make an accurate determination by observing both the inspected pattern 5 and the reference pattern 6 appearing in the optical microscope image. That is, it is possible to easily and accurately determine how much the process conditions of the exposure process and the development process deviate from appropriate conditions according to the difference Δa between the tip of the pattern 5 to be inspected and the end face 6wb of the reference pattern 6. it can.

  On the other hand, FIGS. 12A and 12B are cross-sectional views schematically showing an example of the pattern to be inspected 5 and the reference pattern 6 that are formed mainly when an excessive amount of exposure occurs in the lithography process. As shown in FIGS. 12A and 12B, the entire length L2b of the pattern 5 to be inspected is the length L2 when the lithography process is performed under appropriate process conditions (FIG. 8A). Short compared to Therefore, by observing the inspection pattern 5 appearing in the optical microscope image, it can be easily determined whether or not the process conditions of the exposure process and the development process are appropriate. Further, both the inspected pattern 5 and the reference pattern 6 appearing in the optical microscope image are observed, and the process conditions of the exposure process and the developing process are determined according to the difference Δb between the front end of the inspected pattern 5 and the end face 6wb of the reference pattern 6. It is possible to easily and accurately determine how much is deviated from the appropriate condition.

  As described above, by visually observing the optical microscope image of the pattern 5 to be inspected according to Embodiment 2, it is easily determined whether or not the process conditions of the exposure process and the development process in the lithography process are appropriate. can do. Further, by comparing and inspecting the pattern 5 to be inspected and the reference pattern 6, it is possible to accurately determine how much the process condition is deviated from the appropriate condition. Based on this determination, it is possible to accurately estimate the dimensional accuracy of the resist pattern or insulating film pattern formed in the element formation region 12 in the lithography process, and whether the process conditions are within an allowable range or whether It is also possible to easily determine whether or not it conforms to.

  Further, since the pattern to be inspected 5 according to the present embodiment has the inclined structure 5s, the pattern to be inspected is compared with the resist pattern group developed in the in-plane direction of the semiconductor wafer as disclosed in Patent Documents 1 and 2 above. The area of the region where the inspection pattern 5 and the reference pattern 6 are formed can be reduced, and the degree of freedom in layout design can be improved. In the second embodiment, the inspected pattern 5 and the reference pattern 6 are separated, but the inspected pattern 5 and the reference pattern 6 may be continuous with each other and integrated.

Embodiment 3 FIG.
Next, a third embodiment according to the present invention will be described. FIGS. 13A and 13B are diagrams schematically showing an inspection pattern 8 formed by the method of the third embodiment. 13A is a plan view (top view) of the pattern 8 to be inspected as viewed from a direction perpendicular to the main surface of the semiconductor wafer 1, and FIG. 13B is a plan view of FIG. It is sectional drawing along the XIIIb-XIIIb line | wire of the to-be-inspected pattern 8. FIG. This inspected pattern 8 is formed on the main surface of the semiconductor wafer or substrate by a lithography process using a mask (reticle) as an original, as in the inspected pattern 2 of the first embodiment. Further, the inspection pattern 8 according to the present embodiment can be formed in the inspection region 13 in the shot region 10 shown in FIG. 3B or FIG.

  As shown in FIGS. 13A and 13B, the inspected pattern 8 according to the present embodiment includes a rectangular bottom surface 8b having a long side having a length L3 and a short side having a width W3. And a side surface 8w that rises substantially vertically from one end in the long side direction of the bottom surface 8b. The length L3 of the bottom surface 8b can be set to about 20 μm to 30 μm, for example, and the height Hv of the side surface 8w can be set to about 10 μm, for example. The pattern 8 to be inspected has an inclined structure (inclined surface) 8s whose thickness changes from one end side to the other end side in the X-axis direction (a predetermined direction along the main surface of the semiconductor wafer 1). Further, the surface of the inclined structure 8s includes a plurality of inclined surfaces 8aa, 8ab, 8ac whose height gradually changes from one end side to the other end side, and adjacent inclined surfaces among these inclined surfaces 8aa, 8ab, 8ac. A step is formed between them. As shown in FIG. 13A, the tip 8g and the side surface 8w of the inclined structure 8s form a boundary line (edge) that can be identified by an optical microscope image.

The inclined structure 8s of the pattern to be inspected 8 has a staircase shape. The inclined structure 8s has two side surfaces 8d and 8e constituting a step, has a first inclined surface 8aa between the tip 8g and the side surface 8d, and a second inclined surface between the side surfaces 8d and 8e. 8ab, and a third inclined surface 8ac is provided between the side surface 8e and the side surface 8w. When the process conditions of the lithography process are appropriate conditions, the horizontal directions (X-axis direction) lengths ΔL ₁ , ΔL ₂ , and ΔL ₃ of these inclined surfaces 8aa, 8ab, and 8ac are the same. As shown in FIG. 13A, the side surfaces 8d and 8e of the inclined structure 8s of the pattern to be inspected 8 constitute a boundary line (edge) that can be identified by an optical microscope image.

  FIGS. 14A and 14B are diagrams schematically showing an example of an original pattern for inspection of a mask 9 used for forming an inspection pattern 8 in the lithography process of the present embodiment. FIG. 14A is a plan view showing a part of the surface of the mask 9, and FIG. 14B is a cross-sectional view of the mask 9 in FIG. 14A taken along line XIVb-XIVb. The mask 9 is formed with a circuit original pattern in addition to the inspection original pattern, but the circuit original pattern is not shown for convenience of explanation. The mask 9 includes a light-transmitting substrate 91 such as a glass substrate or a quartz substrate, and a light-shielding film pattern (light-shielding pattern) 92 formed on one main surface of the light-transmitting substrate 91. Examples of the constituent material of the light shielding pattern 92 include, but are not limited to, chromium, chromium oxide, and tantalum.

  The light shielding pattern 92 is formed in a rectangular region on the translucent substrate 91 as shown in FIG. The light shielding pattern 92 has an opening density (rough density) corresponding to the height of the inclined structure 8s of the pattern to be inspected 8 to be formed, and this opening density is directed from one end to the other end in the long side direction of the region. It is designed to become gradually lower. The light shielding pattern 92 has a light transmittance distribution (two-dimensional distribution) corresponding to the thickness distribution of the inclined structure 8 s of the pattern 8 to be inspected. As shown in FIG. 14A, the light shielding pattern 92 has a transmission region 921 having a light transmittance distribution corresponding to the height distribution of the inclined surface 8aa of the pattern 8 to be inspected, and a height distribution of the inclined surface 8ab. A transmission region 922 having a corresponding light transmittance distribution and a transmission region 923 having a light transmittance distribution corresponding to the height distribution of the inclined surface 8ac are included. In each of these transmission regions 921 to 923, a linear (band-like) light shielding film is arranged in the long side direction of the mask 9, and a slit-shaped opening, that is, a light transmission hole is formed between the light shielding film and the light shielding film. Is formed. In the present embodiment, the shape of the opening formed in the mask 9 is a slit shape. However, the shape is not limited to this. For example, the light shielding pattern may be designed so that a dot-shaped opening is formed. Good.

  The pattern 8 to be inspected is formed by the same method as the method for forming the pattern 2 to be inspected in the first embodiment. That is, after a positive photosensitive resin film is applied to the inspection region 13 on the main surface of the semiconductor wafer 1, the semiconductor wafer 1 is placed in the projection exposure apparatus. In the projection exposure apparatus, exposure light emitted from an exposure light source (not shown) passes through the light shielding pattern 92 of the mask 9 and the projection optical system, and is irradiated onto the surface of the photosensitive resin film by the projection optical system. FIG. 15 is a cross-sectional view schematically showing an exposed portion 80e and an unexposed portion 80n of the photosensitive resin film 80. As shown in FIG. Since the photosensitive resin film 80 is exposed to a depth corresponding to the intensity of the exposure light, the depth of the soluble region of the photosensitive resin film 80 with respect to the developer changes according to the exposure light intensity. As shown in FIG. 15, the exposure process forms an exposed portion 80e soluble in the developer and an unexposed portion 80n having an inclined structure in the photosensitive resin film 80. In the subsequent development process, the exposed portion 80e is dissolved in the developer, and the unexposed portion 80n is not dissolved. As a result, the inspection pattern 8 having the inclined structure 8 s is formed in the inspection region 13 of the semiconductor wafer 1.

  When designing the light-shielding pattern 92, in consideration of the resolution limit of the projection optical system, the strip-shaped light-shielding film pattern or the slit-shaped opening pattern constituting the light-shielding pattern 92 is a photosensitive resin film in the exposure process. It is necessary to design so that it is not completely transferred to 80.

FIGS. 16A and 16B are cross-sectional views schematically showing an example of a pattern 8 to be inspected that is formed when an exposure amount is insufficient and a development is insufficient in a lithography process. As shown in FIG. 16A, the photosensitive resin film 88 other than the pattern to be inspected 8 remains on the main surface of the semiconductor wafer 1, and the inclined surface 8aa of the pattern to be inspected 8aa mainly due to insufficient development. The horizontal length ΔL ₁ is shorter than the horizontal length ΔL ₂ of the inclined surface 8ab. In the optical microscope image of the test pattern 8 at this time, the tip 8g and side 8d, 8e, appear each edge of 8w, distance [Delta] L ₁ between the front end 8g and side 8d is a side 8d, the distance between 8e [Delta] L Shorter than ₂ . When further development shortage occurs, as shown in FIG. 16B, the inclined surface 8aa disappears due to the photosensitive resin film 89 remaining, and most of the side surface 8d disappears. In the optical microscope image of the pattern 8 to be inspected at this time, the edge of the tip 8g does not appear, but the edges of the side surfaces 8d, 8e, and 8w appear. Further, the edge of the side surface 8d becomes unclear compared to the edges of the side surfaces 8e and 8w.

On the other hand, FIGS. 17A and 17B are cross-sectional views schematically showing an example of a pattern 8 to be inspected that is formed when excessive exposure and excessive development occur in a lithography process. As shown in FIG. 17 (A), the horizontal direction length [Delta] L ₁ of the inclined surface 8aa of the inspected pattern 8 is shorter than the horizontal length [Delta] L ₂ of the inclined surface 8ab. In the optical microscope image of the test pattern 8 at this time, the tip 8g and side 8d, 8e, appear each edge of 8w, distance [Delta] L ₁ between the front end 8g and side 8d is a side 8d, the distance between 8e [Delta] L Shorter than ₂ . When further overexposure and overexposure occur, the tip 8g and the inclined surface 8aa disappear as shown in FIG. In the optical microscope image of the pattern 8 to be inspected at this time, the edge of the tip 8g does not appear, but the edges of the side surfaces 8d, 8e, and 8w appear.

  As described above, by observing the optical microscope image of the pattern 8 to be inspected according to Embodiment 3 with the naked eye, how much the process conditions of the exposure process and the development process in the lithography process deviate from the appropriate conditions. Judgment can be made easily and accurately. Based on this determination, it is possible to accurately estimate the dimensional accuracy of the resist pattern or insulating film pattern formed in the element formation region 12 in the lithography process, and whether the process conditions are within an allowable range or whether It is also possible to easily determine whether or not it conforms to. Further, since the pattern 8 to be inspected has an inclined structure 8 s that is inclined with respect to the main surface of the semiconductor wafer 1, a resist pattern developed in the in-plane direction of the semiconductor wafer as disclosed in Patent Documents 1 and 2 above. Compared with the group, the area of the region where the pattern to be inspected 8 is formed can be reduced, and the degree of freedom in layout design can be improved.

  Furthermore, since the inclined structure 8s of the pattern 8 to be inspected according to the present embodiment includes the inclined surfaces 8aa, 8ab, and 8ac and the side surfaces 8d and 8e that form steps, the object to be inspected according to the first and second embodiments. Compared with the patterns 2 and 5, the deviation from the appropriate condition can be determined more accurately.

Modifications of the first to third embodiments.
Although various embodiments according to the present invention have been described above with reference to the drawings, these are examples of the present invention, and various forms other than the above can be adopted. In the first to third embodiments, the inspected patterns 2, 5, and 8 can be formed in the inspected area 13 in the grid line 11, but instead, the circuit forming area 12 is used for circuit formation. Inspected patterns 2, 5, and 8 may be formed together with the resist pattern or the insulating film pattern.

  DESCRIPTION OF SYMBOLS 1 Semiconductor wafer, 2, 5, 8 Pattern to be inspected, 4 Projection optical system, 6 Reference pattern, 2sa, 2sb, 5s, 8s Inclined structure, 3, 7, 9 Mask (reticle), 10 shot area, 11 Grid line ( Dicing area), 12 element formation area, 13 area to be inspected, 31, 71, 91 translucent substrate, 32, 72, 73, 92 light-shielding pattern (original pattern for inspection).

Claims (12)

Forming a photosensitive resin film in a region to be inspected on the main surface of the substrate;
An exposure step of irradiating the surface of the photosensitive resin film with exposure light transmitted through an original pattern formed on a mask using a projection optical system;
A development step of performing development processing on the photosensitive resin film to form a pattern to be inspected corresponding to the original pattern;
With
The pattern to be inspected has an inclined structure in which the thickness changes from one end side in a predetermined direction along the main surface of the pattern to be inspected toward the other end side,
The original pattern has a light transmittance distribution corresponding to a thickness distribution of the pattern to be inspected.
The pattern formation method characterized by the above-mentioned.   2. The pattern forming method according to claim 1, wherein a surface of the inclined structure has a step shape.   The pattern forming method according to claim 2, wherein the number of steps of the inclined structure is two or more.   2. The pattern forming method according to claim 1, wherein the surface of the inclined structure has an inclined surface whose height gradually changes from the one end side toward the other end side. The pattern forming method according to claim 1,
The surface of the inclined structure includes a plurality of inclined surfaces whose height gradually changes from the one end side toward the other end side,
A step is formed between adjacent inclined surfaces of the plurality of inclined surfaces.
The pattern formation method characterized by the above-mentioned.   6. The pattern forming method according to claim 1, wherein the pattern to be inspected has a side surface that rises substantially perpendicularly from the main surface. A pattern forming method according to any one of claims 1 to 6,
The substrate is a semiconductor wafer;
The pattern formation method, wherein the region to be inspected is provided in a region other than an element formation region in which a semiconductor element is to be formed.   8. The pattern forming method according to claim 7, wherein the region to be inspected is formed on a dicing region of the semiconductor wafer. Simultaneously forming a photosensitive resin film in each of an element formation region and a region to be inspected on which a semiconductor element is formed on a main surface of a semiconductor wafer;
The projection optical system is used to irradiate the surface of the photosensitive resin film formed in the inspection area with exposure light transmitted through the inspection original pattern formed on the mask, and at the same time for the circuit formed on the mask. An exposure step of irradiating the surface of the photosensitive resin film formed in the element formation region with exposure light transmitted through the original pattern;
A development step of performing development processing on the photosensitive resin film to form a pattern to be inspected and a circuit forming pattern corresponding to the original pattern for inspection and the original pattern for circuit, respectively,
With
The pattern to be inspected has an inclined structure in which the thickness changes from one end side in a predetermined direction along the main surface of the pattern to be inspected toward the other end side,
The original pattern has a light transmittance distribution corresponding to a thickness distribution of the pattern to be inspected.
A method for manufacturing a semiconductor device.   10. The method of manufacturing a semiconductor device according to claim 9, wherein the surface of the inclined structure has a step shape.   10. The method of manufacturing a semiconductor device according to claim 9, wherein the surface of the inclined structure has an inclined surface whose height gradually changes from the one end side toward the other end side. Method. A method of manufacturing a semiconductor device according to claim 9,
The surface of the inclined structure includes a plurality of inclined surfaces whose height gradually changes from the one end side toward the other end side,
A step is formed between adjacent inclined surfaces of the plurality of inclined surfaces.
A method for manufacturing a semiconductor device.

Images