JP2011223819A - Power factor improving circuit - Google Patents

Power factor improving circuit Download PDF

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JP2011223819A
JP2011223819A JP2010092791A JP2010092791A JP2011223819A JP 2011223819 A JP2011223819 A JP 2011223819A JP 2010092791 A JP2010092791 A JP 2010092791A JP 2010092791 A JP2010092791 A JP 2010092791A JP 2011223819 A JP2011223819 A JP 2011223819A
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JP5442525B2 (en
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Yoshimichi Hirokawa
芳通 廣川
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Cosel Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a power factor improving circuit which is capable of easily and automatically adjusting a target value of a boost voltage with high accuracy in accordance with an input voltage level.SOLUTION: The power factor improving circuit includes: a switching control circuit 28 for a boost chopper circuit 16; an input voltage detection circuit 44 for outputting an input voltage signal Vi; a reference pulse generator 46 for outputting a periodic reference pulse V46 of which the duty ratio is determined in accordance with the input voltage signal Vi; an averaging circuit 48 for outputting an averaged voltage V48 of the reference pulse V46; and a correction signal injection resistance 50 for injecting a target value correction signal Ib corresponding to the averaged voltage V48 into a boost voltage signal Vo1 or a reference voltage V34. A target value Va of a boost voltage Vo is corrected by the target value correction signal Ib so that the boost voltage Vo is higher than a peak value Vsp of a rectified voltage Vs. The target value Va is corrected so that the higher the input voltage Vi becomes, the higher the boost voltage Vo becomes.

Description

この発明は、昇圧チョッパ回路を備え、商用電源から供給される入力電流の波形を整形すると共に、所定の直流電圧を出力する力率改善回路に関する。   The present invention relates to a power factor correction circuit that includes a step-up chopper circuit, shapes a waveform of an input current supplied from a commercial power supply, and outputs a predetermined DC voltage.

従来、例えば、全世界対応の商用電圧(AC100V系、240V系等)に対応可能な広い入力電圧範囲を有する力率改善回路は、入力電圧が高い地域で使用されるときでも、昇圧チョッパ回路の主スイッチング素子がオン・オフして力率改善動作が行われるように、昇圧電圧の目標値を最高入力電圧の波高値よりも高い値に固定するのが一般的であった。そのため、入力電圧が低い地域で使用されると、入力電圧に比べて昇圧電圧が非常に高くなるので、後段に接続される負荷の負担が増加する。例えば、後段の負荷がDC−DCコンバータの場合、内部の絶縁性を向上させるために外形が大型化したり、主スイッチング素子として導通抵抗が大きい高耐圧部品を選択せざるを得なくなって効率が低下したりするという問題が生じていた。   Conventionally, for example, a power factor correction circuit having a wide input voltage range that can handle commercial voltages (AC100V system, 240V system, etc.) that are compatible with all over the world is a boost chopper circuit even when used in a region where the input voltage is high. In general, the target value of the boosted voltage is fixed to a value higher than the peak value of the maximum input voltage so that the main switching element is turned on / off to perform the power factor correction operation. For this reason, when used in a region where the input voltage is low, the boosted voltage becomes very high compared to the input voltage, and the load on the load connected to the subsequent stage increases. For example, when the subsequent load is a DC-DC converter, the outer shape becomes large in order to improve internal insulation, or high voltage components with high conduction resistance must be selected as the main switching element, resulting in a reduction in efficiency. The problem of doing was occurring.

近年、この問題を解決するため、入力電圧が低いときは昇圧電圧が低めになり、入力電圧が高いときは昇圧電圧が高めになるように自動調整する回路技術が複数提案されている。例えば、特許文献1に開示されているように、昇圧チョッパ回路が出力する昇圧電圧と基準電圧との誤差が小さくなるように主スイッチング素子のオン・オフ駆動することによって昇圧電圧が目標値に一致するように制御する第2の制御手段と、入力電圧が高くなってその波高値が昇圧電圧の目標値に近づくと、基準電圧を可変し、昇圧電圧の目標値が入力電圧の波高値よりも高い値になるように自動補正する基準電圧可変回路とを備えた電源装置がある。そして、基準電圧可変回路の実施例として、整流回路が出力する脈流電圧をダイオードとコンデンサでピークホールドして波高値を検出し、そのピークホールド電圧を抵抗分圧し、分圧電圧を定電圧源と比較して高い方の電圧を基準電圧として出力する回路が記載されている。この電源装置によれば、入力電圧の全ての範囲で力率改善動作を行うことができ、また、入力電圧が低い地域で使用される場合には、昇圧電圧が相応に低い電圧に設定されるので、後段に接続される負荷の負担が軽減される。   In recent years, in order to solve this problem, there have been proposed a plurality of circuit technologies for automatically adjusting the boosted voltage to be lower when the input voltage is low and to increase the boosted voltage when the input voltage is high. For example, as disclosed in Patent Document 1, the boost voltage matches the target value by driving the main switching element on and off so that the error between the boost voltage output from the boost chopper circuit and the reference voltage is reduced. And the second control means for controlling so that when the input voltage becomes higher and its peak value approaches the target value of the boost voltage, the reference voltage is varied, and the target value of the boost voltage is higher than the peak value of the input voltage. There is a power supply device including a reference voltage variable circuit that automatically corrects a high value. As an embodiment of the reference voltage variable circuit, the pulsating voltage output from the rectifier circuit is peak-held by a diode and a capacitor to detect the peak value, the peak hold voltage is resistance-divided, and the divided voltage is supplied to a constant voltage source. A circuit that outputs a higher voltage as a reference voltage is described. According to this power supply device, the power factor correction operation can be performed in the entire range of the input voltage, and when used in a region where the input voltage is low, the boost voltage is set to a correspondingly low voltage. Therefore, the load of the load connected to the subsequent stage is reduced.

特開平3−78469号公報JP-A-3-78469

しかし、特許文献1の電源装置は、入力電圧範囲の仕様を変更する場合、基準電圧可変回路の分圧抵抗その他多くの部品の定数を変更する必要があるので、その電源装置の開発においては設計変更や再評価の手間がかかり、生産においても量産部材管理等の面で煩雑さがあった。また、同一の電源装置であっても、量産時、基準電圧可変回路、昇圧電圧の検出回路、入力電圧の検出回路等を構成する各部品の特性のばらつきにより、入力電圧に対する昇圧電圧目標値の設定が大きくばらつき、組み立てられた製品の性能が安定しないという問題があった。   However, the power supply device of Patent Document 1 needs to change the constants of the voltage dividing resistor and many other components of the reference voltage variable circuit when changing the specification of the input voltage range. Changes and re-evaluations are required, and production is complicated in terms of mass production member management. Even in the case of the same power supply device, the target voltage of the boost voltage relative to the input voltage may vary depending on the characteristics of each component constituting the reference voltage variable circuit, the boost voltage detection circuit, the input voltage detection circuit, etc. There was a problem that the setting varied greatly and the performance of the assembled product was not stable.

この発明は、上記背景技術に鑑みて成されたもので、入力電圧の高低に応じ、昇圧電圧の目標値を容易かつ高精度に自動調整することができる力率改善回路を提供することを目的とする。   The present invention has been made in view of the above-described background art, and an object thereof is to provide a power factor correction circuit capable of automatically and accurately adjusting a target value of a boosted voltage according to the level of an input voltage. And

この発明は、交流の入力電圧を整流して脈流の整流電圧を出力する整流回路と、チョークコイル、主スイッチング素子、整流素子及び平滑コンデンサを有し、前記整流電圧を昇圧した昇圧電圧を前記平滑コンデンサ両端に発生させ、負荷に電力供給する昇圧チョッパ回路と、前記昇圧電圧に相当する昇圧電圧信号を受け、基準電圧と前記昇圧電圧信号との差分を増幅することによって前記昇圧電圧の目標値を決定するエラーアンプと、前記エラーアンプが出力する誤差増幅信号を受け、前記昇圧電圧が前記目標値になるように前記主スイッチング素子をオン・オフ制御するスイッチング制御部とを備えた力率改善回路であって、
前記入力電圧を検出し入力電圧信号を出力する入力電圧検出回路と、一定周期の矩形波であって前記入力電圧信号に応じてハイ・レベルとロー・レベルの時比率が定められる基準パルスを出力する基準パルス発生器と、前記基準パルスの平均化電圧を出力する平均化回路と、前記平均化電圧に応じた目標値補正信号を前記昇圧電圧信号又は前記基準電圧に注入する補正信号注入回路とで構成された目標値補正部を備え、
前記目標値補正部が出力する前記目標値補正信号によって、前記入力電圧の高低にかかわらず、前記昇圧電圧が前記整流電圧の波高値よりも高くなるように前記昇圧電圧の目標値が補正されると共に、前記入力電圧が低いときには相対的に前記昇圧電圧が低くなるように、前記入力電圧が高いときには相対的に前記昇圧電圧が高くなるように、前記昇圧電圧の目標値が補正される力率改善回路である。
The present invention includes a rectifying circuit that rectifies an AC input voltage and outputs a pulsating rectified voltage, a choke coil, a main switching element, a rectifying element, and a smoothing capacitor, and the boosted voltage obtained by boosting the rectified voltage A boost chopper circuit that is generated at both ends of the smoothing capacitor and supplies power to the load; a boost voltage signal corresponding to the boost voltage; and a target value of the boost voltage by amplifying a difference between the reference voltage and the boost voltage signal Power factor improvement provided with an error amplifier that determines the error, and a switching control unit that receives an error amplification signal output from the error amplifier and controls on / off of the main switching element so that the boosted voltage becomes the target value A circuit,
An input voltage detection circuit that detects the input voltage and outputs an input voltage signal, and outputs a reference pulse that is a rectangular wave with a fixed period and has a high-level and low-level time ratio determined according to the input voltage signal A reference pulse generator, an averaging circuit that outputs an averaged voltage of the reference pulse, a correction signal injection circuit that injects a target value correction signal corresponding to the averaged voltage into the boosted voltage signal or the reference voltage, The target value correction unit configured with
The target value correction signal output from the target value correction unit corrects the target value of the boosted voltage so that the boosted voltage becomes higher than the peak value of the rectified voltage regardless of the level of the input voltage. In addition, the target value of the boosted voltage is corrected so that the boosted voltage is relatively low when the input voltage is low and the boosted voltage is relatively high when the input voltage is high. It is an improvement circuit.

また、前記目標値補正部は、前記入力電圧が所定電圧以下の範囲で、前記昇圧電圧の目標値が一定になる前記目標値補正信号を出力する。   Further, the target value correction unit outputs the target value correction signal that makes the target value of the boost voltage constant within a range where the input voltage is equal to or lower than a predetermined voltage.

また、前記基準パルス発生器は、マイクロコンピュータ内に設けられ、前記基準パルスの時比率と前記入力電圧信号との関係を、プログラムの書き換えによって変更できるものであってもよい。   The reference pulse generator may be provided in a microcomputer, and the relationship between the reference pulse duty ratio and the input voltage signal may be changed by rewriting a program.

また、前記昇圧電圧が過電圧基準値を超えると前記主スイッチング素子のオン・オフ動作を停止させる過電圧保護回路を備え、前記エラーアンプは、前記目標値補正信号の有無にかかわらず、前記昇圧電圧が前記過電圧基準値以下になるように前記目標値を決定する。   In addition, an overvoltage protection circuit that stops the on / off operation of the main switching element when the boosted voltage exceeds an overvoltage reference value, the error amplifier includes the boosted voltage regardless of the presence or absence of the target value correction signal. The target value is determined to be equal to or less than the overvoltage reference value.

また、入力電圧投入時に前記整流回路の出力から前記平滑コンデンサに向けて電流を流すダイオード及び突入電流制限抵抗の直列回路を備えている。   In addition, a series circuit of a diode and an inrush current limiting resistor for supplying a current from the output of the rectifier circuit to the smoothing capacitor when an input voltage is applied is provided.

この発明の力率改善回路は、上記のような入力電圧検出回路、基準パルス発生回路、平均化回路及び補正信号注入回路で構成された目標値補正部を備えているので、入力電圧範囲の仕様が異なるものを設計する場合でも、入力電圧検出回路の回路定数を変更するだけで、入力電圧と昇圧電圧目標値との関係を調整することができるので、設計や評価が容易で、変更する部品数も最小限に抑えることができる。さらに、基準パルス発生回路をマイクロコンピュータ内に設け、基準パルスの時比率と入力電圧信号との関係をプログラムの書き換えで変更できるように構成すれば、入力電圧検出回路の定数変更をも行う必要がない。   Since the power factor correction circuit according to the present invention includes a target value correction unit including the input voltage detection circuit, the reference pulse generation circuit, the averaging circuit, and the correction signal injection circuit as described above, the specification of the input voltage range is provided. Even when designing products with different values, the relationship between the input voltage and the boost voltage target value can be adjusted simply by changing the circuit constants of the input voltage detection circuit. The number can be kept to a minimum. Furthermore, if the reference pulse generation circuit is provided in the microcomputer so that the relationship between the reference pulse duty ratio and the input voltage signal can be changed by rewriting the program, it is necessary to change the constant of the input voltage detection circuit. Absent.

また、上記のようにマイクロコンピュータ内に基準パルス発生回路を構成すれば、例えば、この力率改善回路が搭載された製品を量産するとき、出荷検査工程で通電試験を行い、基準パルスの時比率と入力電圧信号との関係を定義するプログラム部分を、個々の製品の特性に合うように書き換え、入力電圧と昇圧電圧の関係が規格範囲内に収まるように微調整することにより、個々の製品のばらつきを容易に補正することができ、製品精度を向上させることができるとともに、生産性も格段に向上する。また、基準パルス発生回路自体の点数も大幅に削減することができる。   In addition, if the reference pulse generation circuit is configured in the microcomputer as described above, for example, when mass-producing a product equipped with this power factor correction circuit, an energization test is performed in the shipping inspection process, and the time ratio of the reference pulse is determined. The program part that defines the relationship between the input voltage and the input voltage signal is rewritten to match the characteristics of each product, and finely adjusted so that the relationship between the input voltage and the boost voltage is within the standard range. Variations can be easily corrected, product accuracy can be improved, and productivity is greatly improved. Further, the number of points of the reference pulse generation circuit itself can be greatly reduced.

この発明の第一の実施形態の力率改善回路を示すブロック図である。It is a block diagram which shows the power factor improvement circuit of 1st embodiment of this invention. 第一の実施形態の力率改善回路の具体的な構成を示す回路図である。It is a circuit diagram which shows the specific structure of the power factor improvement circuit of 1st embodiment. 第一の実施形態の力率改善回路の動作を説明するグラフである。It is a graph explaining operation | movement of the power factor improvement circuit of 1st embodiment. この発明の第二の実施形態の力率改善回路の具体的な構成を示す回路図である。It is a circuit diagram which shows the specific structure of the power factor improvement circuit of 2nd embodiment of this invention. 第二の実施形態の力率改善回路の動作を説明するグラフである。It is a graph explaining operation | movement of the power factor improvement circuit of 2nd embodiment.

以下、この発明の力率改善回路の第一の実施形態について、図1〜図3に基づいて説明する。この実施形態の力率改善回路10は、図1のブロック図に示すように、入力端14aに商用電源12が接続され、交流の入力電圧Viを全波整流した整流電圧Vsを出力する整流回路14を備えている。整流回路14の出力段には、整流電圧Vsを断続して整流平滑することによって昇圧電圧Voを出力する昇圧チョッパ回路16が接続されている。そして、昇圧チョッパ回路16の出力端16aに、一般の電子機器やDC−DCコンバータ等である負荷18が接続され、昇圧電圧Voを供給している。   Hereinafter, a first embodiment of a power factor correction circuit according to the present invention will be described with reference to FIGS. As shown in the block diagram of FIG. 1, the power factor correction circuit 10 of this embodiment is connected to a commercial power supply 12 at an input terminal 14a and outputs a rectified voltage Vs obtained by full-wave rectification of an AC input voltage Vi. 14 is provided. A boost chopper circuit 16 that outputs a boosted voltage Vo by intermittently rectifying and smoothing the rectified voltage Vs is connected to the output stage of the rectifier circuit 14. A load 18, which is a general electronic device, a DC-DC converter, or the like, is connected to the output terminal 16 a of the boost chopper circuit 16 to supply the boost voltage Vo.

昇圧チョッパ回路16は、一端が整流回路14の出力に接続されたチョークコイル20と、チョークコイル20の他の一端とグランドとの間に接続された主スイッチング素子22と、主スイッチング素子22の両端に発生する断続電圧を整流する整流ダイオード24と、整流ダイオード24の出力を平滑し直流の昇圧電圧Voを発生させる平滑コンデンサ26とで構成されている。   The step-up chopper circuit 16 includes a choke coil 20 having one end connected to the output of the rectifier circuit 14, a main switching element 22 connected between the other end of the choke coil 20 and the ground, and both ends of the main switching element 22. Are composed of a rectifier diode 24 that rectifies the intermittent voltage generated at, and a smoothing capacitor 26 that smoothes the output of the rectifier diode 24 and generates a DC boosted voltage Vo.

主スイッチング素子22のオン・オフは、スイッチング制御回路28によって制御される。スイッチング制御回路28は、商用電源から供給される入力電流の波形を整形して力率を改善すると共に、昇圧電圧Voが所定の目標値Vaになるように主スイッチング素子16のオン時間とオフ時間を決定する。   On / off of the main switching element 22 is controlled by a switching control circuit 28. The switching control circuit 28 shapes the waveform of the input current supplied from the commercial power source to improve the power factor, and also turns on and off the main switching element 16 so that the boosted voltage Vo becomes a predetermined target value Va. To decide.

昇圧電圧Voを安定化する制御系は、昇圧電圧検出回路30、エラーアンプ32、基準電圧源34、目標値補正部36、およびスイッチング制御回路28で構成されている。昇圧電圧検出回路30は、昇圧電圧Voを検出して昇圧電圧信号Vo1を出力する。エラーアンプ32は、昇圧電圧信号Vo1を受け、基準電圧源34の基準電圧V34と昇圧電圧信号Vo1との差分を増幅することによって昇圧電圧Voの目標値Vaを決定する。目標値補正部36は、整流電圧Vsの波高値Vspを検出し、それに応じた目標値補正信号Ibを出力する。そして、目標値補正信号Ibを昇圧電圧検出回路30に注入することによって昇圧電圧信号Vo1を変化させ、目標値Vaを補正する働きをする。スイッチング制御回路28は、エラーアップ34の出力を受け、昇圧電圧Voが補正された目標値Vaに一致するように主スイッチング素子16をオン・オフ制御する。   A control system that stabilizes the boosted voltage Vo includes a boosted voltage detection circuit 30, an error amplifier 32, a reference voltage source 34, a target value correction unit 36, and a switching control circuit 28. The boosted voltage detection circuit 30 detects the boosted voltage Vo and outputs a boosted voltage signal Vo1. The error amplifier 32 receives the boosted voltage signal Vo1 and determines the target value Va of the boosted voltage Vo by amplifying the difference between the reference voltage V34 of the reference voltage source 34 and the boosted voltage signal Vo1. The target value correction unit 36 detects the peak value Vsp of the rectified voltage Vs and outputs a target value correction signal Ib corresponding to the detected peak value Vsp. The target value correction signal Ib is injected into the boosted voltage detection circuit 30, thereby changing the boosted voltage signal Vo1 and correcting the target value Va. The switching control circuit 28 receives the output of the error-up 34 and controls the main switching element 16 on and off so that the boosted voltage Vo matches the corrected target value Va.

また、力率改善回路10には、何らかの理由で昇圧電圧Voが目標値Vaよりも高い電圧値である過電圧基準値V38を超えると、スイッチング制御回路28に信号を送って主スイッチング素子16のオン・オフを停止させ、負荷18に過大電圧の印加が継続することを防止する過電圧保護回路38が設けられている。さらに、入力電圧Viが投入されたときに、整流回路14の出力から平滑コンデンサ26に向けて電流を流すダイオード40と突入電流制限抵抗42の直列回路を備えている。   Further, the power factor correction circuit 10 sends a signal to the switching control circuit 28 to turn on the main switching element 16 when the boosted voltage Vo exceeds the overvoltage reference value V38 that is a voltage value higher than the target value Va for some reason. An overvoltage protection circuit 38 that stops off and prevents the application of an excessive voltage to the load 18 is provided. Furthermore, a series circuit of a diode 40 and an inrush current limiting resistor 42 that flow current from the output of the rectifier circuit 14 toward the smoothing capacitor 26 when the input voltage Vi is input is provided.

次に、昇圧電圧検出回路30、目標値補正部36、エラーアンプ32、および基準電圧源34の具体的な構成について、図2の回路図に基づいて説明する。昇圧電圧検出回路30は、昇圧電圧Voが発生する平滑コンデンサ26の両端に並列接続された抵抗30a,30b,30cの直列回路であり、グランド側の抵抗30b,30cに発生する電圧の合計値を昇圧電圧信号Vo1として出力する。   Next, specific configurations of the boost voltage detection circuit 30, the target value correction unit 36, the error amplifier 32, and the reference voltage source 34 will be described based on the circuit diagram of FIG. The boosted voltage detection circuit 30 is a series circuit of resistors 30a, 30b, and 30c connected in parallel to both ends of the smoothing capacitor 26 that generates the boosted voltage Vo, and the total value of the voltages generated in the ground-side resistors 30b and 30c is calculated. The boosted voltage signal Vo1 is output.

目標値補正部36は、入力電圧検出回路44、基準パルス発生器46、平均化回路48、および補正信号注入回路である補正信号注入抵抗50を備えている。入力電圧検出回路44は、入力電圧Viの高低が等しく現れる整流電圧Vsを検出し、波高値Vspの高低に対応した入力電圧信号Vi1を出力する。   The target value correction unit 36 includes an input voltage detection circuit 44, a reference pulse generator 46, an averaging circuit 48, and a correction signal injection resistor 50 that is a correction signal injection circuit. The input voltage detection circuit 44 detects the rectified voltage Vs in which the levels of the input voltage Vi appear equally, and outputs an input voltage signal Vi1 corresponding to the level of the peak value Vsp.

基準パルス発生器46は、一定周期の矩形波であって、入力電圧信号Vi1に応じてハイ・レベルとロー・レベルの時比率が定められる基準パルスV46を出力する。ここで、基準パルス発生器46は、マイクロコンピュータ内に設けられており、基準パルスV46の時比率と入力電圧信号Vi1との関係がプログラムで定義され、当該定義を変更するときは、プログラムを書き換えることによって自在に行うことができる。基準パルスV46の時比率Dと入力電圧信号Vi1との関係については、後の動作説明の中で詳しく述べる。   The reference pulse generator 46 outputs a reference pulse V46, which is a rectangular wave with a fixed period and has a high-level and low-level time ratio determined according to the input voltage signal Vi1. Here, the reference pulse generator 46 is provided in the microcomputer, and the relationship between the duty ratio of the reference pulse V46 and the input voltage signal Vi1 is defined by the program, and when the definition is changed, the program is rewritten. This can be done freely. The relationship between the duty ratio D of the reference pulse V46 and the input voltage signal Vi1 will be described in detail later in the description of the operation.

平均化回路48は、基準パルスV46を分圧する抵抗48a,48bと、グランド側の抵抗48bに並列接続されたコンデンサ48cとで構成され、コンデンサ48cの両端に、基準パルスV46を平均化した直流の平均化電圧V48を出力する。   The averaging circuit 48 includes resistors 48a and 48b that divide the reference pulse V46, and a capacitor 48c connected in parallel to the ground-side resistor 48b. An averaged voltage V48 is output.

補正信号注入抵抗50は、平均化回路48の出力と、昇圧電圧検出回路30の抵抗30b,30cの中点との間に接続されている。ここでは、補正信号注入抵抗50の抵抗値は、抵抗30cの抵抗値よりも十分大きな抵抗値に設定され、抵抗値30cの抵抗値は、自己の両端に発生する電圧が平均化電圧V48よりも低くなるように設定されている。従って、補正信号注入抵抗50を介して昇圧電圧検出回路30に注入される電流信号である目標値補正信号Ibは、式(1)のように表わすことができる。

Figure 2011223819
The correction signal injection resistor 50 is connected between the output of the averaging circuit 48 and the midpoints of the resistors 30b and 30c of the boosted voltage detection circuit 30. Here, the resistance value of the correction signal injection resistor 50 is set to a resistance value sufficiently larger than the resistance value of the resistor 30c, and the resistance value of the resistance value 30c is such that the voltage generated at both ends thereof is higher than the average voltage V48. It is set to be low. Therefore, the target value correction signal Ib, which is a current signal injected into the boosted voltage detection circuit 30 via the correction signal injection resistor 50, can be expressed as in equation (1).
Figure 2011223819

ここで、R50は補正信号注入抵抗50の抵抗値である。この目標値補正信号Ibが抵抗30cに流れると、昇圧電圧信号Vo1が変化し、その変化量ΔVo1は、式(2)のように表わすことができる。

Figure 2011223819
ここで、R30cは、抵抗30cの抵抗値である。 Here, R50 is the resistance value of the correction signal injection resistor 50. When the target value correction signal Ib flows through the resistor 30c, the boosted voltage signal Vo1 changes, and the amount of change ΔVo1 can be expressed as in equation (2).
Figure 2011223819
Here, R30c is the resistance value of the resistor 30c.

エラーアンプ32は、反転入力端子に基準電圧信号Vo1が入力され、非反転入力端子に基準電圧V34が入力され、その差分を増幅して出力する反転増幅回路である。基準電圧信号Vo1と基準電圧V34とが等しいとき、エラーアンプ32は一定の電圧を出力し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaと等しくなっていると判断し、主スイッチング素子22のオンの時比率をそのまま継続する。基準電圧信号Vo1が基準電圧V34よりも高くなると、エラーアンプ32の出力が低下し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも高くなっていると判断し、主スイッチング素子22のオンの時比率を小さくして昇圧電圧Voが低くなるように制御する。反対に、基準電圧信号Vo1が基準電圧V34よりも低くなると、エラーアンプ32の出力が上昇し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも低くなっていると判断し、主スイッチング素子22のオンの時比率を大きくして昇圧電圧Voが高くなるように制御する。   The error amplifier 32 is an inverting amplifier circuit that receives the reference voltage signal Vo1 at the inverting input terminal and the reference voltage V34 at the non-inverting input terminal, and amplifies and outputs the difference. When the reference voltage signal Vo1 and the reference voltage V34 are equal, the error amplifier 32 outputs a constant voltage, and the switching control circuit 28 receiving the voltage determines that the boosted voltage Vo is equal to the target value Va, The on-time ratio of the main switching element 22 is continued as it is. When the reference voltage signal Vo1 becomes higher than the reference voltage V34, the output of the error amplifier 32 decreases, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is higher than the target value Va. Control is performed such that the boosted voltage Vo is lowered by decreasing the ON-time ratio of the switching element 22. On the contrary, when the reference voltage signal Vo1 becomes lower than the reference voltage V34, the output of the error amplifier 32 rises, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is lower than the target value Va. Then, the boosting voltage Vo is controlled to be increased by increasing the on-time ratio of the main switching element 22.

目標値補正信号Ibが変化すると、目標値Vaが新たな目標値Vaに補正されることになる。例えば、昇圧電圧Voが目標値Vaと等しくなっている状態で目標値補正信号Ibが減少すると、式(2)に基づいて昇圧電圧信号Vo1が低下し、基準電圧信号Vo1が基準電圧V34よりも低くなるので、エラーアンプ32の出力が上昇し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも低いと判断し、主スイッチング素子22のオンの時比率を大きくして昇圧電圧Voが高くなるように制御する。すなわち、目標値補正信号Ibが減少すれば、目標値Vaは昇圧電圧Voを高くする方向に補正されることになり、反対に、目標値補正信号Ibが増加すれば、目標値Vaは昇圧電圧Voが低くなる方向に補正されることになる。   When the target value correction signal Ib changes, the target value Va is corrected to a new target value Va. For example, when the target value correction signal Ib decreases while the boosted voltage Vo is equal to the target value Va, the boosted voltage signal Vo1 decreases based on the equation (2), and the reference voltage signal Vo1 is higher than the reference voltage V34. Therefore, the output of the error amplifier 32 rises, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is lower than the target value Va, and increases the on-time ratio of the main switching element 22. Control is performed so that the boosted voltage Vo increases. That is, if the target value correction signal Ib decreases, the target value Va is corrected in the direction of increasing the boosted voltage Vo. Conversely, if the target value correction signal Ib increases, the target value Va becomes the boosted voltage. The correction is made in the direction of lowering Vo.

なお、エラーアンプ32及び基準電圧34は、目標値補正部36の出力である目標値補正信号Ibの有無にかかわらず、目標値Vaの上限値が過電圧基準値Vovp以下になるように設定されている。   The error amplifier 32 and the reference voltage 34 are set so that the upper limit value of the target value Va is equal to or lower than the overvoltage reference value Vovp regardless of the presence or absence of the target value correction signal Ib that is the output of the target value correction unit 36. Yes.

次に、力率改善回路10の動作について、図3に基づいて説明する。基準パルス発生器46には、上述したように、基準パルスV46の時比率Dと入力電圧信号Vi1との関係がプログラムで定義されている。具体的には、図3に示すように、入力電圧ViがVk以下の範囲では時比率Dは変化せず一定の値であり、入力電圧ViがVkを超えると時比率Dが徐々に小さくなるように定義されている。従って、入力電圧Viが電圧Vk以下の範囲では平均化電圧V48は変化せず、昇圧電圧Voの目標値Vaは一定の値を示し、入力電圧ViがVkを超えると平均化電圧V48が徐々に低下し、目標値Vaが徐々に上昇する。このとき、目標値Vaは、常に整流電圧Vsの波高値Vspよりも高い値になるように設定されているので、昇圧チョッパ回路16は、入力電圧Viの全範囲で主スイッチング素子22がオン・オフして力率改善を行うことができる。   Next, the operation of the power factor correction circuit 10 will be described with reference to FIG. In the reference pulse generator 46, as described above, the relationship between the duty ratio D of the reference pulse V46 and the input voltage signal Vi1 is defined by a program. Specifically, as shown in FIG. 3, when the input voltage Vi is less than or equal to Vk, the time ratio D does not change and is a constant value, and when the input voltage Vi exceeds Vk, the time ratio D gradually decreases. Is defined as Therefore, the average voltage V48 does not change in the range where the input voltage Vi is equal to or lower than the voltage Vk, the target value Va of the boosted voltage Vo shows a constant value, and when the input voltage Vi exceeds Vk, the average voltage V48 gradually increases. The target value Va gradually increases. At this time, the target value Va is set so as to be always higher than the peak value Vsp of the rectified voltage Vs. Therefore, the boost chopper circuit 16 has the main switching element 22 turned on / off in the entire range of the input voltage Vi. It can be turned off to improve the power factor.

以上説明したように、力率改善回路10は、例えば、入力電圧範囲の仕様が異なるものを設計する場合、マイクロコンピュータ内に設けた基準パルス発生回路36のプログラムを書き換え、入力電圧Viと目標値Va(昇圧電圧Vo)との関係を適正に変更するだけでよいので、設計や評価が容易で、変更する部品数も最小限に抑えることができる。   As described above, the power factor correction circuit 10 rewrites the program of the reference pulse generation circuit 36 provided in the microcomputer to design the input voltage Vi and the target value, for example, when designing one having different input voltage range specifications. Since it is only necessary to appropriately change the relationship with Va (boost voltage Vo), design and evaluation are easy, and the number of parts to be changed can be minimized.

また、力率改善回路10が搭載された製品を量産するとき、出荷検査工程で通電試験を行い、基準パルスV46の時比率Dと入力電圧信号Vi1との関係を定義するプログラム部分を、組み立てられた製品個々の特性に合わせて書き換え、昇圧電圧Voと入力電圧Viとの関係が規格範囲内に収まるように微調整すれば、個々の製品のばらつきを容易に補正することができ、製品精度を高めることができるとともに、量産性も向上する。また、基準パルス発生回路の部品点数も大幅に削減することができる。   In addition, when mass-producing a product having the power factor correction circuit 10 mounted thereon, a program part that performs an energization test in the shipping inspection process and defines the relationship between the time ratio D of the reference pulse V46 and the input voltage signal Vi1 can be assembled. If the product is rewritten according to the characteristics of each product and finely adjusted so that the relationship between the boosted voltage Vo and the input voltage Vi falls within the standard range, variations in individual products can be easily corrected, and product accuracy can be improved. It can be increased and mass productivity is also improved. Also, the number of parts of the reference pulse generation circuit can be greatly reduced.

また、入力電圧ViがVk以下の範囲で使用されたとき、目標値Vaが所定の値に固定され一定以上の昇圧電圧Voが確保されるので、入力電圧Viが遮断された後、昇圧電圧Voが低下するまで、一定以上の保持時間を確保することができる。   Further, when the input voltage Vi is used in the range of Vk or less, the target value Va is fixed to a predetermined value and a boost voltage Vo of a certain level or more is ensured. Therefore, after the input voltage Vi is cut off, the boost voltage Vo It is possible to secure a certain holding time until the value decreases.

また、昇圧電圧Voが過電圧基準値Vovpに達したときに昇圧チョッパ回路16の動作を停止させる過電圧保護回路38が設けられ、かつ、エラーアンプ32及び基準電圧34は、目標値補正部36の出力である目標値補正信号Ibの有無にかかわらず、目標値Vaの上限値が過電圧基準値Vovp以下になるように構成されている。従って、特定の故障モードで昇圧電圧Voが上昇した場合は、過電圧に対する保護が二重に設けられることになるので、製品の信頼性や安全性がさらに向上する。また、上述したように通電試験で昇圧電圧Voと入力電圧Viとの関係を微調整する場合、昇圧電圧の制御系を構成する部品の特性が最もばらついたとしても、微調整前の段階で過電圧保護回路38が働くことがないので、微調整の作業を支障なく行うことができる。   Further, an overvoltage protection circuit 38 for stopping the operation of the boost chopper circuit 16 when the boosted voltage Vo reaches the overvoltage reference value Vovp is provided, and the error amplifier 32 and the reference voltage 34 are output from the target value correction unit 36. Regardless of the presence or absence of the target value correction signal Ib, the upper limit value of the target value Va is configured to be equal to or less than the overvoltage reference value Vovp. Accordingly, when the boosted voltage Vo increases in a specific failure mode, double protection against overvoltage is provided, so that the reliability and safety of the product are further improved. Further, as described above, when the relationship between the boost voltage Vo and the input voltage Vi is finely adjusted in the energization test, even if the characteristics of the parts constituting the control system of the boost voltage vary most, the overvoltage at the stage before the fine adjustment Since the protection circuit 38 does not work, fine adjustment work can be performed without any trouble.

また、入力電圧Viの投入時に整流回路14の出力から平滑コンデンサ26に向けて電流を流すダイオード40と突入電流制限抵抗42との直列回路で構成された突入電流防止回路を付加する場合、昇圧電圧Voの目標値Vaが常に整流電圧Vsの波高値Vspよりも高くなるので、定常動作中はダイオード40と突入電流制限抵抗42に電流が流れず、この直列回路では損失が発生しない。従って、大電力用のダイオード40や突入電流制限抵抗42を採用したり、突入電流制限抵抗42の両端を短絡するための短絡スイッチ等を設けたりする等の措置が不要になり、突入電流防止回路をコンパクトで安価に構成することができる。   In addition, when an inrush current prevention circuit composed of a series circuit of a diode 40 and an inrush current limiting resistor 42 that flows current from the output of the rectifier circuit 14 toward the smoothing capacitor 26 when the input voltage Vi is applied, the boosted voltage is added. Since the target value Va of Vo is always higher than the peak value Vsp of the rectified voltage Vs, no current flows through the diode 40 and the inrush current limiting resistor 42 during steady operation, and no loss occurs in this series circuit. Therefore, measures such as the use of the high-power diode 40 and the inrush current limiting resistor 42 and the provision of a short-circuit switch for short-circuiting both ends of the inrush current limiting resistor 42 become unnecessary. Can be made compact and inexpensive.

なお、上述したように、力率改善回路10では、補正信号注入抵抗50は、抵抗30cよりも十分大きな抵抗値に設定され、抵抗値30cの抵抗値が、自己の両端に発生する電圧が平均化電圧V48よりも低くなるように設定されている。従って、式(1)で規定される目標値補正信号Ibを、抵抗30cに流れ込む方向にのみ発生させることができる。しかし、補正信号注入抵抗50と抵抗30cの抵抗値の大小関係を変更すれば、目標値補正信号Ibを双方向に発生させることも可能である。そうすれば、基準パルスV46の時比率を変更して平均化電圧V48を昇降させることによって、昇圧電圧Vo1を高くする動作だけでなく、低くする動作も自在に行うことができる。   As described above, in the power factor correction circuit 10, the correction signal injection resistor 50 is set to a resistance value sufficiently larger than the resistance 30c, and the resistance value of the resistance value 30c is equal to the voltage generated at both ends thereof. It is set to be lower than the activation voltage V48. Therefore, the target value correction signal Ib defined by the expression (1) can be generated only in the direction of flowing into the resistor 30c. However, the target value correction signal Ib can be generated in both directions by changing the magnitude relation between the resistance values of the correction signal injection resistor 50 and the resistor 30c. Then, by changing the time ratio of the reference pulse V46 and raising or lowering the average voltage V48, not only the operation of raising the boost voltage Vo1, but also the operation of lowering it can be performed freely.

次に、この発明の力率改善回路の第二の実施形態について、図4、図5に基づいて説明する。ここで、第一の実施形態の力率改善回路10と同様の構成は、同一の符号を付して説明を省略する。第二の実施形態の力率改善回路60は、力率改善回路10の構成と比べると、過電圧保護回路38が削除され、ダイオード40と突入電流制限抵抗42との直列回路が削除され、さらに目標値補正部36に代えて目標値制御部62が設けられている点が異なる。   Next, a second embodiment of the power factor correction circuit according to the present invention will be described with reference to FIGS. Here, the same components as those of the power factor correction circuit 10 of the first embodiment are denoted by the same reference numerals and description thereof is omitted. In the power factor improvement circuit 60 of the second embodiment, compared to the configuration of the power factor improvement circuit 10, the overvoltage protection circuit 38 is deleted, the series circuit of the diode 40 and the inrush current limiting resistor 42 is deleted, and further, the target A difference is that a target value control unit 62 is provided instead of the value correction unit 36.

ここで、力率改善回路60が昇圧電圧Voを供給する負荷18aは、過大な電圧が入力されると自己の破損を防止するための安全装置を具備しているので、力率改善回路60に負荷保護用の過電圧程回路38を設ける必要なく、削除されている。また、力率改善回路60は、平滑コンデンサ26の静電容量が比較的小さく、入力投入時の突入電流のエネルギーが小さいので、チョークコイル20の巻線に存在する抵抗成分を利用すれば突入電流を容易に抑制することができる。そこで、力率改善回路60では、突入電流制限抵抗42とダイオード40の直列回路が削除されている。   Here, the load 18a to which the power factor correction circuit 60 supplies the boosted voltage Vo includes a safety device for preventing its own damage when an excessive voltage is input. There is no need to provide an overvoltage circuit 38 for load protection. Further, the power factor correction circuit 60 has a relatively small capacitance of the smoothing capacitor 26, and the energy of the rush current when the input is turned on is small. Therefore, if the resistance component existing in the winding of the choke coil 20 is used, the rush current is increased. Can be easily suppressed. Therefore, in the power factor correction circuit 60, the series circuit of the inrush current limiting resistor 42 and the diode 40 is omitted.

以下、目標値補正部36に代えて設けられている目標値補正部62を中心に、昇圧電圧Voの制御系の構成について詳しく説明する。昇圧電圧Voを安定化する制御系は、昇圧電圧検出回路30、目標値補正部62、エラーアンプ32、および基準電圧源34で構成されている。   Hereinafter, the configuration of the control system for the boosted voltage Vo will be described in detail with a focus on a target value correction unit 62 provided instead of the target value correction unit 36. The control system that stabilizes the boosted voltage Vo includes a boosted voltage detection circuit 30, a target value correction unit 62, an error amplifier 32, and a reference voltage source 34.

昇圧電圧検出回路30は、昇圧電圧Voが発生する平滑コンデンサ26の両端に並列接続された抵抗30a,30b,30cの直列回路で構成され、グランド側の抵抗30b,30cに発生する電圧の合計値を昇圧電圧信号Vo1として出力する。抵抗30b,30cは、いずれか一方を削除してもよいが、ここでは、抵抗30aとの分圧比を微調整する目的で抵抗2本が直列に設けられている。   The boosted voltage detection circuit 30 is configured by a series circuit of resistors 30a, 30b, and 30c connected in parallel to both ends of the smoothing capacitor 26 that generates the boosted voltage Vo, and the total value of the voltages generated in the ground-side resistors 30b and 30c. Is output as the boosted voltage signal Vo1. Either one of the resistors 30b and 30c may be omitted, but here two resistors are provided in series for the purpose of finely adjusting the voltage division ratio with the resistor 30a.

目標値補正部62は、入力電圧検出回路44、基準パルス発生器54、平均化回路48、および補正信号注入回路である補正信号注入バッファ66を備えている。すなわち、上記の目標値補正部36の構成と比べると、基準パルス発生器46及び補正信号注入抵抗50に代えて基準パルス発生器64及び補正信号注入バッファ66が設けられている点が異なる。   The target value correction unit 62 includes an input voltage detection circuit 44, a reference pulse generator 54, an averaging circuit 48, and a correction signal injection buffer 66 that is a correction signal injection circuit. That is, as compared with the configuration of the target value correction unit 36 described above, a reference pulse generator 64 and a correction signal injection buffer 66 are provided instead of the reference pulse generator 46 and the correction signal injection resistor 50.

入力電圧検出回路44は、入力電圧Viの高低が等しく現れる整流電圧Vsを検出し、波高値Vspの高低に対応した入力電圧信号Vi1を出力する。   The input voltage detection circuit 44 detects the rectified voltage Vs in which the levels of the input voltage Vi appear equally, and outputs an input voltage signal Vi1 corresponding to the level of the peak value Vsp.

基準パルス発生器64は、一定周期の矩形波であって、入力電圧信号Vi1に応じてハイ・レベルとロー・レベルの時比率Dが定められる基準パルスV64を出力する。基準パルス発生器64は、基準パルス発生器46と同様に、マイクロコンピュータ内に設けられており、基準パルスV64の時比率Dと入力電圧信号Vi1との関係がプログラムで定義され、当該関係を変更するときは、プログラムを書き換えることによって自在に行うことができる。基準パルスV64の時比率Dと入力電圧信号Vi1との関係については、後の動作説明の中で述べる。   The reference pulse generator 64 outputs a reference pulse V64 which is a rectangular wave having a fixed period and whose time ratio D between high level and low level is determined according to the input voltage signal Vi1. Similar to the reference pulse generator 46, the reference pulse generator 64 is provided in the microcomputer, and the relationship between the time ratio D of the reference pulse V64 and the input voltage signal Vi1 is defined by a program, and the relationship is changed. When doing this, it can be done freely by rewriting the program. The relationship between the duty ratio D of the reference pulse V64 and the input voltage signal Vi1 will be described later in the description of the operation.

平均化回路48は、基準パルスV46を分圧する抵抗48a,48bと、グランド側の抵抗48bに並列接続されたコンデンサ48cとで構成され、コンデンサ48cの両端に、基準パルスV64を平均化した直流の平均化電圧V48を出力する。   The averaging circuit 48 includes resistors 48a and 48b that divide the reference pulse V46, and a capacitor 48c connected in parallel to the ground-side resistor 48b. A DC pulse obtained by averaging the reference pulse V64 at both ends of the capacitor 48c. An averaged voltage V48 is output.

補正信号注入バッファ66は、平均化回路48が出力する平均化電圧V48を高インピーダンスに受け、基準電圧源34のマイナス出力端子とグランドの間に低インピーダンスに出力する。ここでは補正信号注入バッファ66の増幅率は1倍なので、基準電圧源34に注入される目標値補正信号Vbは平均化電圧V48に等しくなる。この目標値補正信号Vbが発生すると、後述するエラーアンプ32の一方の端子電圧である基準電圧V34が変化し、その変化量ΔV34は、式(3)のように表わすことができる。

Figure 2011223819
The correction signal injection buffer 66 receives the averaged voltage V48 output from the averaging circuit 48 at a high impedance, and outputs it at a low impedance between the negative output terminal of the reference voltage source 34 and the ground. Here, since the amplification factor of the correction signal injection buffer 66 is 1, the target value correction signal Vb injected into the reference voltage source 34 is equal to the average voltage V48. When this target value correction signal Vb is generated, a reference voltage V34, which is one terminal voltage of an error amplifier 32 to be described later, changes, and the amount of change ΔV34 can be expressed as in equation (3).
Figure 2011223819

エラーアンプ32は、反転入力端子に基準電圧信号Vo1が入力され、非反転入力端子に基準電圧V34が入力され、その差分を増幅して出力する反転増幅回路である。基準電圧信号Vo1と基準電圧V34とが等しいとき、エラーアンプ32は一定の電圧を出力し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaと等しくなっていると判断し、主スイッチング素子22のオンの時比率を継続する。基準電圧V34が基準電圧信号Vo1よりも低くなると、エラーアンプ32の出力が低下し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも高くなっていると判断し、主スイッチング素子22のオンの時比率を小さくして昇圧電圧Voが低くなるように制御する。反対に、基準電圧V34が基準電圧信号Vo1よりも高くなると、エラーアンプ32の出力が上昇し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも低くなっていると判断し、主スイッチング素子22のオンの時比率を大きくして昇圧電圧Voが高くなるように制御する。   The error amplifier 32 is an inverting amplifier circuit that receives the reference voltage signal Vo1 at the inverting input terminal and the reference voltage V34 at the non-inverting input terminal, and amplifies and outputs the difference. When the reference voltage signal Vo1 and the reference voltage V34 are equal, the error amplifier 32 outputs a constant voltage, and the switching control circuit 28 receiving the voltage determines that the boosted voltage Vo is equal to the target value Va, The on-time ratio of the main switching element 22 is continued. When the reference voltage V34 becomes lower than the reference voltage signal Vo1, the output of the error amplifier 32 decreases, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is higher than the target value Va. Control is performed such that the boosted voltage Vo is lowered by decreasing the ON-time ratio of the switching element 22. On the other hand, when the reference voltage V34 becomes higher than the reference voltage signal Vo1, the output of the error amplifier 32 increases, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is lower than the target value Va. Then, the boosting voltage Vo is controlled to be increased by increasing the on-time ratio of the main switching element 22.

目標値補正信号Vbが変化すると、目標値Vaが新たな目標値Vaに補正されることになる。例えば、昇圧電圧Voが目標値Vaと等しくなっている状態で目標値補正信号Vbが上昇すると、式(3)に基づいて基準電圧V34が上昇し、基準電圧V34が基準電圧信号Vo1よりも高くなるので、エラーアンプ32の出力が上昇し、それを受けたスイッチング制御回路28は、昇圧電圧Voが目標値Vaよりも低いと判断し、主スイッチング素子22のオンの時比率を大きくして昇圧電圧Voを高くなるように制御する。すなわち、目標値補正信号Vbが上昇すれば、目標値Vaが昇圧電圧Voを高くする方向に補正されることになり、反対に、目標値補正信号Vbが低下すれば、目標値Vaは昇圧電圧Voが低くなる方向に補正されることになる。   When the target value correction signal Vb changes, the target value Va is corrected to a new target value Va. For example, when the target value correction signal Vb increases while the boosted voltage Vo is equal to the target value Va, the reference voltage V34 increases based on the equation (3), and the reference voltage V34 is higher than the reference voltage signal Vo1. Therefore, the output of the error amplifier 32 rises, and the switching control circuit 28 receiving it determines that the boosted voltage Vo is lower than the target value Va, and increases the on-time ratio of the main switching element 22 to boost the voltage. The voltage Vo is controlled to be high. That is, if the target value correction signal Vb increases, the target value Va is corrected in the direction of increasing the boosted voltage Vo. Conversely, if the target value correction signal Vb decreases, the target value Va becomes the boosted voltage. The correction is made in the direction of lowering Vo.

次に、力率改善回路60の動作について、図5に基づいて説明する。基準パルス発生器64には、上述したように、基準パルスV64の時比率Dと入力電圧信号Vi1との関係がプログラムで定義されている。具体的には、図5に示すように、入力電圧ViがVk以下の範囲では時比率Dは変化せず一定の値であり、入力電圧Viが電圧Vkを超えると時比率Dが徐々に大きくなるように定義されている。従って、入力電圧ViがVk以下の範囲では平均化電圧V48は変化せず、昇圧電圧Voの目標値Vaは一定の値を示し、入力電圧ViがVkを超えると平均化電圧V48が徐々に上昇し、目標値Vaが徐々に上昇する。このとき、目標値Vaは、常に整流電圧Vsの波高値Vspよりも高い値になるように設定されているので、昇圧チョッパ回路16は、入力電圧Viの全範囲で主スイッチング素子22がオン・オフして力率改善を行うことができる。   Next, the operation of the power factor correction circuit 60 will be described with reference to FIG. In the reference pulse generator 64, as described above, the relationship between the duty ratio D of the reference pulse V64 and the input voltage signal Vi1 is defined by a program. Specifically, as shown in FIG. 5, when the input voltage Vi is less than or equal to Vk, the time ratio D does not change and is a constant value, and when the input voltage Vi exceeds the voltage Vk, the time ratio D gradually increases. It is defined to be Therefore, the average voltage V48 does not change when the input voltage Vi is less than or equal to Vk, the target value Va of the boost voltage Vo shows a constant value, and when the input voltage Vi exceeds Vk, the average voltage V48 gradually increases. The target value Va gradually increases. At this time, the target value Va is set so as to be always higher than the peak value Vsp of the rectified voltage Vs. Therefore, the boost chopper circuit 16 has the main switching element 22 turned on / off in the entire range of the input voltage Vi. It can be turned off to improve the power factor.

以上説明したように、力率改善回路60は、力率改善回路10と異なる目標値補正部62を有しているものの、ほぼ同様の作用効果を得ることができる。   As described above, the power factor correction circuit 60 has the target value correction unit 62 different from that of the power factor correction circuit 10, but can obtain substantially the same operational effects.

なお、本発明の力率改善回路は、上記実施形態に限定されるものではない。例えば、入力電圧検出回路は、スイッチング制御回路が力率改善のために具備する入力電圧検出回路と兼用することができる。また、入力電圧Viの高低を精度よく検出することができれば、整流回路が出力する整流電圧を観測する方法に代えて、整流回路の前段の交流電圧や、昇圧チョッパ回路のチョークコイルの両端電圧等を観測する方法を採用してもよい。   Note that the power factor correction circuit of the present invention is not limited to the above embodiment. For example, the input voltage detection circuit can also be used as the input voltage detection circuit that the switching control circuit has for power factor improvement. Further, if the level of the input voltage Vi can be detected with high accuracy, instead of the method of observing the rectified voltage output from the rectifier circuit, the AC voltage at the previous stage of the rectifier circuit, the voltage across the choke coil of the boost chopper circuit, etc. The method of observing

また、基準パルス発生器は、入力電圧信号を基準パルスの時比率に変換する動作を高精度に行うことができるものであれば、マイクロコンピュータに代えて、複数のディスクリート部品を組み合わせて構成してもよい。また、入力電圧信号と基準パルスの時比率との関係は、厳密に直線的な関係である必要はなく、力率改善回路が設置される地域や使用条件に鑑みて、曲線的な関係や階段状の関係に定義してもよい。   In addition, the reference pulse generator may be configured by combining a plurality of discrete components instead of the microcomputer as long as the operation of converting the input voltage signal into the time ratio of the reference pulse can be performed with high accuracy. Also good. In addition, the relationship between the input voltage signal and the time ratio of the reference pulse does not need to be strictly a linear relationship, and in consideration of the area where the power factor correction circuit is installed and the usage conditions, a curved relationship or staircase It may be defined in a state relationship.

また、補正信号注入回路は、昇圧電圧検出回路や基準電圧源の構成に合わせ、目標値補正信号を注入しやすい回路手段を自由に選択することができる。   Further, the correction signal injection circuit can freely select a circuit means that can easily inject the target value correction signal in accordance with the configuration of the boost voltage detection circuit and the reference voltage source.

10,60 力率改善回路
14 整流回路
16 昇圧チョッパ回路
22 主スイッチング素子
28 スイッチング制御回路
30 昇圧電圧検出回路
32 エラーアンプ
34 基準電圧源
36,62 目標値補正部
38 過電圧保護回路
40 ダイオード
42 突入電流制限抵抗
44 入力電圧検出回路
46,64 基準パルス発生器
48 平均化回路
50 補正信号注入抵抗
66 補正信号注入バッファ
D 時比率
Ib,Vb 目標値補正信号
Va 昇圧電圧の目標値
Vi 入力電圧
Vi1 入力電圧信号
Vo 昇圧電圧
Vo1 昇圧電圧信号
Vs 整流電圧
V34 基準電圧
V48 平均化電圧
V46,V64 基準パルス
DESCRIPTION OF SYMBOLS 10,60 Power factor improvement circuit 14 Rectifier circuit 16 Boost chopper circuit 22 Main switching element 28 Switching control circuit 30 Boost voltage detection circuit 32 Error amplifier 34 Reference voltage source 36, 62 Target value correction | amendment part 38 Overvoltage protection circuit 40 Diode 42 Inrush current Limiting resistor 44 Input voltage detection circuit 46, 64 Reference pulse generator 48 Averaging circuit 50 Correction signal injection resistor 66 Correction signal injection buffer D Time ratio Ib, Vb Target value correction signal Va Target value of boosted voltage Vi Input voltage Vi1 Input voltage Signal Vo Boost Voltage Vo1 Boost Voltage Signal Vs Rectified Voltage V34 Reference Voltage V48 Averaged Voltage V46, V64 Reference Pulse

Claims (5)

交流の入力電圧を整流して脈流の整流電圧を出力する整流回路と、
チョークコイル、主スイッチング素子、整流素子及び平滑コンデンサを有し、前記整流電圧を昇圧した昇圧電圧を前記平滑コンデンサ両端に発生させ、負荷に電力供給する昇圧チョッパ回路と、
前記昇圧電圧に相当する昇圧電圧信号を受け、基準電圧と前記昇圧電圧信号との差分を増幅することによって前記昇圧電圧の目標値を決定するエラーアンプと、
前記エラーアンプが出力する誤差増幅信号を受け、前記昇圧電圧が前記目標値になるように前記主スイッチング素子をオン・オフ制御するスイッチング制御部とを備えた力率改善回路において、
前記入力電圧を検出し入力電圧信号を出力する入力電圧検出回路と、
一定周期の矩形波であって、前記入力電圧信号に応じてハイ・レベルとロー・レベルの時比率が定められる基準パルスを出力する基準パルス発生器と、
前記基準パルスの平均化電圧を出力する平均化回路と、
前記平均化電圧に応じた目標値補正信号を前記昇圧電圧信号又は前記基準電圧に注入する補正信号注入回路とで構成された目標値補正部を備え、
前記目標値補正部が出力する前記目標値補正信号によって、
前記入力電圧の高低にかかわらず、前記昇圧電圧が前記整流電圧の波高値よりも高くなるように前記昇圧電圧の目標値が補正されると共に、
前記入力電圧が低いときには前記昇圧電圧が相対的に低くなるように、前記入力電圧が高いときには前記昇圧電圧が相対的に高くなるように、前記昇圧電圧の目標値が補正されることを特徴とする力率改善回路。
A rectifier circuit that rectifies an AC input voltage and outputs a pulsating rectified voltage;
A boosting chopper circuit having a choke coil, a main switching element, a rectifying element and a smoothing capacitor, generating a boosted voltage obtained by boosting the rectified voltage at both ends of the smoothing capacitor, and supplying power to a load;
An error amplifier which receives a boosted voltage signal corresponding to the boosted voltage and determines a target value of the boosted voltage by amplifying a difference between a reference voltage and the boosted voltage signal;
In a power factor correction circuit comprising a switching control unit which receives an error amplification signal output from the error amplifier and controls on / off of the main switching element so that the boosted voltage becomes the target value.
An input voltage detection circuit for detecting the input voltage and outputting an input voltage signal;
A reference pulse generator that outputs a reference pulse that is a rectangular wave having a constant period and has a high-level and low-level time ratio determined according to the input voltage signal;
An averaging circuit that outputs an averaged voltage of the reference pulse;
A target value correction unit configured with a correction signal injection circuit that injects a target value correction signal corresponding to the averaged voltage into the boosted voltage signal or the reference voltage;
By the target value correction signal output by the target value correction unit,
Regardless of the level of the input voltage, the target value of the boosted voltage is corrected so that the boosted voltage is higher than the peak value of the rectified voltage, and
The target value of the boosted voltage is corrected so that the boosted voltage is relatively low when the input voltage is low, and the boosted voltage is relatively high when the input voltage is high. Power factor correction circuit to do.
前記目標値補正部は、前記入力電圧が所定電圧以下の範囲で、前記昇圧電圧の目標値が一定になる前記目標値補正信号を出力する請求項1記載の力率改善回路。   2. The power factor correction circuit according to claim 1, wherein the target value correction unit outputs the target value correction signal that makes a target value of the boost voltage constant in a range where the input voltage is equal to or lower than a predetermined voltage. 前記基準パルス発生器は、マイクロコンピュータ内に設けられ、前記基準パルスの時比率と前記入力電圧信号との関係を、プログラムの書き換えによって変更できる請求項1又は2記載の力率改善回路。   3. The power factor correction circuit according to claim 1, wherein the reference pulse generator is provided in a microcomputer, and the relationship between the duty ratio of the reference pulse and the input voltage signal can be changed by rewriting a program. 前記昇圧電圧が過電圧基準値を超えると前記主スイッチング素子のオン・オフ動作を停止させる過電圧保護回路を備え、
前記エラーアンプは、前記目標値補正信号の有無にかかわらず、前記昇圧電圧が前記過電圧基準値以下になるように前記目標値を決定する請求項1乃至3のいずれか記載の力率改善回路。
An overvoltage protection circuit that stops the on / off operation of the main switching element when the boosted voltage exceeds an overvoltage reference value;
4. The power factor correction circuit according to claim 1, wherein the error amplifier determines the target value so that the boosted voltage is equal to or lower than the overvoltage reference value regardless of the presence or absence of the target value correction signal. 5.
入力電圧投入時に前記整流回路の出力から前記平滑コンデンサに向けて電流を流すダイオード及び突入電流制限抵抗の直列回路を備えた請求項1乃至3のいずれか記載の力率改善回路。
4. The power factor correction circuit according to claim 1, further comprising: a series circuit of a diode and an inrush current limiting resistor that allow current to flow from the output of the rectifier circuit toward the smoothing capacitor when an input voltage is applied. 5.
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