JP2011211589A - High frequency switch circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency switch circuit capable of obtaining high-performance characteristics in high frequency bands of at least 25 GHz.SOLUTION: A third matching circuit 112 and a fourth matching circuit 122 are comprised of a distribution constant circuit such as a microstrip line and formed so that a characteristic impedance becomes Z0 and a line length becomes a 1/4 wavelength. By combining the third matching circuit 112 with a first switch 113 and combining the fourth matching circuit 122 with a second switch 123, respectively, a transmitting-side high frequency switch 110 and a receiving-side high frequency switch 120 can be changed over to a short-circuited or open state. When the transmitting-side high frequency switch 110 or the receiving-side high frequency switch 120 is brought into short-circuited state, the switch is closed and when brought into open state, the switch is opened.

Description

  The present invention relates to a high-frequency switch circuit used in a high-frequency circuit such as an in-vehicle UWB radar using a quasi-millimeter wave band.

  Conventionally, a switch circuit used for a high-frequency signal system is configured using an FET such as a MOS type FET. In such a high frequency switch circuit, as shown in FIG. 11, when the voltage supplied to the gate terminal of the FET is set to High, a current flows between the drain and source terminals, and the FET is turned on. When the voltage supplied to is low, the current between the drain and source terminals is stopped and the FET is turned off. In general, the switch is turned on when the FET is turned on and turned off when the FET is turned off.

  As another high-frequency switch circuit, Patent Documents 1 and 2 disclose a circuit configured using a PIN diode. In the high-frequency switch circuit of Patent Document 1, a PIN diode is provided between an input end and an output end, and a resonance circuit is connected in parallel with the PIN diode. The resonance circuit resonates in at least two different predetermined frequency bands together with a parasitic capacitor generated in the PIN diode when a forward bias is not supplied to the PIN diode, and passes a signal in the predetermined frequency band from the input terminal to the output terminal. Is blocking. Patent Document 2 discloses a configuration of a high-frequency switch circuit using a PIN diode for improving variation in electrical performance and the like.

JP 2007-274241 A JP 2007-142743 A

  However, in the conventional high-frequency switch circuit using the above-described FET, the usable frequency band is 20 GHz or less, and the frequency characteristics do not correspond to 20 GHz or more. Further, even in the high frequency switch circuit using the PIN diode described in Patent Documents 1 and 2, the usable frequency band is 20 GHz or less, and the frequency characteristic does not correspond to 20 GHz or more.

  Accordingly, the present invention has been made to solve the above-described problems, and an object thereof is to provide a high-frequency switch circuit capable of obtaining high-performance characteristics at least in a high-frequency band of 25 GHz.

  According to a first aspect of the high frequency switch circuit of the present invention, an antenna port, a transmission port, and a reception port are connected by a first connection unit, and a predetermined high frequency signal is transmitted from the transmission port to the antenna port. A high-frequency switch circuit for switching a high-frequency signal from the antenna port to the reception port, a first matching circuit connected between the transmission port and the first connection unit; A second matching circuit connected between the reception port and the first connection unit; a third matching circuit having one end connected to a second connection unit between the transmission port and the first matching circuit; A first switch connected to the other end of the third matching circuit to switch the third matching circuit between short and open, and a third connection between the reception port and the second matching circuit A fourth matching circuit having one end connected thereto, and a second switch connected to the other end of the fourth matching circuit to switch the fourth matching circuit between short and open, and from the transmission port to the antenna port When transmitting the high-frequency signal, the first switch is closed and the third matching circuit is short-circuited, while the second switch is opened and the fourth matching circuit is opened, and the antenna port is connected to the reception port. When transmitting a high frequency signal, the first switch is opened to open the third matching circuit, while the second switch is closed to short the fourth matching circuit.

  Another aspect of the high-frequency switch circuit of the present invention is characterized by further comprising a fifth matching circuit having one end connected to the first connection portion and the other end grounded.

  According to another aspect of the high-frequency switch circuit of the present invention, the first switch and the second switch each have a resistance value at a forward bias less than or equal to a predetermined reference resistance value and a capacitance at a reverse bias. And a power supply circuit that supplies power for making the PIN diode forward-biased or reverse-biased, and an anode terminal of the PIN diode is the power supply When connected to the supply circuit and the cathode terminal is connected to the other end of the third matching circuit or the fourth matching circuit, it is closed when the PIN diode is forward biased, and when the PIN diode is reverse biased It is characterized by being open to

  Another aspect of the high-frequency switch circuit of the present invention is characterized in that a radial stub corresponding to a predetermined broadband frequency is connected in parallel with the power supply circuit to the anode terminal of the PIN diode.

  In another aspect of the high-frequency switch circuit of the present invention, the power supply circuit includes a P-channel type MOS FET having a source terminal connected to a predetermined positive power source and an N type having a source terminal connected to a predetermined negative power source. A channel-type MOS FET, a protective resistor connected to the drain terminal of the P-channel type MOS FET, and another protective resistor connected to the drain terminal of the N-channel type MOS FET When a high signal is input to the respective gate terminals of the P-channel MOS FET and the N-channel MOS FET, the P-channel MOS FET is turned on while the N-channel MOS FET is turned on. The MOS type FET is turned off, and the positive power supply is output via the protective resistor, and the P channel type MOS type FET and the N channel type MOS are output. When a low signal is input to each gate terminal of the FET, the P-channel type MOS FET is turned off, while the N-channel type MOS FET is turned on and the negative power source is connected to the other protective resistor. It is characterized by being output via.

  In another aspect of the high-frequency switch circuit of the present invention, the high-frequency signal is a quasi-millimeter wave band signal.

  Another aspect of the high frequency switch circuit of the present invention is characterized in that a line length of the fifth matching circuit is substantially equal to a quarter wavelength of a second harmonic of the high frequency signal.

  According to the present invention, it is possible to provide a high-frequency switch circuit capable of obtaining high-performance characteristics at least in a high-frequency band of 25 GHz band.

1 is an equivalent circuit diagram of a high-frequency switch circuit according to a first embodiment of the present invention. It is a block diagram which shows schematic structure of a transmission / reception system provided with the high frequency switch circuit of 1st Embodiment. It is an equivalent circuit diagram at the time of forward bias and reverse bias of the diode. It is a circuit diagram of the high frequency switch circuit of a 1st embodiment. It is an equivalent circuit diagram which shows the state at the time of transmission and reception of the high frequency switch circuit of 1st Embodiment. It is a circuit diagram which shows the structure of a power supply circuit. It is explanatory drawing which shows operation | movement of MOS type FET of a power supply circuit. 1 is a circuit diagram illustrating an overall configuration of a high-frequency switch circuit according to a first embodiment to which a power supply circuit is connected. It is explanatory drawing which shows the state transition of the high frequency switch circuit of 1st Embodiment. It is a graph which shows the insertion loss characteristic of the high frequency switch circuit of 1st Embodiment. It is a circuit diagram which shows operation | movement of the conventional high frequency switch circuit using MOS type FET.

  A high-frequency switch circuit according to a preferred embodiment of the present invention will be described in detail with reference to the drawings. Each component having the same function is denoted by the same reference numeral for simplification of illustration and description. The present invention relates to a high-frequency switch circuit used in a high-frequency circuit such as an in-vehicle UWB radar using a quasi-millimeter wave band.

  A high-frequency switch circuit according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is an equivalent circuit diagram showing a configuration of a high-frequency switch circuit 100 according to the present embodiment, and FIG. 2 is a block diagram showing a schematic configuration of a transmission / reception system including the high-frequency switch circuit 100. The high-frequency switch circuit 100 according to the present embodiment includes three ports, an antenna port 101, a transmission port 102, and a reception port 103, and has an SPDT (Single Pole Double Throw) configuration. A common antenna 10 for transmission and reception is connected to the antenna port 101, and a transmission system circuit 11 for outputting a transmission signal and a reception system circuit 12 for processing the reception signal are connected to the transmission port 102 and the reception port 103, respectively. The

  The high frequency switch circuit 100 switches the port capable of signal transmission with the antenna port 101 between the transmission port 102 and the reception port 103 as a switching operation. That is, the transmission-side high-frequency switch 110 is provided on the transmission port 102 side from the first connection unit 104 connected to the antenna port 101, and the reception-side high-frequency switch 120 is provided on the reception port 103 side. And the reception-side high-frequency switch 120 are alternately opened and closed.

  At the time of transmission, the transmission-side high-frequency switch 110 is closed to enable signal transmission between the transmission port 102 and the antenna port 101, and the reception-side high-frequency switch 120 is opened to connect the reception port 102 and the antenna port 101. Signal transmission is disabled. At the time of reception, the transmission-side high-frequency switch 110 is opened to disable signal transmission between the transmission port 102 and the antenna port 101, and the reception-side high-frequency switch 120 is closed to receive the reception port 102 and the antenna port 101. Signal transmission between them.

  In the high-frequency switch circuit 100 of the present embodiment, the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 are configured using a predetermined distributed constant circuit and a predetermined switch in order to enable a switch operation for a high-frequency signal of 20 GHz or higher. The switch operation is realized by shorting or opening this distributed constant circuit.

  In FIG. 1, the transmission line from the first connection unit 104 to the transmission port 102 is represented by a first matching circuit 105, and the transmission line from the first connection unit 104 to the reception port 103 is represented by a second matching circuit 106. In the transmission-side high-frequency switch 110, a third matching circuit 112 is connected in parallel with the first matching circuit 105 from the second connection unit 111, and the first switch 113 is connected to the third matching circuit 112. The reception-side high-frequency switch 120 has a fourth matching circuit 122 connected in parallel with the second matching circuit 106 from the third connection unit 121, and the second switch 123 is connected to the fourth matching circuit 122.

  The first matching circuit 105, the second matching circuit 106, the third matching circuit 112, and the fourth matching circuit 122 are composed of distributed constant circuits such as microstrip lines, the characteristic impedance is Z0, and the line length is 1 /. It is formed to have 4 wavelengths. By combining the third matching circuit 112 and the first switch 113 having such characteristics, and the fourth matching circuit 122 and the second switch 123, the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 are short-circuited or opened. It is possible to switch to the state. When the transmission-side high-frequency switch 110 or the reception-side high-frequency switch 120 is short-circuited, the switch is closed, and when it is opened, the switch is open.

  As the first switch 113 and the second switch 123 having the above characteristics, PIN diodes can be used. The PIN diode has a residual inductance Lf when turned on, and has a capacitance Cj when turned off. When the PIN diode is turned on, the switch can be closed, and when it can be turned off, the switch can be opened. Hereinafter, PIN diodes are used for the first switch 113 and the second switch 123, and the first switch 113 and the second switch 123 will be described as the first PIN diode 113 and the second PIN diode 123.

  A state when a positive power source or a negative power source is supplied to the PIN diode will be described with reference to an equivalent circuit diagram shown in FIG. In general, when a forward bias is supplied to the diode D shown in FIG. 3A, it becomes equivalent to the resistor Rf as shown in FIG. 3B, and when a reverse bias is supplied, as shown in FIG. 3C. This is an equivalent circuit in which the resistor Rr and the capacitance Cj are connected in series.

  Conventionally, the PIN diode D used in the high-frequency switch is in a low impedance state with respect to the high-frequency signal as the bias current is increased when the forward bias is supplied as shown in FIG. Further, when the reverse bias is supplied as shown in FIG. 3C, the bias current becomes substantially constant without depending on the bias voltage, and the capacitance Cj of the PIN diode D is set to about 0.5 pF or more and about 5 pF or less so that the high frequency signal On the other hand, the PIN diode D is in a high impedance state (mainly reactance component).

  Since the value of the resistance Rf of the equivalent circuit at the time of forward bias increases inversely with decreasing bias current, the insertion loss in the ON state in which the forward bias is supplied and the OFF in which the reverse bias is supplied The isolation in the state can be determined by the resistance Rf when the PIN diode is on and the capacitance Cj when it is off.

  However, a conventional high frequency switch using a PIN diode cannot cope with a quasi-millimeter wave band of 20 GHz or more. In the present embodiment, the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 are configured using the third matching circuit 112 and the first PIN diode 113, and the fourth matching circuit 122 and the second PIN diode 114, so that the quasi-millimeter wave It is possible to provide a high-frequency switch circuit 100 that can cope with the above and can realize a wide frequency band.

In the high-frequency switch circuit 100 of this embodiment, as the PIN diodes 113 and 123, it is necessary to use PIN diodes having a small on-series resistance Rf (mainly a reactance component due to the residual inductance Lf) and a small off-state capacitance Cj. is there. The resistance Rf and the capacitance Cj are expressed by the following formula Rf <5 [Ω]
Cj <0.05 [pF]
It is preferable to use a PIN diode that satisfies the above requirements and is compatible with high-frequency signals.

  The first PIN diode 113 has a cathode terminal connected to the third matching circuit 112 on the transmission port 102 side, and an anode terminal connected to a power supply circuit for supplying a forward bias or a reverse bias. Similarly, the second PIN diode 123 has a cathode terminal connected to the fourth matching circuit 122 on the reception port 103 side and an anode terminal connected to the power supply circuit. The on / off operations of the first PIN diode 113 and the second PIN diode 123 are turned on when positive power is supplied to the anode terminal side, and turned off when negative power is supplied.

  In the high-frequency switch circuit 100 shown in FIG. 1, a fifth matching circuit 107 having a characteristic impedance ZM is connected to the first connection unit 104 in addition to the above configuration. The fifth matching circuit 107 shorts the DC component when the first PIN diode 113 or the second PIN diode 123 is on. Further, it is configured to suppress the second harmonic wave of the transmission signal that is mixedly input to the transmission signal from the transmission port 102. That is, the line length of the fifth matching circuit 107 is formed to be ¼ of the wavelength λ ′ of the second harmonic. The fifth matching circuit 107 does not affect the signal system circuits of the transmission system and the reception system.

  FIG. 4 shows a circuit diagram of the high-frequency switch circuit 100 of the present embodiment in which the circuit configurations of the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 are detailed. In order to allow the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 to support, for example, a quasi-millimeter wave band of 25 GHz band, as the first PIN diode 113 and the second PIN diode 123, the on-state series resistance Rf is 5Ω It is necessary to use a low low resistance and low capacitance with an off-state capacitance Cj lower than 0.05 pF.

  In the present embodiment, in order to make the anode terminal side of the first PIN diode 113 and the second PIN diode 123 grounded with respect to the high frequency signal, the first radial stub 114 and the second radial stub 124 are provided on the respective anode terminal sides. Connected. A radial stub is one in which a predetermined high-frequency characteristic is obtained with respect to a broadband frequency. By making the anode terminal side grounded with respect to the high frequency signal by the radial stub, the power supply circuit connected to the anode terminal side is prevented from affecting the signal system circuits of the transmission system and the reception system.

  Between the first PIN diode 113 and the first radial stub 114, and between the second PIN diode 123 and the second radial stub 124, a first bias port 115 for supplying a positive power source and a negative power source, and a second A bias port 125 is connected. A predetermined power supply circuit is connected to each bias port.

  Since the radial stub can contribute to a wider frequency band, the power supply connected to the first bias port 115 and the second bias port 125 can be achieved by connecting the first radial stub 114 and the second radial stub 124 to the anode terminal side. It is possible to prevent the circuit from affecting the signal system circuit of the transmission system and the reception system in a wide band. As a result, low insertion loss and wide bandwidth can be realized in the quasi-millimeter wave band, and at the same time, the power supply circuit can ensure high isolation from high-frequency signals and can eliminate parasitic capacitance that affects frequency characteristics. it can.

  In the circuit configuration shown in FIG. 4, in order to optimize the characteristics of the high-frequency switch circuit 100, the characteristic impedances of the third matching circuit 112, the fourth matching circuit 122, the first radial stub 114, and the second radial stub 124 are Zc is different from the characteristic impedance Z0 of the first matching circuit 105 and the second matching circuit 106.

  Next, the state of the high-frequency switch circuit 100 at the time of transmission in which a high-frequency signal is input from the transmission port 102 and transmitted to the antenna port 101, and the high-frequency switch at the time of transmission in which the high-frequency signal input from the antenna port 101 is transmitted to the reception port 103 The state of the circuit 100 will be described with reference to FIG. FIG. 5 is an equivalent circuit diagram showing the state of the high-frequency switch circuit 100 during transmission and reception.

  During transmission, positive power is supplied to the first bias port 115 while negative power is supplied to the second bias port 125. As a result, the first PIN diode 113 is turned on by the forward bias supply, and the second PIN diode 123 is turned off by the reverse bias supply. At this time, as shown in the equivalent circuit of FIG. 5A, the ON series resistance Rf1 of the first PIN diode 113 is in a low impedance state, and the short-circuit state is caused by the third matching circuit 112 having the transmission line length λ / 4. Produced. As a result, the transmission-side high-frequency switch 110 is turned on, and a high-frequency signal can be transmitted from the transmission port 102 to the antenna port 101.

  On the other hand, the off-state equivalent circuit capacitor Cj2 showing the second PIN diode 123 enters a high impedance state, and an open state is created by the fourth matching circuit 122 having the transmission line length λ / 4. As a result, the reception-side high-frequency switch 120 is turned off and transmission of a high-frequency signal from the antenna port 101 to the reception port 103 is blocked.

  During reception, negative power is supplied to the first bias port 115 while positive power is supplied to the second bias port 125. As a result, the first PIN diode 113 is turned off by the reverse bias supply, and the second PIN diode 123 is turned on by the forward bias supply. At this time, as shown in FIG. 5B, the capacitor Cj1 when the first PIN diode 113 is OFF is in a high impedance state, and the third matching circuit 112 creates an open state. On the other hand, the series resistance Rf <b> 2 when the second PIN diode 113 is on becomes a low impedance state, and a short state is created by the fourth matching circuit 122. As a result, the transmission-side high-frequency switch 110 is turned off, while the reception-side high-frequency switch 120 is turned on.

  Next, a power supply circuit connected to the first bias port 115 and the second bias port 125 will be described with reference to the circuit diagram of FIG. The power supply circuit 130 shown in the figure includes MOS type FETs 131 and 132 and protective resistors 133 and 134, and further includes a + V port 135 connected to a positive power source, a −V port 136 connected to a negative power source, and a control signal. An input bias control port 137 is provided. The power supplied from the positive power supply connected to the + V port 135 or the negative power supply connected to the −V port 136 is supplied to the first bias port 115 or the second bias port 125 via the protective resistor 133 or 134. Is done. The protective resistors 133 and 134 protect the MOS FETs 131 and 132 and determine the current value supplied to the first PIN diode 113 and the second PIN diode 123.

  The MOS type FET 131 is a P-channel type MOSFET, and has a source terminal connected to the + V port 135 and a drain terminal connected to the protective resistor 133. The MOS FET 132 is an N-channel MOSFET, and has a source terminal connected to the −V port 136 and a drain terminal connected to the protective resistor 134. The on / off control of the MOS FETs 131 and 132 is performed by supplying a High or Low control signal input from the bias control port 137 to each gate.

  When a positive power is supplied from the power supply circuit 130 to the first bias port 115 or the second bias port 125, a high control signal is supplied from the bias control port 137 to the MOS type FETs 131 and 132. As a result, the P-channel MOS FET 131 is turned on between the source and the drain, and positive power is supplied from the + V port 135 to the first bias port 115 or the second bias port 125 via the protective resistor 133. On the other hand, the N-channel MOS FET 131 is turned off between the source and the drain.

  On the other hand, when a negative power supply is supplied from the power supply circuit 130 to the first bias port 115 or the second bias port 125, a low control signal is supplied from the bias control port 137 to the MOS FETs 131 and 132. Thereby, the P-channel MOS FET 131 is turned off between the source and the drain, whereas the N-channel MOS FET 131 is turned on between the source and the drain. Then, a negative power source is supplied from the −V port 136 to the first bias port 115 or the second bias port 125 via the protective resistor 134.

  A general-purpose digital IC can be used to supply a high or low control signal to the MOS FETs 131 and 132. A general-purpose digital IC is connected to the bias control port 137, and a high-level or low-level control signal is generated and output by the general-purpose digital IC at a predetermined timing. As a result, a positive power supply or a negative power supply is supplied from the power supply circuit 130 to operate the high-frequency switch circuit 100, and the antenna port 101 can transmit signals to either the transmission port 102 or the reception port 103.

  The operation of the power supply circuit 130 described above is shown in FIG. FIG. 7 shows changes in the on / off states of the MOS FETs 131 and 132 and the power output from the power supply circuit 130 in accordance with the control signal supplied from the bias control port 137. When the control signal is High, the MOS FET 131 is turned on, the MOS FET 132 is turned off, and positive power is supplied from the power supply circuit 130. When the control signal is Low, the MOS type FET 131 is turned off, the MOS type FET 132 is turned on, and negative power is supplied from the power supply circuit 130.

FIG. 8 shows a circuit diagram of the overall configuration in which the power supply circuit 130 is connected to the high-frequency switch circuit 100 of the present embodiment. Two power supply circuits 130 are connected to each of the first bias port 115 and the second bias port 125. Here, when the bias control port of the power supply circuit 130 connected to the first bias port 115 is 137a and the bias control port of the power supply circuit 130 connected to the second bias port 125 is 137b, the bias control port How the state of the high-frequency switch circuit 100 changes by the control signals supplied to 137a and 137b will be described with reference to Table 1 and FIG.

  As an example of the control signal, in Table 1 and FIG. 9, Low is supplied to both bias control ports 137a and 137b in Case 1. At this time, both the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 are turned off, and both the transmission port 102 and the reception port 103 are disconnected from the antenna port 101. In Case 2, High is supplied to the bias control port 137a, and Low is supplied to the bias control port 137b. At this time, the transmission-side high-frequency switch 110 is turned on and the reception-side high-frequency switch 120 is turned off, enabling signal transmission from the transmission port 102 to the antenna port 101, while blocking between the reception port 103 and the antenna port 101.

  In Case 3, Low is supplied to the bias control port 137a, and High is supplied to the bias control port 137b. At this time, the transmission-side high-frequency switch 110 is turned off and the reception-side high-frequency switch 120 is turned on, so that signal transmission from the antenna port 101 to the reception port 103 is possible, while the transmission port 102 and the antenna port 101 are disconnected. If High is supplied to both of the bias control ports 137a and 137b, the antenna port 101 can transmit signals to both the transmission port 102 and the reception port 103, but is connected to the bias control ports 137a and 137b. In the general-purpose digital IC, a logic circuit is controlled so that High is not supplied to both of the bias control ports 137a and 137b.

  The insertion loss characteristic (S21 characteristic) of the high frequency switch circuit 100 is shown in FIG. In this figure, the insertion loss from the transmission port 102 to the antenna port 101 when the transmission-side high-frequency switch 110 is turned on / off is shown in (a), and from the antenna port 101 when the reception-side high-frequency switch 120 is turned on / off. The insertion loss to the reception port 103 is shown in (b). It can be seen that both the transmission-side high-frequency switch 110 and the reception-side high-frequency switch 120 have a small insertion loss when the switch is on (the absolute value of S21 is small) and a large insertion loss when the switch is off (the absolute value of S21 is large). In each switch, a short state is created by the third matching circuit / fourth matching circuit 122 when turned on, whereas an open state is created by the third matching circuit / fourth matching circuit 122 when turned off to obtain high isolation. It is done.

  In the high-frequency switch circuit 100 of the present embodiment, the switch switching as shown in FIG. 10 can be performed at a high speed with a switching time of 1 μs or less. Moreover, as isolation at the time of OFF, 20 dB or more is realizable with the frequency of 25 GHz. As described above, the high-frequency switch circuit 100 according to the present embodiment realizes a high-performance switch operation for a quasi-millimeter wave band high-frequency signal.

  As described above, according to the present invention, a switch having a low resistance when closed and a low capacitance when opened and a predetermined distributed constant circuit are used, so that a high frequency band of at least 25 GHz band is obtained. Thus, it is possible to provide a high-frequency switch circuit capable of obtaining high performance characteristics. Further, by using a PIN diode as a switch having the above characteristics, it is possible to simplify the circuit configuration and the circuit scale, and to realize low power consumption and low cost. Further, by resin-molding the PIN diode used for the switch, the PIN diode can be handled easily and high reliability can be ensured.

  Note that the description in the present embodiment shows an example of the high-frequency switch circuit according to the present invention, and the present invention is not limited to this. The detailed configuration and detailed operation of the high-frequency switch circuit in the present embodiment can be changed as appropriate without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 10 Antenna 11 Transmission system circuit 12 Reception system circuit 100 High frequency switch circuit 101 Antenna port 102 Transmission port 103 Reception port 104 1st connection part 105 1st matching circuit 106 2nd matching circuit 107 5th matching circuit 110 Transmission side high frequency switch 111 1st 2 connection part 112 3rd matching circuit 113 1st PIN diode (1st switch)
114 First radial stub 115 First bias port 120 Reception-side high-frequency switch 121 Third connection 122 Fourth matching circuit 123 Second PIN diode (second switch)
124 Second radial stub 125 Second bias port 130 Power supply circuit 131, 132 MOS type FET
133, 134 Protection resistance 135 + V port 136 −V port 137 Bias control port

Claims (7)

An antenna port, a transmission port, and a reception port are connected by a first connection unit, and a predetermined high-frequency signal is transmitted from the transmission port to the antenna port, or the high-frequency signal is transmitted from the antenna port to the reception port. Or a high-frequency switch circuit that switches to either one of
A first matching circuit connected between the transmission port and the first connection;
A second matching circuit connected between the reception port and the first connection unit;
A third matching circuit having one end connected to a second connection between the transmission port and the first matching circuit;
A first switch connected to the other end of the third matching circuit to switch the third matching circuit to short circuit or open;
A fourth matching circuit having one end connected to a third connection between the reception port and the second matching circuit;
A second switch connected to the other end of the fourth matching circuit to switch the fourth matching circuit to short circuit or open,
When transmitting the high frequency signal from the transmission port to the antenna port, the first switch is closed to short the third matching circuit, while the second switch is open to open the fourth matching circuit. ,
When transmitting a high-frequency signal from the antenna port to the receiving port, the first switch is opened and the third matching circuit is opened, while the second switch is closed and the fourth matching circuit is short-circuited. A high-frequency switch circuit characterized by that. The high-frequency switch circuit according to claim 1, further comprising a fifth matching circuit having one end connected to the first connection portion and the other end grounded. Each of the first switch and the second switch has a PIN diode in which a resistance value in a forward bias is equal to or less than a predetermined reference resistance value and a capacitance in a reverse bias is equal to or less than a predetermined reference capacitance value; A power supply circuit for supplying power for making the PIN diode forward-biased or reverse-biased,
An anode terminal of the PIN diode is connected to the power supply circuit and a cathode terminal is connected to the other end of the third matching circuit or the fourth matching circuit;
3. The high frequency switch circuit according to claim 1, wherein the high frequency switching circuit is closed when the PIN diode is forward biased and is opened when the PIN diode is reverse biased. 4. The high frequency device according to claim 1, wherein a radial stub corresponding to a predetermined broadband frequency is connected to the anode terminal of the PIN diode in parallel with the power supply circuit. Switch circuit. The power supply circuit is
A P-channel MOS type FET whose source terminal is connected to a predetermined positive power source;
An N-channel MOS FET whose source terminal is connected to a predetermined negative power source;
A protective resistor connected to the drain terminal of the P-channel MOS FET;
Another protective resistor connected to the drain terminal of the N-channel MOS FET,
When a High signal is input to the gate terminals of the P-channel MOS FET and the N-channel MOS FET, the P-channel MOS FET is turned on, while the N-channel MOS is turned on. Type FET is turned off and the positive power supply is output via the protective resistor,
When a Low signal is input to the respective gate terminals of the P-channel MOS FET and the N-channel MOS FET, the P-channel MOS FET is turned off while the N-channel MOS is turned off. 4. The high frequency switch circuit according to claim 3, wherein the type FET is turned on and the negative power supply is output via the another protective resistor. The high-frequency switch circuit according to claim 1, wherein the high-frequency signal is a quasi-millimeter wave band signal. The high-frequency switch circuit according to claim 2, wherein a line length of the fifth matching circuit is substantially equal to a quarter wavelength of a second harmonic of the high-frequency signal.

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