JP2011210968A - Multilayer circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer circuit board having high interlayer adhesive properties of anisotropic conductive films and high reliability of a semiconductor package obtained by using the circuit board.SOLUTION: A multilayer circuit board 10, which includes two or more anisotropic conductive films 1 is a component formed in a manner, wherein the anisotropic conductive films penetrate an insulating substrate 2, consisting of anode oxidation coating of an aluminum substrate in the thickness direction with a plurality of conduction paths 3 consisting of conductive members being insulated from each other; and an end of each of the conduction paths projects on one surface of the insulating substrate while the other end of each of the conduction paths projects on the other surface of the insulating substrate. An insulating layer 11, which is formed by using a polymer material having a reactive functional group, is provided on a part of a contact surface between the respective anisotropic conductive films, and the surfaces of the anisotropic conductive films are surface-treated by a compound having a functional group reactive with the reactive functional group.

Description

  The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board that can be used for an interposer of a semiconductor package.

In recent years, as electronic components such as semiconductor elements are further integrated, the size of electrodes (terminals) has become smaller, the number of electrodes (terminals) has increased, and the distance between terminals has also become narrower. Yes.
Therefore, a chip stack type package in which semiconductor chips are three-dimensionally stacked has also been developed for semiconductor packages.
In addition, as a method of manufacturing such a chip stacked type semiconductor package, for example, a method in which a lower semiconductor element is flip-chip connected to a wiring board and an upper semiconductor element is connected by wire bonding; an interposer is used. A method of stacking semiconductor elements and mounting them by electrically connecting the interposer and the semiconductor elements is known.

The applicant of the present invention, as an anisotropic conductive member that can be used as an electrical contact between the interposer and the semiconductor element, states that “in the insulating base material, a plurality of conductive paths made of conductive members are mutually connected. The insulating base material is penetrated in the thickness direction in an insulated state, one end of each conductive path is exposed on one surface of the insulating base material, and the other end of each conductive path is the insulating property. An anisotropic conductive member provided in an exposed state on the other surface of the substrate, wherein the density of the conduction paths is 2 million pieces / mm ² or more, and the insulating substrate is a regularly arranged micro An anisotropic conductive member that is a structure made of an anodized film of an aluminum substrate having pores "is provided (for example, see Patent Documents 1 to 5).

JP 2008-270157 A JP 2008-270158 A JP 2009-140866 A JP 2009-140869 A JP 2009-164095 A

  However, the present inventor examined the anisotropic conductive members described in Patent Documents 1 to 5, and found that the anisotropic conductive member is used as an electrical contact between the above-described interposer and the semiconductor element or the interposer itself. (Hereinafter, in the present invention, it is referred to as “anisotropic conductive film”.) It has been clarified that the adhesion between the layers is low and there is room for improvement in the reliability of the semiconductor package.

  Accordingly, an object of the present invention is to provide a multilayer wiring board having high adhesion between layers of anisotropic conductive films and high reliability of the obtained semiconductor package.

As a result of diligent research to achieve the above object, the present inventor has provided an insulating layer having a specific reactive functional group on a part of the contact surface between specific anisotropic conductive films, and laminated it. It was found that a highly reliable semiconductor package with high adhesion between conductive film layers was obtained, and the present invention was completed.
That is, the present invention provides the following (1) to (7).

(1) A multilayer wiring board in which two or more anisotropic conductive films are laminated,
The anisotropic conductive film penetrates the insulating base material in the thickness direction in a state where a plurality of conductive paths made of a conductive member are insulated from each other in an insulating base material made of an anodized film of an aluminum substrate, And one end of each of the conductive paths protrudes on one surface of the insulating base material, the other end of the conductive path is a member provided in a state of protruding on the other surface of the insulating base material,
Having an insulating layer in part of the contact surface between the anisotropic conductive films,
The insulating layer is formed using a polymer material having a reactive functional group,
The multilayer wiring board by which the surface of the said anisotropically conductive film is surface-treated with the compound which has a functional group which can react with the said reactive functional group.

  (2) The thickness of the insulating base is 1 to 1000 μm, the diameter of the conduction path is 1 μm or less, and the height of the portion protruding from both surfaces of the insulating base of the conduction path is 10 nm or more. The multilayer wiring board according to (1) above.

  (3) The multilayer wiring board according to (1) or (2), wherein the insulating layer has a thickness of 0.1 to 100 μm.

  (4) The reactive functional group of the polymer material is selected from the group consisting of acrylate group, methacrylate group, vinyl group, allyl group, epoxy group, amino group, hydroxy group, carboxy group, isocyanate group and acid anhydride group. The multilayer wiring board according to any one of (1) to (3) above.

  (5) The multilayer wiring board according to any one of (1) to (4), wherein the polymer material is an epoxy resin.

  (6) The multilayer wiring board according to any one of (1) to (5), wherein the compound for surface-treating the surface of the anisotropic conductive film is a silane coupling agent having an amino group.

  (7) The multilayer wiring board according to any one of (1) to (6), which is used as an interposer for a semiconductor package.

As described below, according to the present invention, it is possible to provide a multilayer wiring board having high adhesion between layers of anisotropic conductive films and high reliability of a semiconductor package obtained.
In addition, since the multilayer wiring board of the present invention has an anisotropic conductive film filled with metal inside the micropores of the anodized film (alumina), the linear expansion coefficient (CTE) is set to a resin substrate (for example, polyimide). This is very useful because it can be closer to a silicon wafer by an order of magnitude than a resin or the like, and as a result, it is compatible with the bare chip side of the low dielectric constant film by thermal stress.
Furthermore, in the multilayer wiring board of the present invention, since the conductive path of the anisotropic conductive film is formed only in the thickness direction of the film, the electrodes are placed at the same position on the front and back sides without via formation by mechanical processing or laser processing. It is very useful because it can function as a micro via simply by forming.

FIG. 1 is a simplified diagram showing an example of a preferred embodiment of the multilayer wiring board of the present invention. FIG. 2 is a simplified diagram showing an example of a preferred embodiment of the anisotropic conductive film. FIG. 3 is an explanatory diagram of a method for calculating the degree of ordering of pores. FIG. 4 is a conceptual diagram illustrating an example of usage of the multilayer wiring board of the present invention. FIG. 5 is a conceptual diagram for explaining a production procedure of the multilayer wiring board produced in the example.

Below, the multilayer wiring board of the present invention, its manufacturing method, and usage mode will be described in detail.
The multilayer wiring board of the present invention is a multilayer wiring board in which two or more anisotropic conductive films are laminated with an insulating layer, and the anisotropic conductive film is an insulating base material made of an anodized film of an aluminum substrate. In addition, a plurality of conductive paths made of conductive members are penetrated in the thickness direction while being insulated from each other, and one end of each of the conductive paths protrudes on one surface of the insulating base. , A member provided in a state where the other end of each conduction path protrudes on the other surface of the insulating base material, and has an insulating layer on a part of the contact surface between the anisotropic conductive films, A multilayer wiring board in which a layer is formed using a polymer material having a reactive functional group, and the surface of the anisotropic conductive film is surface-treated with a compound having a functional group capable of reacting with the reactive functional group .
Next, the multilayer wiring board of the present invention will be described with reference to FIGS.

FIG. 1 is a simplified diagram showing an example of a preferred embodiment of the multilayer wiring board of the present invention.
The multilayer wiring board 10 of the present invention has a structure in which two or more anisotropic conductive films 1 are laminated by providing an insulating layer 11 on a part of a contact surface between layers.
In the present invention, the number of stacked anisotropic conductive films 1 is not particularly limited, and can be appropriately selected according to the number of output electrodes of a semiconductor element (for example, a microprocessor).

[Anisotropic conductive film]
FIG. 2 is a simplified diagram showing an example of a preferred embodiment of the anisotropic conductive film included in the multilayer wiring board of the present invention, FIG. 2 (A) is a front view, and FIG. 2 (B) is FIG. 1 (A). It is sectional drawing seen from the cut surface line Ib-Ib.
The anisotropic conductive film 1 includes a plurality of conductive paths 3 composed of an insulating base material 2 and a conductive member.
The conduction path 3 is provided so as to penetrate the insulating base material 2 in a state where the length in the axial direction is longer than the length (thickness) in the thickness direction Z of the insulating base material 2 and is insulated from each other.
In addition, in the conductive path 3, one end of each conductive path 3 protrudes from one surface 2 a of the insulating base 2, and the other end of each conductive path 3 protrudes from the other surface 2 b of the insulating base 2. Provided. That is, both ends of each conduction path 3 have projections 4a and 4b that project from the main surfaces 2a and 2b of the insulating base.
Further, in this conduction path 3, at least a portion in the insulating base material 2 (hereinafter also referred to as “in-base conduction portion 5”) is substantially parallel to the thickness direction Z of the insulating base material 2 (FIG. 2). Are preferably provided so as to be parallel). Specifically, the length (length / thickness) of the center line of the conductive portion 5 in the base material with respect to the thickness of the insulating base material 2 is preferably 1.0 to 1.2, and preferably 1.0 to 1.2. More preferably, it is 1.05.
Next, materials, dimensions, formation methods, and the like will be described for each of the insulating base material and the conduction path.

<Insulating base material>
The said insulating base material which comprises the said anisotropic conductive film is a structure which consists of an anodic oxide film of the aluminum substrate which has a micropore.
In the present invention, the degree of ordering defined by the following formula (i) for the micropore is preferably 50% or more from the viewpoint of ensuring the insulation of the conductive portion in the planar direction more reliably, and 70% More preferably, it is more preferably 80% or more.

  Ordering degree (%) = B / A × 100 (i)

  In the above formula (i), A represents the total number of micropores in the measurement range. B is centered on the center of gravity of one micropore, and when a circle with the shortest radius inscribed in the edge of another micropore is drawn, the center of gravity of the micropore other than the one micropore is placed inside the circle. This represents the number in the measurement range of the one micropore to be included.

FIG. 3 is an explanatory diagram of a method for calculating the degree of ordering of pores. The above formula (1) will be described more specifically with reference to FIG.
The micropore 101 shown in FIG. 3A is drawn with a circle 103 (inscribed in the micropore 102) having the shortest radius centered on the center of gravity of the micropore 101 and inscribed in the edge of another micropore. In this case, the center of gravity of the micropores other than the micropores 101 is included in the circle 3. Therefore, the micropore 101 is included in B.
The micropore 104 shown in FIG. 3B draws a circle 106 having the shortest radius (inscribed in the micropore 105) that is centered on the center of gravity of the micropore 104 and inscribed in the edge of another micropore. In such a case, the center of gravity of the micropores other than the micropores 104 is included inside the circle 106. Therefore, the micropore 104 is not included in B.
Further, the micropore 107 shown in FIG. 3B is centered on the center of gravity of the micropore 107 and has the shortest radius 109 inscribed in the edge of the other micropore (inscribed in the micropore 108). Is drawn, the circle 109 includes seven centroids of micropores other than the micropore 107. Therefore, the micropore 107 is not included in B.

  In addition, from the viewpoint of making the conduction path described later have a straight tube structure, the micropores do not have a branched structure, that is, the number A of micropores per unit area of one surface of the anodized film and the unit of another surface The ratio of the number of micropores B per area is preferably A / B = 0.90 to 1.10, more preferably A / B = 0.95 to 1.05, and A / B = It is particularly preferably 0.98 to 1.02.

Further, alumina, which is a material of an anodized aluminum film, has an electrical resistivity of 10 ¹⁴ Ω · cm, as in the case of an insulating base material (for example, a thermoplastic elastomer) that constitutes a conventionally known anisotropic conductive film. Degree.

  In the present invention, the thickness of the insulating substrate (the portion represented by reference numeral 6 in FIG. 2B) is preferably 1-1000 μm, more preferably 5-500 μm. More preferably, it is -300 micrometers. When the thickness of the insulating substrate is within this range, the handleability of the insulating substrate is improved.

  Moreover, in this invention, it is preferable that the width | variety between the said conduction paths in the said insulating base material (part represented by the code | symbol 7 in FIG. 2 (B)) is 10 nm or more, and is 20-200 nm. Is more preferable. When the width between the conductive paths in the insulating substrate is within this range, the insulating substrate sufficiently functions as an insulating partition.

  In the present invention, the insulating base material can be produced, for example, by anodizing an aluminum substrate and penetrating micropores generated by the anodization.

<Conduction path>
The conduction path constituting the anisotropic conductive film is made of a conductive member.
The conductive member is not particularly limited as long as the electrical resistivity is 10 ³ Ω · cm or less, and specific examples thereof include gold (Au), silver (Ag), copper (Cu), aluminum (Al ), Magnesium (Mg), nickel (Ni), indium-doped tin oxide (ITO), and the like.
Among these, from the viewpoint of electrical conductivity, copper, gold, aluminum, and nickel are preferable, and copper and gold are more preferable.
Further, from the viewpoint of cost, it is more preferable that only the surfaces of the conductive path exposed from both surfaces of the insulating substrate or the surfaces of the protruding surfaces (hereinafter also referred to as “end faces”) are formed of gold.

In the present invention, the conduction path is columnar, and the diameter (portion represented by reference numeral 8 in FIG. 2B) is preferably 1 μm or less, more preferably 5 to 500 nm. It is more preferably 20 to 400 nm, particularly preferably 40 to 200 nm, and most preferably 50 to 100 nm. When the diameter of the conduction path is within this range, a sufficient response can be obtained when an electric signal is passed, so that the reliability of the semiconductor package using the multilayer wiring board of the present invention can be further increased.
In addition, as described above, the length (length / thickness) of the center line of the conduction path (limited to the portion in the insulating base material; hereinafter the same applies in this paragraph) with respect to the thickness of the insulating base material. Is preferably 1.0 to 1.2, more preferably 1.0 to 1.05. When the length of the center line of the conduction path with respect to the thickness of the insulating substrate is within this range, it can be evaluated that the conduction path has a straight pipe structure, and a one-to-one response is obtained when an electric signal is passed. Since it can be obtained reliably, the reliability of the semiconductor package using the multilayer wiring board of the present invention can be further increased.

  In the present invention, the portion of the conductive path (both ends) protruding from both surfaces of the insulating base (the portion represented by reference numerals 4a and 4b in FIG. 2B. Hereinafter, also referred to as "bump". Is preferably 10 nm or more, and more preferably 100 nm to 10 μm. In particular, the bump height is preferably 1 to 10 μm on the surface where the insulating layer described later is interposed (contact surface between the anisotropic conductive films). If the bump height is within this range, the adhesion between the layers of the anisotropic conductive film becomes higher, and the reliability of the semiconductor package using the multilayer wiring board of the present invention can be further increased.

In the present invention, the conductive paths exist in a state of being insulated from each other by the insulating base material, and the density is preferably ² million pieces / mm ² or more, and 10 million pieces / mm ^2. More preferably, it is more preferably 50 million pieces / mm ² or more, and particularly preferably 100 million pieces / mm ² or more. When the density of the conductive paths is within this range, a one-to-one response can be obtained with certainty when an electric signal is passed, so that the reliability of the semiconductor package using the multilayer wiring board of the present invention is further increased. be able to.

  In the present invention, the distance between the centers of adjacent conductive paths (the portion represented by reference numeral 9 in FIG. 2; hereinafter also referred to as “pitch”) is preferably 20 to 500 nm, and preferably 40 to 200 nm. Is more preferable, and it is still more preferable that it is 50-140 nm. When the pitch is within this range, it is easy to balance the conduction path diameter and the width between the conduction paths (insulating partition wall thickness).

  In the present invention, the conduction path can be manufactured by, for example, filling a metal which is a conductive member into a hole formed by a micropore formed in the insulating base material.

In the present invention, the anisotropic conductive film having such an insulating substrate and a conduction path is, for example, a production method described in paragraph [0040] of Patent Document 2 (Japanese Patent Laid-Open No. 2008-270158), That is, at least
An anodizing process for anodizing an aluminum substrate;
After the anodizing treatment step, a penetrating treatment step for penetrating holes by the micropores generated by the anodizing to obtain the insulating substrate, and
A method of filling a metal which is a conductive member into the inside of the penetrated hole in the obtained insulating base material after the penetrating treatment step to obtain the anisotropic conductive film; Etc. can be manufactured.
In this invention, about the aluminum substrate used for the manufacturing method of the said anisotropically conductive film, and each process process performed to an aluminum substrate, the thing similar to what was described in the [0041]-[0141] paragraph of the gazette is mentioned. Can be adopted.

  In the present invention, the anisotropic conductive film has a surface having a functional group capable of reacting with a reactive functional group of an insulating layer (polymer material) described later (hereinafter referred to as “surface treatment compound”). Surface treatment).

Here, the surface treatment compound is excellent in the adsorptivity with the surface of the anisotropic conductive film (particularly, the insulating base material), and the adhesion between the layers of the anisotropic conductive film becomes higher. A silane coupling agent having a functional group capable of reacting with a reactive functional group included in an insulating layer (polymer material) described later is preferable. Specific examples thereof include 3-aminopropyltrimethoxysilane, 3-amino Propyltriethoxysilane, 3- (aminoethylamino) propyltrimethoxysilane, 3- (aminoethylamino) propyltriethoxysilane, 3- (aminoethylaminoethylamino) propyltrimethoxysilane, 3- (aminoethylaminoethyl) Amino) propyltriethoxysilane, 3-aminopropylsilsesquioxane, bis- (3-trimethoxysilylop) Pyr) amine, N-benzyl-N-aminoethyl-3-aminopropyltrimethoxysilane hydrochloride, N-phenyl-3-aminopropyltrimethoxysilane, N- (2-aminoethyl) -3-aminopropyltrimethoxy Silane, 3- (triethoxysilylpropyl) -diethylenetriamine, poly (ethyleneimine) trimethoxysilane; γ-isocyanatopropyltriethoxysilane, 3-acryloyloxypropyltrimethoxysilane, 3-methacryloxypropyltrimethoxysilane, vinyltri Vinylsilanes such as chlorosilane, vinyltris (β-methoxyethoxy) silane, vinyltriethoxysilane, vinyltrimethoxysilane; γ-methacryloxypropyltrimethoxysilane, γ-methacryloxypropylmeth Acrylic silanes such as tildimethoxysilane; epoxy silanes such as β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane, γ-glycidoxypropyltrimethoxysilane, γ-glycidoxypropylmethyldiethoxysilane; Can be mentioned.
Among these, since an insulating layer to be described later is often formed of an epoxy resin, it is preferably an aminosilane (a silane coupling agent having an amino group) that is excellent in reactivity with an epoxy group.

  Further, the surface treatment method of the anisotropic conductive film using the surface treatment compound is not particularly limited. For example, the anisotropic treatment is performed in a solution in which the silane coupling agent is dissolved in an organic solvent (for example, isopropyl alcohol, methyl ethyl ketone, etc.). The method of immersing an anisotropic conductive film, the method of spray-coating this solution on an anisotropic conductive film, etc. are mentioned.

[Insulating layer]
On the other hand, the insulating layer included in the multilayer wiring board of the present invention is formed using a polymer material having a reactive functional group.
Here, specific examples of the reactive functional group include an acrylate group, a methacrylate group, a vinyl group, an allyl group, an epoxy group, an amino group, a hydroxy group, a carboxy group, an isocyanate group, and an acid anhydride group. These may be included alone or in combination of two or more.

In the present invention, the polymer material is not particularly limited as long as it has a reactive functional group, and may be any of a thermosetting resin, a thermoplastic resin, an elastomer resin, and rubber.
Specific examples of the polymer material include, for example, epoxy resins; polyimide resins; silicone resins; resins containing a siloxane bond having a skeleton of polydimethylsiloxane having high heat resistance; silicone rubbers; fluororubbers; It is done.
The polymer material is preferably a resin material that is compatible with the bare chip side of the low dielectric constant film by thermal stress, and examples thereof include porous resins and resins to which hollow silica particles are added. It is done.
Further, the polymer material is preferably a resin material having photosensitivity because the formation of wiring and insulation treatment shown in the usage mode described later can be performed simultaneously, and a photosensitive component is added together with the polymer material. An insulating layer may be formed.

  In the present invention, the polymer material includes, for example, a resin containing an epoxy group-containing component and a phenolic hydroxyl group-containing constituent unit as an alkali-soluble component; unsaturated carboxylic acid, unsaturated carboxylic acid anhydride, oxiranyl Copolymer having unsaturated group, polymerizable unsaturated compound having oxetanyl group, etc .; resin composition containing 1,2-quinonediazide compound; phenolic resin as alkali-soluble component as photosensitive composition A resin containing a hydroxyl group-containing structural unit can be used.

As the polyimide resin, commercially available products such as polyimide film (trade name: Kapton) manufactured by Toray DuPont can be used, and a film obtained by processing these with a laser or the like so as to have a through hole can also be suitably used.
Examples of the silicone rubber include commercially available products such as ultra-thin silicone rubber sheet (thickness 30 μm to 10 μm unit) manufactured by Fuso Rubber Industrial Co., Ltd. and gel-like silicone rubber (model number: X-32-2129) manufactured by Shin-Etsu Chemical Co., Ltd. The film which processed these with the laser etc. and opened the through-hole can also be used conveniently.
Moreover, as a fluororubber, commercial items, such as a fluororubber sheet (FB780N) by a Kureha elastomer company, can be used, for example.
As the resin material having photosensitivity, commercially available products such as AL-Polymer manufactured by Asahi Glass Co., Ltd., HD series manufactured by Hitachi Chemical and DuPont Microsystems, PL series, and WPR series manufactured by JSR may be used. it can.

  In this invention, it is preferable that the thickness of the said insulating layer is 0.1-100 micrometers, It is more preferable that it is 0.5-50 micrometers, It is still more preferable that it is 1-5 micrometers. When the thickness of the insulating layer is in this range, the adhesion between the layers of the anisotropic conductive film becomes higher while maintaining insulation, and the processing time during wiring processing using a laser, resist, or the like can be shortened.

  In the present invention, the method for forming the insulating layer is not particularly limited. For example, a method of laminating on the anisotropic conductive film using a laminator device, or a method for forming the insulating layer on the anisotropic conductive film using a spin coater device. And the like.

By laminating the above-described anisotropic conductive film through such an insulating layer, the adhesion between the layers of the anisotropic conductive film is increased, and the reliability of the obtained semiconductor package can be increased.
This is because the reactive functional group (for example, epoxy group) of the insulating layer and the functional group (for example, amine group) of the surface treatment compound that has surface-treated the anisotropic conductive film are formed when the insulating layer is formed. It is thought that this is because it reacts during heating to form a covalent bond or the like.

Next, how the multilayer wiring board of the present invention is used will be described with reference to FIG.
FIG. 4 is a conceptual diagram illustrating an example of usage of the multilayer wiring board of the present invention. In FIG. 4, from the viewpoint of ease of explanation, the semiconductor element 20 and the plurality of electrode anisotropic conductive films 1 a to 1 d are illustrated in a state where they are spaced apart from each other. In this case, these are provided in close contact with each other.

As shown in FIG. 4, first, among the four electrodes 21a to 21d of the semiconductor element 20, a metal wiring pattern 22a connected to the conductive path 3a in contact with the electrode 21a is provided, and the electrode 23a is drawn out. An extraction electrode 24a is formed directly below using the conduction path 3. The insulating layer 11 is provided so as to cover at least the lower end of the conduction path 3 existing in the portion where the conduction path 3a and the metal wiring pattern 22a are formed.
Next, a metal wiring pattern 22b connected to the conduction path 3b connected to the electrode 21b through the anisotropic conductive film 1a is provided to draw out the electrode 23b, and a lead-out electrode 24b is formed directly below it using the conduction path 3 To do. The insulating layer 11 is provided so as to cover at least the lower end of the conduction path 3 existing in the portion where the conduction path 3b and the metal wiring pattern 22b are formed.
Next, a metal wiring pattern 22c connected to the conduction path 3c connected to the electrode 21c through the anisotropic conductive films 1a and 1b is provided to draw out the electrode 23c, and the extraction path 24c using the conduction path 3 directly below it. Form. The insulating layer 11 is provided so as to cover at least the lower end of the conduction path 3 existing in the portion where the conduction path 3c and the metal wiring pattern 22c are formed.
Next, a metal wiring pattern 22d connected to the conductive path 3d connected to the electrode 21d via the anisotropic conductive films 1a to 1c is provided to draw out the electrode 23d, and the extraction electrode 24d using the conductive path 3 immediately below it. Form.

  As shown in FIG. 4, the multilayer wiring board 10 of the present invention in which a plurality of anisotropic conductive films 1 a to 1 d are laminated via an insulating layer 11 is a take-out electrode in which the distance between the electrodes 21 a to 21 d of the semiconductor element 20 is widened. Since 24a to d can be formed, the interposer itself or a conventionally known interposer can be used in combination.

(Examples 1-8, Comparative Examples 1-4)
(A) Mirror finish (electropolishing)
A high-purity aluminum substrate (manufactured by Sumitomo Light Metal Co., Ltd., purity 99.99 mass%, thickness 0.4 mm) is cut so that it can be anodized in an area of 10 cm square, using an electropolishing liquid having the following composition, voltage 25 V, liquid The electropolishing treatment was performed under conditions of a temperature of 65 ° C. and a liquid flow rate of 3.0 m / min.
The cathode was a carbon electrode, and GP0110-30R (manufactured by Takasago Seisakusho) was used as the power source. The flow rate of the electrolytic solution was measured using a vortex flow monitor FLM22-10PCW (manufactured by AS ONE).

(Electrolytic polishing liquid composition)
-660 mL of 85% by mass phosphoric acid (reagent manufactured by Wako Pure Chemical Industries, Ltd.)
・ Pure water 160mL
・ Sulfuric acid 150mL
・ Ethylene glycol 30mL

(B) Anodizing treatment Next, the aluminum substrate after the electrolytic polishing treatment was subjected to an anodizing treatment for 6 hours with a 0.50 mol / L malonic acid electrolytic solution at a voltage of 115 V and a liquid temperature of 3 ° C. And an anodic oxide film having a thickness of 60 μm was obtained.
In the obtained anodic oxide film, micropores having an average period of 300 nm were formed.
In the anodizing treatment, the cathode was a stainless electrode, and the power source was a DC stabilized power source manufactured by Takasago Seisakusho. Moreover, NeoCool BD36 (made by Yamato Kagaku) was used for the cooling device, and Pear Stirrer PS-100 (made by EYELA) was used for the stirring and heating device.

(C) Penetration treatment process Next, an aluminum substrate was immersed by using a treatment solution in which 0.1 mol / L copper chloride was blended in a 20% hydrochloric acid aqueous solution at a liquid temperature of 15 ° C. until the aluminum was visually removed. In addition, the bottom of the anodized film is removed by immersing in 5% by mass phosphoric acid at 30 ° C. for 30 minutes to form a structure (insulating group) having an anodized film having micropores with an enlarged pore diameter. Material).
The thickness of the structure after the penetration treatment (depth of the micropores) is 50 μm, the average period of the micropores is 280 nm, the average opening diameter of the micropores is 60 nm, and the degree of ordering of the micropores is 70 %Met.

(D) Heat treatment Next, the structure obtained above was subjected to a heat treatment at a temperature of 400 ° C for 1 hour.

(E) Metal filling treatment Subsequently, gold was sputtered to a thickness of 0.1 μm on one surface of the structure after the heat treatment to form a gold electrode. The gold electrode was used as a cathode, and the surroundings were masked to expose only the surface of the structure on which the gold electrode was not formed, and electrolytic plating was performed using a copper plate (purity 99.9%) as a positive electrode.
A structure (anisotropic conductive film) in which micropores are filled with copper by using a 600 g / L copper sulfate saturated solution kept at 60 ° C. as an electrolyte and performing direct current electrolysis. Manufactured.
Here, for direct current electrolysis, a potentiostat / galvanostat (Model 7060) manufactured by AMEL was used by using a plating apparatus manufactured by Yamamoto Sekin Co., Ltd. The standard electrode was an Ag / AgCl type.
Electrolysis, Cu: scanning at a scan rate of 1 mV / sec on the negative side from 0V, the quantity of electricity was conducted until 4000C / dm ^2.
When the fracture surface of the structure after metal filling treatment was observed with an optical microscope, the amount of copper inside the micropore from the gold electrode side was 70 μm (overflow of 20 μm from the surface of the insulating substrate). It was filled with.

(F) Surface smoothing treatment Next, the surface of the structure after the gold filling treatment was polished by 5 μm, and the opposite surface was polished by 25 μm.
Specifically, after lapping polishing with a sheet of silicon carbide (# 1200), polishing is performed with diamond slurry having a particle diameter of 2 μm, and further polishing is performed with diamond slurry having a particle diameter of 0.25 μm. To obtain a mirror state.
When the fracture surface of the structure after the surface smoothing treatment was observed with an optical microscope, it was a structure with a smooth surface where the thickness of the conductive path (copper) and the insulating base material (anodized film) were both 40 μm. I found out.

(G) Bump formation treatment The structure after the surface smoothing treatment was previously pure and sufficiently washed, and then stored in a dry oven.
Further, a solution in which a 30% by mass aqueous solution of polyethylene glycol (molecular weight 1000, manufactured by Wako Pure Chemical Industries, Ltd.) was adjusted to pH 12.5 using potassium hydroxide (KOH) was prepared.
Next, the structure that has been removed from the oven and previously cooled to room temperature in a clean bench is immersed in the above solution (liquid temperature: 35 ° C.) to selectively dissolve the anodized film (insulating base material). The conduction path was adjusted to the protruding height shown in Table 1 below.
In addition, the protrusion height of the conduction path was adjusted by changing the immersion time to 5 minutes, 15 minutes, and 30 minutes, and was obtained by observing with a scanning electron microscope from the cross section of the structure. In Table 1 below, in Comparative Examples 1 and 4, the bump formation process was performed, so the protrusion height was set to 0 μm.

(F) Surface treatment The structure after the bump formation process (Comparative Examples 1 and 4 refer to “the structure after the surface smoothing process”, the same shall apply hereinafter) is washed in advance and thoroughly, and then dried in a dry oven. Saved in.
In addition, a treatment liquid was prepared by adding 0.2 g of each of the surface treatment compounds shown in Table 1 below to a solution containing 90 parts by mass of isopropyl alcohol and 10 parts by mass of pure water.
Subsequently, the structure which was taken out from the oven and cooled in advance to room temperature in a clean bench was immersed in the treatment solution for 10 minutes.
Then, the anisotropic conductive film was produced by taking out the structure from the treatment liquid, washing for 5 minutes while pouring pure water, and drying in a dry oven.
The degree of modification of the surface treatment compound on the surface was confirmed by measuring Si, N and Al using an energy dispersive spectroscopic analyzer (EDX) to confirm the degree of coating and the introduction of amino groups on the surface. In addition, absorption peaks directly attributable to amino groups were also confirmed by infrared spectroscopy.
In addition, about Comparative Examples 2-4 which did not surface-treat, it described with "-" in the following Table 1.

(G) Insulating layer formation treatment The anisotropic conductive film produced as described above was purely and sufficiently washed in advance, and then stored in a dry oven at 130 ° C. for 30 minutes.
Next, using an auto cut laminator for dry film resist (DFR), the insulating layer (thickness: 10 μm) from which the protective film was removed was attached to the anisotropic conductive film. In addition, as shown in the following Table 1, as the insulating layer, epoxy resin (ABF GX-13, manufactured by Ajinomoto Fine Techno Co., Ltd.), oxazole resin (CRA-9000, manufactured by Sumitomo Bakelite Co., Ltd.), phenol resin (KL-225MB) , JSR product) and polyimide resin (HD4000, manufactured by Hitachi Chemical Co., Ltd.).
After the insulating layer was attached, the laminate was laminated at 180 ° C. for 30 minutes using a pressure-type vacuum laminator (Nichigo Morton V130), slowly cooled to room temperature, and then the supporting film (PET) supporting the insulating layer ) Was peeled off.

<Adhesion>
The adhesion between the anisotropic conductive film and the insulating layer is determined according to JIS-K5600-5-6 (2006 edition JIS Handbook 30 Paint) “Paint General Test Method-Part 5: Mechanical Properties of Coating Film—Section 6: Adhesion Property (cross-cut method) ".
Specifically, the insulating layer pasted on the anisotropic conductive film was cut in advance in a 5 mm square grid shape with a cutter, and the state peeled off when the tape was stuck and peeled from above was visually observed, Evaluation was made on a scale of 1-5 according to the classification of the above standards.
Here, 1 corresponds to a case in which peeling of the tape is not observed at all and 5 is peeled off entirely. The results are shown in Table 1 below.

As shown in Table 1, it was found that Comparative Examples 1 and 4 in which the conduction path did not protrude had low adhesion to the insulating layer regardless of the surface treatment of the anisotropic conductive film. Moreover, even if it was a case where a conduction path was protruded, it turned out that the adhesiveness with an insulating layer becomes low in the comparative examples 2 and 3 which have not surface-treated the anisotropic conductive film.
On the other hand, it turned out that the adhesiveness with an insulating layer becomes high in Examples 1-8 using the anisotropic conductive film which made the conduction path protrude and surface-treated. In Examples 3, 5 and 6, small peeling was confirmed at the part where the cuts by the cutter intersect, but the peeled part was 5% or less of the whole, so that it has practically no problem adhesion. I found out.

(H) Lamination process Using the anisotropic conductive film produced as described above, a multilayer wiring board was produced according to the following procedure.
FIG. 5 is a conceptual diagram for explaining a manufacturing procedure of a multilayer wiring board.
Here, FIG. 5A shows the surface of the first (first layer) anisotropic conductive film, and FIGS. 5B to 5F show the first to fifth anisotropic conductive films. Represents the back of the eye. In FIGS. 5B to 5F, portions other than the wiring pattern (22a and the like) and the extraction electrode (24a and the like) represented by a solid line are covered with an insulating layer (not shown).

Specifically, first, five anisotropic conductive films processed into a square having a side of 10 mm were prepared, and cuts to be alignment marks 30 necessary for alignment were formed by dicing on each of the three sides.
Next, the back surface of the anisotropic conductive film (first sheet / first layer) is spin-coated with a photosensitive insulating layer forming material (PW-3000 series, manufactured by Toray Industries, Inc.) blended with a polyimide resin, and photosensitive insulating. A layer (thickness: 1 μm) (second layer) was provided.
Next, a predetermined wiring pattern is formed on the insulating layer (second layer) using a mask prepared in advance, and then immersed in a gold electroless plating bath (Precious Hub ACG2000, manufactured by Tanaka Kikinzoku Co., Ltd.). A gold wiring pattern 22a was provided on the anisotropic conductive film (first back surface) from which the wiring pattern was exposed, and an extraction electrode 24a was provided therefrom (see FIG. 5B).
Next, after the anisotropic conductive film (second / third layer) is stacked and pressed while being heated, the insulating layer (second layer) is formed on the third layer of the three-layer structure. ), And an insulating layer (fourth layer) was provided.
Thereafter, the above-described operations were repeated to form wiring patterns (22b to 22d) and extraction electrodes (24b to 24d), and a 10-layer structure (5 anisotropic conductive films and 5 insulating layers) was produced. .
After stacking, pressurize the whole again and heat cure the insulating film layer at 180 ° C. At the same time, proceed with diffusion bonding between each extraction electrode and the conductive path (copper) protruding from the surface (upper surface) of the anisotropic conductive film. A multilayer wiring board was completed.

A test IC chip (electrode pad size: 1 μm square, space: 1 μm) was mounted on the center of the uppermost surface (surface of the first anisotropic conductive film) of the obtained multilayer wiring board. In FIG. 5A, reference numeral 25 represents each electrode pad of the IC chip.
As a result, the electrode pad (size: 1 μm square) whose electrode distance was 1 μm on the uppermost surface could be rearranged with the electrode distance of 100 μm (electrode size: 100 μm square) on the lowermost surface.
When the energization resistance of the device in which the electrodes were rearranged in this way was examined, the wiring resistance was within 10 times the pure copper resistance. Further, it was confirmed that there was no crosstalk between adjacent pads when a high-frequency signal of 10 GHz was loaded, and no signal deterioration was observed at that time.

1, 1a, 1b, 1c, 1d Anisotropic conductive film 2 Insulating substrate 3, 3a, 3b, 3c, 3d Conducting path 4a, 4b Protruding part 5 In-substrate conducting part 6 Insulating substrate thickness 7 Conducting path Width between 8 conductive channel diameter 9 distance between conductive channel centers (pitch)
DESCRIPTION OF SYMBOLS 10 Multilayer wiring board 11 Insulating layer 20 Semiconductor element 21a, 21b, 21c, 21d Electrode 22a, 22b, 22c, 22d Metal wiring pattern 23a, 23b, 23c, 23d Electrode 24a, 24b, 24c, 24d Extraction electrode 25 IC chip electrode Pad 30 Alignment mark 101, 102, 104, 105, 107, 108 Micropore 103, 106, 109 yen

Claims (7)

A multilayer wiring board in which two or more anisotropic conductive films are laminated,
The anisotropic conductive film penetrates the insulating base material in the thickness direction in a state where a plurality of conductive paths made of a conductive member are insulated from each other in the insulating base material made of an anodized film of an aluminum substrate, And, one end of each conduction path protrudes on one surface of the insulating base material, the other end of each conduction path is a member provided in a state protruding on the other surface of the insulating base material,
Having an insulating layer in part of the contact surface between the anisotropic conductive films;
The insulating layer is formed using a polymer material having a reactive functional group,
A multilayer wiring board in which a surface of the anisotropic conductive film is surface-treated with a compound having a functional group capable of reacting with the reactive functional group.   The thickness of the insulating substrate is 1-1000 μm, the diameter of the conduction path is 1 μm or less, and the height of the portion of the conduction path protruding from both surfaces of the insulating substrate is 10 nm or more. 2. The multilayer wiring board according to 1.   The multilayer wiring board according to claim 1, wherein the insulating layer has a thickness of 0.1 to 100 μm.   The reactive functional group of the polymer material is selected from the group consisting of an acrylate group, a methacrylate group, a vinyl group, an allyl group, an epoxy group, an amino group, a hydroxy group, a carboxy group, an isocyanate group, and an acid anhydride group. Item 4. The multilayer wiring board according to any one of Items 1 to 3.   The multilayer wiring board according to claim 1, wherein the polymer material is an epoxy resin.   The multilayer wiring board according to claim 1, wherein the compound that surface-treats the surface of the anisotropic conductive film is a silane coupling agent having an amino group.   The multilayer wiring board according to claim 1, which is used as an interposer for a semiconductor package.