JP2011198412A - Wobble signal demodulating apparatus and wobble signal demodulating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To properly adjust guard time for monitoring whether a detection window is aligned with a synchronization signal, according to a crosstalk intensity.SOLUTION: In a wobble signal demodulating apparatus, a unit sync detecting section 203 detects a synchronization signal from a wobble signal. When an interval of the synchronization signal is constant for a predetermined period, a unit sync period guard section 206 establishes synchronization at a position where the synchronization signal is detected. The unit sync period guard section 206 generates a detection window showing a period to detect the synchronization signal, based on the synchronization position while synchronization is established. A crosstalk determining section 211 determines the crosstalk intensity according to the number of synchronization signals detected at predetermined intervals. The unit sync period guard section 206 changes forward alignment guard time for monitoring whether the detection window is aligned with the synchronization signal, according to the determined crosstalk intensity.

Description

  The present invention relates to a technique for demodulating a wobble signal obtained from an optical disc, and more particularly to a technique for demodulating a wobble signal that has been subjected to MSK (Minimum Shift Keying) modulation.

  There are various standards for optical discs such as DVD ± R / RW, DVD-RAM, HDDVD-R / RW / RAM, and BD (Blu-ray Disc) -R / RE. A groove for guiding laser light along a spiral recording track is formed in the recording film of these optical disks. This groove meanders at a frequency and amplitude determined by each standard.

  The meandering groove is called a wobble, and its reproduction signal is called a wobble signal. When performing playback or recording operations on a disc, a reference clock is generally generated by multiplying the digital wobble obtained by A / D conversion of the wobble signal to a specified frequency by a PLL (Phase Locked Loop) circuit. Is done.

  In the wobble signal, address information indicating a physical position on the disk necessary for reproduction or recording is embedded by performing partial modulation within a range that does not hinder the operation of the PLL circuit. The wobble signal modulated in this way is called ADIP (Address In Pre-Groove).

  There are various wobble modulation schemes depending on the standard. For example, in the case of BD, a modulation scheme called MSK (Minimum Shift Keying) is used. Here, ADIP of the MSK modulation system will be described by taking BD as an example. In the BD ADIP format, three types of units are defined: an ADIP unit, an ADIP word, and a RUB (Recording Unit Block).

  The ADIP unit is a unit for establishing a synchronization signal. One ADIP unit is composed of 56 wobbles. One wobble has 69T. “T” is the minimum unit time of the recording or reproducing operation, and corresponds to one period of the reference clock described above.

  The ADIP unit includes monotone wobble, MSK wobble, and STW (Saw Tooth Wobble). Combination of these wobbles constitutes various ADIP units such as monotone, reference unit, sync unit (sink 0 unit, sync 1 unit, sync 2 unit, sync 3 unit) and data unit (data unit 1, data unit 0). Is done.

  FIG. 7 shows the ADIP unit. In the figure, black squares indicate MSK wobbles, and white squares indicate wobbles other than MSK wobbles. As shown in the figure, the MSK wobble corresponds to the MSK-modulated portion (MSK modulation unit) of the analog wobble. In the MSK modulation method, two frequencies are used. One is the same frequency as the reference carrier signal, and the other is 1.5 times the frequency of the reference carrier signal.

  Assuming that the reference carrier signal is cos (wt), in ADIP, the MSK modulation section is composed of three carrier period sections of cos (1.5 ωt), -cos (ωt), and -cos (1.5 ωt), and corresponds to it. These three wobbles are called MSK marks.

  The monotone wobble is a cos (ωt) wobble, and the STW is “cos (ωt) − (1/4) × sin (2ωt)” or “cos (ωt) + (1/4) × sin ( 2ωt) ”.

  As shown in FIG. 7, the first 3 wobbles (0 to 2 carrier periods) of various ADIP units are MSK wobbles. These MSK wobbles function as a synchronization signal for bit synchronization during reproduction or recording. In the following description, 56 wobbles constituting one ADIP unit are also referred to as a synchronization block.

  In addition, the ADIP units other than the monotone unit and the reference unit are provided with MSK marks in addition to the first three wobbles, and the type of the ADIP unit can be identified by their positions. For example, an ADIP unit whose 13th to 15th wobbles (12th to 14th carrier cycles) are MSK marks is a data unit 1 indicating that the data bit of the address information is “1”, and is 15 to 17 An ADIP unit in which the eye wobble (14th to 16th carrier cycles) is an MSK wobble is a data unit 0 indicating that the data bit of the address information is “0”.

  FIG. 8 shows the structure of the ADIP word. The ADIP word is a unit for decoding address information, and is composed of 83 ADIP units. Error detection and correction for address information is performed in units of ADIP words.

  Of the 83 ADIP units that make up the ADIP word, the first 8 ADIP units are a monotone unit, a sync 0 unit, a monotone unit, a sync 1 unit, a monotone unit, a sync 2 unit, a monotone unit, and a sync 3 unit. is there. Based on these ADIP units, the offset position in the ADIP word is specified.

  Each of the 2/4/6 / 8th ADIP units from the head of the ADIP word is provided with a sync 0/1/2/3 unit, which indicates a synchronization signal of the ADIP word. Data unit 0/1 indicating the address is arranged in the tenth and subsequent ADIP units. Error detection / correction for an address is also performed in units of ADIP words.

  75 ADIP units from the 9th ADIP word indicate a 4 × 15-bit address code and a redundant code for error detection / correction. By decoding these, address information on the disk can be obtained. FIG. 9 shows a RUB (Recoring Unit Block). As shown in FIG. 9, the RUB is composed of three ADIP words. Data is recorded on the disc in units of RUB.

  Thus, ADIP is composed of a plurality of synchronization blocks, and a synchronization signal is provided at the head of each synchronization block. The address information is embedded in a predetermined position on the disk in a predetermined sync block with reference to the position of the sync signal. For such ADIP, synchronization is detected and address information is decoded by detecting a synchronization signal (see, for example, Patent Document 1).

  Here, the operation of detecting the MSK mark by the wobble signal demodulator will be described. Since the frequency and phase of the carrier signal and the wobble signal are different in the MSK mark section, the multiplication output of the wobble signal and the carrier signal in this section is negative. Utilizing this, the value (S / H value) obtained by multiplying the wobble signal and the carrier signal and integrating the multiplication results for each carrier period or the multiplication result is passed through the low-pass filter, and the output value is A negative place is detected as an MSK mark.

  FIG. 10 shows the timing of the MSK mark detection operation by the wobble signal demodulator. As shown in FIG. 10, in the MSK mark section, the S / H value obtained by the integrating means is a negative value. This negative value section corresponds to the reverse phase portion (−cos (ωt)) of the MSK modulation section, and is hereinafter referred to as the MSK mark position. An MSK detection signal (also referred to as an MSK pulse) is generated from the detected MSK mark position, and address information is decoded in synchronization by measuring the output interval of the MSK detection signal.

  The address information is decoded by detecting the synchronization signal (the MSK mark at the head of the ADIP unit in the case of the MSK modulation method) from the wobble signal and establishing the synchronization with the position of the detected synchronization signal as the synchronization position. This is done by acquiring bit information from the wobble signal based on the above and generating an address. Therefore, in order to obtain correct address information, it is important to correctly detect the position of the synchronization signal.

  Major factors that cause incorrect detection of the synchronization signal include disturbance to the spindle operation, physical defects of the disk, and crosstalk. Among these factors, disturbances and physical defects are accidental and are hereinafter referred to as accidental noise. On the other hand, crosstalk occurs due to the narrower pitch between tracks on the disc as the recording density of the optical disc increases. In a high-density disc such as a BD, since the pitch between tracks is narrow, strong crosstalk occurs between wobbles of adjacent tracks, and wobble signal deterioration and phase inversion tend to occur.

  The wobble is engraved at a constant interval from the inner periphery to the outer periphery on the disk, but the wobble phase between adjacent tracks changes little by little due to the circumferential length difference between adjacent tracks on the disk. Therefore, the wobble of the adjacent track is added as a crosstalk component to the wobble of the self track, which affects the wobble detection position and amplitude.

  FIG. 11 shows the influence of the crosstalk on the processing by the wobble signal demodulator. As shown in FIG. 11, when there is crosstalk, the waveform of the wobble signal is deformed, so that the output position of the MSK pulse, that is, the position of the detected synchronization signal is shifted back and forth from the original position or disappears. There is. In the following description, the position of the detected synchronization signal is referred to as “detection position”.

  If the position of the synchronization signal is erroneously detected during the occurrence of the crosstalk, and synchronization is established based on the detected position, the address information is decoded based on the incorrect synchronization position. Therefore, there is a problem that correct address information cannot be obtained and recording or reproduction is performed at an illegal position on the disc.

  Therefore, Patent Document 1 proposes a method for correctly detecting the position of the synchronization signal. Once a sync signal is detected, the next sync signal should appear at a timing determined by the standard. Patent Document 1 discloses a technique in which a detection window is provided only during a certain period centered on this timing, and a synchronization signal is detected only within the provided detection window. Thereby, it is possible to prevent erroneous detection of the synchronization signal at the timing when the synchronization signal should not appear. Further, in Patent Document 1, the number of consecutive undetected times in which a synchronization signal is not detected in a plurality of detection windows is counted, and synchronization is established again when the number of consecutive undetected times exceeds a threshold value.

JP 2007-164984 A

  By the way, this crosstalk can always occur at any position on the disk, but the degree of influence by the crosstalk is strong or weak. A normal binarized ADIP pulse can be generated from the detected wobble in a section where the crosstalk is weak, but a phase shift or disappearance of the binarized ADIP pulse tends to occur in a section where the crosstalk is strong. It should be noted that sections where crosstalk is strongly generated tend to appear at regular intervals in the circumferential direction of the optical disc. When the crosstalk is strong, the sync signal is shifted or lost due to the crosstalk, and the sync signal is not detected in the corresponding detection window, but when the crosstalk returns to the weak section, the synchronization is not actually shifted. There is.

  In the configuration described in Patent Document 1, only the number of times that the synchronization signal is not detected within the corresponding detection window is monitored. In a section where the crosstalk is strong, the frequency at which the number of consecutive undetections becomes equal to or greater than the threshold due to loss of the synchronization signal or the like increases, and the recording / reproducing process is interrupted many times, which causes a decrease in system performance. In order to maintain the synchronization state even when the synchronization signal is lost due to crosstalk, it is conceivable to set a high threshold for the number of consecutive undetections. However, if the threshold value for the number of consecutive non-detections is increased, there is a problem that it takes time to establish synchronization again when a true timing shift occurs due to accidental noise or the like.

  A wobble signal demodulator according to an aspect of the present invention includes a reading unit that reads a wobble signal corresponding to a wobble formed on an optical disc, and a synchronization signal detection unit that detects a synchronization signal from the wobble signal read by the reading unit. A period protection unit that establishes synchronization with the detection position of the synchronization signal as a synchronization position when the interval of the synchronization signal is constant for a predetermined period; and in the state where the synchronization is established, based on the synchronization position, A detection window generating unit that generates a detection window indicating a period during which a synchronization signal is to be detected; a crosstalk determination unit that determines a crosstalk intensity according to the number of times that the detection interval of the synchronization signal is a predetermined period; and In accordance with the crosstalk intensity determined by the crosstalk determination unit, the length of the protection period for monitoring whether or not the detection window is shifted from the synchronization signal is changed. Those comprising a control unit.

  In a wobble signal demodulation method according to another aspect of the present invention, a wobble signal corresponding to a wobble formed on an optical disc is read, a synchronization signal is detected from the wobble signal, and the interval between the synchronization signals is constant for a predetermined period. In this case, the detection position of the synchronization signal is established as a synchronization position, and in the state where the synchronization is established, a detection window indicating a period in which the synchronization signal is to be detected is generated based on the synchronization position, The length of a protection period for determining the crosstalk intensity according to the number of times that the detection interval of the synchronization signal is a predetermined period, and monitoring whether the detection window and the synchronization signal are shifted according to the crosstalk intensity. Change the size.

  In the present invention, the length of the protection period for monitoring whether or not the detection window and the synchronization signal are shifted is changed according to the crosstalk intensity. For this reason, even when the synchronization signal is lost due to strong crosstalk, the synchronization state can be maintained. In addition, if a true timing shift occurs in a section where crosstalk is weak, synchronization can be reestablished in a short time.

  According to the present invention, a wobble signal demodulating device and a wobble signal demodulating method capable of adjusting the length of a protection period for monitoring whether or not the detection window and the synchronization signal are appropriately shifted according to the crosstalk intensity are realized. can do.

It is a figure which shows the whole structure of the system which controls the recording / reproducing process using the optical disk recording / reproducing apparatus which concerns on embodiment. It is a figure which shows the structure of a part of optical disk recording / reproducing apparatus which concerns on embodiment. It is a figure which shows the flow of a process by the optical disk recording / reproducing apparatus which concerns on embodiment. 6 is a timing chart showing a flow of processing by the optical disc recording / reproducing apparatus according to the present embodiment. 6 is a timing chart showing a flow of processing by the optical disc recording / reproducing apparatus according to the present embodiment. 6 is a timing chart showing a flow of processing by the optical disc recording / reproducing apparatus according to the present embodiment. It is a figure which shows the structure of an ADIP unit. It is a figure which shows the structure of an ADIP word. It is a figure which shows the structure of RUB. It is a figure for demonstrating the detection method of a MSK modulation mark. It is a figure for demonstrating the influence which crosstalk has on the detection position of an MSK modulation mark. FIG. 3 is a diagram in which an optical disk device described in Patent Document 1 is modified for comparison with the optical disk recording / reproducing device described in FIG. 2. 13 is a timing chart showing the flow of processing by the optical disc recording / reproducing apparatus shown in FIG. 13 is a timing chart showing the flow of processing by the optical disc recording / reproducing apparatus shown in FIG.

  Before describing specific embodiments of the present invention, the principle of the present invention will be described first. When the present inventor detects a synchronization signal (MSK mark at the head of a synchronization block) from an MSK-modulated wobble signal, the influence of crosstalk on the detection position of the synchronization signal (detection position of the center wobble of the MSK mark) As a result of repeated research, we found the following.

  In a normal period in which crosstalk is weak, the synchronization signal detection position is always stable at a fixed position within the cycle. For this reason, the interval between the detection positions of the synchronization signal is constant. On the other hand, in the period when the crosstalk is strong, the detection position of the synchronization signal is unstable and varies in units of wobble. For this reason, the interval between the synchronization signal detection positions is not constant.

  The inventor of the present application has established a method for determining crosstalk based on the above findings (see JP 2009-43301 A). In the present invention, this determination method is applied to determine a section having a strong crosstalk and a section having a weak crosstalk. Specifically, after synchronization is established and the synchronization position is determined, detection of the synchronization signal is continued, and a detection window indicating a period during which the synchronization signal is to be detected is periodically generated based on the synchronization position. A comparison is made between the detection position of the synchronization signal and the detection window corresponding to the detection position, and the crosstalk intensity is determined according to the number of shifts between the two compared.

  In Japanese Patent Application Laid-Open No. 2009-43301 by the inventor of the present application, synchronization is established even in a section where the crosstalk is strong, and when the timing is truly shifted, the timing is corrected in a section where the crosstalk is weak, thereby synchronizing in a short time. The invention is characterized by drawing in. According to the present invention, the synchronization state is maintained even when the synchronization signal is lost due to strong crosstalk, and the synchronization can be reestablished in a short time when the timing shift due to accidental noise occurs. Thus, a method of adjusting the length of the forward protection period for comparing the detection position where the synchronization signal is detected with the detection window corresponding to the detection position is proposed.

  As a result, synchronization can be maintained even in areas where crosstalk is strong, and synchronization is reestablished in a short time if the timing of the sync signal on the disc shifts in areas where crosstalk is weak. Can do.

  Based on the above description, an apparatus embodying the principles of the present invention will be described. FIG. 1 is a diagram showing an overall configuration of a system for controlling recording / reproducing processing using an optical disc recording / reproducing apparatus 100 including a wobble signal demodulating apparatus according to an embodiment of the present invention. The optical disc recording / reproducing apparatus 100 demodulates an MSK-modulated wobble signal, and uses a BD disc as an example of processing.

  As shown in FIG. 1, this system includes an optical disc recording / reproducing apparatus 100, an optical disc 101, a spindle motor 102, a motor driver 103, an optical head 104, and a laser driver 115. An optical disc recording / reproducing apparatus 100 includes a servo circuit 105, a wobble circuit 106, an RF (Radio Frequency) circuit 107, an address generation circuit 108, a recording data encoding / reproducing data decoding circuit 109, a buffer memory 110, a buffer I / F 111, and a system controller. 112, a host PC 113, and a recording compensation circuit 114.

  The optical disc 101 is rotationally controlled by a spindle motor 102 and a motor driver 103. The optical head 104 performs recording / reproduction control by irradiating the optical disc 101 with laser light or receiving reflected light. In addition, the optical head 104 reads a wobble signal corresponding to the wobble formed on the optical disc 101. The servo circuit 105 performs rotation speed control of the spindle motor 102 and focusing / tracking control of the optical head 104.

  The wobble circuit 106 performs A / D conversion and binarization on the wobble signal input from the optical head 104, and generates a wobble reference channel clock corresponding to the double speed by a PLL (Phase Locked Loop) circuit. Also, the wobble circuit 106 detects the MSK modulation unit by detecting the wobble signal, and generates an ADIP (Address In Pre-Groove) synchronization signal and address information.

  The RF circuit 107 performs A / D conversion and binarization on the RF signal input from the optical head 104, and generates an RF reference channel clock corresponding to the double speed by a PLL. Further, the RF circuit 107 generates a synchronization signal and address information included in the RF.

  The address generation circuit 108 receives a channel clock, a synchronization signal, and address information from the wobble circuit 106 or the RF circuit 107, and establishes synchronization and generates an address. The recording data encoding / reproducing data decoding circuit 109 encodes recording data held in the buffer memory 110 or decodes reproducing data output from the RF circuit 107.

  The buffer memory 110 stores the reproduction data decoded by the pre-encoding recording data encoding / reproduction data decoding circuit 109 received from the host PC 113. The system controller 112 controls communication between the buffer memory 110 and the host PC 113 via the buffer I / F 111. The recording compensation circuit 114 controls the laser pulse based on the recording data encoded by the recording data encoding / reproducing data decoding circuit 109 and performs adjustment so that recording is performed with the optimum laser power.

  FIG. 2 shows specific configurations of the wobble circuit 106 and the address generation circuit 108. As shown in FIG. 2, the wobble circuit 106 includes a phase modulation unit detection unit 201. The address generation circuit 108 includes a word sync detection unit 202, a unit sync detection unit 203, a data bit detection unit 204, a word sync cycle protection unit 205, a unit sync cycle protection unit 206, a word counter 207, a unit counter 208, a data latch 209, An error correction unit 210, a crosstalk determination unit 211, and a window generation timing selection circuit 212 are provided.

  The phase modulation unit detection unit 201 detects a phase inversion unit (MSK mark) corresponding to the synchronization signal from the input analog wobble, performs binarization processing, and outputs an ADIP pulse 1. The ADIP pulse 1 includes an unprotected word sync 2, an unprotected unit sync 3, and a data bit 4.

  The word sync detection unit 202, the unit sync detection unit 203, and the data bit detection unit 204 are respectively an unprotected word sync 2, an unprotected unit sync 3, and a data bit from the binary ADIP pulse 1 output from the phase modulation unit detection unit 201. 4 is detected. That is, the word sync detection unit 202, the unit sync detection unit 203, and the data bit detection unit 204 function as respective sync identification circuits.

  The unprotected word sync 2 indicates an ADIP word synchronization signal which is a unit for decoding an address. The unprotected word sync 2 is identified from the sync 0 unit, the sync 1 unit, the sync 2 unit, and the sync 3 unit in the ADIP unit shown in FIG. The word sync detection unit 202 detects the positions of the three pulses corresponding to the three phase inversion units in each of the four sync units of 56 wobbles in the ADIP pulse 1, and outputs the unprotected word sync 2. .

  The unprotected unit sink 3 indicates a synchronization signal (MSK mark) arranged in the first 3 wobbles of an ADIP unit composed of 56 wobbles. That is, the unprotected unit sink 3 is a pulse signal having a 56 wobble period. The unit sync detection unit 203 detects the position of the pulse corresponding to the phase inversion unit consisting of the first 3 wobbles in each ADIP unit consisting of 56 wobbles in the ADIP pulse 1, and outputs the unprotected unit sync 3.

  Data bit 4 indicates the bit value 0/1 of the address. Among the ADIP units shown in FIG. 7, the data unit 0/1 is identified. The data bit detection unit 204 detects the MSK mark of the data unit 0/1 and outputs the data bit 4 corresponding to the position of the MSK mark.

  The unit sync cycle protection unit 206 controls the establishment of synchronization and the monitoring of the synchronization state of the unprotected unit sink 3 having a 56 wobble cycle by a sequencer. When the interval between the synchronization signals is constant for a predetermined period, the unit sync cycle protection unit 206 establishes synchronization with the detection position of the synchronization signal as the synchronization position. The sequencer of the unit sync cycle protection unit 206 transits the four states of the initial state S00, the backward protection state S01, the synchronization state S02, and the forward protection state S03.

  The unit sync cycle protection unit 206 generates a detection window indicating a period during which a synchronization signal should be detected based on the synchronization position in order to prevent erroneous detection of the unprotected unit sink 3 in a state where synchronization is established. The unprotected unit sink 3 is detected while the detection window generated by the unit sync cycle protection unit 206 is open, and is not detected while the detection window is closed. The detection window has different opening / closing control depending on the state of the sequencer. The unprotected unit sink 3 detected in the detection window is referred to as a detection unit sink 5. The detection unit sink 5 indicates that a synchronization state has been established. The detection window generation timing will be described later.

  FIG. 3 shows a state transition diagram of the sequencer. The initial state S00 is a state in which the first unprotected unit sink 3 is searched. In the initial state S00, the detection window is opened. When the first unprotected unit sink 3 is found, the state transits to the backward protection state S01 (A). The initial state S00 is repeatedly executed until the first unprotected unit sink 3 is found (B).

  The backward protection state S01 is a state for monitoring whether synchronization can be established. When the unprotected unit sink 3 having a predetermined period (56 wobbles) can be detected continuously (or cumulatively), the state transitions to the synchronization state S02 (C). If the number of times that the unprotected unit sink 3 with a predetermined period cannot be detected continues for a set threshold value or more, the transition is made from the backward protection state S01 to the initial state S00, and the reference unprotected unit sink 3 is detected again (D). In the rear protection state S01, the detection window is opened at the timing (unit sync predicted position) output by the window generation timing selection circuit 212.

  The synchronization state S02 is a state indicating that synchronization is established. If the ADIP pulse 1 can be detected at a constant period (56 wobbles), the synchronization state S02 remains in the synchronization state S02 (F). On the other hand, if the detection fails even once, the state transits to the forward protection state S03 (E). In the synchronization state S02, the detection window opens at the timing (unit sync predicted position) output by the window generation timing selection circuit 212.

  The forward protection state S03 is a state in which it is monitored whether or not synchronization is completely lost. That is, the forward protection state S03 is a protection period for monitoring whether or not the synchronization signal is shifted from the detection window after synchronization is established. In the forward protection state S03, the synchronization state of the synchronization state S02 is maintained even if the detection signal is shifted from the detection window for a predetermined period. That is, as indicated by a broken line in FIG. 3, the synchronization state S02 and the forward protection state S03 are synchronized.

  In the forward protection state S03, the ADIP pulse 1 having a predetermined cycle is detected even once, that is, when the unprotected unit sink 3 is included in the detection window, the state returns to the synchronization state S02 (G). On the other hand, when the unprotected unit sink 3 is not continuously included in the detection window, the state transitions to the initial state S00 (H).

  The unit sync cycle protection unit 206 enters the synchronization state S02, and when the synchronization is established, outputs the detection unit sync 5 to the word sync cycle protection unit 205, the data bit detection unit 204, and the unit counter 208. The word sync cycle protection unit 205 receives the detection unit sync 5 and controls the establishment of synchronization and the monitoring of the synchronization state with the sequencer for the unprotected word sync 2 of 83 ADIP unit cycle.

  The unit counter 208 is a counter for generating the timing of one ADIP unit cycle. The initial timing value of the unit counter 208 is preset in order to synchronize with the optical disc 101 by the detection unit sink 5 at the time when the synchronization is established in the unit sync period protection unit 206. The unit counter 208 receives the detection unit sink 5 indicating that the synchronization state S02 has been established, interpolates the timing with the channel clock, and counts 56 wobbles that are one ADIP unit.

  The unit counter 208 receives the detection unit sink 5 and outputs the unit timing 6 to the unit counter 208, the window generation timing selection circuit 212, and the data bit detection unit 204. Unit timing 6 is “H” in the head wobble in one ADIP unit. The unit timing 6 is timing information for generating a detection window for the unprotected unit sink 3 and a detection window for the data bit 4.

  The word counter 207 is a counter that generates the timing of one ADIP word cycle. In the word sync cycle protection unit 205, the initial timing value of the word counter 207 is preset in order to synchronize with the optical disc 101 by the detected word sync 9 when synchronization is established. In the synchronization state S02, the word counter 207 interpolates the timing with the channel clock. The word counter 207 receives the unit timing 6 and increments by one every time 56 wobbles are counted in the unit counter 208.

  The word counter 207 generates a window generation timing 10 for generating a detection window for the unprotected word sink 2. This window generation timing 10 becomes “H” in the 1/3/5 / 7th ADIP unit in one ADIP word, and indicates the timing of word sync. A detection word sync 9 is detected when the unprotected word sync 2 is detected in the detection window generated based on the window generation timing 10. The word counter 207 outputs the latch timing 11 to the data latch 209.

  The data bit detection unit 204 detects the data bit 4 within the detection window generated based on the unit timing 6. Data bit 4 is input to error correction section 210. The data latch 209 buffers data bits 4 for one ADIP word according to the latch timing 11. The error correction unit 210 performs error detection / correction on the buffering data 12 when the data latch 209 has data bits for one ADIP word, and generates an ADIP address.

  Here, problems in the optical disc apparatus described in Patent Document 1 will be described with reference to FIGS. FIG. 12 is a modified version of the optical disc apparatus described in Patent Document 1 for comparison with the optical disc recording / reproducing apparatus 100 according to the present invention. 13 and 14 are timing charts showing the flow of processing by the wobble demodulator shown in FIG.

  As illustrated in FIG. 12, the wobble circuit 106 is provided with a phase modulation unit detection unit 301. The address generation circuit 108 includes a word sync detection unit 302, a bit sync detection unit 303, a data bit detection unit 304, a word sync cycle protection unit 305, a bit sync cycle protection unit 306, a data bit cycle protection unit 307, and a word counter 308. 2 frame counter 309, data latch 310, and error correction unit 311.

  When the address generation circuit 108 shown in FIG. 2 is compared with the one shown in FIG. 12, the difference is that a crosstalk determination unit 211 and a window generation timing selection circuit 212 are provided. Since the wobble circuit 106 shown in FIG. 12 shows an example of the DVD format, the name is different from each component in FIG. 2, but the bit sync detection unit 303 corresponds to the unit sync detection unit 203, and the data bit detection unit Reference numeral 304 corresponds to the data bit detection unit 204.

  The phase modulation unit detection unit 301 detects the phase modulation unit from the input wobble signal and outputs a binary ADIP pulse. The word sync detection unit 302, the bit sync detection unit 303, and the data bit detection unit 304 detect an unprotected word sync, an unprotected bit sync, and an unprotected data bit from the input ADI pulse, respectively.

  The word sync cycle protection unit 305 detects a word sync to which cycle protection is applied to the unprotected word sync output from the word sync detection unit 302. Since word syncs are arranged at a constant period, false detection of false word syncs is avoided by opening a detection window only at predicted word sync positions.

  This detection window is generated by a word counter 308 that generates the timing of one cycle of the word sync. Further, when the word sync is not detected in the corresponding detection window, the period protection is applied by not performing the re-intake immediately but performing the re-intake at the time when the number of consecutive undetections becomes a certain value or more.

  The bit sync cycle protection unit 306 detects a bit sync to which cycle protection is applied to the unprotected bit sync output from the bit sync detection unit 303. Since the bit syncs are arranged at a constant period, erroneous detection of the bit sync is avoided by opening the detection window only at the predicted bit sync position.

  This detection window is generated by a 2-frame counter 309 that generates the timing of one bit period. In addition, when the bit sync is not detected, the period protection is applied by not performing the re-acquisition immediately but by performing the re-acquisition when the number of consecutive undetections becomes a certain value or more.

  The data bit cycle protection unit 307 detects data bits to which cycle protection is applied to the unprotected data bits output from the data bit detection unit 304. Since the data bits are arranged together with the bit sync, they are detected using the bit sync detection window.

  The data latch 310 buffers data bits for one ADIP word. The error correction unit 311 executes error detection / correction when the data bits for one ADIP word are collected in the data latch 310, and an ADIP address is generated.

  FIG. 13 shows a state of processing in the forward protection state in a section where crosstalk is strong, and FIG. 14 shows a case where timing is shifted in a section where crosstalk is weak. As shown in FIG. 13, in order to take measures so as not to lose synchronization when crosstalk occurs strongly in the address generation circuit 108 of FIG. 12, the threshold for the number of consecutive non-detections is set high, and the forward protection period is set. It is possible to expand.

  However, as shown in FIG. 14, if the threshold value is increased, the position on the disk is shifted from the predicted timing after synchronization is established once, or the synchronization is established again when synchronization is established by mistake. There is a problem that it takes time.

  Therefore, in the present invention, the address generation circuit 108 is provided with a crosstalk determination unit 211 and a window generation timing selection circuit 212. The crosstalk determination unit 211 receives the unprotected unit sink 3 output from the unit sync detection unit 203 and the detection unit sink 5 output from the unit sync cycle protection unit 206.

  The crosstalk determination unit 211 includes a determination counter (not shown) that counts up when the unprotected unit sink 3 is detected at a predetermined period. That is, the crosstalk determination unit 211 determines the crosstalk intensity according to the number of times that the synchronization signal detection interval is a predetermined period.

  The determination counter counts up when the unprotected unit sink 3 is detected at a predetermined cycle, and clears to 0 when it is not at the predetermined cycle. The period is measured by counting the period up to the next detected unprotected unit sink 3 from the detected unprotected unit sink 3 as a starting point (reset to 0) and repeating this. The crosstalk determination unit 211 uses this determination counter to determine the crosstalk strength interval.

  A crosstalk determination threshold is set in the crosstalk determination unit 211. The crosstalk determination unit 211 compares the count value of the determination counter with the crosstalk determination threshold value. The crosstalk determination unit 211 generates a crosstalk determination result 7 that is 'L' if the count value is equal to or greater than the threshold value, and 'H' if the count value is less than the threshold value.

  A larger determination count value indicates that the detection interval of the unprotected unit sink 3 is stable in a predetermined period over a longer period, that is, a section in which crosstalk is weak. The smaller the count value, the more unstable the detection interval of the unprotected unit sink 3 does not satisfy the predetermined period, that is, a section with strong crosstalk.

  FIG. 4 shows the determination result of the crosstalk determination unit 211. In the example shown in FIG. 4, a case where the crosstalk determination threshold is 4 is shown. In FIG. 4, “◯” indicates a case where the unprotected unit sink 3 can be detected in a predetermined cycle, and “x” indicates a case where it is detected in a cycle other than the predetermined cycle.

  As shown in FIG. 4, when the unprotected unit sink 3 is stable in a predetermined cycle, the count value remains stable at the crosstalk determination threshold value 4. For this reason, the crosstalk determination result 7 is “L” indicating a section where the crosstalk is weak.

  On the other hand, when the unprotected unit sink 3 is not detected at a predetermined period, the count value is smaller than the crosstalk determination threshold value 4. For this reason, the crosstalk determination result 7 is “H” indicating a section where the crosstalk is strong. As described above, the crosstalk determination unit 211 determines the strength of the crosstalk according to the number of times the detection interval of the unprotected unit sink 3 is detected in a predetermined cycle.

  In the above configuration, when the unprotected unit sink 3 that is not in the predetermined cycle is detected, the crosstalk determination result 7 immediately becomes “H”. In order to prevent reacting to local noise in a section where crosstalk is weak, a counter is provided which counts the state in which the detection interval of the unprotected unit sink 3 is not a predetermined period. It may be used as a startup condition. For example, the crosstalk determination result 7 can be launched when the count value is equal to or greater than the threshold value.

  The window generation timing selection circuit 212 outputs a window generation timing 8 for generating a detection window used by the unit sync cycle protection unit 206. The window generation timing 8 basically becomes “H” at the appearance position of the unit sync according to the unit timing 6. However, the window generation timing selection circuit 212 adjusts the window generation timing 8 for generating the detection window according to the crosstalk intensity determined by the crosstalk determination unit 211. The unit sync cycle protection unit 206 changes the length of the forward protection period for monitoring whether the detection signal is shifted from the detection window according to the window generation timing 8.

  In the section where the crosstalk intensity is strong, the length of the protection period is made longer than the section where the crosstalk intensity is weak. That is, when the crosstalk determination result 7 is “H”, the protection period is longer than when the crosstalk determination result 7 is “L”.

  As an example of a method for extending the forward protection period, a method of thinning the detection interval of the synchronization signal can be given. That is, the length of the forward protection period can be changed by adjusting the generation frequency of the detection window. Specifically, in the section where the crosstalk intensity is strong, the generation frequency of the detection window is reduced compared to the section where the crosstalk intensity is weak.

  Here, the operation of the optical disc recording / reproducing apparatus 100 according to the present embodiment will be described with reference to FIGS. FIG. 5 is a diagram showing a state of forward protection in a section where crosstalk is strong. In the present embodiment, the unit sync detection window thinning interval is 4 when the sequencer in the unit sync cycle protection unit 206 is in the forward protection state.

  As shown in FIG. 5, since the generation interval of the unit sync detection window is long in the section where the crosstalk intensity is strong, even if the detection unit sink 5 is not included in the detection window and transitions to the forward protection state S03, the number of consecutive undetected times It is possible to lengthen the time until the threshold value is reached.

  In this way, by reducing the generation frequency of the unit sync detection window, even if the unit sync is lost or shifted due to crosstalk and is not included in the detection window, synchronization can be maintained. Can do. As a result, it is possible to stably generate an ADIP address, and the stability of the system can be improved.

  On the other hand, FIG. 6 shows a state of resynchronization when the position and timing on the optical disc 101 are shifted due to an accidental noise such as a physical defect on the disc or disturbance of the spindle. In the section where the crosstalk is weak, unlike the section where the crosstalk is strong, the occurrence frequency of the timing shift or the like is low. For this reason, when a timing shift occurs in a section where crosstalk is weak, it is considered that there are many cases where the timing is truly shifted.

  As shown in FIG. 6, since the generation interval of the unit sync detection window is short in the section where the crosstalk intensity is weak, when the detection unit sink 5 is not included in the detection window and transitions to the forward protection state S03, continuous non-detection occurs. The time until the number of times reaches the threshold can be shortened. As described above, when the detection unit sink 5 is displaced from the detection window after synchronization is established, it is possible to cancel the synchronization state in a short time and establish synchronization again.

  As described above, according to the present invention, even when the synchronization signal is lost due to strong crosstalk, the synchronization state can be maintained, and if the timing deviation is truly generated in a section where the crosstalk is weak, a short time is required. You can reestablish synchronization in time. For this reason, it is possible to avoid performance degradation of the recording / reproducing process.

  The present invention has been described above based on the embodiment. The embodiment is an exemplification, and various changes and increases / decreases may be added without departing from the gist of the present invention. It will be understood by those skilled in the art that modifications to which these changes and increases / decreases are also within the scope of the present invention.

  As a method for extending the forward protection period, the threshold value for the number of consecutive non-detections may be switched without changing the synchronization signal detection interval. That is, the length of the forward protection period can be changed by changing the threshold of the number of times that each of the synchronization signals is not included in the corresponding detection window. Specifically, the threshold for the number of consecutive undetections in a section where the crosstalk intensity is strong is set higher than that in a weak section.

1 ADIP pulse 2 unprotected word sync 3 unprotected unit sync 4 data bit 5 detection unit sync 6 unit timing 7 crosstalk determination result 8 window generation timing 9 detection word sync 10 window generation timing 11 latch timing 12 buffering data 100 optical disk recording / Reproducing apparatus 101 Optical disc 102 Spindle motor 103 Motor driver 104 Optical head 105 Servo circuit 106 Wobble circuit 107 RF circuit 108 Address generation circuit 109 Recording data encoding / reproducing data decoding circuit 110 Buffer memory 111 Buffer I / F
112 System controller 113 Host PC
114 Recording Compensation Circuit 115 Laser Driver 201 Phase Modulation Unit Detection Unit 202 Word Sync Detection Unit 203 Unit Sync Detection Unit 204 Data Bit Detection Unit 205 Word Sync Period Protection Unit 206 Unit Sync Period Protection Unit 207 Word Counter 208 Unit Counter 209 Data Latch 210 Error correction unit 211 Crosstalk determination unit 212 Window generation timing selection circuit S00 Initial state S01 Back protection state S02 Synchronization state S03 Forward protection state

Claims (7)

A reading unit for reading a wobble signal corresponding to the wobble formed on the optical disc;
A synchronization signal detection unit for detecting a synchronization signal from the wobble signal read by the reading unit;
When the interval of the synchronization signal is constant for a predetermined period, a cycle protection unit that establishes synchronization with the detection position of the synchronization signal as a synchronization position;
In a state where the synchronization is established, a detection window generating unit that generates a detection window indicating a period during which the synchronization signal is to be detected based on the synchronization position;
A crosstalk determining unit that determines a crosstalk intensity according to the number of times that the detection interval of the synchronization signal is a predetermined period;
A control unit that changes a length of a protection period for monitoring whether or not the detection window and the synchronization signal are shifted according to the crosstalk intensity determined by the crosstalk determination unit;
A wobble signal demodulator.   The wobble signal demodulator according to claim 1, wherein the control unit makes the protection period longer when the crosstalk intensity is equal to or greater than a threshold value than when the crosstalk intensity is smaller than the threshold value.   The wobble signal demodulator according to claim 1 or 2, wherein the length of the protection period is changed by adjusting a generation frequency of the detection window.   The wobble signal demodulation according to claim 1 or 2, wherein the length of the protection period is changed by changing a threshold value of the number of times that each of the synchronization signals is not included in a corresponding detection window. apparatus. In the protection period, further comprising a counter that counts the number of consecutive undetected times in which each of the synchronization signals is not continuously included in the corresponding detection window,
The wobble signal demodulation according to any one of claims 1 to 4, wherein when the number of consecutive undetections exceeds a threshold value, the state where the synchronization is established is canceled and synchronization is established again. apparatus.   The wobble signal demodulator according to any one of claims 1 to 5, wherein the detection window is periodically generated. Read the wobble signal corresponding to the wobble formed on the optical disc,
A synchronization signal is detected from the wobble signal,
When the interval of the synchronization signal is constant for a predetermined period, establish synchronization with the detection position of the synchronization signal as the synchronization position,
In a state where the synchronization is established, a detection window indicating a period in which the synchronization signal is to be detected based on the synchronization position is generated,
According to the number of times that the detection interval of the synchronization signal is a predetermined period, determine the crosstalk intensity,
According to the crosstalk intensity, change the length of the protection period for monitoring whether the detection window and the synchronization signal are shifted,
A wobble signal demodulation method comprising:

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