JP2011192721A - Semiconductor device, and method of mounting the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting method capable of securely mounting a semiconductor chip by improving positioning precision between an electrode on a mounting substrate and a semiconductor chip back electrode without any influence on a semiconductor chip size, and to provide a semiconductor device. <P>SOLUTION: The semiconductor device includes: the mounting substrate 101 having a wiring pattern on a surface; and a semiconductor chip 105 mounted on the mounting substrate 101 and having a wiring pattern formed on a transparent substrate 104 and including a ground electrode 110 and a signal electrode 109 at least on a reverse surface. The mounting substrate 101 and the wiring pattern on the reverse surface of the semiconductor chip 105 have reference marks 106 and 111 for alignment, respectively. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device used in a wireless communication device or the like and a mounting method thereof, and more particularly, to a semiconductor device and package mounting technology of a semiconductor integrated circuit used for high frequency applications.

  In recent years, semiconductor chips have been miniaturized and integrated, and research and development of a chip size package (CSP) having a chip size package equivalent to the chip size or the chip itself as a package has been actively conducted (for example, patents). See reference 1.) In particular, a wafer level CSP that performs packaging in a wafer state is attracting attention as a low-cost packaging method that can reduce assembly costs and the number of parts.

  In the wafer level CSP, since the ground electrode and the signal electrode are provided on the surface facing the mounting substrate of the semiconductor chip, it is possible to perform wiring between the chip and the mounting substrate simply by disposing on the mounting substrate. In this method, since the distance between the chip and the mounting substrate is short, indeterminate wire connection can be avoided in a high-frequency chip whose chip characteristics greatly affect the terminal connection state. Further, terminal connection loss can be minimized. For this reason, it is a very effective mounting method in a high frequency region.

  When mounting a back surface mounting type semiconductor chip such as a wafer level CSP on a mounting substrate, it is necessary to align it with an electrode on the mounting substrate side. In particular, in the case of a chip having a high degree of integration and a large number of electrodes and a semiconductor chip handling a high frequency whose terminal connection state easily affects the chip characteristics, highly accurate chip mounting position control is required. In the prior art shown in FIG. 3, the mounting position is determined by aligning the side surface (or chip end) of the chip 305 with the reference mark 306 on the mounting substrate 301. Further, a method of controlling the chip position by providing a solder ball so as to be in contact with the side surface of the chip when mounting a chip having a backside wiring such as a flip chip is also disclosed (see, for example, Patent Document 2).

On the other hand, gallium nitride (GaN), aluminum nitride (AlN) and indium nitride (InN) and the general formula is (In _x Al _1-x ) _y Ga _1-y N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) A nitride semiconductor, which is a mixed crystal represented by the following formula, is applied to an optical element by utilizing a wide band gap and a direct transition type band structure which are physical characteristics of the nitride semiconductor. In addition, application to electronic devices utilizing the feature that the breakdown electric field and the saturation electron velocity are large is also being studied. In particular, heterojunction field effect transistors (hereinafter abbreviated as HFETs) that use a two-dimensional electron gas appearing at the interface between Al _x Ga _1-x N and GaN epitaxially grown on a semi-insulating substrate are Development is progressing as an output high frequency device. There has been reported an MMIC in which an AlGaN / GaN HFET is integrated with a matching circuit and a bias circuit using a microstrip line on a sapphire substrate, which is a transparent substrate (see, for example, Non-Patent Document 1).

JP-A-9-64236 JP 2009-188260 A

2008 IEEE MTT-S Int. Microwave Symp, Dig. P.1293-1296

  However, the prior art has the following problems. When mounting a back surface mounting type semiconductor chip such as a wafer level CSP or a flip chip on a mounting substrate, the conventional technique for determining the mounting position with reference to the side surface of the chip has dicing position control and fluctuations in the amount of defects during dicing. May affect the accuracy of the mounting position. The displacement of the electrode position between the chip side and the mounting substrate side results in fluctuations in input and output impedances, resulting in an increase in reflection loss. In particular, in the case of a semiconductor chip that handles high frequencies, there are concerns about the occurrence of defective products due to mounting position shifts and a decrease in yield during mounting.

  The present invention solves the above-described problems, improves the alignment accuracy of the mounting substrate upper electrode and the semiconductor chip back surface electrode without affecting the semiconductor chip dimensions (side surface position), and enables the semiconductor chip to be mounted reliably. Another object of the present invention is to realize a semiconductor device.

  A first semiconductor device is mounted on a mounting substrate having a wiring pattern on a front surface, is formed on a transparent substrate, and has a wiring pattern including a ground electrode and a signal electrode on at least a back surface. Targeting a semiconductor device including a semiconductor chip, the wiring patterns on the mounting substrate and the back surface of the semiconductor chip each have a reference mark for alignment.

  With this configuration, when mounting a semiconductor chip on a mounting substrate, the reference mark on the back surface of the semiconductor chip and the reference mark on the mounting substrate are used, thereby affecting the semiconductor chip dimensions (side surface position). Without this, it is possible to improve the alignment accuracy of the mounting substrate upper electrode and the semiconductor chip back surface electrode. Since the semiconductor chip uses a transparent substrate, the reference mark on the back surface can be confirmed through the chip surface.

  The second semiconductor device is intended for a semiconductor device having a mounting substrate having a wiring pattern on the front surface and a semiconductor chip mounted on the mounting substrate and having a wiring pattern including at least a ground electrode and a signal electrode on the back surface. The mounting substrate has a first through hole, the semiconductor chip has a plurality of second through holes having a smaller diameter than the first through hole, and at least one of the second through holes is a first through hole. One through hole and the plane position coincide.

  With this configuration, when mounting a semiconductor chip on the mounting substrate, illumination is applied from the back side of the mounting substrate, and light transmitted to the chip surface is confirmed, so that the mounting substrate and the semiconductor chip are aligned. A deviation can be confirmed. On the semiconductor chip side, if a plurality of through holes are formed concentrically around a place corresponding to the first through hole on the mounting substrate, the distance and direction of the positional shift are determined depending on the intensity of transmitted light. Information can be obtained. This configuration can also be applied to a semiconductor chip that is mostly covered with a back electrode or an opaque semiconductor chip.

  According to the semiconductor device of the present invention, it is possible to align the electrode on the mounting substrate and the back electrode of the semiconductor chip without affecting the chip size (side surface position), and to suppress the positional deviation between each other to the minimum. . As a result, it is possible to reduce the high frequency loss due to the displacement of the high frequency chip.

(A) And (b) is the semiconductor device which concerns on 1st Embodiment, (a) is a top view, (b) is sectional drawing in the Ib-Ib line. (A) And (b) is the semiconductor device which concerns on 1st Embodiment, (a) is a top view, (b) is sectional drawing in the IIb-IIb line | wire. (A) And (b) is the semiconductor device which concerns on 1st Embodiment, (a) is a top view, (b) is sectional drawing in a IIIb-IIIb line | wire.

  Hereinafter, semiconductor devices according to embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a cross-sectional view and a top view schematically showing the structure of the semiconductor device according to the first embodiment of the present invention. A reference mark 106 representing the mounting position of the high-frequency semiconductor chip 105 formed on the transparent substrate 104 is formed as a part of the wiring pattern on the mounting substrate 101 together with the ground electrode 102 and the signal wiring 103. A conductive fixing agent 107 such as silver paste is mounted on the back surface signal electrode 109 and the ground electrode 110 connected to the back surface of the substrate through the signal via 108 of the semiconductor chip 105 having the signal wiring 112 on the semiconductor chip. The semiconductor chip 105 is disposed on the substrate by applying it to the connection portion between the ground electrode 102 and the signal wiring 103. At this time, by confirming the reference mark 111 formed on the back surface of the semiconductor chip from the top of the transparent substrate 104 and the reference mark 106 on the mounting substrate, the signal wiring 103 on the mounting substrate and the signal on the back surface of the semiconductor chip 105 are confirmed. The electrode 109 can be disposed without being misaligned. Since the conductive fixing agent 107 is applied at the time of placement, if it is placed at an incorrect position, it spreads to places where the conductive fixing agent is unnecessary, and in some cases, the signal line and the ground electrode are connected. There is a risk of short circuit. Since the chip position can be accurately grasped in advance by the presence of the reference mark, it is possible to suppress the occurrence of defects due to misplacement. After the semiconductor chip 105 is disposed on the mounting substrate 101, the semiconductor device of this embodiment is obtained by drying in a constant temperature bath.

  Here, the transparent substrate 104 is obtained by epitaxially growing a GaN / AlGaN semiconductor layer on a sapphire substrate, for example, and an integrated circuit including an AlGaN / GaN HFET is formed on the surface. In addition to the sapphire substrate, silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), or a substrate in which these are laminated can be configured in a similar manner as long as the substrate is transparent. is there. Further, the semiconductor chip 105 is not limited to the AlGaN / GaN system.

(Second Embodiment)
FIG. 2 is a cross-sectional view and a top view schematically showing a semiconductor device according to the second embodiment of the present invention. A first through-hole 201 having a role of a reference mark indicating the mounting position of the high-frequency semiconductor chip 105 is formed on the mounting substrate 101 together with the ground electrode 102 and the signal wiring 103. A backside signal electrode 109 and a ground electrode 110 on which a conductive fixing agent 107 such as a silver paste is connected to the back side of the substrate through a signal via 108 of the semiconductor chip 105 on the mounting substrate, and a ground electrode on the mounting substrate 101. The semiconductor chip 105 having the signal wiring 112 on the semiconductor chip is disposed on the connection portion between the wiring 102 and the signal wiring 103. A plurality of second through holes 202 having a diameter smaller than that of the first through holes 201 are formed in the semiconductor chip 105. The second through holes 202 are preferably formed so as to be arranged concentrically in addition to the positions corresponding to the first through holes 201. When the semiconductor chip 105 is disposed, when the light 203 is irradiated from the back surface of the mounting substrate 101, the light 204 that passes through the second through-hole at the center when the mounting substrate 101 and the semiconductor chip 105 are in the same position. Is the strongest. When the positions do not match, the light 204 ′ transmitted through the second peripheral through hole becomes strong, so that the correction direction and the approximate distance can be known. By adjusting the chip position and placing it on the mounting substrate 101 in this manner, it is possible to suppress the occurrence of defects due to placement mistakes. After the semiconductor chip 105 is disposed on the mounting substrate 101, the semiconductor device of this embodiment is obtained by drying in a constant temperature bath.

  The configuration of the present embodiment is applicable to a semiconductor chip that is mostly covered with a back electrode or an opaque semiconductor chip.

  Here, the transparent substrate 104 is obtained by epitaxially growing a GaN / AlGaN semiconductor layer on a sapphire substrate, for example, and an integrated circuit including an AlGaN / GaN HFET is formed on the surface. In addition to the sapphire substrate, silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), or a laminate of these can be used as long as the substrate is transparent. is there. Further, the semiconductor chip 105 is not limited to the AlGaN / GaN system.

  The semiconductor device according to the present invention is very effective as a radio communication device for high output and high frequency.

Reference Signs List 101 mounting substrate 102 ground electrode 103 signal wiring 104 transparent substrate 105 semiconductor chip 106 reference mark 107 conductive fixing agent 108 signal via 109 signal electrode 110 ground electrode 111 reference mark 112 signal wiring 201 on semiconductor chip first through hole 202 2nd through-hole 203 light 204 light 204 'light

Claims (5)

A mounting board having a wiring pattern on the surface;
A semiconductor chip mounted on the mounting substrate, formed on a transparent substrate, and having a wiring pattern including at least a ground electrode and a signal electrode on the back surface;
The wiring patterns on the mounting substrate and the back surface of the semiconductor chip each have a reference mark for alignment. A mounting board having a wiring pattern on the surface;
The semiconductor chip is mounted on the mounting board in the previous period and has a wiring pattern including at least a ground electrode and a signal electrode on the back surface, and
The mounting substrate has a first through hole,
The semiconductor chip has a plurality of second through holes having a diameter smaller than that of the first through holes,
At least one of the second through-holes has a planar position that matches the first through-hole. A method of mounting a semiconductor chip having a wiring pattern formed on a transparent substrate on the mounting substrate having a wiring pattern on the front surface and including at least a ground electrode and a signal electrode on the back surface,
A method for mounting a semiconductor device, comprising: a step of determining a chip position on a mounting substrate using a reference mark on the semiconductor chip and a reference mark on the mounting substrate. A method of mounting a semiconductor chip having a wiring pattern including at least a ground electrode and a signal electrode on a back surface on a mounting substrate having a wiring pattern on a front surface,
Forming a first through hole in the mounting substrate;
Forming a plurality of second through holes in the semiconductor chip;
A method of mounting a semiconductor device, comprising the step of determining a chip mounting position so that at least one of the second through holes coincides with a plane position of the first through hole.   5. The method of mounting a semiconductor device according to claim 4, wherein in the step of determining the chip position, transmitted light of light irradiated on the back surface is used.

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