JP2011181592A - Active matrix display device and method for manufacturing active matrix display device - Google Patents
Active matrix display device and method for manufacturing active matrix display device Download PDFInfo
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 112
- 239000004065 semiconductor Substances 0.000 claims abstract description 86
- 239000000758 substrate Substances 0.000 claims abstract description 68
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 56
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 49
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 49
- 239000001301 oxygen Substances 0.000 claims abstract description 49
- 239000004033 plastic Substances 0.000 claims abstract description 43
- 229920003023 plastic Polymers 0.000 claims abstract description 43
- 238000002834 transmittance Methods 0.000 claims abstract description 36
- 239000010409 thin film Substances 0.000 claims abstract description 35
- 239000000203 mixture Substances 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims description 62
- 229920000642 polymer Polymers 0.000 claims description 39
- 125000003118 aryl group Chemical group 0.000 claims description 22
- 238000004544 sputter deposition Methods 0.000 claims description 13
- -1 acrylate compound Chemical class 0.000 claims description 12
- 239000000126 substance Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 10
- 229910052738 indium Inorganic materials 0.000 claims description 10
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052771 Terbium Inorganic materials 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052787 antimony Inorganic materials 0.000 claims description 5
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 5
- 229910052785 arsenic Inorganic materials 0.000 claims description 5
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 5
- 229910052797 bismuth Inorganic materials 0.000 claims description 5
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 229910052793 cadmium Inorganic materials 0.000 claims description 5
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 5
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 claims description 5
- 229910052753 mercury Inorganic materials 0.000 claims description 5
- 229910052699 polonium Inorganic materials 0.000 claims description 5
- HZEBHPIOVYHPMT-UHFFFAOYSA-N polonium atom Chemical compound [Po] HZEBHPIOVYHPMT-UHFFFAOYSA-N 0.000 claims description 5
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052714 tellurium Inorganic materials 0.000 claims description 5
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims description 5
- GZCRRIHWUXGPOV-UHFFFAOYSA-N terbium atom Chemical compound [Tb] GZCRRIHWUXGPOV-UHFFFAOYSA-N 0.000 claims description 5
- 229910052716 thallium Inorganic materials 0.000 claims description 5
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 claims description 5
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- 229910044991 metal oxide Inorganic materials 0.000 claims description 4
- 150000004706 metal oxides Chemical class 0.000 claims description 4
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- 230000006866 deterioration Effects 0.000 abstract description 3
- 229910052755 nonmetal Inorganic materials 0.000 abstract 2
- 230000000903 blocking effect Effects 0.000 abstract 1
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Abstract
Description
この発明は、特に、薄膜トランジスタを有するアクティブマトリクス表示装置及びアクティブマトリクス表示装置の製造方法に関するものである。 The present invention particularly relates to an active matrix display device having thin film transistors and a method for manufacturing the active matrix display device.
従来より、データ線と走査線との交点毎に画素を駆動する薄膜トランジスタ（ＴＦＴ）を備えたアクティブマトリクス表示装置が知られている。このアクティブマトリクス表示装置は、画素内に能動素子を持たないパッシブマトリクス表示装置に比べ、画質が優れ、高画質の有機ＥＬ表示装置や液晶表示装置の主流となっている。 2. Description of the Related Art Conventionally, an active matrix display device including a thin film transistor (TFT) that drives a pixel at each intersection of a data line and a scanning line is known. This active matrix display device has a higher image quality than the passive matrix display device having no active element in the pixel, and has become the mainstream of high-quality organic EL display devices and liquid crystal display devices.
このアクティブマトリクス表示装置のＴＦＴの材料としては、現在広く用いられているアモルファスシリコンより低温で成膜でき、かつ、高い移動度が得られる半導体材料として酸化物半導体を用いた半導体デバイスが検討されている（特許文献１）。 As a material for TFT of this active matrix display device, a semiconductor device using an oxide semiconductor as a semiconductor material which can be formed at a lower temperature than amorphous silicon which is widely used at the same time and can obtain high mobility has been studied. (Patent Document 1).
このような半導体層をチャネルに用いた薄膜トランジスタは、可視域の波長に対しては透過率が高いが、紫外線領域に吸収を有し、この紫外線領域の波長の光が当たった場合、ＯＦＦ時の抵抗が下がり表示装置のスイッチング素子として用いる場合に十分なＯＮ／ＯＦＦ比が得られないということがあり、例えば基板の貼り合せプロセスなどで紫外線を使用する表示装置に用いる際の課題となっている。また、液晶表示装置に用いる場合にはバックライトとして用いられる冷陰極管や発光ダイオードからの紫外線の影響により特性が悪化してしまうことが課題となっている。 A thin film transistor using such a semiconductor layer as a channel has a high transmittance with respect to a wavelength in the visible region, but has an absorption in the ultraviolet region. When used as a switching element of a display device due to low resistance, a sufficient ON / OFF ratio may not be obtained, which is a problem when used in a display device that uses ultraviolet rays, for example, in a substrate bonding process. . In addition, when used in a liquid crystal display device, the problem is that the characteristics deteriorate due to the influence of ultraviolet rays from a cold cathode tube or a light emitting diode used as a backlight.
この発明は、以上の点を考慮してなされたもので、紫外線の影響により特性が悪化することを防止することが可能なアクティブマトリクス表示装置及びアクティブマトリクス表示装置の製造方法を提案することを目的とする。 The present invention has been made in consideration of the above points, and an object thereof is to propose an active matrix display device capable of preventing deterioration of characteristics due to the influence of ultraviolet rays and a method of manufacturing the active matrix display device. And
前記課題を解決し、かつ目的を達成するために、この発明は、以下のように構成した。 In order to solve the above-described problems and achieve the object, the present invention is configured as follows.
請求項１に記載の発明は、波長２００ｎｍから３２０ｎｍにおける光線透過率が１０％以下であり、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板上に、
酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを有することを特徴とするアクティブマトリクス表示装置である。
The invention according to claim 1 has a light transmittance of 10% or less at a wavelength of 200 nm to 320 nm, and a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm.
A channel is formed using a semiconductor layer containing a nonmetallic element which is a mixture of oxygen (O) and nitrogen (N) and has a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 for a channel. An active matrix display device having a thin film transistor formed in the above manner.
請求項２に記載の発明は、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層を有し、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板上に、
酸素（Ｏ）と窒素（Ｎ）の混合物で酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを有することを特徴とするアクティブマトリクス表示装置である。
The invention according to claim 2 has a light shielding layer having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm, and on a plastic substrate having a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm. In addition,
A channel is formed using a semiconductor layer containing a nonmetallic element having a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 in a mixture of oxygen (O) and nitrogen (N) as a channel. An active matrix display device having a thin film transistor formed.
請求項３に記載の発明は、前記波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層を、前記薄膜トランジスタの上方に形成したことを特徴とする請求項１または請求項２に記載のアクティブマトリクス表示装置である。 The invention described in claim 3 is characterized in that a light shielding layer having a light transmittance of 10% or less at the wavelength of 200 nm to 370 nm is formed above the thin film transistor. This is an active matrix display device.
請求項４に記載の発明は、前記プラスチック基板が、芳香族を含む高分子を有してなることを特徴とする請求項１乃至請求項３のいずれか１項に記載のアクティブマトリクス表示装置である。 According to a fourth aspect of the present invention, in the active matrix display device according to any one of the first to third aspects, the plastic substrate has a polymer containing an aromatic. is there.
請求項５に記載の発明は、前記芳香族を含む高分子が、アクリレート化合物の重合体を主としてなることを特徴とする請求項４に記載のアクティブマトリクス表示装置である。 The invention according to claim 5 is the active matrix display device according to claim 4, wherein the polymer containing an aromatic mainly comprises a polymer of an acrylate compound.
請求項６に記載の発明は、前記芳香族を含む高分子が、エポキシ化合物の重合体を主としてなることを特徴とする請求項４に記載のアクティブマトリクス表示装置である。 The invention according to claim 6 is the active matrix display device according to claim 4, wherein the polymer containing an aromatic mainly comprises a polymer of an epoxy compound.
請求項７に記載の発明は、前記芳香族を含む高分子が、オキセタン化合物の重合体を主としてなることを特徴とする請求項４に記載のアクティブマトリクス表示装置である。 The invention according to claim 7 is the active matrix display device according to claim 4, wherein the polymer containing an aromatic mainly comprises a polymer of an oxetane compound.
請求項８に記載の発明は、前記芳香族を含む高分子が、ポリアミドを主としてなることを特徴とする請求項４に記載のアクティブマトリクス表示装置である。 The invention according to claim 8 is the active matrix display device according to claim 4, characterized in that the aromatic polymer contains mainly polyamide.
請求項９に記載の発明は、前記芳香族を含む高分子が、ポリイミドを主としてなることを特徴とする請求項４に記載のアクティブマトリクス表示装置である。 The invention according to claim 9 is the active matrix display device according to claim 4, wherein the polymer containing an aromatic is mainly polyimide.
請求項１０に記載の発明は、前記プラスチック基板は、３０℃から１５０℃における線膨張係数が２０ｐｐｍ／℃以下であることを特徴とする請求項１乃至請求項９のいずれか１項に記載のアクティブマトリクス表示装置である。 According to a tenth aspect of the present invention, in the plastic substrate, the linear expansion coefficient at 30 ° C. to 150 ° C. is 20 ppm / ° C. or less. This is an active matrix display device.
請求項１１に記載の発明は、前記プラスチック基板が、無機物を含有してなることを特徴とする請求項１０に記載のアクティブマトリクス表示装置である。 The invention according to claim 11 is the active matrix display device according to claim 10, wherein the plastic substrate contains an inorganic substance.
請求項１２に記載の発明は、前記無機物が、直径１ｎｍ以上３００ｎｍ以下のガラス、シリカまたは金属酸化物であることを特徴とする請求項１１に記載のアクティブマトリクス表示装置である。 The invention according to claim 12 is the active matrix display device according to claim 11, wherein the inorganic substance is glass, silica or metal oxide having a diameter of 1 nm to 300 nm.
請求項１３に記載の発明は、前記無機物が、ガラス繊維であることを特徴とする請求項１１に記載のアクティブマトリクス表示装置である。 A thirteenth aspect of the present invention is the active matrix display device according to the eleventh aspect, wherein the inorganic substance is a glass fiber.
請求項１４に記載の発明は、前記半導体層が、アモルファスであることを特徴とする請求項１乃至請求項１３のいずれか１項に記載のアクティブマトリクス表示装置である。 The invention according to claim 14 is the active matrix display device according to any one of claims 1 to 13, wherein the semiconductor layer is amorphous.
請求項１５に記載の発明は、前記半導体層が、非金属元素の窒素（Ｎ）、酸素（Ｏ）のうち少なくともひとつ、半金属元素のホウ素（Ｂ）、シリコン（Ｓｉ）、ゲルマニウム（Ｇｅ）、ヒ素（Ａｓ）、アンチモン（Ｓｂ）、テルル（Ｔｅ）、ポロニウム（Ｐｏ）のうち少なくともひとつ、および金属元素のアルミニウム（Ａｌ）、亜鉛（Ｚｎ）、ガリウム（Ｇａ）、カドニウム（Ｃｄ）、インジウム（Ｉｎ）、錫（Ｓｎ）、水銀（Ｈｇ）、タリウム（Ｔｌ）、テルビウム（Ｐｂ）、ビスマス（Ｂｉ）のうち少なくともひとつを含み、
前記非金属元素が、少なくとも酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２であることを特徴とする請求項１乃至請求項１４のいずれか１項に記載のアクティブマトリクス表示装置である。
According to a fifteenth aspect of the present invention, the semiconductor layer includes at least one of non-metallic elements nitrogen (N) and oxygen (O), semi-metallic elements boron (B), silicon (Si), and germanium (Ge). , Arsenic (As), antimony (Sb), tellurium (Te), polonium (Po), and the metal elements aluminum (Al), zinc (Zn), gallium (Ga), cadmium (Cd), indium (In), tin (Sn), mercury (Hg), thallium (Tl), terbium (Pb), and at least one of bismuth (Bi),
The nonmetallic element is at least a mixture of oxygen (O) and nitrogen (N), and the ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is 0 to 2. The active matrix display device according to any one of claims 1 to 14.
請求項１６に記載の発明は、前記半導体層が、インジウム（Ｉｎ）、錫（Ｓｎ）、シリコン（Ｓｉ）、酸素（Ｏ）、窒素（Ｎ）を主としてなることを特徴とする請求項１５に記載のアクティブマトリクス表示装置である。 The invention described in claim 16 is characterized in that the semiconductor layer is mainly composed of indium (In), tin (Sn), silicon (Si), oxygen (O), and nitrogen (N). The active matrix display device described.
請求項１７に記載の発明は、請求項１乃至請求項１６のいずれか１項に記載のアクティブマトリクス表示装置の半導体層を、スパッタ装置を用いて形成することを特徴とするアクティブマトリクス表示装置の製造方法である。 According to a seventeenth aspect of the present invention, there is provided an active matrix display device in which the semiconductor layer of the active matrix display device according to any one of the first to sixteenth aspects is formed using a sputtering device. It is a manufacturing method.
前記構成により、この発明は、以下のような効果を有する。 With the above configuration, the present invention has the following effects.
請求項１に記載の発明では、プラスチック基板に波長２００ｎｍから３２０ｎｍにおける光線透過率が１０％以下であり、波長４５０ｎｍ，波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板を用いることにより、酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを用いた場合でも、ＯＦＦ時の抵抗が下がることを抑制できるとともに、青，赤，緑の波長の光に対しては高い光線透過率を有するため、カラー表示を行う表示装置に用いることができる。 In the first aspect of the present invention, a plastic substrate having a light transmittance of 10% or less at a wavelength of 200 nm to 320 nm and a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm is used as the plastic substrate. Thus, a channel of a semiconductor layer containing a nonmetallic element which is a mixture of oxygen (O) and nitrogen (N) and has a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 can be obtained. Even in the case of using a thin film transistor formed for the display, it is possible to suppress a decrease in OFF resistance and to have a high light transmittance with respect to light of blue, red, and green wavelengths. Can be used in the device.
請求項２に記載の発明では、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層を有し、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板を用いることにより、酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを用いた場合でも、ＯＦＦ時の抵抗が下がることを抑制できるとともに、青，赤，緑の波長の光に対しては高い光線透過率を有するため、カラー表示を行う表示装置に用いることができる。 In the invention according to claim 2, a plastic substrate having a light-shielding layer having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm and having a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm. A semiconductor layer containing a nonmetallic element that is a mixture of oxygen (O) and nitrogen (N) and has a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 Even when a thin film transistor formed using a channel is used, it is possible to suppress a decrease in resistance when OFF, and a high light transmittance with respect to light of blue, red, and green wavelengths. It can be used for a display device.
請求項３に記載の発明では、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層を、薄膜トランジスタの上方に形成しており、例えば液晶表示装置を製造する際に紫外線照射により配向膜の処理を行う場合など、プラスチック基板の薄膜トランジスタ側から紫外線が照射される場合があるので、半導体の上方に遮光層を形成することが好ましい。 In the invention according to claim 3, a light shielding layer having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm is formed above the thin film transistor. For example, when manufacturing a liquid crystal display device, the alignment film is irradiated by ultraviolet irradiation. In the case of performing the above process, ultraviolet light may be irradiated from the thin film transistor side of the plastic substrate. Therefore, it is preferable to form a light shielding layer above the semiconductor.
請求項４に記載の発明では、プラスチック基板が、芳香族を含む高分子を有してなり、芳香族を含む高分子が可視光に近い紫外線領域にまで吸収を持つので、このような高分子を用いることが好ましい。 In the invention according to claim 4, the plastic substrate has a polymer containing an aromatic, and the polymer containing an aromatic has absorption in an ultraviolet region close to visible light. Is preferably used.
請求項５に記載の発明では、芳香族を含む高分子が、アクリレート化合物の重合体を主としてなり、アクリレート化合物の場合、熱または光により架橋することにより波長３５０ｎｍ以上の透明性に優れる基板が得られるので好ましい。 In the invention according to claim 5, the polymer containing an aromatic is mainly a polymer of an acrylate compound, and in the case of an acrylate compound, a substrate excellent in transparency having a wavelength of 350 nm or more is obtained by crosslinking with heat or light. This is preferable.
請求項６に記載の発明では、芳香族を含む高分子が、エポキシ化合物の重合体を主としてなり、エポキシ化合物の場合、熱または光により架橋することにより光学等方性と耐熱性のバランスのよいプラスチック基板が得られ好ましい。 In the invention described in claim 6, the polymer containing aromatics is mainly a polymer of an epoxy compound, and in the case of an epoxy compound, a good balance between optical isotropy and heat resistance is obtained by crosslinking with heat or light. A plastic substrate is preferably obtained.
請求項７に記載の発明では、芳香族を含む高分子が、オキセタン化合物の重合体を主としてなり、オキセタン化合物の場合、熱または光により架橋することにより光学等方性と耐熱性のバランスのよいプラスチック基板が得られ好ましい。 In the invention according to claim 7, the polymer containing the aromatic mainly comprises a polymer of an oxetane compound, and in the case of the oxetane compound, the optical isotropy and the heat resistance are well balanced by crosslinking with heat or light. A plastic substrate is preferably obtained.
請求項８に記載の発明では、芳香族を含む高分子が、ポリアミドを主としてなり、ポリアミドの場合、それらの溶液またはそれらの前駆体の溶液をキャストして加熱することで、耐熱性に優れるプラスチック基板が得られ好ましい。 In the invention according to claim 8, the polymer containing aromatics is mainly polyamide, and in the case of polyamide, a plastic excellent in heat resistance is obtained by casting and heating the solution of the solution or the precursor thereof. A substrate is preferably obtained.
請求項９に記載の発明では、芳香族を含む高分子が、ポリイミドを主としてなり、ポリイミドの場合、それらの溶液またはそれらの前駆体の溶液をキャストして加熱することで、耐熱性に優れるプラスチック基板が得られ好ましい。 In the invention according to claim 9, the polymer containing aromatic is mainly polyimide, and in the case of polyimide, a plastic having excellent heat resistance is obtained by casting and heating the solution of the solution or the solution of the precursor. A substrate is preferably obtained.
請求項１０に記載の発明では、プラスチック基板は、３０℃から１５０℃における線膨張係数が２０ｐｐｍ／℃以下であり、プラスチック基板の線膨張係数が酸化物半導体や金属配線と近いほうが、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 In the invention according to claim 10, the plastic substrate has a linear expansion coefficient of 20 ppm / ° C. or less at 30 ° C. to 150 ° C., and the oxide semiconductor has a linear expansion coefficient closer to that of an oxide semiconductor or metal wiring. Further, it is preferable that warpage and cracks in the oxide semiconductor hardly occur when a metal wiring is formed.
請求項１１に記載の発明では、プラスチック基板が、無機物を含有してなり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 In the invention described in claim 11, it is preferable that the plastic substrate contains an inorganic substance, and warps and cracks of the oxide semiconductor hardly occur when an oxide semiconductor or a metal wiring is formed.
請求項１２に記載の発明では、無機物が、直径１ｎｍ以上３００ｎｍ以下のガラス、シリカまたは金属酸化物であり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 In the invention described in claim 12, the inorganic substance is glass, silica or metal oxide having a diameter of 1 nm or more and 300 nm or less, and warping or cracking of the oxide semiconductor is less likely to occur when an oxide semiconductor or metal wiring is formed. preferable.
請求項１３に記載の発明では、無機物が、ガラス繊維であり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 In the invention described in claim 13, the inorganic substance is glass fiber, and it is preferable that warpage and cracks in the oxide semiconductor are less likely to occur when an oxide semiconductor or a metal wiring is formed.
請求項１４に記載の発明では、半導体層が、アモルファスであると、結晶質よりもフレキシビリティが良好であり、フレキシブルなプラスチック基板上に形成する場合には好ましい。 In the invention described in claim 14, when the semiconductor layer is amorphous, the flexibility is better than that of crystalline, and it is preferable when the semiconductor layer is formed on a flexible plastic substrate.
請求項１５に記載の発明では、半導体層は、非金属元素の窒素（Ｎ）、酸素（Ｏ）のうち少なくともひとつ、半金属元素のホウ素（Ｂ）、シリコン（Ｓｉ）、ゲルマニウム（Ｇｅ）、ヒ素（Ａｓ）、アンチモン（Ｓｂ）、テルル（Ｔｅ）、ポロニウム（Ｐｏ）のうち少なくともひとつ、および金属元素のアルミニウム（Ａｌ）、亜鉛（Ｚｎ）、ガリウム（Ｇａ）、カドニウム（Ｃｄ）、インジウム（Ｉｎ）、錫（Ｓｎ）、水銀（Ｈｇ）、タリウム（Ｔｌ）、テルビウム（Ｐｂ）、ビスマス（Ｂｉ）のうち少なくともひとつを含み、非金属元素が、少なくとも酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２であることで、半導体層への窒素（Ｎ）の導入により比較的高い電界効果移動度を実現できる。また、半導体層への窒素（Ｎ）の導入によりバンドギャップを広げることで、光による特性変動をさらに抑制することができ、熱による特性変動も抑制することができる。 In the invention according to claim 15, the semiconductor layer includes at least one of nitrogen (N) and oxygen (O) as non-metallic elements, boron (B) as a metalloid element, silicon (Si), germanium (Ge), At least one of arsenic (As), antimony (Sb), tellurium (Te), polonium (Po), and the metal elements aluminum (Al), zinc (Zn), gallium (Ga), cadmium (Cd), indium ( In), tin (Sn), mercury (Hg), thallium (Tl), terbium (Pb), and bismuth (Bi), and the nonmetallic elements are at least oxygen (O) and nitrogen (N). In the mixture, the ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is 0 to 2, so that the introduction of nitrogen (N) into the semiconductor layer causes a relatively high field effect transfer. Degree can be realized. Further, by widening the band gap by introducing nitrogen (N) into the semiconductor layer, characteristic fluctuation due to light can be further suppressed, and characteristic fluctuation due to heat can also be suppressed.
請求項１６に記載の発明では、半導体層が、インジウム（Ｉｎ）、錫（Ｓｎ）、シリコン（Ｓｉ）、酸素（Ｏ）、窒素（Ｎ）を主としてなると、１５０℃以下で成膜した場合にも良好な電界効果移動度を得られやすいことに加え、よりバンドギャップを広げることで、光による特性変動をさらに抑制することができ、熱による特性変動も抑制することができる。 In the invention of claim 16, when the semiconductor layer is mainly formed of indium (In), tin (Sn), silicon (Si), oxygen (O), and nitrogen (N), the film is formed at 150 ° C. or lower. In addition to being able to easily obtain good field effect mobility, by further widening the band gap, it is possible to further suppress characteristic fluctuations due to light and to suppress characteristic fluctuations due to heat.
請求項１６に記載の発明では、請求項１乃至請求項１５のいずれか１項に記載のアクティブマトリクス表示装置の半導体層を、スパッタ装置を用いて形成することで、１５０℃以下で成膜した場合にも良好な電界効果移動度を得られやすい。 In the invention described in claim 16, the semiconductor layer of the active matrix display device described in any one of claims 1 to 15 is formed at 150 ° C. or lower by using a sputtering apparatus. Even in this case, it is easy to obtain good field effect mobility.
以下、この発明のアクティブマトリクス表示装置及びアクティブマトリクス表示装置の製造方法の実施の形態について説明する。この実施の形態は好ましい形態を示すものであるが、この発明はこれに限定されない。 Embodiments of an active matrix display device and a method of manufacturing the active matrix display device according to the present invention will be described below. Although this embodiment shows a preferred embodiment, the present invention is not limited to this.
［アクティブマトリクス表示装置］
（第１の実施の形態）
図１は第１の実施の形態のアクティブマトリクス表示装置の構成を説明する断面図である。
[Active matrix display device]
(First embodiment)
FIG. 1 is a cross-sectional view illustrating the configuration of the active matrix display device according to the first embodiment.
この実施の形態のアクティブマトリクス表示装置は、プラスチック基板２上に薄膜トランジスタ１を有し、プラスチック基板２の上面には、バリア層３が形成されている。このバリア層３の上面には、絶縁層４が設けられ、絶縁層４の上面には、層間絶縁膜５が設けられている。 The active matrix display device of this embodiment has a thin film transistor 1 on a plastic substrate 2, and a barrier layer 3 is formed on the upper surface of the plastic substrate 2. An insulating layer 4 is provided on the upper surface of the barrier layer 3, and an interlayer insulating film 5 is provided on the upper surface of the insulating layer 4.
薄膜トランジスタ１は、金属層６ａ，６ｂ，６ｃと、半導体層７とを有し、半導体層７の下面が絶縁層４と接し、この半導体層７の上面が金属層６ａ，６ｂ及び層間絶縁膜５と接し、金属層６ｃは、バリア層３の上面と接し、絶縁層４の下面と接し、半導体層７をチャネル、金属層６ａをソース電極、金属層６ｂをドレイン電極、および金属層６ｃをゲート電極、絶縁層４をゲート絶縁膜として用いている。図１では上から、金属層６ａおよび６ｂ、半導体層７、絶縁層４、金属層６ｃの順となっている（ボトムゲート構造）が、場合により上下を逆にして、上から金属層６ｃ、絶縁層４、半導体層７、金属層６ａおよび６ｂ（トップゲート構造）としても良いことは言うまでもない。 The thin film transistor 1 includes metal layers 6 a, 6 b, 6 c and a semiconductor layer 7, the lower surface of the semiconductor layer 7 is in contact with the insulating layer 4, and the upper surface of the semiconductor layer 7 is the metal layers 6 a, 6 b and the interlayer insulating film 5. The metal layer 6c is in contact with the upper surface of the barrier layer 3, is in contact with the lower surface of the insulating layer 4, the semiconductor layer 7 is a channel, the metal layer 6a is a source electrode, the metal layer 6b is a drain electrode, and the metal layer 6c is a gate. The electrode and insulating layer 4 are used as a gate insulating film. In FIG. 1, the metal layers 6a and 6b, the semiconductor layer 7, the insulating layer 4, and the metal layer 6c are arranged in this order from the top (bottom gate structure). Needless to say, the insulating layer 4, the semiconductor layer 7, and the metal layers 6a and 6b (top gate structure) may be used.
プラスチック基板２は、波長２００ｎｍから３２０ｎｍにおける光線透過率が１０％以下であり、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上である。 The plastic substrate 2 has a light transmittance of 10% or less at a wavelength of 200 nm to 320 nm, and a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm.
また、半導体層７は、酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層である。 The semiconductor layer 7 is a mixture of oxygen (O) and nitrogen (N), and a nonmetallic element having a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 is used. It is a semiconductor layer containing.
この実施の形態では、半導体層７が、非金属元素の窒素（Ｎ）、酸素（Ｏ）のうち少なくともひとつ、半金属元素のホウ素（Ｂ）、シリコン（Ｓｉ）、ゲルマニウム（Ｇｅ）、ヒ素（Ａｓ）、アンチモン（Ｓｂ）、テルル（Ｔｅ）、ポロニウム（Ｐｏ）のうち少なくともひとつ、および金属元素のアルミニウム（Ａｌ）、亜鉛（Ｚｎ）、ガリウム（Ｇａ）、カドニウム（Ｃｄ）、インジウム（Ｉｎ）、錫（Ｓｎ）、水銀（Ｈｇ）、タリウム（Ｔｌ）、テルビウム（Ｐｂ）、ビスマス（Ｂｉ）のうち少なくともひとつを含み、非金属元素が、少なくとも酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である。半導体層７としては、インジウム（Ｉｎ）、錫（Ｓｎ）、シリコン（Ｓｉ）、酸素（Ｏ）、窒素（Ｎ）を主としてなることが好ましい。 In this embodiment, the semiconductor layer 7 includes at least one of the nonmetallic elements nitrogen (N) and oxygen (O), the semimetallic elements boron (B), silicon (Si), germanium (Ge), arsenic ( As), antimony (Sb), tellurium (Te), polonium (Po), and the metal elements aluminum (Al), zinc (Zn), gallium (Ga), cadmium (Cd), indium (In) , Tin (Sn), mercury (Hg), thallium (Tl), terbium (Pb), bismuth (Bi), and the nonmetallic element is a mixture of at least oxygen (O) and nitrogen (N) The ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is 0 to 2. The semiconductor layer 7 is preferably mainly composed of indium (In), tin (Sn), silicon (Si), oxygen (O), and nitrogen (N).
半導体層７は、金属原料（Ｉｎ２Ｏ３， ＳｎＯ２）と絶縁体原料（Ｓｉ３Ｎ４）の組み合わせから作製する。金属原料は窒化物を用いようとしてもそれ自体が初めから絶縁体なので、他の絶縁体原料といくら混ぜても半導体は形成できない。このため、金属原料はそれ自体が金属である酸化物を用いる。これに対し、絶縁体原料に窒化物を用いると、両者を混ぜて作製される半導体層は酸素（Ｏ）と窒素（Ｎ）の両方を含む酸窒化物の混合物となる。混合の様子を次の式で表す。正負の価数が釣り合う条件で混合比ｘ、ｙを決めることができる。
The semiconductor layer 7 is produced from a combination of a metal raw material (In 2 O 3 , SnO 2 ) and an insulator raw material (Si 3 N 4 ). Even if nitride is used as the metal raw material, it is an insulator itself from the beginning, so that no semiconductor can be formed no matter how much it mixes with other insulator raw materials. For this reason, the metal raw material uses the oxide which is a metal itself. On the other hand, when nitride is used as the insulator material, a semiconductor layer formed by mixing both becomes an oxynitride mixture containing both oxygen (O) and nitrogen (N). The state of mixing is expressed by the following formula. The mixing ratios x and y can be determined under conditions where the positive and negative valences are balanced.
主たる金属原料Ｉｎ２Ｏ３の混合比ｘ、絶縁体材料Ｓｉ３Ｎ４の混合比ｙとすると、価数釣り合いから、従たる金属原料ＳｎＯ２の混合比は６−ｘとなる。金属原料と絶縁体原料の比ｘ：ｙは、原料それぞれのバンドギャップと、混合後に形成される半導体層のバンドギャップによって決まり、例えばｘの範囲としてはｘ＝０〜６（典型値５）、ｙの範囲としてはｙ＝０〜６（典型値３）が望ましい。 If the mixing ratio x of the main metal raw material In 2 O 3 and the mixing ratio y of the insulator material Si 3 N 4 are set, the mixing ratio of the subordinate metal raw material SnO 2 is 6-x from the valence balance. The ratio x: y of the metal raw material to the insulator raw material is determined by the band gap of each raw material and the band gap of the semiconductor layer formed after mixing, for example, x = 0 to 6 (typical value 5), The range of y is preferably y = 0 to 6 (typical value 3).
従って、Ｏ：Ｎの数量比は、
Ｏ＝１２〜１８ （典型値１７）
Ｎ＝０〜２４（典型値１２）となる。
Therefore, the quantity ratio of O: N is
O = 12-18 (typical value 17)
N = 0 to 24 (typical value 12).
従って、Ｏ：Ｎ＝１：０〜２ 酸素１に対する窒素の数密度比、すなわち酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）は０乃至２である。 Therefore, O: N = 1: 0 to 2 The number density ratio of nitrogen to oxygen 1, that is, the ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is 0 to 2.
この実施の形態では、酸素（Ｏ）と窒素（Ｎ）の混合物でＯに対するＮの比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層７をチャネルに用いた薄膜トランジスタ１であり、２００℃以下の温度で形成した場合にも、現在２００℃以上で形成しているアモルファスシリコンを用いた薄膜トランジスタと同等以上の性能を得ることができ、プラスチック基板２上に形成する場合に好適である。 In this embodiment, a semiconductor layer 7 containing a nonmetallic element having a ratio of N to O (N number density / O number density) of 0 to 2 in a mixture of oxygen (O) and nitrogen (N) is used for a channel. Even when the thin film transistor 1 is formed at a temperature of 200 ° C. or lower, it can obtain the same or better performance as the thin film transistor using amorphous silicon currently formed at a temperature of 200 ° C. or higher. It is suitable when doing.
一方、酸素（Ｏ）と窒素（Ｎ）の混合物でＯに対するＮの比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層７をチャネルに用いた薄膜トランジスタ１は、可視域の波長に対しては透過率が高いが、紫外線領域に吸収を有し、この紫外線領域の波長の光が当たった場合、ＯＦＦ時の抵抗が下がり表示装置のスイッチング素子として用いる場合に十分なＯＮ／ＯＦＦ比が得られないということがあり、例えば基板の貼り合せプロセスなどで紫外線を使用する表示装置に用いる際の課題となり、また、液晶表示装置に用いる場合にはバックライトとして用いられる冷陰極管や発光ダイオードからの紫外線の影響により特性が悪化してしまうことが課題となるが、プラスチック基板２に波長２００ｎｍから３２０ｎｍにおける光線透過率が１０％以下であり、波長４５０ｎｍ，波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板を用いることにより、酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層７をチャネルに用いて形成した薄膜トランジスタ１を用いた場合でも、ＯＦＦ時の抵抗が下がることを抑制できるとともに、青，赤，緑の波長の光に対しては高い光線透過率を有するため、カラー表示を行う表示装置に用いることができる。 On the other hand, a thin film transistor 1 using, as a channel, a semiconductor layer 7 containing a nonmetallic element having a ratio of N to O (N number density / O number density) of 0 to 2 in a mixture of oxygen (O) and nitrogen (N) is 0 to 2. In the case of using as a switching element of a display device, the transmittance is high with respect to the wavelength in the visible range, but it has absorption in the ultraviolet region, and when the light of the wavelength in the ultraviolet region hits, the resistance at the time of OFF decreases. A sufficient ON / OFF ratio may not be obtained. For example, it becomes a problem when used in a display device that uses ultraviolet rays in a substrate bonding process, and when used in a liquid crystal display device, it is used as a backlight. The problem is that the characteristics deteriorate due to the influence of ultraviolet rays from the cold cathode fluorescent lamp and the light emitting diode, but light at a wavelength of 200 nm to 320 nm is applied to the plastic substrate 2. By using a plastic substrate having a transmittance of 10% or less and a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm, a mixture of oxygen (O) and nitrogen (N) is used. Even when the thin film transistor 1 formed using a semiconductor layer 7 containing a nonmetallic element having a ratio of nitrogen (N) to nitrogen (N number density / O number density) of 0 to 2 as a channel is used, the resistance at OFF time Can be suppressed, and has a high light transmittance for light of blue, red, and green wavelengths, and thus can be used for a display device that performs color display.
酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２の範囲となるのは、上記「酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）は０乃至２」について述べたように、バンドギャップと価数釣り合いから決まる。仮にこの値が０（窒素が全く存在しない）となった場合、酸素の量によっては、半導体のバンドギャップが小さすぎて金属的となり、薄膜半導体装置１が常時オン状態となってしまう。逆にこの値が２を超える（酸素不足、窒素過剰）場合、半導体のバンドギャップが大きすぎて絶縁体的となり、薄膜半導体装置１が常時オフ状態となってしまう。いずれの場合もＴＦＴ特性として問題が起きる。 The ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is in the range of 0 to 2 because the ratio of nitrogen (N) to oxygen (O) (N number density / O The number density is determined from the band gap and the valence balance, as described for “0 to 2”. If this value is 0 (no nitrogen is present), depending on the amount of oxygen, the band gap of the semiconductor is too small and metallic, and the thin film semiconductor device 1 is always on. Conversely, when this value exceeds 2 (oxygen deficiency, nitrogen excess), the band gap of the semiconductor becomes too large and becomes insulating, and the thin film semiconductor device 1 is always turned off. In either case, problems occur as TFT characteristics.
また、プラスチック基板２が、芳香族を含む高分子を有してなり、芳香族を含む高分子が可視光に近い紫外線領域にまで吸収を持つので、このような高分子を用いることが好ましい。 Moreover, since the plastic substrate 2 has a polymer containing an aromatic, and the polymer containing an aromatic has absorption in an ultraviolet region close to visible light, such a polymer is preferably used.
また、芳香族を含む高分子が、アクリレート化合物の重合体を主としてなり、アクリレート化合物の場合、熱または光により架橋することにより波長３５０ｎｍ以上の透明性に優れる基板が得られるので好ましい。 In addition, the polymer containing an aromatic is mainly a polymer of an acrylate compound, and an acrylate compound is preferable because a substrate having a wavelength of 350 nm or more can be obtained by crosslinking with heat or light.
また、芳香族を含む高分子が、エポキシ化合物の重合体を主としてなり、エポキシ化合物の場合、熱または光により架橋することにより光学等方性と耐熱性のバランスのよいプラスチック基板が得られ好ましい。芳香族を含む高分子が、オキセタン化合物の重合体を主としてなり、オキセタン化合物の場合も同様に、熱または光により架橋することにより光学等方性と耐熱性のバランスのよいプラスチック基板が得られ好ましい。 In addition, the polymer containing aromatics is mainly composed of a polymer of an epoxy compound. In the case of an epoxy compound, a plastic substrate having a good balance between optical isotropy and heat resistance is preferably obtained by crosslinking with heat or light. The polymer containing an aromatic is mainly a polymer of an oxetane compound, and also in the case of an oxetane compound, a plastic substrate having a good balance between optical isotropy and heat resistance can be obtained by crosslinking with heat or light. .
また、芳香族を含む高分子が、ポリアミドを主としてなり、ポリアミドの場合、それらの溶液またはそれらの前駆体の溶液をキャストして加熱することで、耐熱性に優れるプラスチック基板が得られ好ましい。また、芳香族を含む高分子が、ポリイミドを主としてなり、ポリイミドの場合も同様に、それらの溶液またはそれらの前駆体の溶液をキャストして加熱することで、耐熱性に優れるプラスチック基板が得られ好ましい。 In addition, the polymer containing aromatics is mainly polyamide, and in the case of polyamide, it is preferable that a plastic substrate having excellent heat resistance is obtained by casting and heating the solution or the precursor solution thereof. In addition, the polymer containing aromatic is mainly polyimide, and in the case of polyimide as well, a plastic substrate having excellent heat resistance can be obtained by casting and heating the solution of these or the precursor. preferable.
プラスチック基板２は、３０℃から１５０℃における線膨張係数が２０ｐｐｍ／℃以下であり、プラスチック基板２の線膨張係数が酸化物半導体や金属配線と近いほうが、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 The plastic substrate 2 has a linear expansion coefficient of 20 ppm / ° C. or less at 30 ° C. to 150 ° C., and when the oxide substrate or metal wiring is formed when the plastic substrate 2 has a linear expansion coefficient closer to that of the oxide semiconductor or metal wiring. It is preferable that warpage and cracks in the oxide semiconductor hardly occur.
また、プラスチック基板２が、無機物を含有してなり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。無機物が、直径１ｎｍ以上３００ｎｍ以下のガラス、シリカまたは金属酸化物であり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。また、無機物が、ガラス繊維であり、酸化物半導体や金属配線を形成した際に反りや酸化物半導体のクラックが発生しにくく好ましい。 Moreover, the plastic substrate 2 contains an inorganic substance, and it is preferable that warpage and cracks in the oxide semiconductor are less likely to occur when an oxide semiconductor or a metal wiring is formed. The inorganic substance is glass, silica, or a metal oxide having a diameter of 1 nm to 300 nm, and it is preferable that warpage and cracks of the oxide semiconductor are less likely to occur when an oxide semiconductor or a metal wiring is formed. In addition, the inorganic substance is glass fiber, and it is preferable that warping or cracking of the oxide semiconductor hardly occur when an oxide semiconductor or a metal wiring is formed.
この実施の形態の半導体層７が、アモルファスであると、結晶質よりもフレキシビリティが良好であり、フレキシブルなプラスチック基板上に形成する場合には好ましい。 If the semiconductor layer 7 of this embodiment is amorphous, it has better flexibility than crystalline and is preferable when formed on a flexible plastic substrate.
また、半導体層７は、非金属元素の窒素（Ｎ）、酸素（Ｏ）のうち少なくともひとつ、半金属元素のホウ素（Ｂ）、シリコン（Ｓｉ）、ゲルマニウム（Ｇｅ）、ヒ素（Ａｓ）、アンチモン（Ｓｂ）、テルル（Ｔｅ）、ポロニウム（Ｐｏ）のうち少なくともひとつ、および金属元素のアルミニウム（Ａｌ）、亜鉛（Ｚｎ）、ガリウム（Ｇａ）、カドニウム（Ｃｄ）、インジウム（Ｉｎ）、錫（Ｓｎ）、水銀（Ｈｇ）、タリウム（Ｔｌ）、テルビウム（Ｐｂ）、ビスマス（Ｂｉ）のうち少なくともひとつを含み、非金属元素が、少なくとも酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２であることで、半導体層７への窒素（Ｎ）の導入により比較的高い電界効果移動度を実現できる。また、半導体層７への窒素（Ｎ）の導入によりバンドギャップを広げることで、光による特性変動をさらに抑制することができ、熱による特性変動も抑制することができる。 Further, the semiconductor layer 7 includes at least one of nitrogen (N) and oxygen (O) as non-metallic elements, boron (B), silicon (Si), germanium (Ge), arsenic (As), and antimony as semi-metallic elements. At least one of (Sb), tellurium (Te), and polonium (Po), and the metal elements aluminum (Al), zinc (Zn), gallium (Ga), cadmium (Cd), indium (In), tin (Sn ), Mercury (Hg), thallium (Tl), terbium (Pb), bismuth (Bi), and the nonmetallic element is a mixture of at least oxygen (O) and nitrogen (N), and oxygen (O When the ratio of nitrogen (N) to N) (N number density / O number density) is 0 to 2, relatively high field effect mobility can be realized by introducing nitrogen (N) into the semiconductor layer 7. Further, by widening the band gap by introducing nitrogen (N) into the semiconductor layer 7, it is possible to further suppress the characteristic variation due to light and to suppress the characteristic variation due to heat.
また、半導体層７が、インジウム（Ｉｎ）、錫（Ｓｎ）、シリコン（Ｓｉ）、酸素（Ｏ）、窒素（Ｎ）を主としてなると、１５０℃以下で成膜した場合にも良好な電界効果移動度を得られやすいことに加え、よりバンドギャップを広げることで、光による特性変動をさらに抑制することができ、熱による特性変動も抑制することができる。 In addition, when the semiconductor layer 7 is mainly composed of indium (In), tin (Sn), silicon (Si), oxygen (O), and nitrogen (N), good field-effect transfer can be achieved even when the film is formed at 150 ° C. or lower. In addition to being easy to obtain a degree, by further widening the band gap, it is possible to further suppress characteristic fluctuations due to light and to suppress characteristic fluctuations due to heat.
（第２の実施の形態）
図２は第２の実施の形態のアクティブマトリクス表示装置の構成を説明する断面図である。
(Second Embodiment)
FIG. 2 is a cross-sectional view illustrating the configuration of the active matrix display device according to the second embodiment.
この実施の形態のアクティブマトリクス表示装置は、図１の実施の形態と同じ構成は、同じ符号を付して説明を省略する。プラスチック基板２の上面には、バリア層３が形成され、このバリア層３の上面には、遮光層８が設けられ、遮光層８の上面には、絶縁層４が設けられている。 In the active matrix display device of this embodiment, the same components as those of the embodiment of FIG. A barrier layer 3 is formed on the upper surface of the plastic substrate 2, a light shielding layer 8 is provided on the upper surface of the barrier layer 3, and an insulating layer 4 is provided on the upper surface of the light shielding layer 8.
薄膜トランジスタ１は、半導体層７の下面が絶縁層４と接し、この半導体層７の上面が金属層６ａ，６ｂ及び層間絶縁膜５と接し、金属層６ｃは、遮光層８の上面と接し、絶縁層４の下面と接し、半導体層７をチャネル、金属層６ａをソース電極、金属層６ｂをドレイン電極、および金属層６ｃをゲート電極、絶縁層４をゲート絶縁膜として用いている。 In the thin film transistor 1, the lower surface of the semiconductor layer 7 is in contact with the insulating layer 4, the upper surface of the semiconductor layer 7 is in contact with the metal layers 6 a and 6 b and the interlayer insulating film 5, and the metal layer 6 c is in contact with the upper surface of the light shielding layer 8. The semiconductor layer 7 is used as a channel, the metal layer 6a is used as a source electrode, the metal layer 6b is used as a drain electrode, the metal layer 6c is used as a gate electrode, and the insulating layer 4 is used as a gate insulating film.
この実施の形態では、プラスチック基板２は、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層８を有し、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上である。 In this embodiment, the plastic substrate 2 has a light shielding layer 8 having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm, and has a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm. .
この実施の形態では、プラスチック基板２に波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層８を有し、波長４５０ｎｍ、波長５４０ｎｍおよび波長６２０ｎｍにおける光線透過率が８０％以上であるプラスチック基板を用いることにより、酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを用いた場合でも、ＯＦＦ時の抵抗が下がることを抑制できるとともに、青，赤，緑の波長の光に対しては高い光線透過率を有するため、カラー表示を行う表示装置に用いることができる。 In this embodiment, the plastic substrate 2 has a light shielding layer 8 having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm, and has a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm. By using a substrate, a mixture of oxygen (O) and nitrogen (N) contains a nonmetallic element having a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 Even when a thin film transistor formed using a semiconductor layer as a channel is used, it is possible to suppress a decrease in resistance at the time of OFF, and it has a high light transmittance for light of blue, red, and green wavelengths. It can be used for a display device that performs display.
（第３の実施の形態）
図３は第３の実施の形態のアクティブマトリクス表示装置の構成を説明する断面図である。
(Third embodiment)
FIG. 3 is a cross-sectional view illustrating the configuration of the active matrix display device according to the third embodiment.
この実施の形態のアクティブマトリクス表示装置は、図１の実施の形態と同じ構成は、同じ符号を付して説明を省略する。この実施の形態では、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層９ａを、層間絶縁膜５の上面に形成し、遮光層９ａを、薄膜トランジスタ１の上方に形成している。 In the active matrix display device of this embodiment, the same components as those of the embodiment of FIG. In this embodiment, a light shielding layer 9 a having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm is formed on the upper surface of the interlayer insulating film 5, and the light shielding layer 9 a is formed above the thin film transistor 1.
この実施の形態では、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層９ａを、薄膜トランジスタ１の上方に形成しており、例えば液晶表示装置を製造する際に紫外線照射により配向膜の処理を行う場合など、プラスチック基板２の薄膜トランジスタ１側から紫外線が照射される場合があるので、半導体層７の上方に遮光層９ａを形成することが好ましい。 In this embodiment, a light shielding layer 9a having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm is formed above the thin film transistor 1, and for example, when manufacturing a liquid crystal display device, the alignment film is irradiated by ultraviolet irradiation. In some cases, such as when processing, ultraviolet light may be irradiated from the thin film transistor 1 side of the plastic substrate 2, so that the light shielding layer 9 a is preferably formed above the semiconductor layer 7.
（第４の実施の形態）
図４は第４の実施の形態のアクティブマトリクス表示装置の構成を説明する断面図である。
(Fourth embodiment)
FIG. 4 is a cross-sectional view illustrating the configuration of the active matrix display device according to the fourth embodiment.
この実施の形態のアクティブマトリクス表示装置は、図２の実施の形態と同じ構成は、同じ符号を付して説明を省略する。この実施の形態では、波長２００ｎｍから３７０ｎｍにおける光線透過率が１０％以下である遮光層９ｂを、層間絶縁膜５の上面に形成し、遮光層９ｂを、薄膜トランジスタ１の上方に形成している。 In the active matrix display device of this embodiment, the same components as those of the embodiment of FIG. In this embodiment, a light shielding layer 9 b having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm is formed on the upper surface of the interlayer insulating film 5, and the light shielding layer 9 b is formed above the thin film transistor 1.
この実施の形態では、遮光層８を薄膜トランジスタ１の下上方側に形成しているが、例えば液晶表示装置を製造する際に紫外線照射により配向膜の処理を行う場合など、プラスチック基板２の薄膜トランジスタ１側から紫外線が照射される場合があるので、半導体層７の上方に遮光層９ａを形成することが好ましい。 In this embodiment, the light shielding layer 8 is formed below the thin film transistor 1. However, the thin film transistor 1 on the plastic substrate 2 is used when, for example, the alignment film is processed by ultraviolet irradiation when manufacturing a liquid crystal display device. Since the ultraviolet rays may be irradiated from the side, it is preferable to form the light shielding layer 9 a above the semiconductor layer 7.
［アクティブマトリクス表示装置の製造方法］
この実施の形態のアクティブマトリクス表示装置の製造方法は、アクティブマトリクス表示装置の半導体層を、スパッタ装置を用いて形成することで、１５０℃以下で成膜した場合にも良好な電界効果移動度を得られやすい。このスパッタ装置は、図５及び図６に示すように構成される。
[Method for Manufacturing Active Matrix Display Device]
In the manufacturing method of the active matrix display device according to this embodiment, the semiconductor layer of the active matrix display device is formed by using a sputtering device, so that a good field-effect mobility can be obtained even when the film is formed at 150 ° C. or lower. Easy to obtain. This sputtering apparatus is configured as shown in FIGS.
この実施の形態のスパッタ装置２１は、ロール巻機構２２ａ，２２ｂと、送出機構２３と、巻取機構２４と、位置合わせ機構２５と、金属ターゲット２６ａ，２６ｂと、を有し、これらの全ての機構を内部に保持する真空チャンバ２７を備えている。この真空チャンバ２７は、ロール巻機構２２ａ，２２ｂ側に開閉扉２７ａ，２７ｂを有し、開閉扉２７ａを開閉してロール状フィルム基板Ｐをセットし、開閉扉２７ｂを開閉して半導体層７が設けられたロール状フィルム基板Ｐを取り出す。 The sputtering apparatus 21 of this embodiment includes roll winding mechanisms 22a and 22b, a delivery mechanism 23, a winding mechanism 24, an alignment mechanism 25, and metal targets 26a and 26b. A vacuum chamber 27 is provided to hold the mechanism inside. This vacuum chamber 27 has opening / closing doors 27a, 27b on the roll winding mechanisms 22a, 22b side, opens / closes the opening / closing door 27a, sets the roll-shaped film substrate P, opens / closes the opening / closing door 27b, and the semiconductor layer 7 is opened. The provided roll-shaped film substrate P is taken out.
ロール巻機構２２ａは、回転軸２２ａ１にロール状フィルム基板Ｐを装着し、回転軸２２ａ１はロール状フィルム基板Ｐの送り出しによって回転し、ロール巻機構２２ｂは、回転軸２２ｂ１にロール状フィルム基板Ｐを装着し、回転軸２２ｂ１はロール状フィルム基板Ｐの巻き取りによって回転する。 The roll winding mechanism 22a mounts the roll-shaped film substrate P on the rotation shaft 22a1, the rotation shaft 22a1 rotates by feeding the roll-shaped film substrate P, and the roll winding mechanism 22b causes the roll-shaped film substrate P to rotate on the rotation shaft 22b1. The rotating shaft 22b1 is rotated by winding the roll-shaped film substrate P.
送出機構２３は、一対の送出ローラ２３ａを有し、この一対の送出ローラ２３ａの回転によってロール状フィルム基板Ｐを長尺方向に沿って一方の端部から送り出す。 The delivery mechanism 23 has a pair of delivery rollers 23a, and feeds the roll-shaped film substrate P from one end along the longitudinal direction by the rotation of the pair of delivery rollers 23a.
巻取機構２４は、一対の巻取ローラ２４ｂを有し、この一対の巻取ローラ２４ｂの回転によってロール状フィルム基板Ｐを長尺方向に沿って一方の端部から巻き取る。 The winding mechanism 24 has a pair of winding rollers 24b, and winds the roll-shaped film substrate P from one end along the longitudinal direction by the rotation of the pair of winding rollers 24b.
位置合わせ機構２５は、検出センサ２５ａ、制御装置２５ｂ、ローラ駆動装置２５ｃを有し、検出センサ２５ａによって、図６に示すロール状フィルム基板Ｐの位置合わせパターンＡを検出し、この検出情報を制御装置２５ｂに送り、制御装置２５ｂはローラ駆動装置２５ｃを介して送出機構２３及び巻取機構２４を制御し、ロール状フィルム基板Ｐの平面位置合わせを行う。 The alignment mechanism 25 includes a detection sensor 25a, a control device 25b, and a roller drive device 25c. The detection sensor 25a detects the alignment pattern A of the roll-shaped film substrate P shown in FIG. 6, and controls this detection information. The control device 25b controls the delivery mechanism 23 and the winding mechanism 24 via the roller drive device 25c to align the roll-shaped film substrate P with the plane.
真空チャンバ２７内は、真空ポンプ２８に駆動によって真空状態であり、この真空チャンバ２７には、ガス導入機構２９が設けられ、このガス導入機構２９は非金属元素を含む雰囲気ガスを真空チャンバ２７内に導入する。 The inside of the vacuum chamber 27 is in a vacuum state by being driven by a vacuum pump 28, and a gas introduction mechanism 29 is provided in the vacuum chamber 27, and the gas introduction mechanism 29 supplies an atmospheric gas containing a non-metallic element in the vacuum chamber 27. To introduce.
金属ターゲット２６ａ，２６ｂは、ロール状フィルム基板Ｐの半導体形成面に対面し、ロール状フィルム基板Ｐの長尺に沿った直線状の位置に配列されている。 The metal targets 26 a and 26 b face the semiconductor formation surface of the roll film substrate P and are arranged at linear positions along the length of the roll film substrate P.
金属ターゲット２６ａは、金属元素のターゲットであり、金属ターゲット２６ｂａは、半金属元素のターゲットである。 The metal target 26a is a metal element target, and the metal target 26ba is a metalloid element target.
スパッタ装置２１は、金属ターゲット２６ａ，２６ｂとし、非金属元素、金属元素、半金属元素それぞれ少なくともひとつを含む複数の元素を混ぜ合わせた混合物を、単一のターゲットとして用いているが、金属ターゲット２６ａ，２６ｂを一体のターゲットとてもよい。 The sputtering apparatus 21 uses metal mixtures 26a and 26b as a single target, which is a mixture of a plurality of elements including at least one of a nonmetallic element, a metallic element, and a semimetallic element, but the metallic target 26a. , 26b is a very good target.
このように、スパッタ装置２１は、ガス導入機構２９により、真空チャンバ２７内に非金属元素を含む雰囲気ガスを導入し、真空チャンバ２７内に金属ターゲット２６ａ，２６ｂの金属元素または半金属元素またはこれらの混合物を含む金属ターゲットを複数配置し、電極を介して金属ターゲット２６ａ，２６ｂに高電圧をかけると金属ターゲット表面の原子がはじき飛ばされ、真空チャンバ２７内に導入された非金属元素を含む雰囲気ガスと、はじき飛ばされた金属と反応させることによって、ロール状フィルム基板Ｐに半導体層７を製膜することができる。 As described above, the sputtering apparatus 21 introduces the atmospheric gas containing the nonmetallic element into the vacuum chamber 27 by the gas introduction mechanism 29, and the metal element or metalloid element of the metal targets 26 a and 26 b or these elements into the vacuum chamber 27. When a high voltage is applied to the metal targets 26 a and 26 b through the electrodes by arranging a plurality of metal targets containing a mixture of the above, atoms on the surface of the metal target are repelled and an atmospheric gas containing a nonmetallic element introduced into the vacuum chamber 27 Then, the semiconductor layer 7 can be formed on the roll-shaped film substrate P by reacting with the repelled metal.
このスパッタ装置２１を用い、低温プロセスで半導体層７を形成可能であり、低プロセスコストを実現することができる。また、半導体層７は、比較的高い電界効果移動度を実現でき、かつ光、熱に対して安定な特性を有する薄膜トランジスタ１を製造することができる。 Using this sputtering apparatus 21, the semiconductor layer 7 can be formed by a low-temperature process, and a low process cost can be realized. In addition, the semiconductor layer 7 can produce the thin film transistor 1 that can realize a relatively high field effect mobility and has stable characteristics with respect to light and heat.
また、半導体層７は自在にバンドギャップを制御でき、また電界効果移動度を増大させることができる薄膜トランジスタ１を製造することができる。 Further, the semiconductor layer 7 can freely control the band gap, and the thin film transistor 1 capable of increasing the field effect mobility can be manufactured.
また、スパッタ装置２１は、全ての機構を内部に保持する真空チャンバ２７を備え、製造時にロール状態から送り出しロール状態に巻き取り、低プロセスコストを実現することができる。 In addition, the sputtering apparatus 21 includes a vacuum chamber 27 that holds all the mechanisms inside, and can be wound from the roll state to the feed roll state at the time of manufacture to realize a low process cost.
また、スパッタ装置２１は、非金属元素を含む雰囲気ガスを真空チャンバ２７内に導入し、金属元素または半金属元素またはこれらの混合物を含む金属ターゲット２６ａ，２６ｂを複数有し、金属ターゲット２６ａ，２６ｂが、ロール状フィルム基板Ｐの長尺に沿った直線状の位置に配列され、ロール状フィルム基板Ｐ内に均一な性質の半導体層７を形成できる。 Further, the sputtering apparatus 21 introduces an atmospheric gas containing a non-metallic element into the vacuum chamber 27, has a plurality of metal targets 26a and 26b containing a metal element, a semi-metal element, or a mixture thereof, and the metal targets 26a and 26b. However, the semiconductor layer 7 having a uniform property can be formed in the roll-shaped film substrate P by being arranged at linear positions along the length of the roll-shaped film substrate P.
この発明は、特に、薄膜トランジスタを有するアクティブマトリクス表示装置及びアクティブマトリクス表示装置の製造方法に適用可能で、紫外線の影響により特性が悪化することを防止することが可能である。 The present invention is particularly applicable to an active matrix display device having thin film transistors and a method for manufacturing the active matrix display device, and can prevent deterioration of characteristics due to the influence of ultraviolet rays.
１ 薄膜トランジスタ
２ プラスチック基板
３ バリア層
５ 層間絶縁膜
６ａ，６ｂ，６ｃ 金属層
７ 半導体層
８，９ａ，９ｂ 遮光層
２１ スパッタ装置
２２ａ，２２ｂ ロール巻機構
２３ 送出機構
２４ 巻取機構
２５ 位置合わせ機構
２６ａ，２６ｂ 金属ターゲット
２７ 真空チャンバ
２９ ガス導入機構
Ｐ ロール状フィルム基板
DESCRIPTION OF SYMBOLS 1 Thin-film transistor 2 Plastic substrate 3 Barrier layer 5 Interlayer insulation film 6a, 6b, 6c Metal layer 7 Semiconductor layer 8, 9a, 9b Light-shielding layer 21 Sputtering device 22a, 22b Roll winding mechanism 23 Sending mechanism 24 Winding mechanism 25 Positioning mechanism 26a , 26b Metal target 27 Vacuum chamber 29 Gas introduction mechanism P Rolled film substrate
Claims (17)
酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを有することを特徴とするアクティブマトリクス表示装置。 On a plastic substrate having a light transmittance of 10% or less at a wavelength of 200 nm to 320 nm and a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm,
A channel is formed using a semiconductor layer containing a nonmetallic element which is a mixture of oxygen (O) and nitrogen (N) and has a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 for a channel. An active matrix display device comprising a thin film transistor formed in the above manner.
酸素（Ｏ）と窒素（Ｎ）の混合物で酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２である非金属元素を含む半導体層をチャネルに用いて形成した薄膜トランジスタを有することを特徴とするアクティブマトリクス表示装置。 On a plastic substrate having a light-shielding layer having a light transmittance of 10% or less at a wavelength of 200 nm to 370 nm, and having a light transmittance of 80% or more at a wavelength of 450 nm, a wavelength of 540 nm, and a wavelength of 620 nm,
A channel is formed using a semiconductor layer containing a nonmetallic element having a ratio of nitrogen (N) to oxygen (O) (N number density / O number density) of 0 to 2 in a mixture of oxygen (O) and nitrogen (N) as a channel. An active matrix display device comprising a thin film transistor formed.
前記非金属元素が、少なくとも酸素（Ｏ）と窒素（Ｎ）の混合物で、酸素（Ｏ）に対する窒素（Ｎ）の比（Ｎ数密度／Ｏ数密度）が０乃至２であることを特徴とする請求項１乃至請求項１４のいずれか１項に記載のアクティブマトリクス表示装置。 The semiconductor layer includes at least one of nonmetallic elements nitrogen (N) and oxygen (O), semimetallic elements boron (B), silicon (Si), germanium (Ge), arsenic (As), and antimony (Sb). ), Tellurium (Te), at least one of polonium (Po), and the metal elements aluminum (Al), zinc (Zn), gallium (Ga), cadmium (Cd), indium (In), tin (Sn), Including at least one of mercury (Hg), thallium (Tl), terbium (Pb), bismuth (Bi),
The nonmetallic element is at least a mixture of oxygen (O) and nitrogen (N), and the ratio of nitrogen (N) to oxygen (O) (N number density / O number density) is 0 to 2. The active matrix display device according to any one of claims 1 to 14.
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| KR20130105165A (en) * | 2012-03-16 | 2013-09-25 | 한국전자통신연구원 | Thin film transistor |
| JP2013225620A (en) * | 2012-04-23 | 2013-10-31 | Semiconductor Energy Lab Co Ltd | Display device, process of manufacturing the same, and electronic apparatus |
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| JP5613851B1 (en) * | 2014-02-28 | 2014-10-29 | Jsr株式会社 | Display or lighting device |
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| Publication number | Publication date |
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| KR101459203B1 (en) | 2014-11-07 |
| WO2011104895A1 (en) | 2011-09-01 |
| KR20120130240A (en) | 2012-11-29 |
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